TWM452600U - Heat dissipation carrier structure and electronic assembly - Google Patents

Abstract

A heat dissipation carrier structure adapted to be connected with at least one electronic component is provided. The electronic component includes a body and at least one lead extended from the body. The heat dissipation carrier structure includes a heat dissipation substrate, a patterned dielectric layer and a patterned circuit layer. The heat dissipation substrate has a first surface and a second surface relative to the first surface. The patterned dielectric layer is disposed on the first surface. The patterned circuit layer is disposed on the patterned dielectric layer. The electronic component is adapted to thermally connect to the first surface of the heat dissipation substrate by the body and connect to the patterned circuit layer by the lead so as to dissipate the heat through part of the first surface without being covered by the patterned dielectric layer and the second surface. An electronic assembly is also provided.

Description

Thermal carrier structure and electronic assembly

The present invention relates to a heat sink carrier and an electronic assembly, and more particularly to a heat sink carrier structure and electronic assembly of the heat sink carrier structure.

In recent years, the technology of using high-power and high-brightness light-emitting diode (LED) components as light sources has been rapidly developed, and the light-emitting diode components are used for backlight modules, mini projectors or illumination of displays. Applications such as light sources are also receiving attention. The current input power of a light-emitting diode component is converted from about 15% to 20% into light energy, and the remaining 80% to 85% is converted into heat energy. It can be seen that if the heat is not dissipated in time during operation, the LED component is likely to affect its luminous intensity and service life due to excessive temperature. Therefore, the heat dissipation performance of the light-emitting diode element and the device using the light-emitting diode element has been gradually taken into consideration.

The light-emitting diode elements are often disposed on the heat dissipation carrier via a packaging process. The heat sink carrier typically includes a heat sink substrate, a dielectric layer, and a circuit layer. The light emitting diode element is connected to the external electronic device by connecting the circuit layers. In addition, in order to prevent the circuit layer from contacting the heat-dissipating substrate which is generally conductive, the dielectric layer is disposed between the heat-dissipating substrate and the circuit layer and covers the heat-dissipating substrate in its entirety. At this time, the heat dissipation substrate covered by the dielectric layer cannot directly contact the air for heat dissipation, so that the heat dissipation performance of the heat dissipation carrier is not good.

The present invention provides a heat dissipation carrier structure suitable for connecting electronic components to provide good heat dissipation performance.

This creation provides an electronic assembly with good heat dissipation.

The present application proposes a heat dissipation carrier structure comprising a heat dissipation substrate, a patterned dielectric layer and a patterned circuit layer. The heat dissipation substrate has a first surface and a second surface opposite to the first surface. The patterned dielectric layer is disposed on the first surface of the heat dissipation substrate. The patterned circuit layer is disposed on the patterned dielectric layer.

The present invention further proposes an electronic assembly comprising at least one electronic component and a heat sink carrier structure. The electronic component includes a body and at least one pin extending from the body. The thermal carrier structure connects the electronic components. The heat dissipation carrier structure includes a heat dissipation substrate, a patterned dielectric layer, and a patterned circuit layer. The heat dissipation substrate has a first surface and a second surface opposite to the first surface. The patterned dielectric layer is disposed on the first surface of the heat dissipation substrate. The patterned circuit layer is disposed on the patterned dielectric layer. The electronic component is thermally connected to the first surface of the heat dissipation substrate by a body and is connected to the patterned circuit layer by a pin.

Based on the above, the heat dissipation carrier structure proposed by the present invention places the patterned dielectric layer on the first surface of the heat dissipation substrate, and the patterned circuit layer is disposed on the patterned dielectric layer. Therefore, the electronic component is thermally connected to the first surface of the heat dissipation substrate by the body and the patterned circuit layer is connected by a pin to dissipate heat through the portion of the first surface that is not shielded by the patterned dielectric layer and the second surface. Accordingly, the heat sink carrier structure is adapted to connect electronic components to provide good heat dissipation performance. In addition, the electronic assembly application proposed by the present invention uses a heat dissipation carrier structure. Accordingly, the electronic assembly has good heat dissipation performance.

In order to make the above features and advantages of the present invention more comprehensible, the following embodiments are described in detail with reference to the accompanying drawings.

1 is a top plan view of an electronic assembly of an embodiment of the present invention. Referring to FIG. 1 , in the present embodiment, the electronic assembly 50 includes a plurality of electronic components 52 and a heat dissipation carrier structure 100 . Each electronic component 52 includes a body 52a and two pins 52b extending from the body 52a, and the heat sink carrier structure 100 is coupled to the electronic component 52. The electronic component 52 is, for example, a light emitting diode (LED) element, but the present invention does not limit the type and number of electronic components, nor does it limit the number of pins of the electronic component. The electronic component 52 is coupled to an external electronic device (eg, an external power source or control circuit) via the thermal carrier structure 100 such that the electronic component 52 can operate via power or signal driving. At this time, the thermal energy generated by the electronic component 52 due to the operation is transmitted to the heat dissipation carrier structure 100. Therefore, the heat dissipation performance of the heat dissipation carrier structure 100 will affect the operation of the electronic component 52.

2 is a top plan view of the heat sink carrier structure of FIG. 1. Figure 3 is a cross-sectional view showing the electronic assembly of Figure 1 taken along the line I-I'. Referring to FIGS. 1 through 3, in the present embodiment, the heat dissipation carrier structure 100 is adapted to connect the electronic components 52. The heat dissipation carrier structure 100 includes a heat dissipation substrate 110 , a patterned dielectric layer 120 , a patterned circuit layer 130 , and a patterned solder resist layer 140 . The heat dissipation substrate 110 has a first surface 112 and a second surface 114 opposite to the first surface 112. The patterned dielectric layer 120 is disposed on the first surface 112 of the heat dissipation substrate 110 The patterned circuit layer 130 is disposed on the patterned dielectric layer 120.

In detail, the patterned circuit layer 130 is connected to the electronic component 52 correspondingly, so that the electronic component 52 and the patterned circuit layer 130 form a loop suitable for connecting external electronic devices, as shown in FIGS. 1 and 2. In addition, the patterned dielectric layer 120 is disposed on the first surface 112, and then the patterned circuit layer 130 is disposed on the patterned dielectric layer 120, so that the patterned dielectric layer 120 can be positioned on the patterned circuit layer 130. The patterned circuit layer 130 and the heat dissipation substrate 110 are separated from the heat dissipation substrate 110 to prevent the patterned circuit layer 130 from contacting the heat dissipation substrate 110 which is generally conductive.

In the present embodiment, the patterned circuit layer 130 needs to be entirely on the patterned dielectric layer 120, so that the patterned dielectric layer 120 can completely separate the patterned circuit layer 130 and the heat dissipation substrate 110. However, the patterned dielectric layer 120 is disposed on the first surface 112 of the heat dissipation substrate 110 such that the first surface 112 cannot directly contact the air to dissipate heat, thereby affecting the heat dissipation performance of the heat dissipation substrate 110. In other words, as the area of the patterned dielectric layer 120 increases, the area covered by the patterned dielectric layer 120 of the first surface 112 also increases to reduce the heat dissipation performance of the heat dissipation substrate 110.

On the other hand, the area of the patterned circuit layer 130 actually only occupies a portion of the heat dissipation substrate 110. For example, the patterned circuit layer 130 of the present embodiment is used to connect the electronic components 52 in series to form a loop. Therefore, the ratio of the area of the patterned circuit layer 130 of the present embodiment to the area of the heat dissipation substrate 110 is 10% to 20%. At this time, if the patterned dielectric layer 120 having an excessively large area is disposed, for example, the ratio of the area of the patterned dielectric layer 120 to the area of the heat dissipation substrate 110 is as high as 80% or even 100%. The ratio is only for illustrative purposes. Although it is ensured that the patterned dielectric layer 120 completely separates the patterned circuit layer 130 from the heat dissipation substrate 110, the partially patterned dielectric layer 120 that does not correspond to the patterned circuit layer 130 does not function. The dielectric function affects the heat dissipation performance of the heat dissipation substrate 110.

Therefore, in the present embodiment, the pattern of the patterned dielectric layer 120 corresponds to the pattern of the patterned circuit layer 130 , that is, the patterned dielectric layer 120 is correspondingly disposed between the patterned circuit layer 130 and the heat dissipation substrate 110 . Furthermore, the patterned dielectric layer 120 is disposed only under the patterned circuit layer 130, and the area of the patterned dielectric layer 120 is larger than the area of the patterned circuit layer 130, such as the area of the patterned circuit layer 130. The ratio of the area of the patterned dielectric layer 120 is 70% to 95% or 70% to 90%. Accordingly, the patterned dielectric layer 120 can avoid the tolerance during the manufacturing process, causing the patterned circuit layer 130 to contact the heat dissipation substrate 110, and can also reduce the area covered by the patterned dielectric layer 120 of the heat dissipation substrate 110, thereby improving the heat dissipation substrate. 110 heat dissipation performance.

4 is a partially enlarged perspective view showing the structure of the heat dissipation carrier of FIG. 2. Referring to FIG. 2 to FIG. 4 , in the embodiment, the patterned solder resist layer 140 is disposed on the patterned dielectric layer 120 and covers the partial patterned circuit layer 130 . Specifically, the area of the patterned solder resist layer 140 is larger than the area of the patterned circuit layer 130. The patterned solder mask layer 140 covers the patterned circuit layer 130 to prevent the patterned circuit layer 130 from coming into contact with the outside. At this time, since the area of the patterned dielectric layer 120 is larger than the patterned circuit layer 130, when the patterned solder resist layer 140 is disposed on the patterned dielectric layer 120, the covered portion of the patterned solder resist layer 140 is disposed in the patterning. Patterned circuit layer 130 on dielectric layer 120, and The portion of the patterned solder resist layer 140 that is not in contact with the patterned circuit layer 130 is on the patterned dielectric layer 120. Accordingly, the patterned circuit layer 130 can be considered to be co-coated with the patterned solder resist layer 140 via the patterned dielectric layer 120.

On the other hand, the partially patterned circuit layer 130 partially covered by the patterned solder resist layer 140 forms the pads 132. In the present embodiment, the patterned solder resist layer 140 covers most of the patterned circuit layer 130, while the region of the patterned circuit layer 130 that is not partially covered by the patterned solder resist layer 140, that is, the pads 132 are formed. Therefore, the electronic component 52 can be connected to the patterned circuit layer 130 through the pad 132.

Referring to FIG. 1 to FIG. 3 , in the embodiment, the electronic component 52 is thermally connected to the first surface 112 of the heat dissipation substrate 110 by the body 52 a and the patterned circuit layer 130 is connected by the lead 52 b to pass through the first surface 112 . The portion shielded by the patterned dielectric layer 120 and the second surface 114 dissipate heat. Specifically, in the present embodiment, the electronic component 52 is fixed to the pad 132 of the patterned circuit layer 130 by the solder 52c to connect the lead 52b to the patterned circuit layer 130. In addition, the electronic component 52 thermally connects the body 52a to the first surface 112 of the heat dissipation substrate 110 by the thermal conductive paste 52d (which may also be soldered 52c), but the present invention does not restrict the body 52a from thermally connecting the first surface 112 and the lead 52b. The manner in which the patterned circuit layer 130 is connected.

It can be seen that the electronic component 52 is thermally connected to the first surface 112 of the heat dissipation substrate 110 by the body 52a, so that thermal energy generated by the operation of the electronic component 52 can be transmitted to the first surface 112 of the heat dissipation substrate 110 so as not to be removed from the first surface 112. The portion of the patterned dielectric layer 120 is thermally dissipated via heat radiation, and may also be thermally transferred from the first surface 112 of the heat dissipation substrate 110 to the second surface. Face 114 is to dissipate heat from second surface 114 via thermal radiation. Therefore, the electronic assembly 50 of the present invention has good heat dissipation performance via the heat dissipation carrier structure 100 having the patterned dielectric layer 120.

In the embodiment, the material of the heat dissipation substrate 110 includes a carbon-containing composite material. The carbon-containing composite material is made by doping a carbon-containing reinforcing material such as graphite fiber, graphite powder, scaly graphite, foamed graphite or diamond powder to a base material such as aluminum, copper, zinc, magnesium, titanium, silver or an alloy thereof. For example, a carbon fiber aluminum-based composite material, a carbon fiber copper-based composite material, a graphite aluminum-based composite material, or a graphite copper-based composite material, but the present invention does not limit the kind of the carbon-containing composite material, nor does it limit the material of the heat dissipation substrate 110.

The carbon-containing composite material has high thermal conductivity characteristics compared to the conventional aluminum metal plate or copper metal plate as the heat dissipation substrate. For example, aluminum metal sheets have a thermal conductivity of 180 W/mK, while carbon-containing composites typically have a thermal conductivity higher than 500 W/mK. Therefore, the heat dissipation substrate 110 is made of a carbon-containing composite material having high thermal conductivity, and the rate at which thermal energy is thermally conducted from the first surface 112 of the heat dissipation substrate 110 to the second surface 114 can be improved. In addition, carbon-containing composites also have high emissivity characteristics. Therefore, the surface of the heat dissipation substrate 110 made of the carbon-containing composite material does not need to be subjected to other treatments (for example, coating a surface having a high emissivity), that is, has a high emissivity, so that the first surface 112 and the first surface The efficiency of heat dissipation by the two surfaces 114 via heat radiation is increased, thereby improving the heat dissipation performance of the heat dissipation carrier structure 100.

On the other hand, in the present embodiment, the material of the patterned dielectric layer 120 includes a ceramic material, such as an oxide, a carbide, a nitride, or a mixed ceramic material of two or more thereof, but the creation does not limit the ceramic material. Species The material of the patterned dielectric layer 120 is also not limited. Compared with the conventional polymer material as the dielectric layer, for example, a resin, or a cement material formed by doping a ceramic powder with a polymer material, the ceramic material has a high thermal conductivity property. For example, the thermal conductivity of the glue material is less than about 5 W/mK, and the ceramic material (for example, 60 wt.% to 80 wt.% alumina and 20 wt.% to 40 wt.% tantalum carbide ceramic powder or 70 wt.% oxidation) A ceramic material made of aluminum and 30 wt.% of cerium carbide ceramic powder having a purity of about 99% and a particle size ranging from about 5 μm to 70 μm has a thermal conductivity of about 21 W/mK. Thus, fabricating the patterned dielectric layer 120 from a ceramic material having a high thermal conductivity can increase the rate at which thermal energy is thermally transferred from the electronic component 52 to the first surface 112 of the heat dissipation substrate 110.

In addition, in the present embodiment, the patterned dielectric layer 120 is formed by thermal spraying with a mask that has been previously patterned to spray the ceramic material on the first surface 112 of the heat dissipation substrate 110. Spraying the ceramic material into molten particles for spraying has the advantages of automation, rapid coating deposition rate, and freedom from the size and shape of the workpiece. Therefore, the patterned dielectric layer 120 can be quickly and easily formed on the heat dissipation substrate 110. In addition, the patterned dielectric layer 120 made of a ceramic material also has heat-resistant characteristics, which can improve the service life of the heat-dissipating carrier structure 100.

Figure 5 is a cross-sectional view showing the electronic assembly of another embodiment of the present invention. Referring to FIG. 5 , in other embodiments, the heat dissipation carrier structure 100 a further includes a heat sink 150 . The heat sink 150 is disposed on the second surface 114 of the heat dissipation substrate 110. The heat sink 150 includes a plurality of heat sink fins 152, but the creation does not limit the type of heat sink 150. The thermal energy in the electronic component 52 is heated by heat After being conducted to the second surface 114, the heat sink 150 can assist in dissipating heat from the second surface 114. Therefore, the heat dissipation device 150 can improve the heat dissipation performance of the heat dissipation carrier structure 100a, but the creation does not limit the setting of the heat dissipation device 150.

Actually comparing the heat dissipation condition of the electronic assembly 50 of the patterned dielectric layer 120 of FIG. 1 with the electronic assembly of the unillustrated full-surface dielectric layer, wherein the ambient temperature, the type of the electronic component 52, the heat dissipation substrate 110 and the dielectric The materials of the layers are all the same. In other words, the difference between the electronic assembly 50 and the electronic assembly with the full-face dielectric layer is only whether the dielectric layer is patterned.

The actual measurement is made under these conditions. When the electronic component 52 operates to generate thermal energy, the temperature of the electronic assembly 50 having the patterned dielectric layer 120 is about 53.7 ° C, and the temperature of the electronic assembly having the entire dielectric layer is about 55.1 ° C. In addition, the illuminance of the electronic assembly 50 is 29,800 lux, while the illuminance of the electronic assembly with the full-surface dielectric layer is 29,200 lux. It can be seen that the electronic assembly 50 using the heat dissipation carrier structure 100 having the patterned dielectric layer 120 has good heat dissipation performance and can improve the operational efficiency of the electronic component 52.

On the other hand, the heat dissipation condition of the electronic assembly 50 of the present embodiment and the conventional electronic assembly not shown is compared, wherein the conventional electronic assembly uses an aluminum metal plate (thermal conductivity of 180 W/mK) as a heat dissipation substrate, and is made of a glue material. (The thermal conductivity is less than 5 W/mK) is a full-surface dielectric layer, and the electronic assembly 50 of the present embodiment uses a carbon-containing composite material (having a high thermal conductivity of 500 W/mK) as the heat dissipation substrate 110, and is made of a ceramic material (thermal conductivity). About 21 W/mK) is the patterned dielectric layer 120. In other words, the difference between the electronic assembly 50 having the patterned dielectric layer 120 and the conventional electronic assembly includes the heat dissipation substrate and the dielectric Whether the material of the electrical layer and the dielectric layer are patterned.

When the electronic component 52 (which is exemplified by a light-emitting diode component having a power of 1 watt (W)) generates heat energy, two measurements are made at the same ambient temperature (35 ° C) and with the heat dissipation fins 152 simultaneously. The temperature of the electronic assembly 50 of this embodiment is about 46.62 ° C, while the temperature of the conventional electronic assembly is about 50.23 ° C. Therefore, the heat dissipation performance of the electronic assembly 50 of the present embodiment is improved by 7% compared with the conventional electronic assembly. It can be seen that, in addition to patterning the dielectric layer, appropriately selecting the materials of the heat dissipation substrate 110 and the patterned dielectric layer 120 can contribute to improving the heat dissipation performance of the electronic assembly 50. However, the operating conditions, material parameters, and configurations listed above are merely illustrative of the advantages of the present invention and are not intended to limit the present invention.

In summary, the heat dissipation carrier structure proposed by the present invention places the patterned dielectric layer on the first surface of the heat dissipation substrate, and the patterned circuit layer is disposed on the patterned dielectric layer. Therefore, the electronic component is thermally connected to the first surface of the heat dissipation substrate by the body and the patterned circuit layer is connected by a pin to dissipate heat through the portion of the first surface that is not shielded by the patterned dielectric layer and the second surface. In addition, proper selection of a material having high conductivity as the heat dissipation substrate and the patterned dielectric layer can also contribute to improving the heat dissipation performance of the heat dissipation carrier structure. Accordingly, the heat sink carrier structure is adapted to connect electronic components to provide good heat dissipation performance. In addition, the electronic assembly application proposed by the present invention uses a heat dissipation carrier structure. Accordingly, the electronic assembly has good heat dissipation performance.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any person having ordinary knowledge in the art can make some changes and refinements without departing from the spirit and scope of the present invention. this The scope of protection of the creation shall be subject to the definition of the scope of the patent application attached.

50‧‧‧Electronic assembly

52‧‧‧Electronic components

52a‧‧‧ Ontology

52b‧‧‧ pin

52c‧‧‧ solder

52d‧‧‧thermal paste

100, 100a‧‧‧heated carrier structure

110‧‧‧heated substrate

112‧‧‧ first surface

114‧‧‧ second surface

120‧‧‧ patterned dielectric layer

130‧‧‧ patterned circuit layer

132‧‧‧ pads

140‧‧‧ patterned solder mask

150‧‧‧heating device

152‧‧‧heat fins

1 is a top plan view of an electronic assembly of an embodiment of the present invention.

2 is a top plan view of the heat sink carrier structure of FIG. 1.

Figure 3 is a cross-sectional view showing the electronic assembly of Figure 1 taken along the line I-I'.

4 is a partially enlarged perspective view showing the structure of the heat dissipation carrier of FIG. 2.

Figure 5 is a cross-sectional view showing the electronic assembly of another embodiment of the present invention.

50‧‧‧Electronic assembly

52‧‧‧Electronic components

52a‧‧‧ Ontology

52b‧‧‧ pin

52c‧‧‧ solder

52d‧‧‧thermal paste

100‧‧‧heated carrier structure

110‧‧‧heated substrate

112‧‧‧ first surface

114‧‧‧ second surface

120‧‧‧ patterned dielectric layer

130‧‧‧ patterned circuit layer

132‧‧‧ pads

140‧‧‧ patterned solder mask

Claims (13)

A heat dissipation carrier structure includes: a heat dissipation substrate having a first surface and a second surface opposite to the first surface; a patterned dielectric layer disposed on the first surface of the heat dissipation substrate; A patterned circuit layer is disposed on the patterned dielectric layer. The heat dissipation carrier structure of claim 1, wherein the pattern of the patterned dielectric layer corresponds to a pattern of the patterned circuit layer. The heat dissipation carrier structure according to claim 1, wherein the area of the patterned dielectric layer is larger than the area of the patterned circuit layer. The heat dissipation carrier structure according to claim 3, wherein a ratio of an area of the patterned circuit layer to an area of the patterned dielectric layer is 70% to 95%. The heat dissipation carrier structure of claim 1, further comprising: a patterned solder mask disposed on the patterned dielectric layer and covering the patterned circuit layer. The heat dissipation carrier structure of claim 5, wherein the patterned solder mask layer has an area larger than an area of the patterned circuit layer. An electronic assembly comprising: at least one electronic component comprising: a body and at least one pin extending from the body; and a heat dissipation carrier structure connecting the electronic component, the heat dissipation carrier structure The method includes: a heat dissipation substrate having a first surface and a second surface opposite to the first surface; a patterned dielectric layer disposed on the first surface of the heat dissipation substrate; and a patterned circuit layer, The electronic component is thermally connected to the first surface of the heat dissipation substrate by the body and connected to the patterned circuit layer by the pin. The electronic assembly of claim 7, wherein the pattern of the patterned dielectric layer corresponds to a pattern of the patterned circuit layer. The electronic assembly of claim 7, wherein the patterned dielectric layer has an area greater than an area of the patterned circuit layer. The electronic assembly of claim 9, wherein the ratio of the area of the patterned circuit layer to the area of the patterned dielectric layer is 70% to 95%. The electronic assembly of claim 7, wherein the heat dissipation carrier structure further comprises a patterned solder mask layer disposed on the patterned dielectric layer and covering a portion of the patterned circuit layer, wherein The area covered by the patterned solder mask forms at least one pad, and the electronic component connects the pad with the pin. The electronic assembly of claim 11, wherein the patterned solder mask has an area greater than an area of the patterned circuit layer. The electronic assembly of claim 7, wherein the electronic component comprises a light emitting diode component.