TWM329243U - LED chip package structure with a high-efficiency light-emitting effect - Google Patents

LED chip package structure with a high-efficiency light-emitting effect Download PDF

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Publication number
TWM329243U
TWM329243U TW096214387U TW96214387U TWM329243U TW M329243 U TWM329243 U TW M329243U TW 096214387 U TW096214387 U TW 096214387U TW 96214387 U TW96214387 U TW 96214387U TW M329243 U TWM329243 U TW M329243U
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TW
Taiwan
Prior art keywords
light
emitting diode
package structure
substrate
emitting
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Application number
TW096214387U
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Chinese (zh)
Inventor
bing-long Wang
feng-hui Zhuang
Wen-Kui Wu
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Harvatek Corp
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Application filed by Harvatek Corp filed Critical Harvatek Corp
Priority to TW096214387U priority Critical patent/TWM329243U/en
Priority to DE202007014910U priority patent/DE202007014910U1/en
Priority to JP2007008351U priority patent/JP3138706U/en
Publication of TWM329243U publication Critical patent/TWM329243U/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21—LIGHTING
    • F21K—NON-ELECTRIC LIGHT SOURCES USING LUMINESCENCE; LIGHT SOURCES USING ELECTROCHEMILUMINESCENCE; LIGHT SOURCES USING CHARGES OF COMBUSTIBLE MATERIAL; LIGHT SOURCES USING SEMICONDUCTOR DEVICES AS LIGHT-GENERATING ELEMENTS; LIGHT SOURCES NOT OTHERWISE PROVIDED FOR
    • F21K9/00—Light sources using semiconductor devices as light-generating elements, e.g. using light-emitting diodes [LED] or lasers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • General Engineering & Computer Science (AREA)
  • Led Device Packages (AREA)

Abstract

An LED chip package structure with a high-efficiency light-emitting effect, includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips disposed on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids covered on LED chips, respectively. Each package colloid has a colloid cambered surface formed on a top surface thereof and a colloid light-exiting surface formed on a front surface thereof.

Description

M329243 八、新型說明： 【新型所屬之技術領域] 本創作係有關於一種發光二極體晶片封裝結構，尤指 一種具有高效率側向發光效果之發光二極體晶片封裝= 構。 、。 【先前技術】 請參閱第一圖所示，其係為習知發光二極體之第一種 封裝方法之流程圖。由流程圖中可知，習知發光二極許之 第一種封裝方法，其步驟包括：首先，提供複數個封裝完 成之發光二極體（packaged LED) ( S800);接著，提供一 條狀基板本體（stripped substrate body )，其上具有—正$ 導電軌跡（positive electrode trace)與一負極導^^九跡、 (negative electrode trace )(S802);最後，依序將每_個 封裝完成之發光二極體（packaged LED)設置在今修狀美 板本體上，並將每一個封裝完成之發光二極體（叩二_二 LED)之正、負極端分別電性連接於該條狀基板本雕 正、負極導電執跡（S804)。 ^ 明參閱弟一圖所示’其係為習知發光二極體之第一 封裝方法之流程圖。由流程圖中可知，習知蘇 —種 7Q-極 夕 第二種封裝方法，其步驟包括：首先，提供—條狀其 體（stripped substrate body)，其上具有—:土反本 巧 止極導電執跡 (positive electrode trace)與一負極導雷舎 电罕凡跡（negative electrode trace) (S900);接著，依序將複數個發光二極 6 M329243 體晶片（LED chip )设置於該條狀基板本體上，並且將卞 一個發光二極體晶片之正、負極端分別電性連接於該條= : 基板本體之正、負極導電轨跡（S902);最後，將二^狀 ； 封裝膠體（stripped package colloid)覆蓋於該條狀基板本 體及該等發光二極體晶片上，以形成一帶有條狀發光區域 . (striPPed 如胙⑽此邱 area)之光棒（iight bar)( S9〇4)。 然而，關於上述習知發光二極體之第一種封裝方法， φ 由於每一顆封裝完成之發光二極體（packagedLED)必須 先仗一整塊發光二極體封裝切割下來，然後再以表面黏著 技術（SMT)製程，將每一顆封裝完成之發光二極體 (packagedLED)設置於該條狀基板本體上，因此無法有 效縮短其製程時間，再者，發光時，該等封裝完成之發光 二極體（packagedLED)之間會有暗帶（darkband)現象 存在，對於使用者視線仍然產生不佳效果。 另外’關於上述習知發光二極體之第二種封裝方法， φ 由於所完成之光棒帶有條狀發光區域，因此第二種封裝方 - 法將不會產生暗帶（dark band)的問題。然而，因為該條 狀封裝膠體（striPPed Package colloid)被激發的區域不 因而使得光棒之光效率不佳（亦即，靠近發光二極體 • :片=封裝膠體區域會產生較強的激發光源，而遠離發光 一極，晶片的封裝膠體區域則產生較弱的激發光源）。 =參閱第三圖所示，其係為習知發光二極體應用於側 向發光之不意圖。由圖中可知，當習知之發光二極體晶片 D應用方;侧向發光時（例如：使用於筆記型電腦螢幕之導 7 M329243 光板Μ之侧向光源），由於筆記型電腦螢幕之導光板Μ非 常薄的關係，該發光二極體晶片D之基座S 1的長度11 • 則必須相對的縮短。換言之，由於該基座S 1的長度11 、 太短的關係，習知之發光二極體晶片D將無法得到有效的 散熱效果，進而產生發光二極體晶片D因過熱而燒壞的情 形。 ^ 是以，由上可知，目前習知之發光二極體的封裝方法 ^ 及封裝結構，顯然具有不便與缺失存在，而待加以改善者。 【創作内容】 本創作所要解決的技術問題，在於提供一種具有高效 率侧向發光效果之發光二極體晶片封裝結構。本創作之發 光二極體結構於發光時，形成一連續之發光區域，而無暗 帶（dark band)及光衰減（decay)的情況發生，並且本 創作係透過晶片直接封裝（Chip On Board，COB)製程 一 並利用壓模（die mold)的方式，以使得本創作可有效地 籲 縮短其製程時間，而能進行大量生產。再者，本創作之結 — 構設計更適用於各種光源，諸如背光模組、裝飾燈條、照 明用燈、或是掃描器光源等應用，皆為本創作所應用之範 ，圍與產品。 . 另外，本創作之封裝膠體透過特殊模具之壓模過程， 以使得本創作之發光二極體晶片封裝結構於直立的情況 下，即可產生侧向發光的效果，因此本創作不會有散熱不 足的情況發生。換言之，本創作不僅可產生侧向投光的功 8M329243 VIII. New Description: [New Technology Field] This creation is about a light-emitting diode package structure, especially a light-emitting diode package with high efficiency side-emitting effect. ,. [Prior Art] Please refer to the first figure, which is a flow chart of the first packaging method of the conventional light-emitting diode. As can be seen from the flow chart, the first package method of the conventional light-emitting diode includes the steps of: firstly providing a plurality of packaged completed LEDs (S800); and then providing a substrate body (stripped substrate body ) having a positive electrode trace and a negative electrode trace (S802); and finally, each of the packages is completed in two steps. The packaged LED is disposed on the body of the repaired beauty plate, and the positive and negative ends of each packaged light-emitting diode (叩二_二LED) are electrically connected to the strip substrate respectively. The positive and negative electrodes are electrically conductive (S804). ^ See the flow chart of the first package method of the conventional light-emitting diode as shown in the figure of the younger brother. As can be seen from the flow chart, the conventional S-type 7Q-Essence second packaging method includes the steps of: firstly, providing a stripped substrate body having: - the opposite of the earth a positive electrode trace and a negative electrode trace (S900); then, a plurality of LED 2 M329243 bulk chips are sequentially disposed on the strip On the substrate body, and electrically connecting the positive and negative ends of one of the LED chips to the strip =: the positive and negative conductive traces of the substrate body (S902); finally, the shape of the package; A stripped package colloid is overlaid on the strip substrate body and the light emitting diode wafers to form a strip light emitting region. (StriPPed such as 胙 (10) this qiare area iight bar (S9〇4) ). However, with regard to the first packaging method of the above-mentioned conventional light-emitting diode, φ, since each packaged LED is required to be cut by a single LED package, and then the surface is removed. In the adhesive bonding technology (SMT) process, each packaged LED is disposed on the strip substrate body, so that the process time cannot be effectively shortened. Further, when the light is emitted, the package is completed. There is a darkband between the packaged LEDs, which still has a bad effect on the user's line of sight. In addition, with regard to the second packaging method of the above conventional light-emitting diode, φ, since the completed light bar has a strip-shaped light-emitting region, the second package method will not generate a dark band. problem. However, because the region where the striPPed Package colloid is excited does not cause the light efficiency of the light bar to be poor (that is, close to the light emitting diode): the chip = the encapsulated colloid region generates a strong excitation light source. And away from the light pole, the encapsulated colloid region of the wafer produces a weaker excitation source). = Referring to the third figure, it is a conventional light-emitting diode used for lateral illumination. As can be seen from the figure, when the conventional LED chip D is applied; when the side is illuminated (for example, the side light source used in the screen of the notebook screen 7 M329243 light board), due to the light guide plate of the notebook computer screen In a very thin relationship, the length 11 of the base S 1 of the LED wafer D must be relatively shortened. In other words, since the length 11 of the susceptor S 1 is too short, the conventional luminescent diode wafer D cannot obtain an effective heat dissipating effect, and the illuminating diode D is burned by overheating. ^ Yes, from the above, the conventional packaging method and package structure of the light-emitting diodes are obviously inconvenient and missing, and are to be improved. [Creation Content] The technical problem to be solved by this creation is to provide a light-emitting diode package structure having a high-efficiency lateral light-emitting effect. The light-emitting diode structure of the present invention forms a continuous light-emitting area when light is emitted, and no dark band and light decay occurs, and the creation is directly packaged by a chip (Chip On Board, The COB) process uses a die mold to make the creation effectively shorten the process time and enable mass production. Furthermore, the design of this creation is more suitable for a variety of light sources, such as backlight modules, decorative light strips, lighting lights, or scanner light sources, all of which are applications, products and products. In addition, the encapsulation colloid of the present invention can be laterally illuminated by the molding process of the special mold, so that the luminous diode package structure of the present invention can be laterally illuminated, so the creation does not have heat dissipation. Insufficient circumstances have occurred. In other words, this creation not only produces lateral projections. 8

M329243 能，更能顧到應用於薄型殼體内之散熱效果。 為了解決上述技術問題，根據本創作之其中一種方 效率側向發光效果之發光二極體晶片 封衣t構，其包括基板單元、— 膠體單元。 7衣 ，、中，該基板單元係具有—基板本體、及分別形成於 該，板本體上之-正極導跡與—負極導電執跡。該發 光單凡係I有複數個設置於該&板本體上之發光二極體 晶片’其„中每—個發光二極體晶#係具有分別電性連接於 該基板單元的正、負極導電軌跡之一正極端與一負極端。 該封裝膠體單元係具有複數個分別覆蓋於該等發光二極 體晶片上之封裝膠體，其中每一個封襄膠體之上表面及前 表面係分別具有一膠體弧面（colloid cainbered surface) 及一膠體出光面（colloid light-exiting surface )。 另外，本創作之發光二極體晶片封裝結構，可更進一 步包括下例兩種結構： 第一種：一框架單元，其係為一層覆蓋於該基板本體 上並包覆每一個封裝膠體而只露出該等膠體出光面 (colloid light_exiting surface)之框架層。 第二種：一框架單元，其具有複數個分別覆蓋該等封 裝膠體而只露出每一個封裝膠體的膠體出光面（c〇11〇id light-exiting surface)之框體，其中該等框體係彼此分離 地設置於該基板本體上。 因此，本創作之發光二極體結構於發光時，形成一連 M329243 先區域，而無暗帶（darkband)及光衰減（心㈣ ^兄發生。並且’本創作係透過晶片i接封裝（啊加 j): cm)餘並利賴模（diemQk})的方式，以使 传本劍作可有效地縮短其製程時間，而能進行大量生產。 =，由於本創作之發光二極體晶片封褒結構於直立的情 1"a即可產生側向發光的效果。因此’本創作不僅可產 ^則向投光的功能，更能顧到應用於薄型殼體内之散熱效 ^ 0 Μ 之枯更進—步瞭解補作為達成敎目的所採取 功效，請參閱以下有關本創作之詳細說明 信本創作之目的、特徵與特點，當可由此得- 來;圖式僅提供參考與侧， 【實施方式】 第四第四圖、岡第四3圖至第四'圖、及第四Α圖至 所Γ弟四圖係為本創作封裳方法之第-實施例 之机耘圖’弟四a圖至第四d圖分 第一實施例之封裝流程示意圖，第四j .之 為本創作封裝結構之第-實_之封圖分f 圖。由第四圖之流程圖可知，本創作之f第衣不意 種/、有向效率側向發光效果之發 : 方法，其包括下列步驟： 仏㈣片之封裝 耳先’請配合第四a圖及第圖所示，提供一基板 10 M329243 單元（substrate unit) 1，其具有一基板本體（substrate body) 1 〇、及分別形成於該基板本體1 〇上之複數個正 極導電軌跡（positive electrode trace) 1 1與複數個負極 、 導電執跡（negative electrode trace) 1 2 ( S100 )。 其中’該基板本體1 0係包括一金屬層（metal layer ) ^ 1 〇Α及一成形在該金屬層1 〇Α上之電木層（bakelite layer) 1 0B (如第四a圖及第四A圖所示）。再者，依 鲁· 不同的設計需求，該基板單元1係可為一印刷電路板 (PCB )、一 軟基板（flexible substrate )、一 銘基板 (aluminum substrate )、一陶瓷基板（ceramic substrate)、 或一銅基板（copper substrate)。此外，該正、負極導電 執跡1 1、1 2係可採用I呂線路（aluminum circuit)或銀 線路（silver circuit)，並且該正、負極導電軌跡1 1、1 2之佈局（layout)係可隨著不同的需要而有所改變。 接者’请配合弟四b圖及第四B圖所示，透過矩陣 ‘ （matrix)的方式，分別設置複數個發光二極體晶片（LEI) 鲁 chip) 2 0於該基板本體1 0上，以形成複數排縱向發光 二極體晶片排（longitudinal LED chip row) 2，其中每一 個發光二極體晶片2 0係具有分別電性連接於該基板單 兀的正、負極導電軌跡1 1、1 2之一正極端（positive • electrode side)2 0 1 與一負極端（negative electr〇de side) 2 0 2 (S102) 〇 此外，以本創作之第一實施例而言，每一個發光二極 體晶片2 0之正、負極端2 0 1、2 〇 2係透過兩相對應 11 M329243 之導線W並以打線（wire-bounding )的方式，以與該基板 單元1之正、負極導電軌跡1 1、1 2產生電性連接。再 . 者’每一排縱向發光二極體晶片排（longitudinal LED chip : row) 2係以一直線的棑列方式設置於該基板單元1之基 板本體1 0上，並且每一個發光二極體晶片2 〇係可為一 • 藍色發光二極體晶片（blue LED)。 當然，上述該等發光二極體晶片2 0之電性連接方式 春 係非用以限定本創作，例如：請參閱第五圖所示（本創作 發光二極體晶片透過覆晶的方式達成電性連接之示意 圖），每一個發光二極體晶片2 0 /之正、負極端2 〇 1 、2 0 2 係透過複數個相對應之錫球b並以覆晶 (flip-cMp)的方式，以與該基板單元1 -之正、負極導 電軌跡11―、12/產生電性連接。另外，依據不同的 設計需求，該等發光二極體晶片（圖未示）之正、負極端 係可以串聯（parallel )、並聯（serial )、或串聯加並聯 鲁 （Parallel/serial)的方式，以與該基板單元（圖未示）之 • 正、負極導電執跡產生電性連接。 然後，請配合第四c圖、第四C圖及第六圖所示，透 過一第一模具單元（first mold unit) Μ 1，將複數條條狀 k 封裝膠體（stripped package colloid ) 3 縱向地 ’ longitudinally)分別覆蓋在每一排縱向發光二極體晶片 排（longitudinal LED chip row ) 2上，其中每一條條狀封 裝膠體3之上表面係具有複數個相對應該等發光二極體 晶片 2 0 之膠體弧面（colloid cambered surface) 3 〇 〇， 12 M329243 並且每一條條狀封裝膠體3係具有複數個設置於該等相 對應膠體弧面（colloid cambered surface) 3 〇 〇前端之 膠體前端面（colloid lateral surface) 30 1 (Si 〇4 )〇 其中，該第一模具單元Μ 1係由一第一上模具（fim upper mold) Ml 1及一用於承載該基板本體1 q之第_ 下模具（first lower mold) Μ 1 2所組成，並且該第_上 模具Ml 1係具有複數條相對應該等縱向發光二極體晶 片排（longitudinal LED chip row) 2 之第一通道（first channel) Ml 10。其中每一個第一通道Μ 1 1 〇係具 有複數個凹槽（concave groove) G，而每一個凹槽g之 上表面及前表面係分別具有一個相對應該膠體弧面 (colloid cambered surface) 3 0 0 之模具弧面（m〇id cambered surface) G 1 〇 〇及一個相對應該膠體前端面 (colloid lateral surface) 3 0 1 之模具前端面（mold lateral surface) G 1 〇 1 〇 此外，該等第一通道M1 1 〇的尺寸係與該等條狀封 裝膠體（stripped package colloid ) 3的尺寸相同。再者， 每一條條狀封裝膠體（stripped package colloid) 3係可依 據不同的使用需求’而選擇為：由一碎膠（silicon )與一 螢光粉（fluorescent powder )所混合形成之螢光膠體 (fluorescent resin)、或由一環氧樹脂（ep0Xy)與一螢光 粉（fluorescent powder )所混合形成之螢光膠體 (fluorescent resin) 0 緊接者’请配合弟四d圖及第四D圖所示，沿著每兩 13 M329243 個縱向發光二極體晶片2 0之間，横向地（transversely) 切割該等條狀封裝膠體（stripped package colloid) 3，以 形成複數個彼此分開地覆蓋於每一個發光二極體晶片2 0上之封裝膠體（package colloid) 3 0，其中每一個封 裝膠體3 0的上表面係為該膠體弧面（c〇ll〇id cambered surface) 3 0 0，並且每一個封裝膠體3 0係具有一形成 於該膠體弧面3 0 0前端之膠體出光面（c〇ll〇id light_exiting surface) 302 (S106)。 然後，請配合第四e圖及第四E圖所示，透過一第二 模具單元（second mold unit) Μ 2，將一框架單元（frame unit) 4覆蓋於該基板本體1 〇及該等封裝膠體3 〇上並 且填充於該等封裝膠體3 〇之間（S108)。其中，該第二 模具單元Μ 2係由一第二上模具（second upper mold) Μ 2 1及一用於承載該基板本體丄〇之第二下模具（sec〇nd lower mold) Μ 2 2所組成，並且該第二上模具]y[ 2 1係 具有一條相對應該框架單元4之第二通道（sec〇nd channel) M2 1 〇，此外該第二通道M 2丄〇的高度係 與該等封裝膠體（package colloid) 3 0的高度相同，而 該第二通道M2 1 〇的寬度係與該框架單元4的寬度 同。 又 敢後，明再參閱第四e圖，並配合第四f圖及第四f 圖所不，沿著每兩個縱向發光二極體晶片2 〇之間，横向 地（transversely)切割該框架單元4及該基板本體丄〇， 以形成複數條光棒（llghtbar) L丄，並且使得該框架單 14 M329243 元4被切割·成複數個只讓每一條光棒L 1上之所有封裝 膠體 3 0 的該等膠體出光面（colloid light-exiting surface) : 3 0 2露出之框架層4 0 (S110)。其中，該等框架層4 ♦ 0係可為不透光框架層（opaque frame layer )，例如：白 色框架層（white frame layer)。 請參閱第七圖、第七a圖至第七b圖、及第七A圖至 第七B圖所示。第七圖係為本創作封裝方法之第二實施例 參· 之流程圖，第七a圖至第七b圖分別為本創作封裝結構之 、 第二實施例之部分封裝流程示意圖，第七A圖至第七B圖 分別為本創作封裝結構之第二實施例之部分封裝流程剖 面示意圖。由第七圖之流程圖可知，第二實施例之步驟 S200至S206係分別與第一實施例之步驟S100至S106 相同。亦即，步驟S200係等同於第一實施例之第四a圖 及第四A圖之示意圖說明；步驟S202係等同於第一實施 例之第四b圖及第四B圖之示意圖說明；步驟S204係等 - 同於第一實施例之第四c圖及第四C圖之示意圖說明；步 籲 驟S206係等同於第一實施例之第四d圖及第四D圖之示 意圖說明。 再者，於步驟S206之後，本創作之第二實施例更進 一步包括··首先，請參閱第七a圖及第七a圖所示，透過 • 一第三模具單元（third mold unit) Μ 3，將複數條條狀 框架層（stripped frame layer) 4 '覆蓋於該基板本體1 0及该寺封裝膠體3 0上並且縱向地（longitudinally )填 充於每一個封裝膠體3 0之間（S208)。 15 M329243 其中，該第二模具單元M3係由一第三上模具（third upper mold) M3 1及一用於承載該基板本體丄〇之第三 : 下模具（thirdlowerm〇ld) M3 2所組成，並且該第三上 ； 模具Μ 3 1係具有複數條相對應該等縱向發光二極體晶 片排（longitudinal LED chip row) 2 之第三通道（third • channel) M3 1 0，並且該第三通道M3丄〇的高度係 與該等封裝膠體（package c〇ll〇id) 3 〇的高度相同，而 鲁该弟二通道Μ 3 1 0的寬度係大於每一個封裝膠體3〇 的寬度。 最後，請再參閱第七a圖，並配合第七b圖及第七β 圖所示，沿著每兩個縱向發光二極體晶片2 〇之間，横向 地（transversely)切割該等條狀框架層（stripped frame layer) 4 /及該基板本體1 〇，以形成複數條光棒（Ught bar)L 2，並且使得該等條狀框架層（stripped frame iayer) 4 被切割成複數個只讓每一個封裝膠體3 〇的膠體出 一 光面（colloid light-exiting surface) 3 〇 2 露出之框體 籲 （frame body) 4 0 ^ (S210)。其中，該等框體4 〇 -係可為不透光框體（opaque frame body )，例如：白色框 體（white frame body)。 -請參閱第八a圖及第八A圖所示。第八a圖係為本創 作封裝結構之第三實施例之部分封裝流程示意圖，第八A 圖係為本創作封裝結構之第三實施例之部分封裝流程剖 面示意圖。由第八圖之流程圖可知，第三實施例與第—、 —貫施例的差異在於：第一實施例之步驟s 104與第二實 16 M329243 施例之步驟S204於第三實施例中皆更改為··「沿著每兩個 横向（transverse )發光二極體晶片2 0之間，縱向地 (longitudinally )切割該等條狀封裝膠體（stripped • package colloid) 3 '」。 再者，一第四模具單元M4係由一第四上模具（fourth • upper mold) M4 1及一用於承載該基板本體1 〇之第四 下模具（fourth lower mold ) Μ 4 2所組成。此外，該第 φ 四模具單元Μ4與該第一模具單元Ml最大的不同在 於··每一個第四通道M4 1 0之上表面及前表面係分別具 有一模具弧面（mold cambered surface) 3 0 〇 '及一模 具出光面（mold light-exiting surface) 3 0 2 〆 0 所以， 複數條條狀封裝膠體（stripped package colloid) 3 /係横 向地（transversely)分別覆蓋在横向的〇〇ngitudinai)發 光二極體晶片2上。 士請參閱第九圖所示，其係為本創作發光二極體晶片之 癱 封I結構應用於側向發光之示意圖。由圖中可知，當本創 ，光一極體晶片D應用於側向發光時（例如：使用於 型電腦螢幕之導光板皿之侧向光源），該發光二極體 之基座s 2的長度12可依散熱的需要而加長（不 ‘ ^知—樣受導光板Μ厚度的限制）。換言之，由於該基 @長度12可依散熱的需要而加長，因此本創作之 極體晶片D將可得到有效的散熱效果，進而可避免 叙光一極體晶片D因過熱而燒壞的情形。 、、不上所述，本創作之發光二極體結構於發光時，形成 17 M329243 連績之發光區域，而無暗帶（加戌)及光衰減 (decay)的情況發生，並且本創作係透過晶片直接封裝 (chiP〇nBoard，C0B)製程並利用壓模（diem〇id)白^ 方，，以使得本創作可有效地縮短其製程時間，而能進行 大量生產。再者，由於本創作之發光二極體 於直立的情況下，即可產生側向發光的效果。因I::M329243 can better meet the heat dissipation effect applied in a thin case. In order to solve the above-mentioned technical problems, the light-emitting diode wafer sealing structure according to one of the aspects of the present invention is a substrate unit, a colloid unit. In the seventh, the substrate unit has a substrate body and a positive electrode trace and a negative electrode conductive trace respectively formed on the plate body. The illuminating diodes have a plurality of illuminating diode chips disposed on the & plate body, and each of the illuminating diodes has a positive and negative electrode electrically connected to the substrate unit. One of the conductive traces has a positive end and a negative end. The encapsulant unit has a plurality of encapsulants respectively covering the LEDs, wherein each of the upper surface and the front surface of each of the sealing gels has a Colloid cainbered surface and colloid light-exiting surface. In addition, the LED array structure of the present invention can further include the following two structures: First: a frame The unit is a layer of a cover layer covering the substrate body and covering each of the encapsulants to expose only the colloid light_exiting surface. The second type: a frame unit having a plurality of separate covers The encapsulants are only exposed to the frame of the colloidal light-exiting surface of each encapsulant, wherein the frame systems are in contact with each other The grounding diode is disposed on the substrate body. Therefore, the light-emitting diode structure of the present invention forms a first region of M329243 when light is emitted, and no darkband and light attenuation (heart (four) ^ brother occurs. And 'this creation It is connected to the package through the chip i (ah plus j): cm) and the method of diemQk}, so that the script can effectively shorten the processing time, and can be mass produced. The created light-emitting diode chip sealing structure can produce lateral illuminating effect in the erect 1"a. Therefore, this creation can not only produce the function of projecting light, but also can be applied to the thin shell. The heat dissipation effect inside ^ 0 Μ The dryness is further improved. Step by step to understand the effect of the supplement as a result of the achievement, please refer to the following detailed description of the creation of the letter, the purpose, characteristics and characteristics of the letter, when you can get this; The formula only provides the reference and the side, [Embodiment] The fourth and fourth figures, the fourth, fourth, fourth, fourth, and fourth figures are the first implementation of the creation method. Example of the machine ' diagram 'di brother four a to fourth d to the first implementation The schematic diagram of the packaging process, the fourth j. is the first-real _ of the creation package structure is divided into f diagrams. It can be seen from the flow chart of the fourth figure that the first garment of the creation is unintentional/directional efficiency side To the illuminating effect: The method comprises the following steps: 仏 (4) package encapsulation ear first 'please cooperate with the fourth a diagram and the figure to provide a substrate 10 M329243 unit 1 (substrate unit) 1 having a substrate body (substrate body) 1 〇, and a plurality of positive electrode traces 1 1 and a plurality of negative electrodes, a negative electrode trace 1 2 (S100 ) respectively formed on the substrate body 1 . Wherein the substrate body 10 includes a metal layer ^ 1 〇Α and a bakelite layer 10B formed on the metal layer 1 (eg, the fourth a and the fourth Figure A shows). Furthermore, the substrate unit 1 can be a printed circuit board (PCB), a flexible substrate, an aluminum substrate, a ceramic substrate, or the like. Or a copper substrate. In addition, the positive and negative conductive traces 1 1 and 1 2 may be an aluminum circuit or a silver circuit, and the layout of the positive and negative conductive traces 1 1 and 1 2 is It can change with different needs. The receiver 'please set up a plurality of light-emitting diode chips (LEI) Lu chip) through the matrix 'matrix' as shown in the fourth and fourth B-pictures on the substrate body 10 Forming a plurality of longitudinal LED chip rows 2, wherein each of the LED chips 20 has positive and negative conductive traces 1 1 electrically connected to the substrate unit, respectively. 1 2 a positive side (positive • electrode side) 2 0 1 and a negative side (negative electr〇de side) 2 0 2 (S102) 〇 In addition, in the first embodiment of the present creation, each of the two light The positive and negative terminals 2 0 1 and 2 〇 2 of the polar body wafer 20 are transmitted through the wires W of the corresponding 11 M329243 and wired-bounded to the positive and negative conductive tracks of the substrate unit 1. 1 1, 1 2 produces an electrical connection. Further, each row of longitudinal LED chips (rows) 2 is disposed on the substrate body 10 of the substrate unit 1 in a straight line, and each of the light emitting diode chips 2 The 〇 system can be a blue LED chip (blue LED). Of course, the electrical connection method of the above-mentioned light-emitting diode wafers 20 is not limited to the present invention. For example, please refer to the fifth figure (the light-emitting diode wafer of the present invention is formed by flip chip bonding). Schematic diagram of the sexual connection), each of the LED chips 20 / positive and negative terminals 2 〇 1 , 2 0 2 through a plurality of corresponding tin balls b and flip-chip (flip-cMp), The electrical connection is made to the positive and negative conductive tracks 11-, 12/ of the substrate unit 1 -. In addition, according to different design requirements, the positive and negative terminals of the LED chips (not shown) may be connected in parallel, serial, or in parallel with Parallel/serial. The electrical connection is made with the positive and negative conductive traces of the substrate unit (not shown). Then, in conjunction with the fourth c diagram, the fourth C diagram, and the sixth diagram, a plurality of stripe package colloids 3 are longitudinally passed through a first mold unit Μ1. 'Longitudinally' is respectively covered on each row of longitudinal LED chip rows 2, wherein each strip-like encapsulant 3 has a plurality of corresponding equal-emitting diode chips 20 Colloid cambered surface 3 〇〇, 12 M329243 and each strip encapsulant 3 has a plurality of colloidal front faces disposed at the front end of the corresponding colloid cambered surface 3 ( Colloid lateral surface) 30 1 (Si 〇4 ) wherein the first mold unit Μ 1 is composed of a first upper mold M1 1 and a first lower mold for carrying the substrate body 1 q (first lower mold) Μ 1 2, and the first upper mold M1 1 has a plurality of first channels corresponding to the longitudinal LED chip row 2 (first ch Annel) Ml 10. Each of the first channels Μ 1 1 has a plurality of concave grooves G, and the upper surface and the front surface of each of the grooves g respectively have a corresponding colloid cambered surface 3 0 0 cam cam cambered surface G 1 〇〇 and a corresponding colloid lateral surface 3 0 1 mold front surface (mold lateral surface) G 1 〇 1 〇 In addition, the same The size of one channel M1 1 〇 is the same as the size of the stripped package colloid 3. Furthermore, each stripped package colloid 3 can be selected according to different usage requirements: a phosphor colloid formed by mixing a layer of silicon with a fluorescent powder. (fluorescent resin), or a fluorescent resin formed by mixing an epoxy resin (ep0Xy) with a fluorescent powder. 0 Immediately, please cooperate with the fourth and fourth D drawings. As shown, along each of the 13 M329243 longitudinal light-emitting diode wafers 20, the stripped package colloids 3 are transversely cut to form a plurality of separate covers covering each other. a package colloid 30 on a light-emitting diode wafer 20, wherein an upper surface of each of the encapsulants 30 is a colloidal camber surface (300), and each An encapsulating colloid 30 has a colloidal light emitting surface 302 (S106) formed on the front end of the colloidal arc surface 300. Then, in conjunction with the fourth and fourth E diagrams, a frame unit 4 is overlaid on the substrate body 1 and the packages through a second mold unit Μ 2 The colloid 3 is wound up and filled between the encapsulants 3 (S108). Wherein, the second mold unit Μ 2 is composed of a second upper mold Μ 2 1 and a second lower mold 〇 2 2 for carrying the substrate body 丄〇 Composition, and the second upper mold]y[2 1 has a second channel (sec〇nd channel) M2 1 相对 corresponding to the frame unit 4, and the height of the second channel M 2丄〇 is The package colloids 30 have the same height, and the width of the second channel M2 1 系 is the same as the width of the frame unit 4. After dare, please refer to the fourth e-picture, and in conjunction with the fourth f-figure and the fourth f-figure, the frame is cut transversely between each two longitudinally-emitting diode chips 2 〇. The unit 4 and the substrate body 丄〇 are formed to form a plurality of llghtbars L丄, and the frame unit 14 M329243 element 4 is cut into a plurality of pieces of the encapsulant 3 on each of the light rods L 1 The colloid light-exiting surface of 0: the exposed frame layer 40 (S110). The frame layer 4 ♦ 0 may be an opaque frame layer, for example, a white frame layer. Please refer to the seventh, seventh to seventh b, and seventh to seventh seventh. The seventh figure is a flow chart of the second embodiment of the present invention, and the seventh to seventh b are respectively a schematic diagram of a part of the packaging process of the second embodiment. FIG. 7B is a schematic cross-sectional view showing a part of the packaging process of the second embodiment of the present invention. As can be seen from the flowchart of the seventh embodiment, steps S200 to S206 of the second embodiment are the same as steps S100 to S106 of the first embodiment, respectively. That is, step S200 is equivalent to the schematic diagrams of the fourth a diagram and the fourth diagram A of the first embodiment; step S202 is equivalent to the schematic diagrams of the fourth b diagram and the fourth diagram B of the first embodiment; S204 is the same as the fourth c diagram and the fourth C diagram of the first embodiment; the step S206 is equivalent to the fourth diagram and the fourth diagram of the first embodiment. Furthermore, after the step S206, the second embodiment of the present invention further includes: · First, please refer to the seventh a figure and the seventh a picture, through a third mold unit Μ 3 A plurality of stripped frame layers 4' are overlaid on the substrate body 10 and the temple encapsulant 30 and are longitudinally filled between each of the encapsulants 30 (S208). 15 M329243, wherein the second mold unit M3 is composed of a third upper mold M3 1 and a third: lower mold (M3 2) for carrying the substrate body ,. And the third upper portion; the mold Μ 3 1 has a plurality of third channels (M3 1 0) corresponding to the longitudinal LED chip row 2, and the third channel M3 The height of the crucible is the same as the height of the package c〇ll〇id 3 〇, and the width of the two channels 鲁 3 10 is greater than the width of each encapsulant 3 。. Finally, please refer to the seventh diagram a, and along with the seventh b diagram and the seventh beta diagram, the strips are transversely cut along each of the two longitudinal LED chips 2 〇. a stripped frame layer 4 / and the substrate body 1 〇 to form a plurality of Ught bars L 2 , and the stripped frame iayer 4 is cut into a plurality of only Each of the encapsulating colloids 3 colloid light-exiting surface 3 〇 2 exposed frame body 4 0 ^ (S210). The frame 4 〇 can be an opaque frame body, for example, a white frame body. - Please refer to Figures 8a and 8A. The eighth diagram is a schematic diagram of a part of the packaging process of the third embodiment of the creation package structure, and the eighth diagram is a schematic diagram of a part of the packaging process of the third embodiment of the creation package structure. It can be seen from the flowchart of the eighth figure that the difference between the third embodiment and the first embodiment is that the step s 104 of the first embodiment and the step S204 of the second embodiment 16 M329243 are in the third embodiment. Both are changed to "striped • package colloid 3 '" longitudinally along each of the two transverse light-emitting diode wafers 20 . Further, a fourth mold unit M4 is composed of a fourth upper mold M4 1 and a fourth lower mold Μ 42 for carrying the substrate body 1 . In addition, the maximum difference between the first φ four-mold unit Μ4 and the first mold unit M1 is that each of the upper surface and the front surface of the fourth passage M4 1 0 has a mold cambered surface 3 0 . 〇' and a mold light-exiting surface 3 0 2 〆0 Therefore, a plurality of stripped package colloids 3 / are transversely covered in lateral 〇〇ngitudinai) On the diode wafer 2. Please refer to the ninth figure, which is a schematic diagram of the application of the I-I structure of the illuminating diode chip to the lateral illuminating. As can be seen from the figure, when the present invention, the light-pole wafer D is applied to the lateral illumination (for example, the lateral light source used for the light guide plate of the computer screen), the length of the base s 2 of the light-emitting diode 12 can be lengthened according to the need of heat dissipation (not known - the thickness of the light guide plate is limited). In other words, since the base length 12 can be lengthened according to the heat dissipation requirement, the polar body wafer D of the present invention can obtain an effective heat dissipation effect, thereby preventing the burnt-out of the wafer 110 from being overheated. As described above, the light-emitting diode structure of the present invention forms a light-emitting area of 17 M329243 when light is emitted, and no dark band (coronation) and light decay (decay) occur, and the creation system Through the direct package (chiP〇nBoard, C0B) process and the use of stamper (diem〇id) white square, so that the creation can effectively shorten the processing time, and can be mass produced. Furthermore, since the luminous diode of the present invention is erect, the effect of lateral illumination can be produced. Because I::

作不僅可產生側向投光的功能，更能顧到應用於薄型殼 内之散熱效果。 • r/y所述，僅為本創作最佳之—的具體實施例之 坪細况明與圖式’惟本創作之特徵並不偈限於此， ::本，，本創作之所有範圍應以下述之申請專利範 =列，皆應包含於本創作之謝，任心 β者在本創作之領域内，可㈣ 蓋在以下本案之專利範圍。 皆可涵 【圖式簡單說明】 弟一圖係為習知發光二極體之第一種封 第二圖係為習知發先二極體 t程圖； f三圖係為習知發光二極體應用於側向==圖; 弟四圖係為本創作封裝方法第一者 不思圖， 第四a圖至第四f圖八例之流程圖； α至弟四f圖刀別為本創作封裝 例之封裝流程立體示意圖； R昂一貝把 第四A圖至第心圖分別為本創作封裝結構之第一實施 18 M329243 例之封裝流程剖面示意圖； 第五圖係為本創作發光二極體晶片透過覆晶（flip-chip) 的方式達成電性連接之示意圖； 第六圖係為本創作第四C圖未灌入封裝膠體前之示意圖； 第七圖係為本創作封裝方法之第二實施例之流程圖； 第七a圖至第七b圖分別為本創作封裝結構之第二實施 例之部分封裝流程立體示意圖； 第七A圖至第七B圖分別為本創作封裝結構之第二實施 例之部分封裝流程剖面示意圖； 第八a圖係為本創作封裝結構之第三實施例之部分封裝 流程立體不意圖， 第八A圖係為本創作封裝結構之第三實施例之部分封裝 流程剖面示意圖；以及 第九圖係為本創作發光二極體晶片之封裝結構應用於側 向發光之示意圖。 【主要元件符號說明】 [習知]It not only produces the function of lateral projection, but also the heat dissipation effect applied to the thin case. • r/y, which is only for the best of this creation—the details of the pings and the drawings of the specific examples are not limited to this, :: this, all the scope of this creation should be The application patents listed below shall be included in the creation of this creation. The person who is responsible for β is in the field of this creation, and (4) is covered by the patent scope of the following case.皆可涵 [Simple description of the drawing] The first picture of the younger brother is the first type of the second light-emitting diode of the conventional light-emitting diode. The second picture is the conventional two-electrode t-picture; f three pictures are the conventional light-emitting diode. Applied to the lateral == map; the younger four pictures are the first ones of the creative packaging method, the fourth one to the fourth f, the eight examples of the flow chart; A schematic diagram of the packaging process of the package example; R An Yibei, the fourth A picture to the first heart diagram are the first implementation of the creation package structure 18 M329243 example package process flow diagram; the fifth picture is the creation of the luminous diode The schematic diagram of the physical connection of the bulk wafer through the flip-chip method; the sixth diagram is the schematic diagram of the fourth C picture before the filling of the encapsulation colloid; the seventh figure is the first method of the encapsulation method FIG. 7 is a schematic perspective view showing a part of the packaging process of the second embodiment of the present invention; FIG. 7A to FIG. A schematic cross-sectional view of a part of the packaging process of the second embodiment; A part of the packaging process of the third embodiment of the present invention is not intended to be a third embodiment, and the eighth embodiment is a schematic cross-sectional view of a part of the packaging process of the third embodiment of the present invention; The package structure of the bulk wafer is applied to a schematic diagram of lateral illumination. [Main component symbol description] [Practical]

發光二極體晶片 D 導光板 Μ 基座 S 1 長度 d [本創作] 基板單元 1 基板本體 10 19 M329243LED Diode Wafer D Light Guide Μ Base S 1 Length d [This Creation] Substrate Unit 1 Substrate Body 10 19 M329243

金屬層 1 0 AMetal layer 1 0 A

電木層 1 Ο B 正極導電軌跡 11 負極導電軌跡 1 2 基板單元 縱向發光二極體晶片排2 正極導電軌跡 11 負極導電軌跡 1 2 / 發光二極體晶片2 0 正極端 201 負極端 202 發光二極體晶片2 0 / 2 0 1 正極端 負極端 2 0 2 條狀封裝膠體 3 封裝膠體 3 0 膠體弧面 3 0 0 膠體前端面 3 0 1 < 膠體出光面 3 0 2 條狀封裝膠體 3 ^ 模具弧面 3 0 0 模具出光面 3 0 2 框架單元 4 框架層 4 0 條狀框架層 4 V 框體 4 0 ^ 導線 W 錫球 B 第一模具單元 Ml 第一上模具 Mil 第一通道 Mil 20 M329243Bakelite 1 Ο B Positive Conductor Track 11 Negative Conductor Track 1 2 Substrate Unit Longitudinal Light Emitting Diode Wafer 2 Positive Conductor Track 11 Negative Conductor Track 1 2 / Light Emitting Diode 2 0 Positive End 201 Negative End 202 Light Emitting Pole body wafer 2 0 / 2 0 1 positive extreme negative terminal 2 0 2 strip encapsulant 3 encapsulant 3 0 colloidal arc surface 3 0 0 colloid front end face 3 0 1 < colloidal exit surface 3 0 2 strip encapsulation colloid 3 ^ Mold arc surface 3 0 0 Mold exit surface 3 0 2 Frame unit 4 Frame layer 4 0 Strip frame layer 4 V Frame 4 0 ^ Wire W Tin ball B First die unit Ml First upper die Mil First channel Mil 20 M329243

第一下模具 Μ 1 2 凹槽 G 模具弧面 G 1 0 0 模具前端面 G 1 0 1 第二模具單元 M2 第二上模具 M2 1 第二通道 M2 1 0 第二下模具 Μ 2 2 第三模具單元 M3 第三上模具 M3 1 第三通道 M3 1 0 第三下模具 Μ 3 2 第四模具單元 M4 第四上模具 Μ4 1 第四通道 Μ 4 1 0 第四下模具 Μ4 2 光棒 L 1 光棒 L 2 發光二極體 D 導光板 Μ 基座 S 2 長度 a 21First lower mold Μ 1 2 groove G mold curved surface G 1 0 0 mold front end face G 1 0 1 second mold unit M2 second upper mold M2 1 second passage M2 1 0 second lower mold Μ 2 2 third Mold unit M3 Third upper mold M3 1 Third passage M3 1 0 Third lower mold Μ 3 2 Fourth mold unit M4 Fourth upper mold Μ 4 1 Fourth passage Μ 4 1 0 Fourth lower mold Μ 4 2 Light rod L 1 Light bar L 2 Light-emitting diode D Light guide plate 基座 Base S 2 Length a 21

Claims (1)

M329243 九、申請專利範圍： 1、 一種具有尚效率侧向私 結構，其包括·· &先效果之發光二極體晶片封裝 一基板單元； ϊ i::發H复數個電性連接地設置於該基板 早上之毛先一極體晶片；以及 一封i膠體單元，其夏女、〃 二極η卜夕#、有禝數個分別覆蓋於該等發光 上表二42裝膠體，其中每—個封裝膠體之 表面及刖表面係分別具有—膠體弧面（⑽⑽ cambered surface)及一膠體出光面（colloid light-exiting surface)。 2、 如申請專利範圍第丄項所述之具有高效率侧向發光效 果之發光二極體晶片封裝結構，其中該基板單元係為 一印刷電路板、一軟基板、一鋁基板、一陶瓷基板''、 或一銅基板。 3、 如申請專利範圍第丄項所述之具有高效率側向發光效 果之發光二極體晶片封裝結構，其中該基板單^係具 ,有一基板本體、及分別形成於該基板本體上之—正^ 導電執跡與一負極導電執跡。 ° 4、 如申請專利範圍第3項所述之具有高效率侧向發光六文 果之發光二極體晶片封裝結構，其中該基板本&係1 括一金屬層及一成形在該金屬層上 士、^ (bakelite layer)。 ⑨ ^ 5、 如申請專利範圍第3項所述之具有高效率侧向發光效 22 M329243 果之發光二極體晶片封裝結構，其中該正、負極導電 軌跡係為鋁線路或銀線路。 • 6、如申請專利範圍第3項所述之具有高效率侧向發光效 • 果之發光二極體晶片封裝結構，其中每一個發光二極 體晶片係具有分別電性連接於該基板單元的正、負極 導電軌跡之一正極端與一負極端。 7、 如申請專利範圍第6項所述之具有高效率侧向發光效 ^ 果之發光二極體晶片封裝結構，其中每一個發光二極 體晶片之正、負極端係透過兩相對應之導線並以打線 (wire-bounding)的方式，以與該正、負極導電軌跡 產生電性連接。 8、 如申請專利範圍第6項所述之具有高效率侧向發光效 果之發光二極體晶片封裝結構’其中每一個發光二極 體晶片之正、負極端係透過複數個相對應之錫球並以 覆晶（flip-chip)的方式，以與該正、負極導電軌跡 Λ 產生電性連接。 • 9、如申請專利範圍第1項所述之具有高效率侧向發光效 β 果之發光二極體晶片封裝結構，其中該等發光二極體 晶片係以一直線的排列方式設置於該基板單元上。 . 1 0、如申請專利範圍第1項所述之具有高效率侧向發光 .效果之發光二極體晶片封裝結構，其中該等發光二極 體晶片係以複數條直線的排列方式設置於該基板單 元上。 1 1、如申請專利範圍第1項所述之具有高效率侧向發光 23 M329243 效果之發光二極體晶片封装結構，其中每一個封裝膠 體係為由一矽膠（silic〇n)與一螢光粉（fluorescent P〇Wder )所混合形成之螢光膠體（fluorescent resin) ° 1 2:如中請專利範圍第！項所述之具有高效率侧向發光 效果之發光二極體晶片封裝結構，其中每一個封裝膠 _ 脰係為由環氧树脂（epoxy)與一螢光粉（f|u〇rescent P〇wder )所混合形成之螢光膠體（fluorescent resin) 〇 _ 1 3、如中請專利範圍第項所述之具有高效率侧向發光 效果之發光二極體晶片封裝結構，更進一步包括：一 框架單70,其係為一層覆蓋於該基板單元上並包覆每 一個封裝膠體而只露出該等膠體出光面（c〇11〇id light-exiting surface )之框架層。 1 4、如申請專利範圍第1 3項所述之具有高效率側向發 光效果之發光二極體晶片封裝結構，其中該框架層係 為不透光框架層（〇paque frame layer)。 _ 1 5、如申請專利範圍第i 4項所述之具有高效率侧向發 光效果之發光二極體晶片封裝結構，其中該不透光框 架層係為白色框架層（white frarne layer )。 1 6、如申請專利範圍第1項所述之具有高效率侧向發光 效果之發光二極體晶片封裝結構，更進一步包括：一 框架單元，其具有複數個分別覆蓋該等封裝膠體而只 露出每一個封裝膠體的膠體出光面（c〇u〇id light-exiting surface)之框體，其中該等框體係彼此 分離地設置於該基板單元上。 24 M329243 1 7、如申請專利範圍第1 6項所述之具有高效率側向發 光效果之發光二極體晶片封裝結構，其中該等框體係 為不透光框體（opaque frame body )。 1 8、如申請專利範圍第1 7項所述之具有高效率侧向發 光效果之發光二極體晶片封裝結構，其中該等不透光 框體係為白色框體（white frame body )。M329243 Nine, the scope of application for patents: 1. A lateral structure with a efficiencies, including a light-emitting diode package with a first effect; a substrate unit; ϊ i:: a plurality of electrical connections In the morning of the substrate, the first polar body wafer; and an i-colloid unit, the Xia female, the 〃二 pole η 卜 夕#, and the plurality of enamels respectively covering the illuminating upper surface of the second assembly 42, each of which The surface of the encapsulant and the surface of the encapsulation have a colloidal light surface ((10) (10) cambered surface) and a colloid light-exiting surface. 2. The light emitting diode package structure having a high efficiency side illuminating effect according to the invention of claim 2, wherein the substrate unit is a printed circuit board, a flexible substrate, an aluminum substrate, and a ceramic substrate. '', or a copper substrate. 3. The light-emitting diode package structure having the high-efficiency side-emitting effect according to the above-mentioned claim, wherein the substrate is provided with a substrate body and respectively formed on the substrate body. Positive ^ Conductive trace and a negative conductive trace. 4. The light-emitting diode package structure having high-efficiency side-emitting hexagrams according to claim 3, wherein the substrate & 1 comprises a metal layer and a metal layer is formed thereon Sergeant, ^ (bakelite layer). 9^5. The light-emitting diode package structure having high-efficiency lateral illuminating effect as described in claim 3, wherein the positive and negative conductive traces are aluminum lines or silver lines. 6. The light-emitting diode package structure having the high-efficiency side-emitting effect described in claim 3, wherein each of the light-emitting diode chips is electrically connected to the substrate unit, respectively. One of the positive and negative conductive traces is positive and negative. 7. The light emitting diode package structure having the high efficiency side illuminating effect as described in claim 6 wherein the positive and negative ends of each of the light emitting diode chips pass through two corresponding wires. And electrically connected to the positive and negative conductive traces by wire-bounding. 8. The light-emitting diode package structure having the high-efficiency side-emitting effect described in claim 6 wherein the positive and negative ends of each of the light-emitting diode chips pass through a plurality of corresponding solder balls And electrically connected to the positive and negative conductive tracks 以 in a flip-chip manner. 9. The light emitting diode package structure having the high efficiency side illuminating effect as described in claim 1, wherein the light emitting diode chips are arranged in a line arrangement on the substrate unit. on. The light-emitting diode package structure having the high-efficiency side-emitting effect as described in claim 1, wherein the light-emitting diode chips are disposed in a plurality of linear arrays. On the substrate unit. 1 1. A light-emitting diode package structure having the effect of high-efficiency side-emitting 23 M329243 according to claim 1, wherein each of the encapsulant systems is composed of a silicium and a fluorescent film. Fluorescent resin formed by mixing powder (fluorescent P〇Wder) ° 1 2: Please refer to the patent scope! The light-emitting diode package structure having high-efficiency side-emitting effect, wherein each package adhesive is made of epoxy resin and phosphor powder (f|u〇rescent P〇wder) The fluorescent resin 混合 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 70, which is a layer of a cover layer covering the substrate unit and covering each of the encapsulants to expose only the colloidal light-exiting surface. A light-emitting diode package structure having a high-efficiency lateral light-emitting effect as described in claim 13 wherein the frame layer is a opaque frame layer. _ 1 5. A light-emitting diode package structure having a high-efficiency lateral illuminating effect as described in claim 4, wherein the opaque frame layer is a white frarne layer. The light-emitting diode package structure having the high-efficiency side-emitting effect described in claim 1 further includes: a frame unit having a plurality of cover bodies respectively covering the package bodies and exposing only a frame of a colloidal light-exiting surface of each of the encapsulants, wherein the frame systems are disposed on the substrate unit separately from each other. 24 M329243 1 7. The light-emitting diode package structure having a high-efficiency lateral light-emitting effect as described in claim 16 wherein the frame system is an opaque frame body. A light-emitting diode package structure having a high-efficiency lateral light-emitting effect as described in claim 17 wherein the opaque frame system is a white frame body. 25 M329243 七、指定代表圖·· (一） 本案指定代表圖為：第（四F (二) 本代表圖之元件符號簡單說明： 發光二極體晶片 2025 M329243 VII. Designation of Representative Representatives (1) The representative representative of the case is: (F) (F) The symbol of the symbol of the representative figure is simple: LED diode 20 .封裝膠體 膠體出光面 框架層 光棒.Package colloid Colloid illuminating surface Frame layer Light rod
TW096214387U 2007-08-29 2007-08-29 LED chip package structure with a high-efficiency light-emitting effect TWM329243U (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW096214387U TWM329243U (en) 2007-08-29 2007-08-29 LED chip package structure with a high-efficiency light-emitting effect
DE202007014910U DE202007014910U1 (en) 2007-08-29 2007-10-25 Package structure of a LED chip with high luminous efficacy in the lateral direction
JP2007008351U JP3138706U (en) 2007-08-29 2007-10-30 A light-emitting diode chip sealing structure having a high-efficiency horizontal light-emitting effect.

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TW096214387U TWM329243U (en) 2007-08-29 2007-08-29 LED chip package structure with a high-efficiency light-emitting effect

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DE (1) DE202007014910U1 (en)
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Publication number Priority date Publication date Assignee Title
DE102008011862A1 (en) * 2008-02-29 2009-09-03 Osram Opto Semiconductors Gmbh Miniature housing, carrier assembly with at least one miniature housing, and a method for producing a carrier assembly
CN101826516B (en) * 2009-03-02 2012-06-13 展晶科技(深圳)有限公司 Side light-emitting type light-emitting assembly encapsulating structure and manufacturing method thereof

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