TWM269566U - Multi chips bonding tool for COF package - Google Patents

Multi chips bonding tool for COF package Download PDF

Info

Publication number
TWM269566U
TWM269566U TW093221489U TW93221489U TWM269566U TW M269566 U TWM269566 U TW M269566U TW 093221489 U TW093221489 U TW 093221489U TW 93221489 U TW93221489 U TW 93221489U TW M269566 U TWM269566 U TW M269566U
Authority
TW
Taiwan
Prior art keywords
chip
flip
base
pick
patent application
Prior art date
Application number
TW093221489U
Other languages
Chinese (zh)
Inventor
Men-Shew Liu
Chorng-Long Chen
Hao-Shin Wang
Original Assignee
Chipmos Technologies Inc
Chipmos Technologies Bermuda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipmos Technologies Inc, Chipmos Technologies Bermuda filed Critical Chipmos Technologies Inc
Priority to TW093221489U priority Critical patent/TWM269566U/en
Publication of TWM269566U publication Critical patent/TWM269566U/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors

Landscapes

  • Wire Bonding (AREA)

Description

M269566 四、創作說明(1) 【新型所屬之技術領域】 本創作係有關於一種半導體封裝治具,特別係有關於 一種適用於覆晶薄膜封裝之多晶片接合治具。 【先前技術】 驾知曰日片薄膜封裝(Chip-on-f i lm package,C OF)係 為二種常見的半導體封裝型態,其係將半導體晶片以覆晶 接合(Flip chip bonding)之型態設置於一電路捲帶 (wiring tape) 〇 由於現今之電子產品要求具有較強之功能性因此必 須在用以承載晶片之電路捲帶上增加晶片之數量,以嗖置 複數個具有不同功能之晶片增加產品之功能性,其中在設 置晶片時’習知之治具係以單一壓合頭將每一晶片以熱壓 合之方式壓合至電路捲帶,亦即是以覆晶接合之型態將晶 片設置於電路捲帶。 〜 請參閱第1與第2圖,一種習知之覆晶薄膜封裝之晶 片接合治具1〇〇係包含一基座110、一壓合頭12〇及一 轴13〇,該壓合頭12〇係設置於該基座11〇,該驅動軸13〇係 連接於該基座110,提供一種多晶片橫向排列型態之電路 捲帶10 ’其係具有複數個封裝單元n,且每一封裝 Η f具Ϊ 一第:”層開口12、—第二銲罩層開口13及複數 個顯路於該第一銲罩層開口 12與該第二銲罩層開口 Η之 B曰片(圖未、會出)時’在每-封裝單元u内之晶 向係與該電路捲帶10輸送方向為平行,該晶片接合治卩具』万 第6頁 M269566 四、創作說明(2) 100係先利用該壓合頭12〇將該第一晶片20依序壓合至每一 封裝單元11之第一銲罩層開口12,使該第一晶片2〇與顯露 於該第一銲罩層開口 12之該些跡線丨4接合,待每一封裝單 元11之該第一銲罩層開口 12之該些跡線η都接合有一第一 晶片20後’再利用該壓合頭12〇重複上述之動作以依序設 置複數個第二晶片至每一封裝單元1 1之第二銲罩層開口 1 3 ’以完成晶片接合之步驟,其中,上述之晶片接合治具 100因一次只能壓合一晶片至該電路捲帶1〇,故需要較多 之時間以完成所有晶片接合之動作,因而降低了產品之生 產效率。 【新型内容】 夕f創作之主要目的係在於提供一種適用覆晶薄膜封裝 $夕曰曰片接合治具,其係包含一基座、複數個設置於該基 =放頭及一連接於該基座之傳動轴,利用該傳動轴驅 ^ 土座,以使設置於該基座之該些取放頭可一次同時壓 口複數個晶片至一電路捲帶。 ^創作之次一目的係在於提供一種適用覆晶薄膜封裝 二μ片接合治具,複數個取放頭係設置於一基座,每一 數個包含有—通氣管,使得該治具可—次同時吸附複 数個曰日片至一電路捲帶。 係包2 ί Ϊ作之適用覆晶薄膜封裝之多晶片接合治具,其 設Ϊ二座、複數個取放頭及一驅動轴,該些取放頭係 曰二土座,每一取放頭係具有一壓合面,以將複數個 σ至電路捲帶,該驅動軸係連接於該基座,以升M269566 4. Creation Description (1) [Technical Field to which the New Type belongs] This creation relates to a semiconductor packaging jig, and in particular to a multi-chip bonding jig suitable for flip-chip film packaging. [Previous technology] Chip-on-film package (C OF) is two common types of semiconductor packages. It is a method of flip chip bonding of semiconductor wafers. The type is set in a wiring tape. ○ Because the current electronic products require strong functionality, the number of chips must be increased on the circuit tape used to carry the chip, so that a plurality of chips have different functions. The wafers increase the functionality of the product, where the 'conventional jig' is a single pressing head that presses each wafer to the circuit reel in a hot-pressing manner, that is, a flip-chip bonding type The wafer is placed on the circuit tape. ~ Please refer to FIG. 1 and FIG. 2. A conventional wafer bonding jig for a flip-chip package 100 includes a base 110, a pressing head 120 and a shaft 13. The pressing head 12 〇 It is provided on the base 110, and the drive shaft 13 is connected to the base 110 to provide a multi-chip lateral arrangement circuit reel 10 'which has a plurality of packaging units n, and each package Η The first opening: "Layer opening 12, the second welding mask layer opening 13 and a plurality of B-sheets showing the openings of the first welding mask layer opening 12 and the second welding mask layer opening (Figure 1, When it comes out), the crystal orientation in each-packaging unit u is parallel to the conveying direction of the circuit reel 10, the wafer bonding jig. ”Page 6 M269566 IV. Creation instructions (2) 100 series is used first The pressing head 120 sequentially presses the first wafer 20 to the first solder mask layer opening 12 of each packaging unit 11 so that the first wafer 20 and the first solder mask layer opening 12 are exposed. The traces 4 and 4 are bonded, and after the traces n of the first solder mask layer opening 12 of each packaging unit 11 are bonded with a first wafer 20 ' The pressing head 12 is used to repeat the above-mentioned operations to sequentially set a plurality of second wafers to the second solder mask layer openings 1 3 ′ of each packaging unit 11 to complete the wafer bonding step. Among the above wafers, Since the bonding jig 100 can only press one wafer to the circuit reel 10 at a time, it takes more time to complete all the wafer bonding operations, thereby reducing the production efficiency of the product. [New Content] The main purpose is to provide a chip-on-chip bonding jig suitable for flip-chip film packaging, which comprises a base, a plurality of sets disposed on the base = putting head, and a transmission shaft connected to the base. Axle drive ^ earth seat, so that the pick-and-place heads set on the base can simultaneously crimp a plurality of wafers to a circuit tape at the same time. ^ The second purpose of creation is to provide a suitable flip-chip film package 2 μ A plurality of pick-and-place heads are arranged on a base, and each of them includes a vent tube, so that the jig can simultaneously and simultaneously absorb a plurality of Japanese tablets to a circuit reel. System pack 2 ί Applicable flip chip The multi-chip bonding jig for film packaging is provided with two seats, a plurality of pick-and-place heads and a drive shaft. These pick-and-place heads are called two earth seats, and each pick-and-place head has a pressing surface for loading. A plurality of σ to the circuit reel, the drive shaft is connected to the base,

第7頁 M269566Page 7 M269566

降該基座,其中,難 片接合治具可_次==取放頭之壓合面,使得該多晶 以縮減晶片接合以片至一電路捲帶上, 【實施方式】 & π手 參閱所附圖式,太扁丨> # ^@ Λ 本創作將列舉以下之實施例說明。 、 ^ 之一具體實施例,請參閱第1與第3圖,一 適用覆晶薄膜封裝之多晶片接合治具聊係包含一基座 210 /複數個取放頭22〇及一驅動軸230,較佳地,該基座 210係可水平向旋轉,以適用於多晶片橫向排列型態之電 路捲帶10或多晶片縱向排列型態之電路捲帶(如第4圖所 不)’該取放頭220係設置於該基座21〇,每一取放頭220係 具有一壓合面221,以將複數個晶片2〇、3〇壓合至一電路 捲帶10 ’較佳地,每一取放頭22〇係包含有一通氣管222, 其係連接至一真空吸取機構(圖未繪出),以藉由該通氣管 222吸附該些晶片20、30,在本實施例中,該些取放頭220 係為等距排列於該基座2 1 〇,以配合該電路捲帶1 〇之銲罩 層開口 12、1 3位置,此外,該些取放頭220之該些壓合面 221係為共平面,以供一次同時壓合該些晶片20、30至該 電路捲帶10。該驅動轴2 30係連接於該基座210,以升降該 基座210,較佳地,該驅動軸230係由一步進馬達(圖未% 出)所驅動,以帶動該驅動軸230作水平向之移動。 當欲對該電路捲帶10進行晶片接合時’其中’該電路 捲帶10係具有複數個封裝單元11,每一封裝單元11係具有 一第一銲罩層開口 12、一第二銲罩層開口 13及複數個顯露Lowering the base, wherein the difficult piece bonding jig can be used _ times == the pressing surface of the pick-and-place head, so that the polycrystalline silicon is reduced to the wafer bonding to a circuit reel, [Embodiment] & π hand Referring to the attached drawings, Taibian 丨 ># ^ @ Λ This creation will enumerate the following embodiment descriptions. For a specific embodiment, please refer to FIG. 1 and FIG. 3. A multi-chip bonding jig suitable for a flip-chip thin film package includes a base 210 / a plurality of pick-and-place heads 22 and a drive shaft 230. Preferably, the base 210 is capable of rotating horizontally, so as to be suitable for a circuit reel 10 of a multi-chip horizontal arrangement type or a circuit reel of a multi-chip vertical arrangement type (as shown in FIG. 4). The placing head 220 is arranged on the base 21, and each picking and placing head 220 has a pressing surface 221 for pressing a plurality of wafers 20 and 30 to a circuit reel 10 '. Preferably, each A pick-and-place head 22o includes a vent tube 222, which is connected to a vacuum suction mechanism (not shown in the figure) to adsorb the wafers 20, 30 through the vent tube 222. In this embodiment, the The pick-and-place heads 220 are equidistantly arranged on the base 2 10 to match the positions 12 and 13 of the solder mask layer of the circuit reel 10, and in addition, the press-and-place heads 220 are pressed together. The surface 221 is a coplanar surface for pressing the wafers 20 and 30 to the circuit reel 10 at the same time. The driving shaft 2 30 is connected to the base 210 to lift the base 210. Preferably, the driving shaft 230 is driven by a stepping motor (not shown in the figure) to drive the driving shaft 230 to level. Move towards it. When the circuit reel 10 is to be wafer-bonded, the circuit reel 10 has a plurality of packaging units 11 each having a first solder mask layer opening 12 and a second solder mask layer. Opening 13 and multiple exposures

第8頁 M269566 四、創作說明(4) 於該第一銲罩層開口 12與該第二銲罩層開口 13之跡線14 (Trace),此時,該多晶片接合治具200係藉由該些取放頌 220吸附一第一晶片20與一第二晶片30,再將該第一晶片 20與該第二晶片30放置於對應之該第一銲罩層開口 12與該 第二銲罩層開口 13,接著該取放頭220係同時下壓該第一 晶片20與該第一晶片30 ’以使該第一晶片20與該第二晶片 30與顯露於第一銲罩層開口12與該第二銲罩層開口13之該 些跡線14接合’在本實施例中,該基座21 〇内係設置有複 數個加熱器2 11,其係加熱該些取放頭220至一定之工作溫 度,此外,該些壓合面2 21係為矩形,以利取放壓合該第 一晶片20與該第二晶片30,此外,請參閱第4圖,當一電 路捲帶40係具有複數個橫向之銲罩層開口5〇時,該驅動輪 230係可水平向旋轉,以調整晶片壓合之方向,較佳地, 該基座210係由一伺服馬達或一步進馬達(圖未繪出)所驅 動,以帶動該基座210做水平向旋轉之動作。 上述之適用覆晶薄膜封裝之多V片接乍合治具20。係以 該些取放頭220吸附該第一晶片2〇與該第二 二=:至該電路捲帶10上方後,再利用該些取= 埶壓人:附之該第一晶片20與該第二晶片30,並進行 、堅=之乂驟,以一次壓合之動作完成多晶片接合之 ’’太:Z低晶片接合之時間,提昇生產速度與效率。 本=乍之保護範圍當視後附之申請專利範圍所 圍内所作之任何變化盘;:ί:”本創作之精神和範 7變化與修改,均屬於本創作之保護範圍。 第9頁 M269566 圖式簡單說明 【圖式簡單說明】 第1圖:一種習 圖; 夕日日片橫向排列型態之電路捲帶之上視 第2圖:習知適用於 路捲帶上接人日Η覆日日,專膜封裝之晶片接合治具在該電 丧〇日日片之戴面示意圖; 第3圖:依據本創 — 封裝之多晶片接人、、Λ 八體實施例,一種適用覆晶薄膜 意圖;及 〇/〇具在該電路捲帶上接合多個晶片之示 第4圖:依據本創作之一具體實施例,-種多晶片縱向排 列型態之電路捲帶之上視圖。 元件符號簡單說明: 10 電路捲帶 11 封裝單元 12 第一銲罩層開口 13 第二銲罩層開口 14 跡線 2〇 第一晶片 30 第二晶片 40 電路捲帶 50 銲罩層開口 1〇〇晶片接合治具 110基座 120 壓合頭 1 3 0驅動轴Page 8 M269566 4. Creation instructions (4) Traces 14 (Trace) on the first solder mask layer opening 12 and the second solder mask layer opening 13 are used. At this time, the multi-chip bonding jig 200 is made by The pick-and-place chants 220 adsorb a first wafer 20 and a second wafer 30, and then place the first wafer 20 and the second wafer 30 on the corresponding first solder mask layer opening 12 and the second solder mask. Layer opening 13, and then the pick-and-place head 220 simultaneously presses down the first wafer 20 and the first wafer 30 ′, so that the first wafer 20 and the second wafer 30 and the first solder mask layer opening 12 and The traces 14 of the second solder mask layer opening 13 are bonded. In this embodiment, a plurality of heaters 2 11 are provided in the base 21 0, which heats the pick-and-place heads 220 to a certain level. Operating temperature. In addition, the pressing surfaces 2 21 are rectangular, so as to facilitate the pressing and placing of the first wafer 20 and the second wafer 30. In addition, referring to FIG. 4, when a circuit reel 40 has When a plurality of lateral welding mask layer openings are 50, the driving wheel 230 can be rotated horizontally to adjust the direction of wafer pressing. Preferably, the substrate The line 210 is driven by a servo motor or a stepping motor (not shown) to drive the base 210 made of the operation of the rotary horizontal. The above-mentioned multi-V chip suitable for flip-chip thin film packaging is connected to the zigzag fixture 20. The pick-and-place heads 220 are used to attract the first wafer 20 and the second two =: after the circuit reel 10 is used, the pick-ups are used to suppress people: attached to the first wafer 20 and the The second wafer 30 is performed in a step that is firm, and the multi-wafer bonding is completed in a single pressing operation. Too: Z Low wafer bonding time, which improves production speed and efficiency. The scope of protection of this book at first glance shall be subject to any changes made within the scope of the attached patent application: ί: "The spirit of this creation and the changes and modifications of Model 7 belong to the scope of protection of this creation. Page M269566 Figure 9 Simple description of the formula [Simplified description of the diagram] Figure 1: A kind of custom picture; The top view of the circuit tape of the horizontal arrangement of the eve of the sun and the Japanese film. Figure 2: The custom is applicable to the access to the sundial and the sun on the road. Schematic diagram of the surface of the wafer bonding jig for the special film package on the 0th day of the electric film; Figure 3: According to the invention-packaged multi-chip access, Λ eight-body embodiment, an intention to apply a flip-chip film ; And 〇 / 〇 with multiple wafers on the circuit reel shown in Figure 4: According to a specific embodiment of the present invention, a top view of a multi-chip vertical arrangement of the circuit reel. Element symbol is simple Description: 10 circuit reel 11 package unit 12 first solder mask layer opening 13 second solder mask layer opening 14 trace 20 first wafer 30 second wafer 40 circuit reel 50 solder mask layer opening 100 wafer bonding rule With 110 base 120 pressing head 1 3 0 drive

第10頁 M269566 圖式簡單說明 200 多晶片 接合治具 210 基座 211 加熱器 220 取放頭 221 壓合面 222通氣管 230 驅動轴Page 10 M269566 Brief description of the drawing 200 multi-wafer bonding jig 210 base 211 heater 220 pick-and-place head 221 pressing surface 222 vent tube 230 drive shaft

HI 第11頁HI Page 11

Claims (1)

M269566M269566 【申請專利範圍】 1、一種適用覆晶薄膜封裝之多晶片接合治具,包含·· 一基座; 複數個取放頭,其係設置於該基座,每一取放頭係具 有一壓合面’以將複數個晶片壓合至一電路捲帶;及 一驅動軸,其係連接於該基座,以升降該基座。 f、如申請專利範圍第1項所述之適用覆晶薄膜封裝之多 晶片接合治具,其中每一取放頭係具有一通氣管,以吸附 一晶片。 3、 如申請專利範圍第1項所述之適用覆晶薄膜封裝之多 晶片接合治具,其中該些取放頭係為等距排列。 4、 如申請專利範圍第1項所述之適用覆晶薄膜封裝之多 晶片接合治具,其中該些取放頭之該些壓合面係為共爭 面0 5、 如申請專利範圍第1項所述之適用覆晶薄膜封裝I多 晶片接合治具,其中該驅動轴係由一伺服馬達或_步進馬 達所驅動,以帶動該基座作水平向旋轉動作。 6、 如申請專利範圍第1項所述之適用覆晶薄膜封裝之多 晶片接合治具,其中該驅動轴係由一步進馬達所驅動,以 帶動該基座作水平向移動。 7、 如申請專利範圍第1項所述之適用覆晶薄膜封震之多 晶片接合治具,其中該基座内係設置有複數個加熱器,以 加熱該些取放頭。 8、 如申請專利範圍第1項所述之適用覆晶薄膜封裝之多[Scope of patent application] 1. A multi-chip bonding jig suitable for flip-chip film packaging, including a base; a plurality of pick-and-place heads, each of which is provided with a pressure The bonding surface is used to press a plurality of wafers to a circuit reel; and a driving shaft is connected to the base to lift the base. f. Many wafer bonding jigs suitable for flip-chip film packaging as described in item 1 of the scope of the patent application, wherein each pick-and-place head has a vent tube to attract a wafer. 3. As described in item 1 of the scope of the patent application, there are many wafer bonding jigs suitable for flip-chip film packaging, wherein the pick-and-place heads are arranged at equal distances. 4. The multi-chip bonding jig applicable to a flip-chip film package as described in item 1 of the scope of patent application, wherein the pressing surfaces of the pick-and-place heads are co-contest surfaces. The applicable flip-chip thin film package I multi-chip bonding jig described in the item, wherein the driving shaft is driven by a servo motor or a stepping motor to drive the base to perform a horizontal rotation action. 6. The wafer bonding jigs suitable for flip-chip film packaging as described in item 1 of the scope of patent application, wherein the drive shaft is driven by a stepping motor to drive the base to move horizontally. 7. As described in item 1 of the scope of the patent application, there are many wafer bonding jigs suitable for flip-chip sealing, wherein the base is provided with a plurality of heaters to heat the pick-and-place heads. 8. There are many applicable flip-chip film packages as described in item 1 of the scope of patent application 第12頁 M269566 五、申請專利範圍 晶片接合治具,其中該些取放頭之壓合面係為矩形。 mm 第13頁Page 12 M269566 5. Scope of patent application Wafer bonding jig, in which the pressing surfaces of these pick-and-place heads are rectangular. mm Page 13
TW093221489U 2004-12-31 2004-12-31 Multi chips bonding tool for COF package TWM269566U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW093221489U TWM269566U (en) 2004-12-31 2004-12-31 Multi chips bonding tool for COF package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093221489U TWM269566U (en) 2004-12-31 2004-12-31 Multi chips bonding tool for COF package

Publications (1)

Publication Number Publication Date
TWM269566U true TWM269566U (en) 2005-07-01

Family

ID=36616377

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093221489U TWM269566U (en) 2004-12-31 2004-12-31 Multi chips bonding tool for COF package

Country Status (1)

Country Link
TW (1) TWM269566U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103187345A (en) * 2011-12-28 2013-07-03 鸿富锦精密工业(深圳)有限公司 Taking and placing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103187345A (en) * 2011-12-28 2013-07-03 鸿富锦精密工业(深圳)有限公司 Taking and placing device

Similar Documents

Publication Publication Date Title
TW546795B (en) Multichip module and manufacturing method thereof
WO2012068762A1 (en) Ic chip package of sip system integration level and manufacturing method thereof
TWI283902B (en) Stack MCP and manufacturing method thereof
WO2012068763A1 (en) Gird-array ic chip package without carrier and manufacturing method thereof
JP4992904B2 (en) Manufacturing method of semiconductor device
JP5055509B2 (en) Device for attaching adhesive sheets to substrates
TW200411871A (en) Thermal-enhance package and manufacturing method thereof
JP2012195566A (en) Debonding device for semiconductor manufacturing
JP3822043B2 (en) Chip part assembly manufacturing method
KR102052326B1 (en) Method for die and clip attachment
JP2011151264A (en) Heater and method of manufacturing packaged body
JP2004349435A (en) Device for sticking dicing-die bond tape to substrate
JP2018120938A (en) Semiconductor manufacturing apparatus and method for manufacturing semiconductor device
JP2009289959A (en) Bonder and bonding method
TWM269566U (en) Multi chips bonding tool for COF package
JP2004281659A (en) Holding member and method for manufacturing semiconductor device
TWI313500B (en)
TWI484546B (en) Flip-chip bonding process for compensating die thickness
TWI331390B (en) Multi-chip stack package efficiently using a chip attached area on a substrate and its applications
JP2002368023A (en) Method of manufacturing semiconductor device
TWI260069B (en) Memory module and method for manufacturing the same
CN107644843B (en) Wafer stack manufacturing method
TW200532873A (en) Process for packaging and stacking multiple chips with the same size
TWI236105B (en) Manufacturing method for ball grid array package
TW201013874A (en) Chip package

Legal Events

Date Code Title Description
MM4K Annulment or lapse of a utility model due to non-payment of fees