l3!350〇 九、發明說明： 【發明所屬之技術領域】 本毛明ίτ、有關—種半導體組裝構造之製造方法，尤指 具有晶圓級光電半導體組裝構造之製造方法。 【先前技術】 3士 I相關業界所認知的，光電半導體晶粒封裝生產 、'、θ產力k种疋近年來各種晶粒封裝及代工廠商積極研 X及建構之項目，其所使用之技術方式如生產流程改善或 1材料之使料等可適用於各種晶粒封裝之場所，以使得 、牛低成本及工k成本需求得以達成；目前為止生產流程改 县可=說是非常重要的改善項目，因為晶粒封裝的機台多 為W工料π製做之機械，略有更改，往往代價高昂， 疋可以配合固有的機台特性做出週邊流程之改善，相對 成本較低而且成效顯著。 在1C基板方面（包括BGA(球型柵狀陣列基板）、csp(晶 粒規格封裝基板）、Flipchip(覆晶基板）三大類），其中Ic 基板近年成長幅度大；近年來台灣、南韓及大陸等地並積 極擴充增層基板的產量及持續投資雷射鑽孔機設備，使其 增加基板生產上的競爭力。未來由於可攜式電子產品輕薄 知·小之需求趨勢，將促使電路板朝向細線化及微孔技術發 ，丄加上小型封裝技術的進步，也使得高階IC基板的需求 t向，連帶使小尺寸晶粒封裝前景一片看好。為了滿足手 機板、通訊產品及汽車工業的需求，預期未來小尺寸晶粒 封裝將會再持續發展。 5 1313500 、明荟考如第-圖所示，其為習知之發光二極體封 造】a，基材]0a黏著發光二極體晶幻如，並連上 ’ 以封裝材料恤封裝之狀況，尤其是面對組裝時， ，光-極體封裝構造la面對較繁雜之製造程序問題及效安 :=二上如峨材時整體尺寸過大或精度不： 及外加迅路(基材上之電路)體積太大，在實 影響縣尺寸相加功能，並且對封裝良率也 ; 響。叫必要研發出-種利於封裝尺寸縮小及容易附： ，大功此且精度易於控制的封裝結構來符合實際應用之要 二’此外’白知RGB三色晶粒（111〜113)發光混合成白光， 二限於封〜基材與線路設計無法細線化，$職三色晶粒 一 1 113)!去罪近，導致晶粒之間的距離較遠光點分散。 同樣情況亦發生在Μ測II封裝領域。 丄。口此為使生產之程序能夠改善，且能持續高品質及高 文率運作冑必要配合實際狀態研發新生產流程及新構造 而以印刷導電膠方切導電膠以印刷方式直接塗佈於晶圓 上或佈δχ導電凸塊’再將光電半導體晶粒貼到晶圓上以進 封衣生產線使％·組裝品質及功能提高，因為在光電半導 體晶粒貼附於晶圓係為之貼合方式；並且因為使用印刷方 =上t或佈5又導电凸塊，對位精度高而成本低，成本與良 t皆可提升’配合進—步架構各週邊機具，並符合工業工 ί之机私排配原理，因此尋找出—種更方便之技藝使得本 1明能夠具有處理多方面各種之狀職力，因此研發出本 I明來達成上述之需求。尤其大尺寸之光電半導體（發光二 1313500 極體、光感測器或功率晶片）可適用於本發明，因為大尺寸 之光電半導體可於晶圓中預植所需模組電路以縮小光電裝 置體積，而其它種類之配合應用半導體晶粒亦可配合覆蓋 在該光電半導體之附近。另外，大尺寸由於有群聚產生的 熱效應，習知電路板（如環氧樹脂基板）之散熱效果不佳， 對產品壽命有一定程度之影響。 緣是，本發明人有感上述缺失之可改善，且依據多年 來從事此方面之相關經驗，悉心觀察且研究之，並配合學 理之運用，而提出一種設計合理且有效改善上述缺失之本 發明。 【發明内容】 本發明之主要目的在於提供一種晶圓級光電半導體組 裝構造之製造方法，也就是新生產流程方法產生之構造， 而且可以成本低廉之架構及以配合相關之較方便專用週邊 自動機施行，可用於光電半導體晶粒封裝產品之應用場 所，可以提供低成本高品質之效果。 本發明之次一目的在於提供一種晶圓級光電半導體組 裝構造之製造方法，係可以提供細線及微型化組裝結構。 本發明之另一目的在於提供一種晶圓級光電半導體組 裝構造之製造方法，係可於晶圓中預植所需模組電路以縮 小光電裝置體積，可將單一晶片做為模組化晶片或直接封 裝成元件。 本發明之又一目的在於提供一種晶圓級光電半導體組 裝構造之製造方法，係利用晶圓基版提供良好的散熱性。 7 1313500 本發明之進一目的在於提供一種晶圓級光電半導體組 裝構造之製造方法，可以切割方式裁切出所需應用的大、 小不同尺寸之螢幕，而且若產生生產不良的壞點，亦可將 之切成單一單元（uni 1;)的LED (發光二極體）做生產的有 效利用。 為了達成上述目的，本發明晶圓級光電半導體組裝構 造之製造方法，其步驟包含：準備一具備覆蓋晶粒接合之 預定位置的晶圓；塗佈導電材料於該預定位置；將光電半 導體晶粒層豐於該晶圓之導電材料上，以南分子材料封裝 該光電半導體晶粒形成'半成品，以及依所需之尺寸，對 該半成品切割出大、小不同尺寸或單一單元之光電半導體 晶粒組裝構造。 為了使能更進一步瞭解本發明為達成預定目的所採取 之技術、手段及功效，請參閱以下有關本發明之詳細說明 與附圖，相信本發明之目的、特徵與特點，當可由此得一 深入且具體之暸解，然而所附圖式僅提供參考與說明用， 並非用來對本發明加以限制者。 【實施方式】 請參考以下所述為本發明運作原理，其中本發明為利 用導電膠印刷塗佈於晶圓之上或覆蓋金（或錫）凸塊之步 驟’以方便光電半導體在晶圓上進行晶粒貼合的生產流 程，進一步以簡單的方式來描述本發明之流程即為：晶圓 製成、設置導電材料、將光電半導體晶粒層疊於晶圓上（可 省略打連接線；一般為金線）、封裝及切割，且印刷對位減 13135〇〇 v累積％位誤差，有助於對位梦 ;圓而言放置對位容易，加上:;配 成本地定義出有益於實際應用 °輔助機台，3匕即令 圓上可預= 日日粒封裝生產系統。且晶 麗保護預壓二極體(如一-)、過電 圓中，有利提升光電半或防靜電構造植於晶 10之讀曰=1面及背面之晶圓丨。，該晶圓 晶粒12，合之預定位置18、光電半導體 粒接點_曰圓1〇、、=半導體或發光二極體），其具有晶 該晶圓正之預定位置18相接合、以及位於 體與讀晶圖in。辞土电材枓。該導電材料連接該光電半導 器。◎ °’電半導體可為發光二極體或影像感測 電材料）於爷 之阳圓l〇 ;塗佈導電膠塊13(導 膠塊13上·以古八工^ )日日粒層豐於s亥晶圓10之導電 -半成。.’:料封裝該光電半導體晶粒12形成 丄:及依所需之尺寸，對該半成品綱出大 不單一單元之光電半導體晶粒組裝構造。小 吻茶考第三圖為本菸 構造之上視圖，其中晶圓::::二:半導體組裝 體晶㈣’再請參考第三圖係為二導 晶圓10黏合之立丨丨而媸、Α好 电卞♦紅日日粒12與 構化’其包含晶圓…具有正面及背面， 1313500 且該正面具有覆晶接合之預定位置18 ;該光電半導體晶粒 12,具有複數個覆晶接點11，以與該晶圓10正面之預定位 置18相接合；及導電膠塊13，位於該晶圓之正面，用以連 接該光電半導體晶粒12及該晶圓10。此外可以切割方式裁 切出所需應用大、小不同尺寸（如虛線所圍繞之範圍）之 螢幕，而且若產生生產不良的壞點，亦可將之切成單一單 元（unit)(如虛線所圍繞之範圍）的LED (發光二極體） 做生產的有效利用，對於生產良率上有很大的幫助。 請參考第四圖至第六圖以詳述本發明之實施例；其中 該晶圓可具有定位標記17;其中該導電膠塊13可為網板印 刷所形成，其中該導電膠塊13亦可為鋼板印刷所形成，其 中該導電膠塊13(或為導電材料）厚度為10-50//m ;其中該 覆晶接點11可位於光電半導體晶粒的中央邊緣或整面區 域；其中該晶圓10正面形成有過電壓保護電路15，與該光 電半導體晶粒12並連，以防止過電壓，其中該過電壓保護 電路15係由二相向之過電壓保護二極體16串接而成，其 中該導電膠塊13為焊錫嘗或銀膠所形成，其中5該光電半 導體晶粒12係以發光二極體方式實施，其設置方式可為複 數個紅綠藍三色或紫外光、紅外光等之R、G、B三色晶粒 組合設於一特定區塊内（如第五圖），本實施例中，三色晶 粒可以用覆晶方式（FIip-chip)來生產，直接製作出RGB晶 粒模組，固晶在基材10’上以打線方式（bonding wire) 做電性連接（如第五A圖）或直接封裝成元件（如第四圖）， 直接在該晶圓底部設有焊接部22，即直接以該晶圓做為基 10 1313500 材而無須打線；或為如辅助控制積體電路 域内’而呈多晶粒形式(如第六 a曰粒δ又置於 一步包含高分子封裝構造14包圍\^^本發明係可更進 中兮a η料 以光电半導體晶粒12;其 ^對體之接合方式可為金屬對金屬丘晶 (一加)’或不同金屬的炫接接合，如全對全J : 對錫接合或錫對錫之共晶或熔接。 、’ί至/、日日、至L3!350〇 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor assembly structure, and more particularly to a method for manufacturing a wafer-level photovoltaic semiconductor assembly structure. [Prior Art] 3 Shi I related industry knows, optoelectronic semiconductor die package production, ', θ productivity k species in recent years, various die packaging and OEMs actively research X and construction projects, which are used Technical methods such as improvement of production process or material making of materials can be applied to various grain packaging places, so that the low cost and labor cost requirements of the cattle can be achieved; so far, the production process can be said to be very important. Improvement project, because the die-packed machine is mostly made of W material, which is slightly modified and often costly. It can improve the peripheral process with the inherent machine characteristics, and the relative cost is low and the effect is remarkable. . In terms of 1C substrate (including BGA (spherical grid array substrate), csp (grain size package substrate), Flipchip (flip chip)), Ic substrate has grown in recent years; in recent years, Taiwan, South Korea and the mainland We are also actively expanding the production of build-up substrates and continuing to invest in laser drilling equipment to increase the competitiveness of substrate production. In the future, due to the demand trend of portable electronic products, the demand for thin-film and micro-hole technology will be promoted, and the advancement of small-scale packaging technology will also make the demand for high-end IC substrates t-strip. The size of the die package is promising. In order to meet the needs of the mobile phone board, communication products and the automotive industry, it is expected that the future small-size die package will continue to develop. 5 1313500, Minghui test as shown in the figure - figure, it is a well-known light-emitting diode seal] a, substrate] 0a adheres to the light-emitting diode crystal illusion, and is connected to the package of the package material Especially in the face of assembly, the light-polar package structure la faces more complicated manufacturing process problems and safety: = the overall size is too large or the precision is not the same as the coffin: and the addition of Xun Road (on the substrate) The circuit) is too large, in the real impact of the county size addition function, and also on the package yield; It is necessary to develop - the kind of package is conducive to shrinking the size of the package and easy to attach: The package structure with great precision and easy control is in line with the practical application. 'In addition, the white RGB three-color crystal (111~113) is mixed into white light. 2, limited to sealing ~ substrate and circuit design can not be thinned, $ three-color crystal grain 1 113)! Offense close, resulting in a far distance between the crystal grains scattered. The same thing happens in the field of speculation II packaging. Hey. In order to improve the production process, and to continue high-quality and high-speed operation, it is necessary to develop new production processes and new structures in accordance with the actual state, and directly apply the conductive adhesive to the wafer by printing conductive paste. Or the δχ conductive bumps' and then attach the optoelectronic semiconductor die to the wafer to enter the sealing line to improve the assembly quality and function, because the optoelectronic semiconductor die is attached to the wafer system. And because of the use of the printing side = on t or cloth 5 and conductive bumps, the alignment accuracy is high and the cost is low, the cost and the good t can be improved 'together with the peripheral structure of each machine, and in line with the industrial machine The principle of private allocation, so the search for a more convenient technique makes this one capable of handling a variety of positions, so I developed this to achieve the above requirements. In particular, large-sized optoelectronic semiconductors (LED 2113500 polar body, photo sensor or power chip) can be applied to the present invention because a large-sized optoelectronic semiconductor can pre-plant the required module circuit in the wafer to reduce the optoelectronic device volume. Other types of compound semiconductor dies may be used in the vicinity of the optoelectronic semiconductor. In addition, due to the thermal effects of clustering, the heat dissipation effect of conventional circuit boards (such as epoxy resin substrates) is not good, which has a certain degree of influence on product life. The reason is that the inventors have felt that the above-mentioned defects can be improved, and based on the relevant experience in this field for many years, carefully observed and studied, and in conjunction with the application of the theory, a present invention which is reasonable in design and effective in improving the above-mentioned defects is proposed. . SUMMARY OF THE INVENTION The main object of the present invention is to provide a manufacturing method of a wafer level optoelectronic semiconductor assembly structure, that is, a structure generated by a new production process method, and can be configured with a low cost structure and a convenient dedicated peripheral automaton. It can be used in applications where optoelectronic semiconductor die package products can provide low cost and high quality effects. A second object of the present invention is to provide a method of fabricating a wafer level optoelectronic semiconductor assembly structure, which is capable of providing a thin wire and a miniaturized assembly structure. Another object of the present invention is to provide a method for fabricating a wafer level optoelectronic semiconductor assembly structure by pre-planting a desired module circuit in a wafer to reduce the volume of the optoelectronic device, and using a single wafer as a module wafer or Directly packaged into components. It is still another object of the present invention to provide a method of fabricating a wafer level optoelectronic semiconductor assembly structure that provides good heat dissipation using a wafer substrate. 7 1313500 A further object of the present invention is to provide a method for fabricating a wafer level optoelectronic semiconductor assembly structure, which can cut out large and small screens of different sizes for a desired application, and can also produce bad defects in production. It is cut into a single unit (uni 1;) LED (light emitting diode) for efficient use in production. In order to achieve the above object, a method for fabricating a wafer level optoelectronic semiconductor assembly structure of the present invention includes the steps of: preparing a wafer having a predetermined position covering a die bond; coating a conductive material at the predetermined position; and coating the optoelectronic semiconductor die Layered on the conductive material of the wafer, encapsulating the optoelectronic semiconductor die to form a semi-finished product with a south molecular material, and cutting the optoelectronic semiconductor crystal grains of different sizes or single cells for the semi-finished product according to the required size. Assembly structure. In order to further understand the techniques, means, and effects of the present invention in order to achieve the intended purpose, refer to the following detailed description of the invention and the accompanying drawings. It is to be understood that the invention is not to be construed as limited [Embodiment] Please refer to the following as the operation principle of the present invention, wherein the present invention is a step of coating or coating a gold (or tin) bump on a conductive adhesive, to facilitate the optoelectronic semiconductor on the wafer. The production process of the die bonding is further described in a simple manner: the wafer is fabricated, the conductive material is disposed, and the optoelectronic semiconductor die is stacked on the wafer (the connection line can be omitted; For the gold wire), packaging and cutting, and the printing alignment minus 13135 〇〇 v cumulative % bit error, which helps to match the dream; the round is easy to place the alignment, plus:; the cost is defined to be beneficial to the actual Application of the auxiliary machine, 3 匕 令 圆 圆 圆 圆 日 日 日 日 日 日 日 日 日 日 日 日Moreover, the crystal protects the pre-pressed diode (such as a-) and the over-current circle, which is beneficial to enhance the photoelectric half or anti-static structure implanted on the wafer 曰1 surface and the wafer wafer on the back side. The wafer die 12, which is combined with a predetermined position 18, a photo-semiconductor grain contact, a semiconductor, or a light-emitting diode, has a crystal at a predetermined position 18 of the wafer, and is located Body and read crystal in. Recalling the electrical materials. The electrically conductive material is coupled to the optoelectronic semiconductor. ◎ ° 'Electric semiconductor can be a light-emitting diode or image sensing electrical material) in the Ye Yang round l〇; coated conductive rubber block 13 (adhesive block 13 on the ancient eight work ^) daily grain layer In the shai wafer 10 conductive - semi-finished. . . : The package encapsulates the optoelectronic semiconductor die 12 to form 丄: and according to the required size, the semi-finished product outlines an optoelectronic semiconductor die assembly structure that is not a single unit. The third picture of the small kiss tea is a top view of the structure of the cigarette, in which the wafer::::2: the semiconductor assembly crystal (4) 'Please refer to the third figure for the bonding of the two wafers 10 Α 卞 卞 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 红 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含 包含The contact 11 is bonded to a predetermined position 18 on the front side of the wafer 10; and a conductive paste 13 is disposed on the front surface of the wafer for connecting the optoelectronic semiconductor die 12 and the wafer 10. In addition, the screen can be cut in a large and small size (such as the range surrounded by the dotted line), and if a bad point of production is produced, it can be cut into a single unit (such as a dotted line). LEDs (light-emitting diodes) around the range) The efficient use of production is of great help to production yield. Please refer to the fourth to sixth embodiments to describe the embodiment of the present invention; wherein the wafer may have a positioning mark 17; wherein the conductive rubber block 13 may be formed by screen printing, wherein the conductive rubber block 13 may also be Formed by a steel plate, wherein the conductive paste 13 (or a conductive material) has a thickness of 10-50 / / m; wherein the flip-chip contact 11 can be located at a central edge or a full-surface area of the optoelectronic semiconductor die; wherein the wafer An overvoltage protection circuit 15 is formed on the front surface, and is connected in parallel with the optoelectronic semiconductor die 12 to prevent overvoltage. The overvoltage protection circuit 15 is formed by connecting two opposite-direction overvoltage protection diodes 16 in series. The conductive rubber block 13 is formed by soldering or silver glue, wherein the photo-electric semiconductor die 12 is implemented by a light-emitting diode, and the arrangement may be a plurality of red, green, blue, three-color or ultraviolet light, infrared light, etc. The three color crystal grains of R, G, and B are combined in a specific block (as shown in the fifth figure). In this embodiment, the three color crystal grains can be produced by flip chip method (FIip-chip), and directly produced. RGB die module, solid crystal on the substrate 10' Bonding wire (electrical connection (such as Figure 5A) or directly packaged into components (such as the fourth figure), directly at the bottom of the wafer is provided with a soldering portion 22, that is, directly based on the wafer 10 1313500 The material does not need to be wired; or it is in the form of multi-grain in the auxiliary control circuit domain (for example, the sixth a granule δ is placed in one step including the polymer package structure 14 surrounded by \^^ the invention system can be further advanced兮a η material is an optoelectronic semiconductor die 12; the bonding of the body can be metal-to-metal dolomite (one plus)' or a different metal splicing joint, such as all-pair J: tin bonding or tin pair The eutectic or fusion of tin., 'ί至/, 日日,至至
是以，較習知電路板當作封裝載 更細密（習知封裝載板線寬多為Q G5mmH㈣細線無法 板，線寬可以達到請5mm以下；^然以晶圓做為載 對於發光二極體來說，可以明顯縮短θ 4別、凡件尺寸’且 古甘^父止4士 ω· 、、、日日粒之間的距離以提 同其舍先祕；此外，晶圓基板的散熱性較習知之 脂基板為優，對於群聚式熱效應 '、 提供較長的產Μ命。 務㈣較高可以 本發明晶圓級光電半導體組褒構造之製造方法，以石夕 晶圓為基板⑸/SWbase)，將電路設計於硬基板上如同pcB -樣，將LED晶片（關以Flip—chlp方式固定树基板上 的指定位置，並由於德板上的電路連結使得這—整個陣 列（Array)有特定的功能。使用矽基板做為基材的原因是ic 製程的電路密集度相當高，遠大於印刷電路板（pcB)、金屬 導線支架（Lead-frame)、陶瓷基板^灯⑽“）…，故這就是 為了讓這個密集排列光陣列有更細微的電路設計於上才做 的選擇，另外的好處疋石夕基板的熱膨脹係數接近於led晶 片，在LED點冗舍熱後可以因其熱膨脹係數接近而不至於 與載板發生應力上的衝突，導致可靠度下降。 11 1313500 此外在應用上，這個陣列因為晶片可以密集的排列， 使得像素（pixel)提高，比之前使用SMD (表面黏著型）LED 放在PCB基板上所設計出來的顯示看板的密度要高很多， 可視的距離大大拉近，亦可應用於短距離使用螢幕。另外 此一應用可以以切割方式裁切出所需應用的螢幕尺寸，如 同LCD玻璃可以裁切出不同尺寸一樣，而且若產生生產不 良的壞點，亦可將之切成單一 un i t的LED做生產的有效利 用，對於生產良率上有很大的幫助。 須知本發明具有以下之優點： 1. 對位精準，良率提昇：本發明係由晶圓印刷導電材 及將光電半導體晶粒（發光二極體）壓合於晶圓之上得到 實踐，可減少定位誤差，進而提升取置機之良率，使得經 濟效果達成。 2. 封裝尺寸縮小：光電半導體晶粒（發光二極體）壓 合於晶圓，使得本發明封裝尺寸可以晶圓級封裝視之，封 裝尺寸較小。 3. 製程機器設備成本低：製程方便施行使設備成本自 然減少而易於取得。（如印刷導電膠之設備）。 4. 功能提高：可以在晶圓之積體電路預植功能，如增 加過電流保護二極體。 5. 可以切割方式裁切出所需應用的大、小不同尺寸之 螢幕，而且若產生生產不良的壞點，亦可將之切成單一單 元（un i t)的LED做生產的有效利用。 6. 矽基板的熱膨脹係數接近於LED晶片，在LED點亮 12 1313500 發熱後可以因其熱膨脹係數接近而不至於與載板發生應力 上的衝突，導致可靠度下降。 惟以上所述僅為本發明之較佳可行實施例，非因此即 拘限本發明之專利範圍，故舉凡應用本發明說明書或圖式 内容所為之等效化學結構變化，均同理皆包含於本發明之 範圍内，以保障發明者之權益，於此陳明。 【圖式簡單說明】 第一圖：為習知之發光二極體封裝構造示意圖； 第二圖：為習知之發光二極體封裝構造之上視圖； 第三圖：為本發明貫施之晶圓級光電半導體組裝構造之上 視圖； 第四圖：為本發明每一光電半導體晶粒與晶圓黏合之剖面 構造之示意圖； 第五圖：為本發明R、G、B三色晶粒組合之上視圖； 第五A圖：為本發明直接製作出RGB晶粒模組之上視圖； 以及 第六圖：為本發明另一實施例之示意圖。 【主要元件符號說明】 發光二極體封裝構造 la 基材 10a 發光二極體晶粒 12a 導線 14a 封裝材料 16a 晶圓 10 覆晶接點 11 光電半導體晶粒 12 導電膠塊（導電材料） 13 高分子封裝構造 14 過電壓保護電路 15 13 1313500 過電壓保護二極體 16 定位標記 17 預定位置 18 特定區塊 20 基材 10， 焊接部 22Therefore, it is more compact than the conventional circuit board (the conventional package carrier board line width is mostly Q G5mmH (four) thin line can not be board, the line width can reach below 5mm; ^ the wafer is used as the load for the light-emitting diode In fact, the θ 4, the size of the piece can be significantly shortened, and the distance between the granules and the granules of the celestial granules is the same as that of the granules; It is superior to the conventional lipid substrate, and provides a long-term production life for the group heating effect. (4) The manufacturing method of the wafer-level optoelectronic semiconductor stack structure of the present invention can be used, and the Shixi wafer is used as the substrate. (5) / SWbase), the circuit is designed on a hard substrate like a pcB - like, the LED chip (closed to the specified position on the tree substrate by Flip-chlp method, and due to the circuit connection on the German board makes this - the entire array (Array There is a specific function. The reason why the ruthenium substrate is used as the substrate is that the circuit density of the ic process is quite high, much larger than the printed circuit board (pcB), the metal lead frame (Lead-frame), and the ceramic substrate (10) "). ..., so this is to make this densely arranged The array has a more subtle circuit design to choose from. The other advantage is that the thermal expansion coefficient of the substrate is close to that of the led wafer. After the LED point is exhausted, the thermal expansion coefficient can be close to the stress of the carrier. The conflict on the top leads to a decrease in reliability. 11 1313500 In addition, in the application, this array is designed because the wafers can be densely arranged, so that the pixels are improved, and the SMD (surface-adhesive) LEDs are placed on the PCB substrate. The density of the display kanban is much higher, the visible distance is greatly improved, and it can also be used for short-distance use of the screen. In addition, this application can cut the screen size of the desired application by cutting, just like the LCD glass can be cut out. Different sizes, and if there is a bad point of production failure, it can also be cut into a single un it LED for efficient use of production, which is of great help to the production yield. It should be noted that the present invention has the following advantages: Alignment accuracy and yield improvement: the present invention prints a conductive material from a wafer and presses the optoelectronic semiconductor crystal (light emitting diode) on Practice on the circle, which can reduce the positioning error, thereby improving the yield of the pick-up machine, so that the economic effect is achieved. 2. The package size is reduced: the optoelectronic semiconductor die (light-emitting diode) is pressed onto the wafer, so that the present invention The package size can be viewed in the wafer level package, and the package size is small. 3. The cost of the process machine equipment is low: the process is easy to implement and the equipment cost is naturally reduced and easy to obtain. (such as printing conductive adhesive equipment.) 4. Function improvement: In the integrated circuit pre-planting function of the wafer, such as adding an overcurrent protection diode. 5. It can cut out the large and small screens of the required application in a cutting manner, and if there is a bad point of production, It can be cut into single unit (un it) LEDs for efficient use in production. 6. The thermal expansion coefficient of the germanium substrate is close to that of the LED chip. After the LED is lit, the thermal expansion coefficient can be close to the stress of the carrier, which leads to a decrease in reliability. However, the above description is only a preferred embodiment of the present invention, and thus the scope of the present invention is not limited thereto, and the equivalent chemical structure changes which are applied to the specification or the drawings of the present invention are all included in the same reason. Within the scope of the present invention, to protect the rights and interests of the inventors, Chen Ming. [Simple diagram of the diagram] The first diagram: a schematic diagram of the conventional LED package structure; the second diagram: a top view of the conventional LED package structure; The third diagram: the wafer of the present invention A top view of the assembled structure of the optoelectronic semiconductor; a fourth view: a schematic view of the cross-sectional structure of each optoelectronic semiconductor die bonded to the wafer of the present invention; Figure 5: a combination of R, G, and B three-color crystal grains of the present invention 5 is a top view of the RGB die module directly produced by the present invention; and a sixth view is a schematic view of another embodiment of the present invention. [Main component symbol description] LED package structure la substrate 10a LED die 12a wire 14a package material 16a wafer 10 flip chip contact 11 optoelectronic semiconductor die 12 conductive paste (conductive material) 13 high Molecular package construction 14 Overvoltage protection circuit 15 13 1313500 Overvoltage protection diode 16 Positioning mark 17 Predetermined position 18 Specific block 20 Substrate 10, Weld 22
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