TWI837050B - Manufacturing method of circuit board - Google Patents
Manufacturing method of circuit board Download PDFInfo
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- TWI837050B TWI837050B TW112129205A TW112129205A TWI837050B TW I837050 B TWI837050 B TW I837050B TW 112129205 A TW112129205 A TW 112129205A TW 112129205 A TW112129205 A TW 112129205A TW I837050 B TWI837050 B TW I837050B
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- circuit board
- blind hole
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 82
- 229910052802 copper Inorganic materials 0.000 claims abstract description 82
- 239000010949 copper Substances 0.000 claims abstract description 82
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims abstract description 28
- 239000001569 carbon dioxide Substances 0.000 claims abstract description 14
- 229910002092 carbon dioxide Inorganic materials 0.000 claims abstract description 14
- 238000009966 trimming Methods 0.000 claims description 37
- 239000004020 conductor Substances 0.000 claims description 24
- 239000003292 glue Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000012286 potassium permanganate Substances 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 claims description 2
- 238000003754 machining Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 230000007547 defect Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 3
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 2
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000002787 reinforcement Effects 0.000 description 2
- 201000004569 Blindness Diseases 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
Description
本發明涉及一種製造方法,尤其涉及一種電路板的製造方法。The present invention relates to a manufacturing method, and in particular to a manufacturing method for a circuit board.
現有電路板的盲孔成形方法所形成的盲孔,其底壁的平整度已逐漸無法符合逐年提高的電路板設計需求。於是,本發明人認為上述缺陷可改善,乃特潛心研究並配合科學原理的運用,終於提出一種設計合理且有效改善上述缺陷的本發明。The flatness of the bottom wall of the blind hole formed by the existing blind hole forming method of the circuit board has gradually been unable to meet the increasing circuit board design requirements year by year. Therefore, the inventor believed that the above-mentioned defects could be improved, so he devoted himself to research and applied scientific principles, and finally proposed an invention that is reasonably designed and effectively improves the above-mentioned defects.
本發明實施例在於提供一種電路板的製造方法,其能有效地改善現有電路板的盲孔成形方法所可能產生的缺陷。An embodiment of the present invention provides a method for manufacturing a circuit board, which can effectively improve the defects that may occur in the blind hole forming method of the existing circuit board.
本發明實施例公開一種電路板的製造方法,其包括:一前置步驟:提供一多層狀板材,其包含一絕緣層、形成於所述絕緣層一側的一第一銅層、及形成於所述絕緣層另一側的一第二銅層;其中,所述第一銅層的厚度小於15微米;一黑化步驟:於所述第一銅層形成有一黑化層;一盲孔成形步驟:以二氧化碳鐳射自所述黑化層加工凹設、直至裸露所述第二銅層而形成有一盲孔;其中,所述第二銅層的一粗糙表面裸露於所述盲孔且具有至少一個銅牙及包覆於至少一個所述銅牙內的碳化物或樹脂;以及一平整化步驟;以紫外線鐳射於所述第二銅層的所述粗糙表面加工凹設有一修整槽,以去除至少一個所述銅牙及包覆於至少一個所述銅牙內的所述碳化物或所述樹脂,並使所述修整槽的槽底具有小於3微米的一中心線平均粗糙度。The present invention discloses a method for manufacturing a circuit board, which includes: a pre-step: providing a multi-layer plate, which includes an insulating layer, a first copper layer formed on one side of the insulating layer, and a second copper layer formed on the other side of the insulating layer; wherein the thickness of the first copper layer is less than 15 microns; a blackening step: forming a blackening layer on the first copper layer; a blind hole forming step: using carbon dioxide laser to form a concave hole from the blackening layer until the second copper layer is exposed; A blind hole is formed; wherein a rough surface of the second copper layer is exposed in the blind hole and has at least one copper tooth and a carbide or resin coated in at least one of the copper teeth; and a flattening step; a trimming groove is formed in the rough surface of the second copper layer by ultraviolet laser irradiation to remove at least one of the copper teeth and the carbide or resin coated in at least one of the copper teeth, and the bottom of the trimming groove has a center line average roughness of less than 3 microns.
綜上所述,本發明實施例所公開的電路板的製造方法,其能通過所述平整化步驟以所述紫外線鐳射來形成有所述修整槽,據以改善二氧化碳鐳射所形成的所述盲孔所衍生的缺陷,進而有效地在所述多層狀板材上形成有高平整度的孔洞,以符合更為嚴格的設計需求。In summary, the circuit board manufacturing method disclosed in the embodiment of the present invention can form the trimming groove with the ultraviolet laser through the planarization step, thereby improving the blindness formed by the carbon dioxide laser. Defects derived from holes effectively form holes with high flatness on the multi-layered plate to meet more stringent design requirements.
為能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與附圖,但是此等說明與附圖僅用來說明本發明,而非對本發明的保護範圍作任何的限制。To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, such description and drawings are only used to illustrate the present invention and do not limit the protection scope of the present invention.
以下是通過特定的具體實施例來說明本發明所公開有關“電路板的製造方法”的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用,本說明書中的各項細節也可基於不同觀點與應用,在不悖離本發明的構思下進行各種修改與變更。另外,本發明的附圖僅為簡單示意說明,並非依實際尺寸的描繪,事先聲明。以下的實施方式將進一步詳細說明本發明的相關技術內容,但所公開的內容並非用以限制本發明的保護範圍。The following is a specific embodiment to illustrate the implementation of the "circuit board manufacturing method" disclosed in the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depictions based on actual dimensions, as is stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of the present invention.
應當可以理解的是,雖然本文中可能會使用到“第一”、“第二”、“第三”等術語來描述各種元件或者信號,但這些元件或者信號不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件,或者一信號與另一信號。另外,本文中所使用的術語“或”,應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。It should be understood that although terms such as “first”, “second” and “third” may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another component or one signal from another signal. In addition, the term "or" used in this article shall include any one or combination of multiple associated listed items, depending on the actual situation.
請參閱圖1至圖10所示,其為本發明的一實施例。如圖1所示,本實施例公開一種電路板的製造方法S100,其依序包含有一前置步驟S110、一黑化步驟S120、一盲孔成形步驟S130、一平整化步驟S140、一去黑化步驟S150、一除膠步驟S160、及一成形步驟S170。以下接著說明上述多個步驟S110~S170的具體實施方式。Please refer to FIG. 1 to FIG. 10 , which is an embodiment of the present invention. As shown in Figure 1, this embodiment discloses a circuit board manufacturing method S100, which sequentially includes a pre-step S110, a blackening step S120, a blind hole forming step S130, a planarization step S140, and a black removal step. forming step S150, a glue removal step S160, and a forming step S170. The specific implementation of the above steps S110 to S170 will be described below.
但需先說明的是,上述多個步驟S110~S170可以依據設計需求而調整其實施順序或實施方式(如:所述去黑化步驟S150、所述除膠步驟S160、及所述成形步驟S170的至少其中之一被省略或是以其他步驟取代),所以不以本實施例的內容為限。However, it should be noted that the execution sequence or implementation manner of the above-mentioned steps S110 to S170 can be adjusted according to design requirements (such as: the blackening step S150, the glue removal step S160, and the forming step S170 (at least one of them is omitted or replaced by other steps), so the content of this embodiment is not limited.
所述前置步驟S110:如圖1至圖4所示,提供一多層狀板材1,其為依據設計需求壓合後的構造。其中,圖2和圖3所示的所述多層狀板材1包含有三個絕緣層13、分別形成於最外側兩個所述絕緣層13上的兩個第一銅層11、及相鄰的任兩個所述絕緣層13之間設有一第二銅層12;然而,為便於說明,以下僅以所述多層狀板材1的局部區域來說明,以利於清楚理解本實施例的所述電路板的製造方法S100。The pre-step S110: As shown in FIG. 1 to FIG. 4 , a multi-layer plate 1 is provided, which is a structure after being pressed according to design requirements. The multi-layer plate 1 shown in FIG. 2 and FIG. 3 includes three
換個角度來說,如圖4所示,所述前置步驟S110於本實施例中所提供的所述多層狀板材1,其包含有一個所述絕緣層13、形成於所述絕緣層13一側(如:圖4中的上側)的一個所述第一銅層11、及形成於所述絕緣層13另一側的一個所述第二銅層12。其中,所述第一銅層11的厚度較佳是小於15微米(μm)。From another perspective, as shown in FIG4 , the multi-layer plate 1 provided in the pre-step S110 in this embodiment includes an
所述黑化步驟S120:如圖5所示,於所述第一銅層11(的外表面111)形成有一黑化層14。於本實施例中,所述黑化層14可以為一氧化銅層且其較佳是覆蓋所述第一銅層11的整個所述外表面111,據以利於實施後續的步驟。The blackening step S120: As shown in FIG5 , a
所述盲孔成形步驟S130:如圖6所示,以二氧化碳鐳射自所述黑化層14加工凹設、直至裸露所述第二銅層12而形成有一盲孔15。其中,所述第二銅層12的一粗糙表面121裸露於所述盲孔15且具有至少一個銅牙C及包覆於至少一個所述銅牙C內的雜質P(如:碳化物或樹脂)。The blind hole forming step S130: As shown in FIG6 , a
於本實施例的所述盲孔成形步驟S130之中,所述二氧化碳鐳射所採用的鐳射光束的波長較佳為10.6微米,並且所述第二銅層12的所述粗糙表面121例如是具有介於3微米~5微米的一中心線平均粗糙度(Ra)。也就是說,以所述二氧化碳鐳射所形成的所述盲孔15,其孔壁151常會附著有殘留物R(如:殘膠與碳化物),因而使構成所述粗糙表面121形成有所述中心線平均粗糙度,但本發明不以上述為限。In the blind hole forming step S130 of this embodiment, the wavelength of the laser beam used by the carbon dioxide laser is preferably 10.6 microns, and the
更詳細地說,於所述盲孔成形步驟S130之中,以所述二氧化碳鐳射所形成的所述盲孔15,其於所述第一銅層11形成有一第一孔徑D1、並於遠離所述第一銅層11的部位形成有小於所述第一孔徑D1的一第二孔徑D2。於本實施例中,所述第二孔徑D2大致為所述第一孔徑D1的75%~85%,因而使得所述盲孔15的所述孔壁151傾斜地相連於所述粗糙表面121。More specifically, in the blind hole forming step S130, the
換個角度來說,本實施例所欲解決的問題是源自於以所述二氧化碳鐳射而形成的所述盲孔15,所以本實施例所公開的所述電路板的製造方法S100(或所述盲孔成形步驟S130)是明確排除以所述二氧化碳鐳射以外的其他方式形成所述盲孔15。To put it another way, the problem to be solved by this embodiment comes from the
所述平整化步驟S140;如圖6及圖7所示,以紫外線鐳射於所述第二銅層12的所述粗糙表面121加工凹設有一修整槽16,以去除至少一個所述銅牙C及包覆於至少一個所述銅牙C內的所述雜質P(如:所述碳化物或所述樹脂),並使所述修整槽16的槽底162具有小於3微米的一中心線平均粗糙度(Ra)。The planarization step S140; as shown in FIG6 and FIG7, a trimming
於本實施例的所述平整化步驟S140之中,所述紫外線鐳射所採用的鐳射光束的波長為355奈米(nm),並且以所述紫外線鐳射所形成的所述修整槽16的深度T16較佳是介於3微米~5微米。也就是說,所述盲孔15可以通過進一步以所述紫外線鐳射形成有相互連通的所述修整槽16,其較佳是對應於所述粗糙表面121的所述中心線平均粗糙度,據以通過未形成有任何銅牙的所述修整槽16來提供較佳的平整度。In the planarization step S140 of the present embodiment, the wavelength of the laser beam used in the ultraviolet laser is 355 nanometers (nm), and the depth T16 of the trimming
更詳細地說,於所述平整化步驟S140之中,以所述紫外線鐳射所形成的所述修整槽16,其內徑D16大致等同於所述第二孔徑D2,進而使所述修整槽16的內側壁161與所述盲孔15的所述孔壁151可以相夾有介於100度~170度之間的一配置角度σ,進而可以通過改變孔洞的構型來符合更多不同的設計需求。In more detail, in the planarization step S140, the inner diameter D16 of the trimming
所述去黑化步驟S150:如圖7及圖8所示,去除位於所述第一銅層11上的所述黑化層14,以使所述第一銅層11的整個所述外表面111裸露於外,據以利於實施後續的步驟。The de-blackening step S150: as shown in FIG. 7 and FIG. 8 , the
所述除膠步驟S160:如圖8及圖9所示,以過錳酸鉀(potassium permanganate,KMnO4)溶液對所述盲孔15的所述孔壁151進行濕式除膠,以(確保能夠)去除附著於所述孔壁151的所述殘留物R(如:所述殘膠與所述碳化物)。需說明的是,於本實施例的所述除膠步驟S160之中,較佳是進一步搭配以電漿(plasma)對所述盲孔15的所述孔壁151進行乾式除膠,以(確保能夠)去除附著於所述孔壁151的所述殘留物R(如:殘膠與所述碳化物),但本發明不受限於此。The degumming step S160: As shown in FIG8 and FIG9, the
所述成形步驟S170:如圖9和圖10所示,於所述修整槽16與所述盲孔15內電鍍形成一導電體2,以使所述導電體2連接所述第一銅層11與所述第二銅層12。於本實施例中,所述導電體2的材質為銅金屬,並且所述導電體2的頂面共平面於所述第一銅層11的所述外表面111,所述導電體2的底面則與所述第二銅層12的相鄰表面形成有介於3微米~5微米的一斷差G,但不以此為限。The forming step S170: As shown in FIG9 and FIG10, a
進一步地說,所述多層狀板材1通過所述盲孔15與所述修整槽16所共同構成的所述配置角度σ,以提升所述導電體2與所述多層狀板材1之間的結合強度。所述導電體2相當於以其一端部22嵌入所述修整槽16之內,以通過結構性搭配而實現結合強化。再者,所述導電體2的所述端部22的材質等同於所述修整槽16的所述內側壁161與所述槽底162,以能夠彼此一體相連而通過化學鍵結來實現結合強化。Furthermore, the multi-layer plate 1 improves the bonding strength between the
以上為本實施例所公開的所述電路板的製造方法S100,其能通過實施上述多個步驟S110~S170而製成如圖10所示的一種電路板100。基於本實施例所公開的所述電路板100的構造也是有別於現有電路板,所以下述接著說明所述電路板100於本實施例中的具體構造,而所述電路板100的技術特徵也可參酌所述電路板的製造方法S100所載的技術內容。The above is the manufacturing method S100 of the circuit board disclosed in this embodiment, which can manufacture a
如圖10所示,所述電路板100包含一多層狀板材1、及埋置於所述多層狀板材1內的一導電體2。其中,所述導電體2的數量於本實施例中是以一個來說明,但所述電路板100也可以依據設計需求而在所述多層狀板材1的多個任意部位分別設置有多個所述導電體2。再者,為便於說明,以下僅以所述多層狀板材1的局部區域來說明,以利於清楚理解本實施例的所述電路板100的構造。As shown in FIG. 10 , the
所述多層狀板材1具有一絕緣層13、形成於所述絕緣層13一側(如:外側)的第一銅層11、及形成於所述絕緣層13另一側(如:內側)的一第二銅層12。其中,所述第一銅層11的厚度小於所述第二銅層12的厚度、也小於15微米。The multi-layer plate 1 has an insulating
進一步地說,所述多層狀板材1形成有一盲孔15及連通於所述盲孔15的一修整槽16。其中,所述盲孔15自所述第一銅層11凹設、直至裸露所述第二銅層12而形成,並且所述盲孔15於所述第一銅層11形成有一第一孔徑D1、並於遠離所述第一銅層11的部位形成有小於所述第一孔徑D1的一第二孔徑D2。Furthermore, the multi-layered plate 1 is formed with a
再者, 所述修整槽16自裸露於所述盲孔15的所述第二銅層12部位凹設所形成,並且所述修整槽16的槽底162具有小於3微米的一中心線平均粗糙度。其中,所述修整槽16的深度較佳是介於3微米~5微米,據以利於所述修整槽16內未形成有任何銅牙。Furthermore, the trimming
換個角度來看,所述修整槽16的內徑D16等同於所述第二孔徑D2,所述修整槽16的內側壁161與所述盲孔15的孔壁151相夾有介於100度~170度之間的一配置角度σ,據以形成有別於既有的孔洞構型。From another perspective, the inner diameter D16 of the
所述導電體2填滿所述修整槽16與所述盲孔15,並且所述導電體2連接所述第一銅層11與所述第二銅層12。也就是說,所述導電體2具有位於所述盲孔15內的一截錐部21、及自所述截錐部21一體延伸且位於所述修整槽16內的一端部22。於本實施例中,所述導電體2的材質為銅金屬,並且所述導電體2的頂面共平面於所述第一銅層11的外表面111,所述導電體2的底面則與所述第二銅層12的相鄰表面形成有介於3微米~5微米的一斷差G。The
需額外說明的是,所述電路板100於本實施例中雖是以在其一個板面形成有所述盲孔15、所述修整槽16、及所述導電體2來說明,但本發明不以此為限。舉例來說,在本創作未繪示的其他實施例中,所述盲孔15、所述修整槽16、及所述導電體2的數量可以依據設計需求而為多個且其可以分佈於所述電路板100的兩個板面。It should be noted that in this embodiment, the
再者,形成有所述修整槽16與所述盲孔15的所述多層狀板材1於本實施例中雖是以搭配形成有填充於其內的所述導電體2來說明,但本創作不受限於此。舉例來說,在本創作未繪示的其他實施例中,形成有所述修整槽16與所述盲孔15的所述多層狀板材1也可以被單獨地應用(如:販賣)或搭配其他構件使用。Furthermore, although the multi-layer plate 1 formed with the trimming
[本發明實施例的技術效果][Technical Effects of the Embodiments of the Invention]
綜上所述,本發明實施例所公開的電路板的製造方法,其能通過所述平整化步驟以所述紫外線鐳射來形成有所述修整槽,據以改善二氧化碳鐳射所形成的所述盲孔所衍生的缺陷,進而有效地在所述多層狀板材上形成有高平整度的孔洞,以符合更為嚴格的設計需求。In summary, the manufacturing method of the circuit board disclosed in the embodiment of the present invention can form the trimming groove by the ultraviolet laser in the flattening step, thereby improving the defects derived from the blind hole formed by the carbon dioxide laser, and further effectively forming holes with high flatness on the multi-layer plate to meet more stringent design requirements.
換個角度來說,本發明實施例所公開的電路板及其多層狀板材,其通過在所述第二銅層進一步形成有連通於所述盲孔的所述修整槽,據以通過不同於既有孔洞的構型,來使得所述多層狀板材可以形成有高平整度的孔洞,以符合更為嚴格的設計需求。From another perspective, the circuit board and the multi-layer plate disclosed in the embodiment of the present invention further form the trimming groove connected to the blind hole in the second copper layer, so that the multi-layer plate can form holes with high flatness through a configuration different from the existing holes to meet more stringent design requirements.
以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的專利範圍內。The above disclosed contents are only preferred feasible embodiments of the present invention and are not intended to limit the patent scope of the present invention. Therefore, all equivalent technical changes made using the contents of the specification and drawings of the present invention are included in the patent scope of the present invention.
100:電路板 1:多層狀板材 11:第一銅層 111:外表面 12:第二銅層 121:粗糙表面 13:絕緣層 14:黑化層 15:盲孔 151:孔壁 16:修整槽 161:內側壁 162:槽底 2:導電體 21:截錐部 22:端部 C:銅牙 P:雜質 R:殘留物 D1:第一孔徑 D2:第二孔徑 D16:內徑 T16:深度 σ:配置角度 G:斷差 S100:電路板的製造方法 S110:前置步驟 S120:黑化步驟 S130:盲孔成形步驟 S140:平整化步驟 S150:去黑化步驟 S160:除膠步驟 S170:成形步驟100: Circuit board 1: Multi-layer plate 11: First copper layer 111: Outer surface 12: Second copper layer 121: Rough surface 13: Insulation layer 14: Blackening layer 15: Blind hole 151: Hole wall 16: Trimming groove 161: Inner wall 162: Groove bottom 2: Conductor 21: Tapered part 22: End C: Copper teeth P: Impurities R: Residues D1: First aperture D2: Second aperture D16: Inner diameter T16: Depth σ: Configuration angle G: Discontinuity S100: Method for manufacturing circuit board S110: Preliminary step S120: Blackening step S130: Blind hole forming step S140: Flattening step S150: De-blackening step S160: Glue removal step S170: Forming step
圖1為本發明實施例所公開的電路板的製造方法的步驟流程示意圖。FIG. 1 is a schematic diagram of the steps of a method for manufacturing a circuit board disclosed in an embodiment of the present invention.
圖2為圖1的前置步驟的立體示意圖。FIG. 2 is a perspective view of the pre-steps in FIG. 1 .
圖3為圖2沿剖線III-III的剖視示意圖。FIG. 3 is a schematic cross-sectional view along section line III-III of FIG. 2 .
圖4為圖3的區域IV的放大示意圖。FIG. 4 is an enlarged schematic diagram of region IV of FIG. 3 .
圖5為圖1的黑化步驟示意圖。Figure 5 is a schematic diagram of the blackening step in Figure 1.
圖6為圖1的盲孔成形步驟示意圖。FIG. 6 is a schematic diagram of the blind hole forming step of FIG. 1 .
圖7為圖1的平整化步驟示意圖。FIG. 7 is a schematic diagram of the planarization step in FIG. 1 .
圖8為圖1的去黑化步驟示意圖。Figure 8 is a schematic diagram of the blackening step of Figure 1.
圖9為圖1的除膠步驟示意圖。Figure 9 is a schematic diagram of the glue removal step in Figure 1.
圖10為圖1的成形步驟示意圖。Figure 10 is a schematic diagram of the forming steps of Figure 1.
S100:電路板的製造方法 S100: Circuit board manufacturing method
S110:前置步驟 S110: Preliminary steps
S120:黑化步驟 S120: Blackening step
S130:盲孔成形步驟 S130: Blind hole forming step
S140:平整化步驟 S140: Flattening step
S150:去黑化步驟 S150: De-blackening step
S160:除膠步驟 S160: Glue removal step
S170:成形步驟 S170: Forming step
Claims (10)
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TW201414563A (en) * | 2012-10-04 | 2014-04-16 | Unimicron Technology Corp | Laser drilling method |
TW201831067A (en) * | 2015-04-30 | 2018-08-16 | 景碩科技股份有限公司 | Manufacturing method of circuit board |
CN111246675A (en) * | 2020-03-19 | 2020-06-05 | 柏承科技(昆山)股份有限公司 | Energy-saving, environment-friendly and high-processing-capacity circuit board manufacturing method |
CN115442983A (en) * | 2022-09-30 | 2022-12-06 | 上海美维科技有限公司 | Packaging substrate, printed circuit board and manufacturing method of printed circuit board |
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TW201414563A (en) * | 2012-10-04 | 2014-04-16 | Unimicron Technology Corp | Laser drilling method |
TW201831067A (en) * | 2015-04-30 | 2018-08-16 | 景碩科技股份有限公司 | Manufacturing method of circuit board |
CN111246675A (en) * | 2020-03-19 | 2020-06-05 | 柏承科技(昆山)股份有限公司 | Energy-saving, environment-friendly and high-processing-capacity circuit board manufacturing method |
CN115442983A (en) * | 2022-09-30 | 2022-12-06 | 上海美维科技有限公司 | Packaging substrate, printed circuit board and manufacturing method of printed circuit board |
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