TWI836120B - Evaluation methods for semiconductor substrates - Google Patents
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Abstract
本發明為半導體基板的評價方法，評價半導體基板之電氣特性，其特徵為包含如下步驟：於半導體基板之表面形成pn接面的步驟；於設置有對半導體基板表面施行光照射的裝置及測定照射的光線之光量的裝置之晶圓吸盤上，搭載半導體基板的步驟；對半導體基板表面施行光照射既定時間的步驟；以及至少測定關閉光照射後之pn接面的光照射後之產生載子量的步驟。藉此，提供一種半導體基板的評價方法，在評價CCD、CMOS影像感測器等要求高產量之製品所使用的晶圓之與殘像特性對應的特性時，不施行利用處理機器之元件的製作，可於晶圓狀態進行與形成實際固體拍攝元件時同樣的評價。The present invention is a method for evaluating semiconductor substrates. The method for evaluating the electrical characteristics of semiconductor substrates is characterized by comprising the following steps: forming a pn junction on the surface of the semiconductor substrate; placing the semiconductor substrate on a wafer chuck provided with a device for irradiating the semiconductor substrate surface with light and a device for measuring the amount of light irradiated; irradiating the semiconductor substrate surface with light for a predetermined time; and measuring at least the amount of carriers generated after the light irradiation of the pn junction after the light irradiation is turned off. Thus, a method for evaluating semiconductor substrates is provided. When evaluating the characteristics corresponding to the afterimage characteristics of wafers used in products requiring high yields such as CCD and CMOS image sensors, the same evaluation as when forming actual solid-state imaging components can be performed in the wafer state without performing the production of components using a processing machine.
Description
本發明係關於一種半導體基板的評價方法。The present invention relates to an evaluation method of a semiconductor substrate.
伴隨著記憶體、CCD(Charge-Coupled Device，電荷耦合元件)等固體拍攝元件等之半導體裝置的細微化、高性能化，為了改善其等之製品產量，對於作為材料的矽晶圓亦要求高品質化，開發與其對應的各種矽晶圓。特別是，推測為對製品特性給予直接影響的晶圓表層部之結晶性尤為重要，作為其改善方針，開發出：1)在含有惰性氣體或氫之環境氣體中予以高溫熱處理的退火晶圓、2)藉由拉晶條件之改善而減少原生(Grown-in)缺陷的無缺陷拋光晶圓、3)施行磊晶成長的磊晶晶圓等。With the miniaturization and high performance of semiconductor devices such as memory, CCD (Charge-Coupled Device) and other solid-state imaging devices, in order to improve the yield of such products, the silicon wafers used as materials are also required to have high quality, and various silicon wafers corresponding to this are developed. In particular, the crystallinity of the surface of the wafer is presumed to have a direct impact on the characteristics of the product, and as a guideline for improvement, the following are developed: 1) annealed wafers that are subjected to high-temperature heat treatment in an environment containing inert gas or hydrogen, 2) defect-free polished wafers that reduce grown-in defects by improving the crystal pulling conditions, and 3) epitaxial wafers that are subjected to epitaxial growth.
作為習知的矽晶圓之表面品質的電氣特性評價法，利用氧化膜耐壓(GOI)評價。此係指，於矽晶圓之表面藉由熱氧化而形成閘極氧化膜，藉由在其上方形成電極而對絕緣體即氧化矽膜施加電應力，由其絕緣程度評價矽晶圓之表面品質。亦即，若原本的矽晶圓之表面存在缺陷或金屬雜質，則利用如同下述的特徵而評價矽晶圓之表面品質：由於缺陷或金屬雜質因熱氧化而導入至氧化矽膜，或形成與表面形狀相應之氧化膜而成為不均一的絕緣體等，若存在有缺陷、雜質，則絕緣性降低。As a conventional electrical characteristic evaluation method for the surface quality of silicon wafers, oxide film withstand voltage (GOI) evaluation is used. This means that a gate oxide film is formed on the surface of the silicon wafer through thermal oxidation, and an electrode is formed above it to apply electrical stress to the insulator, that is, the silicon oxide film, and the surface quality of the silicon wafer is evaluated based on the degree of insulation. . That is, if there are defects or metal impurities on the surface of the original silicon wafer, the following characteristics are used to evaluate the surface quality of the silicon wafer: the defects or metal impurities are introduced into the silicon oxide film due to thermal oxidation, or the formation of The oxide film corresponding to the surface shape becomes a non-uniform insulator, etc. If there are defects and impurities, the insulation properties will be reduced.
此係在實際裝置中，MOSFET(metal-oxide-semiconductor field-effect transistor，金氧半場效電晶體)之閘極氧化膜的可靠度評價，以該膜之改善為導向而進行各種的晶圓開發。然而，自然即便在GOI評價中不具有問題，仍可能有裝置產量降低之情形，由其近年伴隨裝置之高密集化，此等事件的數量漸增加。首先考慮在固體拍攝元件中，例如暗電流減少而敏感度改善的情況，源自晶圓之漏電流的減少，造成暗電流減少，最終對於元件特性之改善有所助益。This is an evaluation of the reliability of the gate oxide film of MOSFET (metal-oxide-semiconductor field-effect transistor) in actual devices, and various wafer developments are conducted based on the improvement of this film. . However, even if there is no problem in the GOI evaluation, there may still be situations where the device output is reduced. In recent years, with the high density of devices, the number of such incidents has gradually increased. First of all, consider the situation in solid-state imaging devices where dark current is reduced and sensitivity is improved. The reduction in leakage current from the wafer results in a reduction in dark current, which ultimately contributes to the improvement of device characteristics.
此外，以金屬汙染為成因之情況，伴隨近年的元件高性能化，微量金屬造成影響。在進行過化學分析之結果中，藉由高敏感度化的方式而檢測各種金屬，但現狀為，非常難以掌握藉由化學分析檢測出之金屬元素中何種金屬對於實際的元件、接合漏電造成最大的影響。此外，金屬雜質分析，成為將晶圓表面例如予以蝕刻而分析蝕刻液之手法，故係以晶圓表面的資訊為代表而加以分析之手法，一般而言無法獲得關於面內分布的資訊。另一方面，於漏電流的評價中，藉由在矽基板表面形成多個pn接面，求出各自之反方向漏電流，而可獲得基板面內之漏電分布。In addition, in the case of metal contamination, trace metals have an impact with the recent high performance of components. In the results of chemical analysis, various metals are detected by highly sensitive methods, but the current situation is that it is very difficult to understand which metal among the metal elements detected by chemical analysis has the greatest impact on the actual components and junction leakage. In addition, metal impurity analysis has become a method of analyzing the etching solution by etching the wafer surface, so it is a method that analyzes the information on the wafer surface as a representative, and generally cannot obtain information about the distribution within the surface. On the other hand, in the evaluation of leakage current, by forming multiple pn junctions on the surface of the silicon substrate and finding the reverse leakage current of each, the leakage distribution within the substrate surface can be obtained.
CCD、CMOS(Complementary MOS)影像感測器等固體拍攝元件，將藉由以入射的光線生成之電子正電洞對所產生的電荷取出之方法雖各自不同，但將光線轉換為電荷(光電轉換)之原理相同，係形成pn接面，而使其具有空乏層作為構造。此處，將儘管光線並未入射，仍因缺陷或雜質的存在而在空乏層內生成電子正電洞對，致使電荷產生的現象，稱作白色缺陷，抑或稱作暗電流。如此地，形成有pn接面的晶圓之反方向漏電流特性，可進行固體拍攝元件之暗電流評價，在原因的推定或材料開發中，可作為改善指標之一個而予以利用。Solid-state imaging devices such as CCD and CMOS (Complementary MOS) image sensors have different methods of extracting charges generated by electron-positive hole pairs generated by incident light, but they convert light into charges (photoelectric conversion). ) has the same principle, it forms a pn junction and makes it have a depletion layer as a structure. Here, the phenomenon in which electron-positive hole pairs are generated in the depletion layer due to the presence of defects or impurities even though light is not incident, resulting in the generation of charges, is called white defects or dark current. In this way, the reverse leakage current characteristics of the wafer with the pn junction formed can be used to evaluate the dark current of the solid-state imaging device, and can be used as one of the improvement indicators in estimating the cause or developing materials.
然而，作為材料特性對固體拍攝元件的影響，已知除了暗電流以外，亦有殘像特性。已知殘像特性，與材料，尤其是基板，具有密切的關係(非專利文獻1及非專利文獻2)。例如，於非專利文獻1及非專利文獻2中，矽基板中之輕元素造成影響，將造成該影響的缺陷，視為硼與氧的錯合物。如此地，藉由使基板之對殘像特性的影響變得明確，為了基板特性評價，除了與暗電流評價相符之反方向漏電流特性的評價以外，與殘像特性相對應之基板評價方法成為必要。However, as the influence of material properties on solid-state imaging elements, in addition to dark current, afterimage characteristics are also known. It is known that afterimage characteristics are closely related to materials, especially substrates (
作為該方法之一，有專利文獻1所記載之方法，但為了施行該方法，必須形成固體拍攝元件之光接收部，即光電二極體。因此，除了摻雜物的擴散以外，亦必須形成元件分離構造。為了形成該元件分離構造，必須有施行光蝕刻、或接續其之蝕刻等的處理機器；進一步，為了施行評價，需要時間與大型的設備。如此地，為了評價殘像特性，過去必須製作實際元件，而有難以進行晶圓狀態下的評價等問題。
［習知技術文獻］
［專利文獻］One such method is the method described in
專利文獻1：日本特開第2019－9212號公報 ［非專利文獻］Patent Document 1: Japanese Patent Application Publication No. 2019-9212 [Non-patent literature]
非專利文獻1：第77次應用物理學會秋季學術講演會 講演草稿集 14p-P6-10 金田翼、大谷章 「CMOS影像感測器之殘像現象機制的闡明 1」
非專利文獻2：第77次應用物理學會秋季學術講演會 講演草稿集 14p-P6-11 大谷章、金田翼 「CMOS影像感測器之殘像現象機制的闡明 2」
非專利文獻3：S. Rein “Lifetime Spectroscopy” p398, Springer, 2005Non-patent document 1: 77th Autumn Academic Lecture Meeting of the Society of Applied Physics, Lecture Draft Collection, 14p-P6-10, Tsubasa Kaneda, Akira Otani, "Elucidation of the Mechanism of the Afterimage Phenomenon in CMOS Image Sensors,
［本發明所欲解決的問題］[Problems to be solved by the present invention]
鑒於上述問題，本發明之目的，係在評價CCD、CMOS影像感測器等要求高產量之製品所使用的晶圓之與殘像特性對應的特性時，不施行利用處理機器之元件的製作，即便為晶圓狀態仍可進行與形成實際固體拍攝元件時同樣的評價。此外，如此地，藉由可簡便地進行晶圓層級之測定，而對半導體基板之高品質化有所助益。 ［解決問題之技術手段］In view of the above problems, the purpose of the present invention is to evaluate the characteristics corresponding to the afterimage characteristics of wafers used in products requiring high production volumes such as CCD and CMOS image sensors, without using components produced by a processing machine, and to perform the same evaluation as when forming actual solid-state imaging components even in the wafer state. In addition, by making it possible to easily measure the wafer level, it is helpful to improve the quality of semiconductor substrates. [Technical means to solve the problem]
為了達成上述目的，本發明之目的在於提供一種半導體基板的評價方法，評價半導體基板之電氣特性，其特徵為包含如下步驟： pn接面形成步驟，於該半導體基板之表面形成pn接面； 半導體基板搭載步驟，於設置有對該半導體基板表面施行光照射的裝置及測定照射的光線之光量的裝置之晶圓吸盤上，搭載該半導體基板； 光照射步驟，對該半導體基板表面施行光照射既定時間；以及 產生載子量測定步驟，至少測定關閉光照射後之該pn接面的光照射後之產生載子量。In order to achieve the above object, the object of the present invention is to provide a method for evaluating a semiconductor substrate to evaluate the electrical characteristics of the semiconductor substrate, which is characterized by including the following steps: A pn junction forming step: forming a pn junction on the surface of the semiconductor substrate; The semiconductor substrate mounting step is to mount the semiconductor substrate on a wafer chuck equipped with a device for irradiating light on the surface of the semiconductor substrate and a device for measuring the amount of irradiated light; The light irradiation step is to irradiate the surface of the semiconductor substrate with light for a predetermined time; and The step of measuring the amount of generated carriers includes at least measuring the amount of generated carriers after light irradiation of the pn junction after turning off light irradiation.
若為此等方法，則可於基板層級，簡便且高精度地評價在CCD、CMOS影像感測器等受到關心的源自於半導體基板之殘像特性不良，可提供高品質的半導體基板。With this method, defective afterimage characteristics originating from semiconductor substrates, which are of concern in CCD, CMOS image sensors, etc., can be easily and accurately evaluated at the substrate level, and high-quality semiconductor substrates can be provided.
此時，宜於該光照射施行步驟中，測定該pn接面的光照射中之產生載子量。At this time, it is preferable to measure the amount of carriers generated during the light irradiation of the pn junction during the light irradiation step.
藉由測定光照射中之產生載子量，可更確實地避免最初產生之載子量的差別對殘像特性造成影響之情形。By measuring the amount of carriers generated during light irradiation, it is possible to more reliably avoid the situation where the difference in the amount of carriers initially generated affects the afterimage characteristics.
此外，此時，宜藉由與施行該光照射的裝置及測定照射的光線之光量的裝置分開設置的載子測定探針，施行該光照射中之產生載子量、及該光照射後之產生載子量的測定。In addition, at this time, it is preferable to measure the amount of carriers generated during the light irradiation and the amount of carriers generated after the light irradiation using a carrier measuring probe provided separately from the device for performing the light irradiation and the device for measuring the amount of light of the irradiated light.
若為此等方法，則可更簡便地測定。Such methods can be used for easier measurement.
此一情況，宜使該載子測定探針，為非接觸式凱文探針。In this case, it is advisable that the carrier measurement probe be a non-contact Kevin probe.
作為載子測定探針，可適當地利用非接觸式凱文探針。As a carrier measurement probe, a non-contact Kevin probe can be appropriately used.
此外，此一情況，宜使該載子測定探針，為水銀探針。In addition, in this case, it is preferable that the carrier measurement probe be a mercury probe.
作為載子測定探針，亦可適當地利用水銀探針。As a carrier measurement probe, a mercury probe can also be appropriately used.
此外，宜於該pn接面形成步驟後、該半導體基板搭載步驟前，對該半導體基板預先施行熱處理。In addition, it is preferable to perform heat treatment on the semiconductor substrate in advance after the pn junction forming step and before the semiconductor substrate mounting step.
藉由對半導體基板預先施行熱處理，而使半導體基板之缺陷形成、成長，可使殘像特性不良更為明確。此外，可將在元件製程之熱處理的行為重現。By subjecting the semiconductor substrate to heat treatment in advance, defects in the semiconductor substrate are formed and grown, and the defective afterimage characteristics can be made clearer. In addition, the behavior of heat treatment during device manufacturing can be reproduced.
此外，宜使用固體拍攝元件用的半導體基板作為該半導體基板，從該光照射中之產生載子量與該光照射後之產生載子量的比，評價固體拍攝元件之殘像特性。Furthermore, it is preferable to use a semiconductor substrate for a solid-state imaging device as the semiconductor substrate, and evaluate the afterimage characteristics of the solid-state imaging device from the ratio between the amount of generated carriers during the light irradiation and the amount of generated carriers after the light irradiation.
光照射中之載子生成，依半導體基板之種類而有所不同，但若為此等方法，則藉由取得光照射中之產生載子量與光照射後之產生載子量的比而予以標準化，可無論半導體基板之種類地進行評價。 ［本發明之效果］The generation of carriers during light irradiation varies depending on the type of semiconductor substrate. However, in the case of these methods, it is determined by obtaining the ratio of the amount of carriers generated during light irradiation to the amount of carriers generated after light irradiation. Standardization enables evaluation regardless of the type of semiconductor substrate. [Effects of the present invention]
若為本發明之半導體基板的評價方法，則可於基板層級，簡便且高精度地評價在CCD、CMOS影像感測器等受到關心的源自於半導體基板之殘像特性不良，可提供高品質的半導體基板。The semiconductor substrate evaluation method of the present invention can easily and accurately evaluate the afterimage characteristic defects caused by semiconductor substrates, which are a concern in CCD and CMOS image sensors, at the substrate level, and can provide high-quality semiconductor substrates.
如同上述，需要一種半導體基板的評價方法，可於基板層級，測定CCD、CMOS影像感測器等要求高產量之製品所使用的半導體基板之與殘像特性對應的特性。As mentioned above, there is a need for a semiconductor substrate evaluation method that can measure the characteristics corresponding to the afterimage characteristics of a semiconductor substrate used in products requiring high production volume, such as CCD and CMOS image sensors, at the substrate level.
本案發明人等，為了達成上述目的而進行用心檢討，結果發現若為下述半導體基板的評價方法，則可解決上述問題，而完成本發明： 一種半導體基板的評價方法，評價半導體基板之電氣特性，其特徵為包含如下步驟： pn接面形成步驟，於該半導體基板之表面形成pn接面； 半導體基板搭載步驟，於設置有對該半導體基板表面施行光照射的裝置及測定照射的光線之光量的裝置之晶圓吸盤上，搭載該半導體基板； 光照射步驟，對該半導體基板表面施行光照射既定時間；以及 產生載子量測定步驟，至少測定關閉光照射後之該pn接面的光照射後之產生載子量。The inventors of this case have conducted careful research to achieve the above-mentioned purpose, and as a result, they have found that the above-mentioned problem can be solved if the following semiconductor substrate evaluation method is used, and the present invention is completed: A semiconductor substrate evaluation method, which evaluates the electrical characteristics of the semiconductor substrate, is characterized by comprising the following steps: a pn junction forming step, forming a pn junction on the surface of the semiconductor substrate; a semiconductor substrate mounting step, mounting the semiconductor substrate on a wafer chuck provided with a device for irradiating the surface of the semiconductor substrate with light and a device for measuring the light intensity of the irradiated light; a light irradiation step, irradiating the surface of the semiconductor substrate with light for a predetermined time; and a carrier quantity measurement step, at least measuring the carrier quantity generated after the light irradiation of the pn junction after the light irradiation is turned off.
以下，參考圖示，針對本發明予以說明，但本發明並未限定於此等內容。The present invention is described below with reference to the drawings, but the present invention is not limited to these contents.
首先，於半導體基板中，製作pn接面構造(於半導體基板之表面形成pn接面的步驟)。該pn接面構造，並無特別限定，為何種pn接面構造皆無問題，但宜為能夠盡可能減少源自pn接面構造之漏電流(表面成分)的構造。First, a pn junction structure is fabricated in a semiconductor substrate (a step of forming a pn junction on the surface of a semiconductor substrate). The pn junction structure is not particularly limited, and any pn junction structure is acceptable, but it is preferred to be a structure that can minimize leakage current (surface component) from the pn junction structure.
作為此等pn接面構造的例子，於圖2顯示藉由本發明之半導體基板的評價方法形成之接合構造的一例。此等接合構造，例如可藉由下述方式製作：藉由使硼等在摻雜了磷等的半導體基板1之上擴散，而形成具有與半導體基板1相反之導電型的高濃度擴散層2，藉由使彼此具有相反之導電型的半導體基板1與高濃度擴散層2接觸而形成pn接面。此處，在pn接面附近，電子與正電洞結合，形成不存在載子的空乏層3。另，如同上述，圖2僅為用於說明可藉由本發明形成之pn接面的例示，半導體基板之導電型或pn接面構造並無特別限定。As an example of such a pn junction structure, FIG2 shows an example of a junction structure formed by the semiconductor substrate evaluation method of the present invention. Such a junction structure can be produced, for example, by diffusing boron or the like on a
為了說明本發明之半導體基板的評價方法，於圖1顯示本發明之實施形態的一例。施行如下步驟：將具有如同上述地製作出之pn接面構造的半導體基板1，搭載於如同圖1之設置有施行光照射的裝置(照明)6及測定光線之光量的裝置(照度計)7之晶圓吸盤8上。而後，施行如下步驟：對半導體基板1之表面將既定照度的光照射4施行既定時間後(光照射施行步驟)，測定關閉光照射4後的光照射後之產生載子量。In order to explain the evaluation method of the semiconductor substrate of the present invention, an example of the embodiment of the present invention is shown in FIG. 1 . The following steps are performed: the
此處，考慮宜將實際裝置，假設為光照射4係使用具有白色光之例如LED等照明。然而，例如，若假設為特殊化為紅外光的裝置，則亦可選擇適應該裝置之波長的光源(照明)。此外，宜使光量(照度)，於每一測定無差異，因此，宜利用具有測定照度的機構與調整照度的機構雙方者。Here, it is considered that the actual device is assumed to be a light irradiation 4 using a lighting device having white light, such as LED. However, if, for example, a device is assumed to be specialized as infrared light, a light source (lighting device) suitable for the wavelength of the device can also be selected. In addition, it is preferable to make the light quantity (illuminance) the same in each measurement, and therefore, it is preferable to use a device having both a mechanism for measuring illuminance and a mechanism for adjusting illuminance.
此外，關於測定時之光量，殘像特性，係在強光入射至實際裝置後，先關閉快門而取得影像後，開啟快門而取得下一個影像之情況，由之前的光線產生之載子並未充分排除而留下其影響的緣故，因而認為需要較強之光量。在實際測試時，亦有改變照度而預先尋找最佳照度之情況，但一般而言，以市售照明將照度設定為最大之程度則足夠。作為具體照度，宜為500勒克斯左右。In addition, regarding the light intensity during measurement, the afterimage characteristic is that after strong light enters the actual device, the shutter is closed to obtain an image, and then the shutter is opened to obtain the next image. The carriers generated by the previous light are not fully eliminated and their influence is left. Therefore, it is believed that a stronger light intensity is required. In actual testing, there are also cases where the illumination is changed to find the best illumination in advance, but generally speaking, it is sufficient to set the illumination to the maximum level with commercially available lighting. As a specific illumination, it is suitable to be around 500 lux.
此外，光照射之時間，宜為1～10秒，更宜為3～7秒。若光照射之時間為1秒以上，則可取得從開啟光照射至照明之光量穩定為止的時間，可更確實地使照度為一定。此外，若為10秒以下，則可將測定時間縮短。In addition, the light irradiation time is preferably 1 to 10 seconds, more preferably 3 to 7 seconds. If the light irradiation time is 1 second or longer, the time from when the light irradiation is turned on to when the light quantity is stabilized can be obtained, and the illumination can be made constant more reliably. In addition, if it is 10 seconds or shorter, the measurement time can be shortened.
測定如此地形成的pn接面之產生載子量。於圖3顯示具體的光照射與測定之時序的概念圖。圖3為顯示本發明之半導體基板的評價方法之測定程序的一例之圖。The amount of generated carriers of the pn junction formed in this way is measured. A conceptual diagram showing a specific sequence of light irradiation and measurement is shown in Fig. 3. Fig. 3 is a diagram showing an example of the measurement procedure of the semiconductor substrate evaluation method of the present invention.
發明人掌握到：光照射4造成之載子的產生量，受到半導體基板1之種類、半導體基板1所包含之輕元素，尤其是碳的影響。因此，為了避免因光照射4而最初產生之載子量的差別對殘像特性造成影響之情形，宜如圖3所示地，進行光照射並測定此時之產生載子量(光照射中之產生載子量)。如此一來，可考慮到最初產生之載子量的差別而評價半導體基板。The inventors have found that the amount of carriers generated by light irradiation 4 is affected by the type of
此外，宜先測定光照射中之產生載子量後，關閉光照射，再度測定產生載子量(光照射後之產生載子量)，求出光照射中與關閉光照射時之產生載子量的比。光照射中之載子生成，依半導體基板之種類而有所不同，但藉由取得光照射中之產生載子量與光照射後之產生載子量的比而予以標準化，可無論半導體基板之種類地進行評價。In addition, it is advisable to first measure the amount of generated carriers during light irradiation, then turn off the light irradiation, and then measure the amount of generated carriers (the amount of generated carriers after light irradiation) to determine the amount of generated carriers during and when light irradiation is turned off. Quantity ratio. The generation of carriers during light irradiation varies depending on the type of semiconductor substrate. However, by obtaining the ratio of the amount of carriers generated during light irradiation to the amount of carriers generated after light irradiation and standardizing it, it can be achieved regardless of the type of semiconductor substrate. Evaluate in categories.
此外，從關閉光照射後算起的光照射後之產生載子量的測定時間，亦依測定裝置之性能而異，故宜預先驗證。例如，可使測定時間為1秒而累計。In addition, the measurement time of the amount of carriers generated after light irradiation, which is counted from the time when light irradiation is turned off, also varies depending on the performance of the measuring device, so it is advisable to verify it in advance. For example, the measurement time can be set to 1 second and accumulated.
此外，本發明中，從關閉光照射後至光照射後之產生載子量的測定開始為止之時間，並無特別限定，可在關閉光照射的同時開始測定，亦可從關閉光照射後隔著既定時間算起開始測定。光照射後之產生載子量的測定，係捕捉捕集藉由光照射而生成之載子，將其再釋出的現象，測定再釋出之載子。此處，載子再釋出的時序，取決於載子的陷阱之種類、測定環境，故宜預先驗證。例如，可在關閉光照射的同時開始測定，以1秒之測定時間測定等。In addition, in the present invention, the time from when the light irradiation is turned off to when the measurement of the amount of carriers generated after the light irradiation is started is not particularly limited, and the measurement may be started at the same time when the light irradiation is turned off, or may be started after a predetermined time has passed after the light irradiation is turned off. The measurement of the amount of carriers generated after the light irradiation is to capture the phenomenon of the carriers generated by the light irradiation and release them again, and to measure the re-released carriers. Here, the timing of the carrier re-release depends on the type of the carrier trap and the measurement environment, so it is advisable to verify it in advance. For example, the measurement may be started at the same time when the light irradiation is turned off, and the measurement may be performed with a measurement time of 1 second.
此外，圖3中，在施行關閉光照射後之產生載子量的測定前，先停止測定，此係為了更確實地避免關閉光照射時之雜訊，並非為必要，依測定器的性能、測定對象的狀況並非為絕對必要。In addition, in FIG. 3 , the measurement is stopped before the measurement of the amount of carriers generated after the light irradiation is turned off. This is to more reliably avoid noise when the light irradiation is turned off. This is not necessary and is not absolutely necessary depending on the performance of the measuring instrument and the condition of the measuring object.
此外，光照射中及光照射後之產生載子量的測定，宜如圖1所示地，藉由與施行光照射的裝置及測定照射的光線之光量的裝置分開設置的載子測定探針5施行。作為載子測定探針5，藉由使用非接觸型的凱文探針或水銀探針，即便不施行元件分離等仍可更簡便地測定。In addition, the amount of carriers generated during and after light irradiation is preferably measured by a
而後，可從將光照射開啟關閉時的載子測定探針之電流值的比，評價殘像特性。光照射關閉後之電流值高的現象，表示捕集到如此分量的載子，可推測殘像特性不佳。The afterimage characteristics can then be evaluated from the ratio of the current values of the probe when the light irradiation is turned on and off to measure the carriers. A high current value after the light irradiation is turned off indicates that such a large amount of carriers are captured, and it can be inferred that the afterimage characteristics are poor.
在實際固體拍攝元件之例子中，藉由以在快門打開之情況入射的光線生成之電子、正電洞對產生電荷，將其等導入藉以構築為影像，但重要的是在快門關閉後，快速地將電子、正電洞對排出，若此一排出慢則成為殘像，對下一幀造成影響。In the case of actual solid-state imaging devices, electrons and positive hole pairs generated by light incident when the shutter is open generate charges and are introduced to construct an image. However, it is important to quickly capture the image after the shutter is closed. The pairs of electrons and positive holes are discharged. If the discharge is slow, it will become an afterimage and affect the next frame.
此外，若僅於半導體基板形成pn接面，則有無法獲得明確的差之情況。此一情況，宜於pn接面形成步驟後，對半導體基板預先施行熱處理。例如，有效方法為追加如在半導體基板形成缺陷等熱處理。藉由此等熱處理，而使半導體基板之缺陷形成、成長，可使殘像特性不良更為明確。此外，殘像特性，如同非專利文獻1及非專利文獻2所記載，於視為基板中之硼與氧的錯合物，使該缺陷將在元件製程之熱處理的行為等重現情況，在施行熱處理後測定之方式仍有效。已知由如硼與氧等輕元素之集簇所構成的缺陷，係以較低的溫度形成，若成為高溫則變得不穩定，故追加的熱處理溫度，宜如非專利文獻3地為約100～500℃之較低的溫度。In addition, if only a pn junction is formed on the semiconductor substrate, there is a case where a clear difference cannot be obtained. In this case, it is advisable to pre-heat treat the semiconductor substrate after the pn junction formation step. For example, an effective method is to add a heat treatment such as forming a defect on the semiconductor substrate. By such a heat treatment, the defect of the semiconductor substrate is formed and grown, and the poor afterimage characteristic can be made clearer. In addition, the afterimage characteristic, as described in
若為此等方法，則可於基板層級，簡便且高精度地評價在CCD、CMOS影像感測器等受到關心的源自於半導體基板之殘像特性不良，可提供高品質的半導體基板。 ［實施例］With this method, defective afterimage characteristics originating from semiconductor substrates, which are of concern in CCD, CMOS image sensors, etc., can be easily and accurately evaluated at the substrate level, and high-quality semiconductor substrates can be provided. [Example]
以下，藉由實施例，針對本發明更具體地予以說明，但本發明並未限定於下述實施例。Hereinafter, the present invention will be described in more detail using examples, but the present invention is not limited to the following examples.
［實施例1］ 準備電阻率10Ω・cm之摻磷、直徑200mm的CZ矽晶圓，且使基板之氧濃度(Oi)為3.38、3.58、3.71ppma(JEITA)的3個試樣。於此等矽晶圓，將硼以10KeV、劑量6.0×1013 atoms／cm2 離子注入後，在1000℃、氮氣環境氣體下回復退火，藉以形成pn接面構造。[Example 1] Phosphorus-doped CZ silicon wafers with a resistivity of 10Ω·cm and a diameter of 200mm were prepared, and three samples of substrate oxygen concentration (Oi) of 3.38, 3.58, and 3.71ppma (JEITA) were prepared. Boron was implanted into these silicon wafers at a dose of 6.0×10 13 atoms/cm 2 at 10KeV, and then annealed at 1000°C in a nitrogen atmosphere to form a pn junction structure.
接著，於圖3所示之測定程序中，施行1秒的光照射並藉由非接觸式凱文探針施行產生載子量(電流值)的測定後，關閉光照射，於1秒間，同樣地求出電流值，從光照射前後之電流值的比(亦稱作電流比)，評價殘像特性。於表1及圖4顯示其結果。Next, in the measurement procedure shown in FIG3, after 1 second of light irradiation and measurement of the amount of carriers (current value) generated by the non-contact Kevin probe, the light irradiation was turned off and the current value was obtained in the same manner for 1 second. The afterimage characteristics were evaluated from the ratio of the current values before and after light irradiation (also called the current ratio). The results are shown in Table 1 and FIG4.
其結果，基板氧濃度越高，則電流比變得越大，得知殘像特性劣化。將硼與氧的錯合物，視作固體拍攝元件的殘像之原因。本次之結果，使用摻磷的基板，將硼藉由離子注入而控制濃度，故半導體基板之氧濃度的差別，決定硼－氧錯合物濃度，發明人認為由於氧濃度變高，而硼－氧錯合物濃度亦變高，表示對殘像特性有所影響。As a result, the higher the substrate oxygen concentration, the larger the current ratio becomes, and it is known that the afterimage characteristics deteriorate. The complex of boron and oxygen is considered to be the cause of afterimages in solid-state imaging devices. In this result, a phosphorus-doped substrate is used, and the boron concentration is controlled by ion implantation. Therefore, the difference in oxygen concentration of the semiconductor substrate determines the concentration of boron-oxygen complex. The inventor believes that as the oxygen concentration increases, the concentration of boron-oxygen complex also increases, indicating that it has an impact on the afterimage characteristics.
［表1］
［實施例2］
接著，對以與實施例1同樣的CZ矽晶圓且為同樣氧濃度之3個試樣，藉由與實施例1相同的步驟製作出pn接面構造後，參考非專利文獻1，在450℃、氮氣環境氣體下，施行70小時之退火後，施行與實施例1同樣的測定。[Example 2]
Next, for three samples using the same CZ silicon wafer and the same oxygen concentration as in Example 1, pn junction structures were produced through the same steps as in Example 1. Referring to
於表2及圖4顯示在450℃之退火實施後的基板氧濃度與電流比之關係。若基板氧濃度越高，則電流比變得越大，得知殘像特性劣化。此外，施行450℃之退火者，相較於未施行該退火的情況，試樣間的差變大。將硼與氧的錯合物，視作固體拍攝元件的殘像之原因，表示藉由450℃之退火而使該缺陷成長。表示藉由此等熱處理，可使殘像特性不良更為明確。Table 2 and Figure 4 show the relationship between the substrate oxygen concentration and the current ratio after annealing at 450°C. As the oxygen concentration of the substrate becomes higher, the current ratio becomes larger, and it is found that the afterimage characteristics deteriorate. In addition, when annealing at 450°C was performed, the difference between the samples became larger than when the annealing was not performed. Complexes of boron and oxygen are considered to be the cause of afterimages in solid-state imaging devices, and this defect is shown to grow through annealing at 450°C. It means that through such heat treatment, the defective afterimage characteristics can be made more clear.
［表2］
如此地，藉由應用本發明之方法，相較於過去，可不使用光微影設備或蝕刻設備地，於基板層級以簡便且迅速之手法評價殘像特性；得知本發明之方法，作為固體拍攝元件用之半導體基板的評價方法為有效方法。In this way, by applying the method of the present invention, compared to the past, it is possible to evaluate the afterimage characteristics at the substrate level in a simple and rapid manner without using photolithography equipment or etching equipment. It is known that the method of the present invention, as a solid The evaluation method of semiconductor substrates used in imaging devices is an effective method.
另，本發明，並未限定於上述實施形態。上述實施形態為例示，與本發明之發明申請專利範圍所記載的技術思想具有實質上相同之構成，達到同樣之作用效果者，皆包含於本發明之技術範圍。In addition, the present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are illustrative only, and those having substantially the same structure and achieving the same effects as the technical concept described in the scope of the invention application of the present invention are all included in the technical scope of the present invention.
1:半導體基板 2:高濃度擴散層 3:空乏層 4:光照射 5:載子測定探針 6:施行光照射的裝置(照明) 7:測定光線之光量的裝置(照度計) 8:晶圓吸盤1: Semiconductor substrate 2: High-concentration diffusion layer 3: Depletion layer 4: Light irradiation 5: Carrier measurement probe 6: Device for performing light irradiation (illumination) 7: Device for measuring the amount of light (illuminance meter) 8: Wafer suction cup
圖1係本發明之實施形態的一例之示意圖。 圖2係顯示藉由本發明之半導體基板的評價方法形成之接合構造的一例之圖。 圖3係顯示本發明之半導體基板的評價方法之測定程序的一例之圖。 圖4係將實施例1及實施例2的光照射中之產生載子量與光照射後之產生載子量的比與基板氧濃度之關係製圖的圖。FIG1 is a schematic diagram of an example of an embodiment of the present invention. FIG2 is a diagram showing an example of a bonding structure formed by the semiconductor substrate evaluation method of the present invention. FIG3 is a diagram showing an example of a measurement procedure of the semiconductor substrate evaluation method of the present invention. FIG4 is a diagram showing the relationship between the ratio of the amount of carriers generated during light irradiation and the amount of carriers generated after light irradiation in Examples 1 and 2 and the substrate oxygen concentration.
1:半導體基板1:Semiconductor substrate
2:高濃度擴散層2: High concentration diffusion layer
3:空乏層3: Depletion layer
4:光照射4: Light exposure
5:載子測定探針5: Carrier measurement probe
6:施行光照射的裝置(照明)6: Device for irradiating light (lighting)
7:測定光線之光量的裝置(照度計)7: Device for measuring the amount of light (illuminance meter)
8:晶圓吸盤8: Wafer suction cup
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| JP3591183B2 (en) * | 1996-12-27 | 2004-11-17 | ソニー株式会社 | Afterimage detection method and afterimage detection device |
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