TWI824849B - 半導體製造裝置用構件 - Google Patents
半導體製造裝置用構件 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 41
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 239000000919 ceramic Substances 0.000 claims abstract description 71
- 238000003780 insertion Methods 0.000 claims abstract description 41
- 230000037431 insertion Effects 0.000 claims abstract description 41
- 239000011148 porous material Substances 0.000 claims abstract description 41
- 230000002093 peripheral effect Effects 0.000 claims description 22
- 239000012790 adhesive layer Substances 0.000 claims description 18
- 239000007921 spray Substances 0.000 claims description 14
- 230000000149 penetrating effect Effects 0.000 abstract description 3
- 238000001816 cooling Methods 0.000 description 33
- 239000007789 gas Substances 0.000 description 32
- 239000000463 material Substances 0.000 description 31
- 229910052751 metal Inorganic materials 0.000 description 27
- 239000002184 metal Substances 0.000 description 27
- 239000010410 layer Substances 0.000 description 16
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- 238000004891 communication Methods 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 239000001307 helium Substances 0.000 description 4
- 229910052734 helium Inorganic materials 0.000 description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011156 metal matrix composite Substances 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- 238000007751 thermal spraying Methods 0.000 description 3
- 229910018566 Al—Si—Mg Inorganic materials 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000007667 floating Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
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- 229910018134 Al-Mg Inorganic materials 0.000 description 1
- 229910018467 Al—Mg Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
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- 229910052782 aluminium Inorganic materials 0.000 description 1
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- 229910052750 molybdenum Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Abstract
一種半導體製造裝置用構件10具有:陶瓷板20、多孔塞50、絕緣蓋56及細孔58。陶瓷板20在頂面具有晶圓載置面21。多孔塞50配置在於上下方向貫穿陶瓷板20之塞插入孔24,容許氣體流通。絕緣蓋56係設置成連接於多孔塞50的頂面,露出於晶圓載置面21。細孔58在絕緣蓋56中設置多數個,於上下方向貫穿絕緣蓋56。
Description
本發明係關於半導體製造裝置用構件。
以往,就半導體製造裝置用構件而言,在冷卻裝置上設置具有晶圓載置面之靜電吸盤是習知的。例如,專利文獻1之半導體製造裝置用構件具有:氣體供給孔,設置於冷卻裝置;凹部,以與氣體供給孔連通之方式設置於靜電吸盤;細孔,由凹部的底面貫穿到晶圓載置面;及多孔塞,由填充在凹部中之絕緣材料形成。氦等背面氣體導入氣體供給孔時,該氣體通過氣體供給孔、多孔塞及細孔供給至晶圓之背面側的空間。
[先前技術文獻]
[專利文獻]
[專利文獻1] 日本特開2013-232640號公報
但是,在上述半導體製造裝置用構件中,因為細孔設置於構成靜電吸盤之陶瓷板的凹部的底部,所以難以在加工上減少細孔之上下方向的長度。
本發明係為了解決如此之問題而作成,以改善連通晶圓載置面與多孔塞的頂面之細孔的加工性作為主要目的。
本發明之半導體製造裝置用構件具有:
陶瓷板,在其頂面具有晶圓載置面;
多孔塞,配置在於上下方向貫穿前述陶瓷板之塞插入孔,容許氣體流通;
絕緣蓋,設置成連接於前述多孔塞的頂面,露出於前述晶圓載置面;及
多數細孔,於上下方向貫穿前述絕緣蓋。
在該半導體製造裝置用構件中,多數細孔設置於與陶瓷板分開之絕緣蓋。因此,相較於多數細孔直接地設置於陶瓷板之情形,細孔之加工性良好。
在本發明之半導體製造裝置用構件中,前述絕緣蓋係熱噴塗膜或陶瓷塊體。如此,可比較容易地製作絕緣蓋。
在本發明之半導體製造裝置用構件中,前述晶圓載置面可具有支持晶圓之多數小突起,前述絕緣蓋的頂面可位在與前述晶圓載置面中未設置前述小突起之基準面相同的高度,前述細孔之上下方向的長度可為0.01mm以上、0.5mm以下。如此,可有效抑制晶圓的背面與多孔塞的頂面之間的空間高度,因此可防止在該空間中發生電弧放電。此時,前述絕緣蓋係陶瓷塊體,背面可透過黏著層黏著在前述陶瓷板上。如此,亦可防止黏著層之劣化。這是因為可防止於晶圓的背面與多孔塞的頂面之間的空間之電弧放電的緣故。此外,基準面之高度可為與各小突起不同之高度。另外,基準面之高度可為與存在塞插入孔附近之小突起的底面相同的高度。
在本發明之半導體製造裝置用構件中,前述細孔之直徑可為0.01mm以上、0.5mm以下,且前述細孔可在前述絕緣蓋上設置5個以上。如此,供給至多孔塞之氣體可朝向晶圓之背面平順地流出。
在本發明之半導體製造裝置用構件中,前述塞插入孔可在內周面具有母螺紋部,且前述多孔塞可在外周面具有與前述母螺紋部螺合的公螺紋部。如此,可在未使用黏著劑之情形下,將多孔塞配置於塞插入孔。此外,相較於無螺紋之情形,公螺紋部與母螺紋部的螺合處係難以在上下方向上產生間隙,且沿面距離變長,因此可充分抑制在該螺合處之放電。
在本發明之半導體製造裝置用構件中,前述多孔塞可具有由上向下擴徑之擴徑部。如此,可利用由多孔塞底面供給的氣體之壓力,抑制多孔塞之浮起。
在本發明之半導體製造裝置用構件中,前述絕緣蓋及前述多孔塞之外形可為圓形,且前述絕緣蓋之外徑可比前述多孔塞大。如此,絕緣蓋與陶瓷板之黏著面積變大,因此兩者之黏著性良好。
本發明之半導體製造裝置用構件可具有:導電性基材,設置於前述陶瓷板的底面;及連通孔,設置於前述導電性基材,連通於前述多孔塞,前述多孔塞的底面可位於前述連通孔之內部。如此,可抑制在多孔塞的底面與導電性基材之間發生電弧放電。
接著,使用圖式說明本發明之較佳實施形態。圖1係半導體製造裝置用構件10之縱截面圖,圖2係陶瓷板20之俯視圖,圖3係圖1之部分放大圖。
半導體製造裝置用構件10具有:陶瓷板20、冷卻板30、金屬接合層40、多孔塞50、絕緣蓋56及絕緣管60。
陶瓷板20係氧化鋁燒結體及氮化鋁燒結體等陶瓷製之圓板(例如直徑300mm,厚度5mm)。陶瓷板20的頂面成為晶圓載置面21。陶瓷板20內建電極22。在陶瓷板20之晶圓載置面21,如圖2所示地,沿著外緣形成密封帶21a,並在整個面上形成多數圓形小突起21b。密封帶21a及圓形小突起21b係相同高度,該高度係例如數μm至數10μm。電極22係作為靜電電極使用之平面狀的網狀電極,可施加直流電壓。施加直流電壓至該電極22時,晶圓W藉由靜電吸附力而被吸附固定於晶圓載置面21(具體而言,係密封帶21a的頂面及圓形小突起21b的頂面);直流電壓之施加被解除時,晶圓W對晶圓載置面21之吸附固定會被解除。此外,晶圓載置面21中,未設置密封帶21a或圓形小突起21b之部分稱為基準面21c。
塞插入孔24係於上下方向貫穿陶瓷板20之貫穿孔。如圖3所示地,塞插入孔24之上部成為無母螺紋部之扁平圓筒部24a,下部成為母螺紋部24b。塞插入孔24係設置於陶瓷板20之多數處(例如如圖2所示地,沿著周向等間隔地設置之多數處)。在塞插入孔24配置後述之多孔塞50。
冷卻板30係導熱率良好之圓板(與陶瓷板20相同直徑,或比陶瓷板大之直徑的圓板)。在冷卻板30之內部形成冷媒循環之冷媒流道32或供給氣體至多孔塞50之氣孔34。冷媒流道32在俯視下係遍及冷卻板30之整面地、由入口到出口一筆劃地形成。氣孔34係圓筒狀之孔,設置於與塞插入孔24對向之位置。冷卻板30之材料可舉金屬材料及金屬基複合材料(MMC)等為例。就金屬材料而言,可舉Al、Ti、Mo或其合金等為例。就MMC而言,可舉包含Si、SiC及Ti之材料(亦稱為SiSiCTi)及在SiC多孔質體中浸滲Al及/或Si之材料等為例。就冷卻板30之材料而言,宜選擇熱膨脹係數與陶瓷板20之材料接近的材料。冷卻板30亦作為射頻電極使用。具體而言,在晶圓載置面21之上方配置上部電極(未圖示),並在由該上部電極與冷卻板30形成的平行平板電極之間施加射頻電力時,產生電漿。
金屬接合層40將陶瓷板20的底面與冷卻板30的頂面接合在一起。金屬接合層40係藉由例如TCB(熱壓接合(Thermal compression bonding))形成。TCB係指:將金屬接合材夾持在接合對象的2個構件之間,並在加熱至金屬接合材的固相線溫度以下之溫度的狀態下,加壓接合2個構件的習知方法。金屬接合層40具有在與氣孔34對向之位置、於上下方向貫穿金屬接合層40之圓孔42。本實施形態之金屬接合層40及冷卻板30相當於本發明之導電性基材,圓孔42及氣孔34相當於連通孔。
多孔塞50係容許氣體流通之塞,配置於塞插入孔24。多孔塞50的外周面與塞插入孔24的內周面係齊平(接觸)。多孔塞50呈圓柱狀,在外周面具有公螺紋部52。公螺紋部52與塞插入孔24的母螺紋部24b螺合。多孔塞50的頂面與塞插入孔24之圓筒部24a的底面係齊平。多孔塞50的底面50b與陶瓷板20的底面20b係齊平。在本實施形態中,多孔塞50係藉由使用陶瓷粉末進行燒結而得之多孔塊體。就陶瓷而言,可使用例如氧化鋁及氮化鋁等。多孔塞50之氣孔率宜為30%以上,平均氣孔徑宜為20μm以上。
絕緣蓋56係用陶瓷(例如氧化鋁等)形成的圓板構件。絕緣蓋56以連接於多孔塞50的頂面的方式設置於塞插入孔24之圓筒部24a的內部,露出於晶圓載置面21。絕緣蓋56的頂面係與基準面21c同高。絕緣蓋56具有多數細孔58。細孔58係設置成於上下方向貫穿絕緣蓋56。細孔58之上下方向的長度(絕緣蓋56之厚度)宜係0.01mm以上、0.5mm以下,更佳係0.05mm以上、0.2mm以下,且就施加高電壓之裝置而言特佳係0.05mm以上、0.1mm以下。細孔58之直徑宜係0.01mm以上、0.5mm以下,較佳係0.1mm以上、0.5mm以下,且更佳係0.1mm以上、0.2mm以下。細孔58宜在絕緣蓋56中設置5個以上,設置10個以上更佳。絕緣蓋56可為緻密質或多孔質,但以緻密質為佳。
絕緣管60係以緻密質陶瓷(例如緻密質氧化鋁等)形成、俯視下呈圓形的管。絕緣管60的外周面,係透過未圖示之黏著層,而與金屬接合層40之圓孔42的內周面及冷卻板30之氣孔34的內周面黏著在一起。黏著層可為有機黏著層(樹脂黏著層)或無機黏著層。此外,黏著層可更設置於絕緣管60的頂面與陶瓷板20的底面之間。絕緣管60之內部連通於多孔塞50。因此,氣體導入絕緣管60之內部時,該氣體通過多孔塞50而供給至晶圓W之背面。
接著,說明如此構成之半導體製造裝置用構件10的使用例。首先,在半導體製造裝置用構件10設置於未圖示之腔室內的狀態下,將晶圓W載置在晶圓載置面21上。接著,藉由真空泵使腔室內減壓以調整成預定之真空度,施加直流電壓至陶瓷板20之電極22以產生靜電吸附力,將晶圓W吸附固定於晶圓載置面21(具體而言,係密封帶21a的頂面或圓形小突起21b的頂面)。接著,使腔室內形成預定壓力(例如數10至數100Pa)之反應氣體環境,在此狀態下,施加射頻電壓至「設置於腔室內之頂部的未圖示的上部電極」與「半導體製造裝置用構件10的冷卻板30」之間,以產生電漿。藉由產生之電漿處理晶圓W之表面。使冷媒循環於冷卻板30之冷媒流道32。背面氣體由未圖示之貯氣瓶導入氣孔34。就背面氣體而言,係使用導熱氣體(例如氦等)。背面氣體通過絕緣管60、多孔塞50及多數細孔58,供給並封入晶圓W的背面與晶圓載置面21的基準面21c之間的空間。由於該背面氣體之存在,可高效率地進行晶圓W與陶瓷板20之熱傳導。
接著,依據圖4及圖5說明半導體製造裝置用構件10之製造例。圖4及圖5係半導體製造裝置用構件10之製造過程圖。首先,準備陶瓷板20、冷卻板30及金屬接合材90(圖4A)。陶瓷板20具有電極22及塞插入孔24。在此階段,陶瓷板20的頂面係平坦的面,未設置密封帶21a或圓形小突起21b。塞插入孔24之上部成為無母螺紋部之圓筒部24a,下部成為母螺紋部24b。冷卻板30內建冷媒流道32,具有氣孔34。金屬接合材90具有最後成為圓孔42之圓孔92。
接著,藉由TCB將陶瓷板20的底面與冷卻板30的頂面接合在一起,以製得接合體94(圖4B)。TCB係例如以下述方式進行。首先,將金屬接合材90夾持在陶瓷板20的底面與冷卻板30的頂面之間,作成積層體。此時,陶瓷板20之塞插入孔24、金屬接合材90之圓孔92及冷卻板30之氣孔34係以成為同軸之方式進行層積。接著,在金屬接合材90之固相線溫度以下(例如,由固相線溫度減去20℃而得之溫度以上、固相線溫度以下)的溫度,加壓積層體使其接合,然後返回室溫。藉此,金屬接合材90成為金屬接合層40,圓孔92成為圓孔42,製得以金屬接合層40將陶瓷板20與冷卻板30接合在一起之接合體94。就此時之金屬接合材而言,可使用Al-Mg系接合材或Al-Si-Mg系接合材。例如,使用Al-Si-Mg系接合材進行TCB時,在真空環境進行加熱之狀態下加壓積層體。金屬接合材90宜使用厚度係大約100μm者。
接著,準備絕緣管60,在金屬接合層40之圓孔42的內周面及冷卻板30之氣孔34的內周面塗布黏著劑後,將絕緣管60插入其中,而使絕緣管60黏著固定在圓孔42及氣孔34(圖4C)。黏著劑可為樹脂(有機)黏著劑或無機黏著劑。然後,藉由對陶瓷板20的頂面(晶圓載置面21)進行噴砂加工,形成密封帶21a、圓形小突起21b及基準面21c(請參照圖3)。
接著,準備具有公螺紋部52之多孔塞50(多孔塊體)(圖4C)。就多孔塞50而言,可使用在陶瓷原料中添加造孔劑而成形為具有公螺紋部之圓柱體,然後對該圓柱體進行燒結,同時燒掉造孔劑,而使其多孔質化。
使該多孔塞50的公螺紋部52與塞插入孔24的母螺紋部24b螺合,以使多孔塞50的底面與絕緣管60的頂面(陶瓷板20的底面)齊平(圖5A)。例如,使前端具有橡膠等摩擦係數大之材料的旋鈕密接於多孔塞50的頂面,接著用手一面推入該旋鈕、一面加以旋轉,以由塞插入孔24之上部開口插入多孔塞50並加以螺合。螺合結束後,移除旋鈕。多孔塞50之螺合結束時,多孔塞的頂面與塞插入孔24之圓筒部24a的底面齊平。
接著,藉由將陶瓷粉末熱噴塗在多孔塞50的頂面,形成熱噴塗膜96(圖5B)。藉此,以熱噴塗膜96填充塞插入孔24之圓筒部24a。此時,多孔塞50的公螺紋部52與塞插入孔24的母螺紋部24b螺合,由於上下方向之間隙不會產生,因此可輕易地進行熱噴塗。熱噴塗膜96的頂面會比陶瓷板20的頂面高。
接著,進行研磨加工(切削加工),使熱噴塗膜96的頂面與形成於陶瓷板20之晶圓載置面21的基準面21c(請參照圖3)成為同一平面(圖5C)。藉此,在多孔塞50之上部形成由熱噴塗膜構成之絕緣蓋56。接著,藉由對絕緣蓋56實施雷射加工,而在絕緣蓋56中形成多數細孔58(圖5D)。如上所述地製得半導體製造裝置用構件10。
在以上詳述之半導體製造裝置用構件10中,多數細孔58設置於與陶瓷板20分開之絕緣蓋56中。因此,相較於多數細孔直接地設置於陶瓷板20的情形,細孔之加工性良好。
此外,絕緣蓋56係熱噴塗膜。因此,可比較容易地製作絕緣蓋56。另外,熱噴塗膜可為多孔質或緻密質。多孔質時,氣孔率宜為10至15%。
此外,絕緣蓋56的頂面係與晶圓載置面21之基準面21c同高,細孔58之上下方向的長度宜係0.01mm以上、0.5mm以下。若為0.01mm以上,容易確保良好之加工性。此外,若為0.5mm以下,可有效抑制晶圓W的背面與多孔塞50的頂面之間的空間高度,因此可防止在該空間中發生電弧放電。另外,該空間之高度高時,由於隨著氦(背面氣體)電離而產生之電子加速,並與另外之氦撞擊而發生電弧放電,但該空間之高度低時,可抑制如此之電弧放電。
再者,細孔58之直徑宜係0.01mm以上、0.5mm以下,設置於絕緣蓋56中之細孔58的個數宜為5個以上。如此,供給至多孔塞50之背面氣體可朝向晶圓W之背面平順地流出。
此外,塞插入孔24在內周面具有母螺紋部24b,多孔塞50在外周面具有與母螺紋部24b螺合的公螺紋部52。因此,可在不使用黏著劑之情形下,將多孔塞50配置於塞插入孔24。另外,相較於無螺紋之情形,公螺紋部52與母螺紋部24b之螺合處係難以在上下方向上產生間隙,且沿面距離變長。因此,可充分抑制在該螺合處之放電。
另外,多孔塞50的頂面被設置了細孔58之絕緣蓋56覆蓋,因此可抑制由多孔塞50產生顆粒。
再者,因為將絕緣管60設置於氣孔34,所以晶圓W與冷卻板30之間的沿面距離變長。因此,可抑制在多孔塞50內發生沿面放電(火花放電)。
此外,絕緣蓋56及多孔塞50之外形係圓形,且絕緣蓋56之外徑比多孔塞50大。藉此,絕緣蓋56與陶瓷板20之黏著面積變大,因此兩者之黏著性良好。
另外,本發明完全不限定於上述實施形態,只要是屬於本發明之技術範圍當然就可用各種態樣實施。
在上述實施形態中,雖然使用熱噴塗膜作為絕緣蓋56,但不特別限定於熱噴塗膜。例如,可如圖6所示地使用緻密質陶瓷塊體(陶瓷燒結體)之絕緣蓋156。在圖6中,與上述實施形態相同之構成元件賦予相同符號。絕緣蓋156具有多數細孔158,且透過黏著層159黏著固定在塞插入孔24之扁平圓筒部24a的底面。黏著層159宜未塗布在多孔塞50的頂面。黏著層159可為樹脂(有機)黏著層或無機黏著層。以下說明如此之絕緣蓋156的一製作方法例。首先,對陶瓷粉末進行燒結以製作緻密質塊體。緻密質塊體之大小係作成可取出多數個絕緣蓋156之大小。該緻密質塊體係加工成厚度為0.01mm以上、0.5mm以下之預定值。接著,藉由對厚度加工後之緻密質塊體實施雷射加工,由緻密質塊體挖取出多數絕緣蓋156,同時在絕緣蓋156形成多數細孔158。絕緣蓋156之尺寸或細孔158之尺寸與上述實施形態相同。在圖6中亦有效抑制晶圓W的背面與多孔塞50的頂面之間的空間高度,因此可防止在該空間中發生電弧放電。此外,黏著層159由於絕緣蓋156而無法由晶圓側看到,且腔室之乾洗時亦可抑制黏著層159之劣化。或者,可藉由雷射燒結而製作絕緣蓋156。
在上述實施形態中,多孔塞50的底面50b與陶瓷板20的底面20b係齊平,但不特別限定於此。例如,可如圖7所示地使多孔塞50的底面50b位於絕緣管60之內部。在圖7中,與上述實施形態相同之構成元件賦予相同符號。在圖7中多孔塞50的底面50b位於導電性基材(金屬接合層40及冷卻板30)之連通孔(圓孔42及氣孔34)的內部。如此,可抑制在多孔塞50的底面50b與導電性基材之間發生電弧放電。這是因為當多孔塞50的底面50b位於導電性基材的頂面(金屬接合層40的頂面)上方時,由於在多孔塞50的底面50b與導電性基材之間的電位差,會產生電弧放電,但如果是圖7所示的構成,則不會有該放電發生。
在上述實施形態中,雖然使用絕緣管60,但可使用圖8所示之內建氣體通路162的絕緣塞160來取代絕緣管60。絕緣塞160在由緻密質陶瓷形成的圓柱體內部設置螺旋狀之氣體通路162。氣體通路162之上端在圓柱體的頂面開口,氣體通路162之下端在圓柱體的底面開口。使用絕緣塞160時,相較於絕緣管60,晶圓W與冷卻板30之沿面距離更長,因此可進一步抑制在多孔塞50內之火花放電。
此外,亦可使用圖9所示之多孔塞150~650來取代上述實施形態之多孔塞50。使用該等多孔塞150~650時,設置於陶瓷板20之塞插入孔24亦分別地變更成配合之形狀。圖9A之多孔塞150係呈上底比下底大之倒截頭圓錐形狀。圖9B之多孔塞250係呈下底比上底大之截頭圓錐形狀。圖9C之多孔塞350係呈圓柱連結在倒截頭圓錐的底面的形狀。圖9D之多孔塞450係呈圓柱連結在截頭圓錐的頂面的形狀。圖9E之多孔塞550係呈小徑之圓柱連結在大徑之圓柱底面的形狀。圖9F之多孔塞650係呈大徑之圓柱連結在小徑之圓柱底面的形狀。其中,多孔塞250、450、650具有由上向下擴徑之擴徑部E。因此,即使由多孔塞250、450、650下方流通至上方之氣體的壓力施加在多孔塞250、450、650上,由於擴徑部E頂在塞插入孔的內周面上,因此可抑制多孔塞250、450、650的浮起。此外,可將公螺紋部設置於該等多孔塞150~650的外周面,並與上述實施形態同樣地,與塞插入孔的母螺紋部螺合。
在上述實施形態中,雖然絕緣蓋56之形狀作成上底與下底係相同大小、且該等上底及下底之大小比多孔塞50的頂面大的圓板形狀,但可使絕緣蓋56之形狀如圖10A至C所示。圖10A之絕緣蓋56成為上底與下底係相同大小、且該等上底及下底之大小係與多孔塞50的頂面相同大小的圓板形狀。但是,相較於圖10A,上述實施形態之絕緣蓋56與多孔塞50的黏著性、或絕緣蓋56與陶瓷板20的黏著性係良好。圖10B之絕緣蓋56成為下底之大小係與多孔塞50的頂面相同大小、且上底比下底大之倒截頭圓錐狀。此時,相較於圖10A,絕緣蓋56的外周面的面積變大,因此絕緣蓋56的外周面與陶瓷板20之黏著性良好。圖10C之絕緣蓋56成為下底之大小比多孔塞50的頂面大、且上底比下底大之倒截頭圓錐狀。此時,相較於上述實施形態,絕緣蓋56與陶瓷板20之黏著性良好。特別在藉由熱噴塗形成絕緣蓋56時,絕緣蓋56之形狀係圖10B比圖10A好,上述實施形態比圖10B好,而圖10C比上述實施形態好。
在上述實施形態中,雖然絕緣蓋56之形狀作成上底與下底係相同大小之圓板形狀,但亦可作成上底比下底大之倒截頭圓錐。此時,塞插入孔24之圓筒部24a成為倒截頭圓錐狀之空間。如此,藉由熱噴塗膜形成絕緣蓋56時,在塞插入孔24之圓筒部24a中容易填充熱噴塗材料。此外,因為絕緣蓋56與塞插入孔24之圓筒部24a的接觸面積變大,所以可提高絕緣蓋56與塞插入孔24之密接性。
在上述實施形態中,雖然在多孔塞50的外周面形成公螺紋部52,在塞插入孔24的內周面形成母螺紋部24b,且螺合公螺紋部52與母螺紋部24b,但不特別限定於此。例如,於多孔塞50的外周面不形成公螺紋部52,且於塞插入孔24的內周面不形成母螺紋部24b亦可。此時,可用黏著劑(可為有機黏著劑或無機黏著劑)黏著多孔塞50的外周面與塞插入孔24的內周面。但是,於多孔塞50的外周面與塞插入孔24的內周面之間無間隙地填充黏著劑係很困難。產生間隙時,恐有在該間隙中放電之虞。因此,上述實施形態之構造(螺合公螺紋部52與母螺紋部24b之構造)較佳。
在上述實施形態係設置了絕緣管60,但亦可省略絕緣管60。此外,可在冷卻板30中設置氣體通道來取代設置氣孔34。可採用具有:環部,設置於冷卻板30之內部,且在俯視下係與冷卻板30為同心圓;導入部,將氣體由冷卻板30之背面導入到環部;及分配部(相當於上述氣孔34),將氣體由環部分配到各多孔塞50的構造作為氣體通道構造。導入部之數目可比分配部之數目少,例如可為1條。
在上述實施形態中,雖然例示靜電電極作為內建在陶瓷板20中之電極22,但不特別限定於此。例如,可在陶瓷板20中內建加熱器電極(電阻發熱體)或內建射頻電極來取代或外加於電極22。
在上述實施形態中,雖然用金屬接合層40將陶瓷板20與冷卻板30接合在一起,但亦可用樹脂黏著層來取代金屬接合層40。此時,冷卻板30相當於本發明之導電性基材。
本申請案係以2022年1月21日申請之日本專利申請案第2022-007943號作為優先權主張之基礎,且在本說明書中藉由引用包含該申請案之內容全部。
10:半導體製造裝置用構件
20:陶瓷板
20b,50b:底面
21:晶圓載置面
21a:密封帶
21b:圓形小突起
21c:基準面
22:電極
24:塞插入孔
24a:圓筒部
24b:母螺紋部
30:冷卻板
32:冷媒流道
34:氣孔
40:金屬接合層
42,92:圓孔
50,150,250,350,450,550,650:多孔塞
52:公螺紋部
56,156:絕緣蓋
58,158:細孔
60:絕緣管
90:金屬接合材
94:接合體
96:熱噴塗膜
159:黏著層
160:絕緣塞
162:氣體通路
E:擴徑部
W:晶圓
[圖1]係半導體製造裝置用構件10之縱截面圖。
[圖2]係陶瓷板20之俯視圖。
[圖3]係圖1之部分放大圖。
[圖4A~C]係半導體製造裝置用構件10之製造過程圖。
[圖5A~D]係半導體製造裝置用構件10之製造過程圖。
[圖6]係具有絕緣蓋156之構造的部分放大圖。
[圖7]係顯示多孔塞50之另一例的部分放大圖。
[圖8]係絕緣塞160之縱截面圖。
[圖9A~F]係多孔塞150~650之縱截面圖。
[圖10A~C]係絕緣蓋56之另一例的縱截面圖。
10:半導體製造裝置用構件
20:陶瓷板
21:晶圓載置面
22:電極
24:塞插入孔
30:冷卻板
32:冷媒流道
34:氣孔
40:金屬接合層
42:圓孔
50:多孔塞
56:絕緣蓋
58:細孔
60:絕緣管
W:晶圓
Claims (7)
- 一種半導體製造裝置用構件,具有:陶瓷板,在其頂面具有晶圓載置面;多孔塞,配置在於上下方向貫穿該陶瓷板之塞插入孔,容許氣體流通;絕緣蓋,設置成連接於該多孔塞的頂面,露出於該晶圓載置面;及多數細孔,於上下方向貫穿該絕緣蓋;該絕緣蓋係熱噴塗膜或陶瓷塊體。
- 如請求項1之半導體製造裝置用構件,其中:該晶圓載置面具有支持晶圓之多數小突起,該絕緣蓋的頂面位在與該晶圓載置面中未設置該小突起之基準面相同的高度,該細孔之上下方向的長度係0.01mm以上、0.5mm以下。
- 如請求項2之半導體製造裝置用構件,其中該絕緣蓋係陶瓷塊體,背面係透過黏著層黏著在該陶瓷板上。
- 如請求項1之半導體製造裝置用構件,其中該細孔之直徑係0.01mm以上、0.5mm以下,且該細孔在該絕緣蓋上設置5個以上。
- 如請求項1之半導體製造裝置用構件,其中:該塞插入孔在內周面具有母螺紋部, 該多孔塞在外周面具有與該母螺紋部螺合的公螺紋部。
- 如請求項1之半導體製造裝置用構件,其中該多孔塞具有由上向下擴徑之擴徑部。
- 如請求項1之半導體製造裝置用構件,其中該絕緣蓋及該多孔塞之外形係圓形,且該絕緣蓋之外徑比該多孔塞大。
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TWI722103B (zh) * | 2016-06-07 | 2021-03-21 | 美商應用材料股份有限公司 | 具有氣孔中之減少孔徑之插塞的高功率靜電夾具以及與其相關的方法和腔室 |
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