TWI826124B - 半導體製造裝置用構件 - Google Patents

半導體製造裝置用構件 Download PDF

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TWI826124B
TWI826124B TW111143904A TW111143904A TWI826124B TW I826124 B TWI826124 B TW I826124B TW 111143904 A TW111143904 A TW 111143904A TW 111143904 A TW111143904 A TW 111143904A TW I826124 B TWI826124 B TW I826124B
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hole
insulating shell
semiconductor manufacturing
porous plug
ceramic plate
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TW202335159A (zh
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井上靖也
久野達也
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日商日本碍子股份有限公司
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Abstract

本發明之半導體製造裝置用構件10，具備陶瓷板20、設於陶瓷板20之底面之金屬接合層40及冷卻板30(導電性基材)、在上下方向貫通陶瓷板20之第1孔24，以及在上下方向貫通導電性構件並連通於第1孔24之貫通孔42及氣體孔34(第2孔)。緻密材質之絕緣殼60具有在底面開口之有底孔64，並配置於第1孔24及第2孔。複數之細孔在上下方向貫通有底孔64之底部。多孔質栓塞50配置於有底孔64並與其底部相接。

Description

半導體製造裝置用構件
本發明係關於一種半導體製造裝置用構件。
以往，作為半導體製造裝置用構件，習知將具有晶圓載置面之靜電吸盤設於冷卻裝置上者。例如，專利文獻1之半導體製造裝置用構件，具備設於冷卻裝置之氣體供給孔、以與氣體供給孔連通之方式設於靜電吸盤之凹部、從凹部之底面貫通至晶圓載置面之細孔，以及由填充於凹部之絕緣材料構成之多孔質栓塞。將氦等背面氣體導入氣體供給孔後，該氣體通過氣體供給孔、多孔質栓塞及細孔而供給至晶圓之背面側之空間。 [先前技術文獻] [專利文獻]
[專利文獻1]日本特開2013－232640號公報
[發明欲解決之課題]
但，上述之半導體製造裝置用構件中，在構成靜電吸盤之陶瓷板之凹部的底部設置細孔，故在加工上，難以減小細孔之上下方向的長度。
本發明之主要目的在於解決如此課題，並改善連通晶圓載置面與多孔質栓塞的頂面之細孔的加工性。 [解決課題之手段]
本發明之半導體製造裝置用構件包含： 陶瓷板，於頂面具有晶圓載置面； 導電性基材，設於該陶瓷板之底面； 第1孔，在上下方向貫通該陶瓷板； 第2孔，在上下方向貫通該導電性基材，並連通於該第1孔； 絕緣殼，具有在底面開口之有底孔，並配置於該第1孔及該第2孔且為緻密材質； 複數之細孔，在上下方向貫通該有底孔之底部；以及， 多孔質栓塞，配置於該有底孔並與該底部相接。
此半導體製造裝置用構件中，在與陶瓷板設為不同個體之絕緣殼之有底孔的底部設置複數之細孔。故，相較於直接在陶瓷板設置複數之細孔之情況，細孔之加工性更加良好。
在本發明之半導體製造裝置用構件中，該晶圓載置面可具有支撐晶圓之多個小突起，該絕緣殼之頂面可與該晶圓載置面之中未設置該小突起之基準面為相同高度，該細孔之上下方向之長度可係0.01mm以上、0.5mm以下。如此，將晶圓之背面與多孔質栓塞之頂面之間的空間之高度抑制得較低，故可防止在此空間發生弧放電。又，基準面之高度可係隨各個小突起而異之高度。又，基準面之高度可係與最靠近第1孔之小突起的底面相同之高度。
在本發明之半導體製造裝置用構件中，該第1孔可具有細直徑之第1孔上部、粗直徑之第1孔下部，以及形成該第1孔上部與該第1孔下部的交界之段差部，該絕緣殼可具有插入該第1孔上部之細直徑之絕緣殼上部、插入該第1孔下部之粗直徑之絕緣殼下部，以及形成該絕緣殼上部與該絕緣殼下部的交界並抵接該段差部之肩部。如此，可藉由使絕緣殼之肩部抵接第1孔之段差部，而容易地將絕緣殼之頂面定位。
在本發明之半導體製造裝置用構件中，該細孔可係直徑0.1mm以上、0.5mm以下，並在該絕緣殼之該底部設置10個以上。如此，供給至第2孔之氣體可向晶圓之背面順暢地流出。
在本發明之半導體製造裝置用構件中，該多孔質栓塞之底面可位於該導電性基材之頂面以下(較佳為比導電性基材之頂面更下方)。多孔質栓塞之底面位於金屬接合層之頂面的更上方時，會在多孔質栓塞之底面與導電性基材之間發生弧放電。相對於此，多孔質栓塞之底面位於金屬接合層之頂面以下時可抑制如此之弧放電。
在本發明之半導體製造裝置用構件中，該絕緣殼可係將上方構件與下方構件一體化而成，該上方構件之上下方向的長度可比該陶瓷板之上下方向的長度短，該多孔質栓塞之底面可位於與該上方構件之底面相同之高度或在其之上。如此，在製造半導體製造裝置用構件時，可將長度較短之多孔質栓塞插入長度較短之上方構件之有底孔，然後將上方構件與下方構件一體化。如此，多孔質栓塞之插入距離較短，故多孔質栓塞不易崩裂。
接著，利用圖式說明本發明之較佳實施態樣。圖1係半導體製造裝置用構件10之縱剖面圖，圖2係陶瓷板20之俯視圖，圖3係圖1之部分放大圖。
半導體製造裝置用構件10具備陶瓷板20、冷卻板30、金屬接合層40、多孔質栓塞50及絕緣殼60。
陶瓷板20係氧化鋁燒結體或氮化鋁燒結體等陶瓷製之圓板(例如直徑300mm、厚度5mm)。陶瓷板20之頂面形成晶圓載置面21。陶瓷板20內建電極22。於陶瓷板20之晶圓載置面21，如圖2所示，沿著外緣形成密封帶21a，並在整個面上形成複數之圓形小突起21b。密封帶21a及圓形小突起21b係相同高度，該高度例如係數μm～數十μm。電極22係作為靜電電極使用之平面狀之網電極，並可施加直流電壓。向此電極22施加直流電壓時，晶圓W因靜電吸附力而吸附固定於晶圓載置面21(具體而言為密封帶21a之頂面及圓形小突起21b之頂面)，解除直流電壓之施加時，解除晶圓載置面21對晶圓W之吸附固定。又，晶圓載置面21之中未設置密封帶21a或圓形小突起21b之部分稱為基準面21c。
於陶瓷板20設有第1孔24。第1孔24係在上下方向貫通陶瓷板20及電極22之貫通孔。第1孔24如圖3所示形成為埋頭孔，第1孔上部24a較細，第1孔下部24b較粗。第1孔24係將細直徑之圓柱狀之第1孔上部24a與粗直徑之圓柱狀之第1孔下部24b連接而成之孔，於第1孔上部24a與第1孔下部24b之交界具有段差部24c。第1孔24設於陶瓷板20之複數位置(例如沿著周方向等間隔設置之複數位置)。
冷卻板30係熱傳導率良好之圓板(直徑與陶瓷板20相同或直徑更大之圓板)。於冷卻板30之內部，形成循環冷媒之冷媒流路32及向多孔質栓塞50供給氣體之氣體孔34。冷媒流路32在俯視下橫跨冷卻板30的整個面而從入口一筆劃地形成至出口。氣體孔34係圓柱狀之孔，其設成與第1孔24為同軸並連通於第1孔24。氣體孔34之直徑與第1孔下部24b之直徑大致相同。冷卻板30之材料例如可舉出金屬材料或金屬基複合材料(MMC)等。作為金屬材料，可舉出Al、Ti、Mo或該等之合金等。作為MMC，可舉出含有Si、SiC及Ti之材料(亦稱為SiSiCTi)及使Al及／或Si含浸於SiC多孔質體之材料等。作為冷卻板30之材料，較佳選擇熱膨脹係數與陶瓷板20之材料相近者。冷卻板30亦作為RF電極使用。具體而言，於晶圓載置面21之上方配置上部電極(未圖示)，並在由該上部電極與冷卻板30構成之平行平板電極間施加射頻功率而產生電漿。
金屬接合層40將陶瓷板20之底面與冷卻板30之頂面接合。金屬接合層40例如透過TCB(Thermal compression bonding，熱壓接合)形成。所謂TCB，係將金屬接合材夾入接合對象之2個構件之間，並在加熱至金屬接合材之固相線溫度以下之溫度之狀態下將2個構件加壓接合之習知方法。於金屬接合層40設有以連通於陶瓷板20之第1孔24及冷卻板30之氣體孔34之方式上下方向貫通之貫通孔42。貫通孔42之直徑與氣體孔34之直徑相同。本實施態樣之金屬接合層40及冷卻板30相當於本發明之導電性基材，本實施態樣之貫通孔42及氣體孔34相當於本發明之第2孔。
多孔質栓塞50係容許氣體在上下方向流通之多孔質圓柱構件。多孔質栓塞50例如由氧化鋁等電絕緣性材料形成。多孔質栓塞50之頂面50a與絕緣殼60之底部65相接。多孔質栓塞50之底面50b位於金屬接合層40之頂面40a以下且比絕緣殼60之底面60b更上方。
絕緣殼60係以緻密陶瓷(例如緻密氧化鋁等)形成之杯狀構件。絕緣殼60具有在底面開口之有底孔64。絕緣殼60之外周面係透過從第1孔24之頂面到達氣體孔34內部之接合層70而接合固定於第1孔24、貫通孔42及氣體孔34之各自的內周面。有底孔64之內徑固定。絕緣殼上部61之外徑較細，絕緣殼下部62之外徑較粗。絕緣殼上部61與絕緣殼下部62之交界形成肩部63。絕緣殼上部61之外周面經由上部接合層71接合固定於第1孔24之第1孔上部24a之內周面。絕緣殼下部62之外周面經由下部接合層72接合固定於第1孔下部24b之內周面、金屬接合層40之貫通孔42及冷卻板30之氣體孔34之各自的內周面。絕緣殼60之肩部63抵接第1孔24之段差部24c時，絕緣殼60之頂面60a與晶圓載置面21之基準面21c成為相同高度。又，所謂「相同」除了完全相同之情況，亦包含實質上相同之情況(例如在公差範圍內之情況等)(以下相同)。絕緣殼60之底面60b位於氣體孔34之內部。絕緣殼60具有複數之細孔66。細孔66係設成在上下方向貫通絕緣殼60之有底孔64的底部65。細孔66之上下方向的長度較佳為0.01mm以上、0.5mm以下，更佳為0.05mm以上、0.2mm以下，又，在施加高電壓之裝置中，特佳為0.05mm以上、0.1mm以下。細孔66之直徑較佳0.1mm以上、0.5mm以下，更佳為0.1mm以上、0.2mm以下。細孔66較佳在底部65設置10個以上。
絕緣殼60與多孔質栓塞50構成一體化之一體化構件As1。一體化構件As1係將多孔質栓塞50插入絕緣殼60之有底孔64，並在多孔質栓塞50之頂面50a與底部65相接之狀態下，透過接合劑將多孔質栓塞50之外周面接合於有底孔64之內周面而成。
接著，說明以此方式構成之半導體製造裝置用構件10之使用例。首先，在未圖示之腔室內設置有半導體製造裝置用構件10之狀態下，將晶圓W載置於晶圓載置面21。然後，透過真空泵將腔室內減壓並調整至既定之真空度，並向陶瓷板20之電極22施加直流電壓而產生靜電吸附力，而將晶圓W吸附固定於晶圓載置面21(具體而言為密封帶21a之頂面及圓形小突起21b之頂面)。接著，將腔室內設為既定壓力(例如數十～數百Pa)之反應氣體環境，此狀態下，向設於腔室內之頂蓋部分之未圖示之上部電極與半導體製造裝置用構件10之冷卻板30之間施加射頻電壓而產生電漿。透過產生之電漿處理晶圓W之表面。於冷卻板30之冷媒流路32循環冷媒。從未圖示之氣體缸筒向氣體孔34導入背面氣體。使用熱傳導氣體(例如氦等)作為背面氣體。背面氣體通過冷卻板30之氣體孔34、絕緣殼60之有底孔64、多孔質栓塞50及複數之細孔66，而供給至晶圓W之背面與晶圓載置面21之基準面21c之間的空間並被封閉於其中。藉由存在此背面氣體，而有效率地進行晶圓W與陶瓷板20之熱傳導。
接著，基於圖4及圖5說明半導體製造裝置用構件10之製造例。圖4係一體化構件As1之製造步驟圖，圖5係半導體製造裝置用構件10之製造步驟圖。首先，以雷射加工在厚底之絕緣杯體80的底部85形成複數之貫通孔86(圖4A)。貫通孔86之直徑與細孔66之直徑相同。接著，對絕緣杯體80進行切削加工，以使絕緣杯體80之底部85的厚度成為絕緣殼60之底部65的厚度(圖4B)。藉此，可將貫通孔86之上下方向的長度調整至0.05mm以上、0.2mm以下。其結果，貫通孔86成為細孔66。接著，在絕緣杯體80之有底孔的內周面塗布接合劑，並將另外準備的多孔質栓塞50插入該有底孔直至與底部85相接而接合(圖4C)。最後，透過對絕緣杯體80進行切削加工，使絕緣杯體80之外形成為絕緣殼60之外形，而得到將絕緣殼60與多孔質栓塞50一體化之一體化構件As1(圖4D)。又，亦可在對絕緣杯體80進行切削加工以使絕緣杯體80之底部85之厚度成為絕緣殼60之底部65之厚度後，以雷射加工形成貫通孔86。
另外，準備陶瓷板20、冷卻板30及金屬接合材90(圖5A)。陶瓷板20內建電極22並具備第1孔24。冷卻板30內建冷媒流路32並具備氣體孔34。金屬接合材90事先在相當於貫通孔42之位置開出預備孔92。
然後，透過TCB將陶瓷板20之底面與冷卻板30之頂面接合而得到接合體94(圖5B)。TCB例如由以下方式進行。首先，在陶瓷板20之底面與冷卻板30之頂面之間夾入金屬接合材90而形成積層體。此時，以使陶瓷板20之第1孔24、金屬接合材90之預備孔92與冷卻板30之氣體孔34為同軸之方式積層。然後，以金屬接合材90之固相線溫度以下(例如，在從固相線溫度減去20℃之溫度以上且在固相線溫度以下)之溫度將積層體加壓接合，然後回到室溫。藉此，金屬接合材90成為金屬接合層40，預備孔92成為貫通孔42，而得到以金屬接合層40將陶瓷板20與冷卻板30接合而成之接合體94。此時之金屬接合材可使用Al－Mg系接合材或Al－Si－Mg系接合材。例如，利用Al－Si－Mg系接合材進行TCB時，在真空環境下以加熱後之狀態加壓積層體。金屬接合材90較佳使用厚度在100μm左右者。
接著，在陶瓷板20之第1孔24的內周面、金屬接合層40之貫通孔42的內周面及冷卻板30之氣體孔34的內周面的一部分塗布接合劑。然後，在第1孔24之上部開口關閉之狀態下，將第1孔24、貫通孔42及氣體孔34抽真空而將接合劑脫泡，同時一邊將一體化構件As1插入該等孔34、42、24。一體化構件As1之絕緣殼60之肩部63抵接第1孔24之段差部24c時，絕緣殼60之頂面60a會與晶圓載置面21之基準面21c(參照圖3)成為同一平面。然後，接合劑硬化而形成接合層70，得到半導體製造裝置用構件10(圖5C)。
以上詳述之半導體製造裝置用構件10中，在與陶瓷板20設成不同個體之絕緣殼60之有底孔64的底部65設置複數之細孔66。故，相較於直接在陶瓷板20設置複數之細孔之情況，細孔66之加工性更加良好。
又，絕緣殼60之頂面60a與晶圓載置面21之中未設置小突起21b之基準面21c為相同高度，細孔66之上下方向之長度較佳係0.05mm以上、0.2mm以下。若在0.05mm以上，則容易確保良好的加工性。又，若在0.2mm以下，由於將晶圓W之背面與多孔質栓塞50之頂面50a之間的空間的高度抑制得較低，故可防止在此空間發生弧放電。另外，若此空間之高度較高，伴隨著氦之電離而產生之電子會加速並與其他氦碰撞而發生弧放電，但若此空間之高度較低，會使如此之弧放電受到抑制。
再者，第1孔24具有細直徑之第1孔上部24a、粗直徑之第1孔下部24b，以及形成第1孔上部24a與第1孔下部24b之交界之段差部24c，絕緣殼60具有插入第1孔上部24a之細直徑之絕緣殼上部61、插入第1孔下部24b之粗直徑之絕緣殼下部62，以及形成絕緣殼上部61與絕緣殼下部62之交界並抵接段差部24c之肩部63。故，可藉由使絕緣殼60之肩部63抵接第1孔24之段差部24c，而容易地將絕緣殼60之頂面60a定位。
又，細孔66較佳係直徑在0.1mm以上、0.5mm以下，並在絕緣殼60之底部65設置10個以上。如此，使供給至氣體孔34之背面氣體向晶圓W之背面順暢地流出。
並且，多孔質栓塞50之底面50b位於金屬接合層40之頂面40a以下(此處為比金屬接合層40之頂面40a更下方)。多孔質栓塞50之底面50b位於比金屬接合層40之頂面40a更上方時，多孔質栓塞50之底面50b與導電性基材(金屬接合層40及冷卻板30)之間會發生弧放電。相對於此，多孔質栓塞50之底面50b位於金屬接合層40之頂面40a以下時，可抑制如此之弧放電。
又，多孔質栓塞50之頂面50a被設有細孔66之絕緣殼60的底部65覆蓋，故可抑制從多孔質栓塞50產生微粒。
再者，絕緣殼60之底面60b位於比多孔質栓塞50之底面50b更下方。故，從晶圓W到冷卻板30為止之沿面距離較長，而可抑制多孔質栓塞50內之火花放電。特別係由於絕緣殼60之底面60b位於氣體孔34之內部，而易於抑制火花放電。
又，本發明不限於上述之任一實施態樣，而可在本發明之技術範圍內以各種態樣實施，自不待言。
在上述實施態樣中，可採用圖6所示之一體化構件As2而取代一體化構件As1。圖6中，對與上述實施態樣相同之構成要素標示相同符號。一體化構件As2係將絕緣殼160與多孔質栓塞150一體化而成，並經由接合層170而接合固定於陶瓷板20之第1孔24、金屬接合層40之貫通孔42及冷卻板30之氣體孔34之各自的內周面。絕緣殼160係將上方構件161與下方構件162一體化而成。上方構件161係以緻密陶瓷(例如緻密氧化鋁等)形成之杯狀構件。上方構件161具有在底面開口之有底孔164。有底孔164之內徑固定。上方構件161之上部161a之外徑較細，下部161b之外徑較粗。上方構件161之中，上部161a與下部161b之交界形成肩部161c。上方構件161之肩部161c抵接第1孔24之段差部24c時，上方構件161之頂面161d與晶圓載置面21之基準面21c成為相同高度。多孔質栓塞150接合固定於上方構件161之有底孔164。多孔質栓塞150係容許氣體在上下方向流通之多孔質圓柱構件。多孔質栓塞150之頂面150a與有底孔164之底部165相接，多孔質栓塞150之底面150b位於與上方構件161之底面161e相同之高度或在其之上。上方構件161具有複數之細孔166。細孔166係設成在上下方向貫通上方構件161之有底孔164之底部165。細孔166之上下方向之長度及直徑、個數之數值範圍與上述實施態樣之細孔66相同。下方構件162之頂面透過樹脂接合層或金屬接合層而與上方構件161之底面161e一體化。下方構件162係以緻密陶瓷(例如緻密氧化鋁等)形成之管。下方構件162之外徑與上方構件161之下部161b之外徑相同或略小，下方構件162之內徑與上方構件161之有底孔164之內徑相同或略大。透過圖6之構成，與上述實施態樣相同，改善細孔166之加工性。此外，在製造半導體製造裝置用構件時，可將長度較短之多孔質栓塞150插入長度較短之上方構件161之有底孔164，然後將上方構件161與下方構件162一體化。如此，多孔質栓塞150之插入距離較短，故多孔質栓塞150不易崩裂。
上述之實施態樣中，使多孔質栓塞50之底面50b位於冷卻板30之氣體孔34的內部(亦即比冷卻板30之頂面更下方)，但並未特別限定於此。例如，可使多孔質栓塞50之底面50b位於金屬接合層40之貫通孔42之內部(亦即比金屬接合層40之頂面更下方)。如此仍可得到與上述實施態樣相同之效果。
在上述實施態樣中，可利用樹脂接合層代替金屬接合層40。此情況下，冷卻板30相當於本發明之導電性基材，氣體孔34相當於第2孔。
上述之實施態樣中，絕緣殼60以單一構件構成，但其亦可由複數之構件構成。
上述之實施態樣中，將多孔質栓塞50接合固定於絕緣殼60之內周面，但並未特別限定於此。例如，可將絕緣殼60之內周面與多孔質栓塞50之外周面燒結固定。具體而言，可在兩面中的至少一面塗布助燒結劑並進行燒結，此情況下，可使助燒結劑之組成在界面凝集。
在上述實施態樣中，例示靜電電極作為陶瓷板20中內建之電極22，但並未特別限定於此。例如，可替代電極22或額外地在陶瓷板20中內建加熱器電極(阻抗發熱體)。
本發明主張2021年12月27日提出申請之日本專利申請第2021－211864號案之優先權，並以引用形式將其全部內容包含於本說明書。
10:半導體製造裝置用構件 20:陶瓷板 21:晶圓載置面 21a:密封帶 21b:圓形小突起 21c:基準面 22:電極 24:第1孔 24a:第1孔上部 24b:第1孔下部 24c:段差部 30:冷卻板 32:冷媒流路 34:氣體孔 40:金屬接合層 40a:頂面 42:貫通孔 50:多孔質栓塞 50a:頂面 50b:底面 60:絕緣殼 60a:頂面 60b:底面 61:絕緣殼上部 62:絕緣殼下部 63:肩部 64:有底孔 65:底部 66:細孔 70:接合層 71:上部接合層 72:下部接合層 80:絕緣杯體 85:底部 86:貫通孔 90:金屬接合材 92:預備孔 94:接合體 150:多孔質栓塞 150a:頂面 161:上方構件 161a:上部 161b:下部 161c:肩部 161d:頂面 161e:底面 162:下方構件 164:有底孔 165:底部 166:細孔 170:接合層 As1:一體化構件 As2:一體化構件 W:晶圓
圖1係半導體製造裝置用構件10之縱剖面圖。 圖2係陶瓷板20之俯視圖。 圖3係圖1之部分放大圖。 圖4A~D係一體化構件As1之製造步驟圖。 圖5A~C係半導體製造裝置用構件10之製造步驟圖。 圖6係表示一體化構件As2及其周邊之部分放大圖。
10:半導體製造裝置用構件
20:陶瓷板
21:晶圓載置面
22:電極
24:第1孔
30:冷卻板
32:冷媒流路
34:氣體孔
40:金屬接合層
42:貫通孔
50:多孔質栓塞
60:絕緣殼
64:有底孔
70:接合層
As1:一體化構件
W:晶圓

Claims (6)

  1. 一種半導體製造裝置用構件，包含： 陶瓷板，於頂面具有晶圓載置面； 導電性基材，設於該陶瓷板之底面； 第1孔，在上下方向貫通該陶瓷板； 第2孔，在上下方向貫通該導電性基材，並連通於該第1孔； 絕緣殼，具有在底面開口之有底孔，並配置於該第1孔及該第2孔，且為緻密材質； 複數之細孔，在上下方向貫通該有底孔之底部；以及， 多孔質栓塞，配置於該有底孔並與該底部相接。
  2. 如請求項1所述之半導體製造裝置用構件，其中， 該晶圓載置面，具有支撐晶圓之多個小突起； 該絕緣殼之頂面，與該晶圓載置面之中未設置該小突起之基準面為相同高度； 該細孔之上下方向的長度係0.01mm以上、0.5mm以下。
  3. 如請求項1或2所述之半導體製造裝置用構件，其中， 該第1孔，具有細直徑之第1孔上部、粗直徑之第1孔下部，以及形成該第1孔上部與該第1孔下部之交界之段差部； 該絕緣殼，具有插入該第1孔上部之細直徑之絕緣殼上部、插入該第1孔下部之粗直徑之絕緣殼下部，以及形成該絕緣殼上部與該絕緣殼下部之交界並抵接該段差部之肩部。
  4. 如請求項1或2所述之半導體製造裝置用構件，其中， 該細孔為直徑0.1mm以上、0.5mm以下，並在該絕緣殼之該底部設置10個以上。
  5. 如請求項1或2所述之半導體製造裝置用構件，其中， 該多孔質栓塞之底面位於該導電性基材之該第2孔之內部。
  6. 如請求項1或2所述之半導體製造裝置用構件，其中， 該絕緣殼，係將上方構件與下方構件一體化而成； 該上方構件之上下方向之長度比該陶瓷板之上下方向之長度短； 該多孔質栓塞之底面，位於與該上方構件之底面相同之高度或在其之上。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190284100A1 (en) * 2016-07-20 2019-09-19 Ngk Spark Plug Co., Ltd Method for producing semiconductor production device component, and semiconductor production device component
US20200227291A1 (en) * 2018-09-28 2020-07-16 Ngk Insulators, Ltd. Member for semiconductor manufacturing apparatus
CN112970091A (zh) * 2018-11-01 2021-06-15 朗姆研究公司 具有防止氦孔洞点火/发弧的特征的高功率静电卡盘

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Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190284100A1 (en) * 2016-07-20 2019-09-19 Ngk Spark Plug Co., Ltd Method for producing semiconductor production device component, and semiconductor production device component
US20200227291A1 (en) * 2018-09-28 2020-07-16 Ngk Insulators, Ltd. Member for semiconductor manufacturing apparatus
CN112970091A (zh) * 2018-11-01 2021-06-15 朗姆研究公司 具有防止氦孔洞点火/发弧的特征的高功率静电卡盘

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