TWI821218B - 層堆疊 - Google Patents

層堆疊 Download PDF

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TWI821218B
TWI821218B TW107142067A TW107142067A TWI821218B TW I821218 B TWI821218 B TW I821218B TW 107142067 A TW107142067 A TW 107142067A TW 107142067 A TW107142067 A TW 107142067A TW I821218 B TWI821218 B TW I821218B
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layer
gate insulating
angstroms
dielectric
insulating layer
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TW201937742A (zh
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翟羽佳
芮祥新
趙來
任東吉
壽永 崔
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美商應用材料股份有限公司
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Abstract

本揭露的實施例一般是有關於一層堆疊，此層堆疊包括 一介電層，此介電層具有高介電常數值，且能夠改善半導體顯示裝置的電子性能。在一實施例中，此層堆疊包括一基材、一通道層設置在此基材上、及一閘極絕緣層。此閘極絕緣層包括一中間層設置在此通道層上、及一二氧化鋯層設置在中間層上。此閘極絕緣層具有一介電常數值，此介電常數值的範圍在大約20至大約50之間。閘極絕緣層的高介電常數值減少了導致較高的能量障壁(energy barrier)的次臨限擺動(subthreshold swing,SS)，這緩解了顯示裝置中的短通道效應(short channel effect)及漏電流(leakage)。另外，閘極絕緣層的高介電常數值層允許較快的驅動電流，從而改善顯示裝置的亮度及性能。

Description

層堆疊
本揭露的實施例一般是有關於用於顯示裝置的一層堆疊，此層堆疊包括具有高介電常數值(high-k value)的一介電層。
顯示裝置已被廣泛地用於各種電子應用，例如是電視、監視器、行動電話、MP3撥放器、電子書閱讀器、個人數位助理(PDAs)、及其類似物。這些顯示裝置利用積體電路製造，積體電路在單一晶片上可包括數百萬個電晶體、電容器、及電阻器。晶片設計的演化，不斷地需要更快的電路及更大的電路密度。具有更大的電路密度的更快的電路的需求，促使用於構成這種積體電路的材料的對應的需求。特別是，隨著積體電路部件的尺寸被減少至亞微米尺寸(sub-micron scale)，現在必須利用低電阻率導電材料及高介電常數絕緣材料，以從這些部件獲得合適的電子性能。
減少部件尺寸的需求導致漏電流及短通道效應(DIBL)的問題。為了克服漏電流及短通道效應問題，所形成的用於顯示裝置的薄膜電晶體(TFTs)必須具有高電容。藉由改變介電材料及/或介電層的尺寸，可調整此電容。舉例來說，當使用具有 高介電常數值的材料來代替介電層時，薄膜電晶體的電容也將增加，如公式Cox=A(k．E0/tox)所記載。然而，將材料改變成具有高介電常數值的材料，可導致通道區域及介電層之間的介面問題，使得裝置完全失效。
因此，需要具有高介電常數值，且能夠改善半導體顯示裝置的電子性能的介電層。
本揭露的實施例一般是有關於一層堆疊，此層堆疊包括一介電層，此介電層具有高介電常數值，且能夠改善半導體顯示裝置的電子性能。在一實施例中，此層堆疊包括一基材、一通道層設置在此基材上、及一閘極絕緣層。此閘極絕緣層包括一中間層設置在此通道層上、及一二氧化鋯層設置在中間層上。此閘極絕緣層具有一介電常數值，此介電常數值的範圍在大約20至大約50之間。
在另一實施例中，一層堆疊包括一基材、一通道層設置在此基材上、及一閘極絕緣層設置在此通道層上。此閘極絕緣層包括一第一中間層、一第二中間層、及一二氧化鋯層，此二氧化鋯層位於此第一中間層及此第二中間層之間。此閘極絕緣層具有一介電常數值，此介電常數值的範圍在大約20至大約50之間。
在另一實施例中，一層堆疊包括一非晶矽層、及一閘極絕緣層設置在此非晶矽層上。此閘極絕緣層包括一二氧化矽層設置在此非晶矽層上、及一二氧化鋯層設置在此二氧化矽層上。此閘極絕緣層具有一介電常數值，此介電常數值的範圍在大約20至大約50之間。
100:腔室
102:基材
104:底部
106:處理空間
108:狹縫閥開口
109:真空幫浦
110:氣體分佈板
111:孔
112:蓋
114:懸吊架
116:中心支撐件
118:較上表面
120:氣源
122:電源
124:遠端電漿源
130:基材支撐組件
131:接地片
132:基材接收表面
133:遮蔽框架
134:桿
136:升降系統
138:升舉銷
139:加熱及/或冷卻元件
142:壁
150:下游表面
200:層堆疊
204:通道層
206:閘極絕緣層
208:金屬層
210A:中間層
210B:高介電常數介電層
300:層堆疊
306:閘極絕緣層
310A:第一中間層
310B:高介電常數介電層
310C:第二中間層
為了能夠理解本揭露上述特徵的細節，可參照實施例，得到對於簡單總括於上之本揭露更詳細的敘述，實施例的一部分係繪示於所附圖式中。然而需注意，所附的圖式僅繪示出本揭露的典型實施例，因此其並不會被認為對本揭露的範圍造成限制，因為本揭露可允許其他等效的實施例。
第1圖係一處理腔室的截面視圖，根據本揭露的一實施例，此處理腔室可用於沉積一閘極絕緣層。
第2圖係根據本揭露的一實施例，一層堆疊的截面視圖。
第3圖係根據本揭露的一實施例，一層堆疊的截面視圖。
為使其容易理解，已盡可能地採用一致的元件符號，來標記圖中所共有的相同元件。可預期的是，揭露於一實施例的元件可以有利地適用於其他實施例中，而不再次闡述。
本揭露的實施例一般是有關於一層堆疊，此層堆疊包括一閘極絕緣層，此閘極絕緣層具有高介電常數值，且能夠改善半導體顯示裝置的電子性能。此高介電常數絕緣層具有20或更高的介電常數值，且此高介電常數絕緣層可被形成為顯示裝置中的薄膜電晶體、閘極絕緣層、或其他合適的絕緣層的一部分。此層堆疊包括一基材、一通道層設置在此基材上、及一閘極絕緣層。此閘極絕緣層包括一中間層設置在此通道層上、及一高介電常數介電層設置在中間層上。此閘極絕緣層具有一介電常數值，此介電常數值的範圍在大約20至大約50之間。閘極絕緣層的高介電常數值減少了導致較高的能量障壁的次臨限擺動，這緩解了顯示 裝置中的短通道效應及漏電流。另外，閘極絕緣層的高介電常數值層允許較快的驅動電流，從而改善顯示裝置的亮度及性能。
此處使用的「在...上(over)」、「在...下(under)」、「在...之間(between)」及「在...上(on)」是指一個層與其他層的相對位置。如此，舉例來說，設置在另一層上或下的一個層，可以是直接接觸另一層，或可具有一或多個中間層。此外，設置在多個層之間的一個層可以是直接接觸兩個層，或是可具有一或多個中間層。相反地，在第二層「上」的第一層，是與第二層接觸。另外，假設在不考慮基材的絕對方向的情況下相對於基材進行操作，提供一個層與其他層的相對位置。
第1圖係化學氣相沉積(chemical vapor deposition,CVD)處理腔室100的一實施例的截面示意圖，其中可沉積用於顯示裝置結構的高介電常數介電層，例如是二氧化鋯(ZrO2)層。一個合適的化學氣相沉積處理腔室，例如是電漿輔助化學氣相沈積(plasma enhanced chemical vapor deposition,PECVD)處理腔室，可從位於加利福尼亞州聖克拉拉的應用材料公司(Applied Materials)獲得。可預期的是，可利用其他沉積腔室，包括來自其他製造商的沉積腔室，來實施本揭露。
腔室100一般包括一或多個壁142、底部104、及蓋112，上述之壁142、底部104、及蓋112限定處理空間106。氣體分佈板110及基材支撐組件130係設置在處理空間106中。穿過壁142形成狹縫閥開孔108，通過此狹縫閥開口108進入處理空間106，使得基材102可被傳輸進及出腔室100。
基材支撐組件130包括基材接收表面132，基材接 收表面132用於支撐基材102。桿134連接基材支撐組件130至升降系統136，升降系統136在基材傳輸位置及基材處理位置之間升高及降低基材支撐組件130。在處理過程中，遮蔽框架133係可選擇地放置在基材102周圍，以避免基材102邊緣上的沉積。升舉銷138係可移動地設置穿過基材支撐組件130，且適於將基材102及基材接收表面132隔開。基材支撐組件130也可包括利用加熱及/或冷卻元件139，以使基材支撐組件130維持在預定溫度。基材支撐組件130也可包括接地片131，用以在基材支撐組件130周圍提供射頻回程路徑(RF return path)。
氣體分佈板110藉由懸吊架114連接至其周圍的腔室100的蓋112或壁142。氣體分佈板110也藉由一或多個中心支撐件116連接至蓋112，用以幫助避免氣體分佈板110的下垂及/或用以控制氣體分佈板110的直度/曲率。可預期的是，可不利用一或多個中心支撐件116。氣體分佈板110可具有不同尺寸的不同配置。氣體分佈板110具有下游表面150，下游表面150具有複數個孔111形成於其中，且下游表面150面向設置於基材支撐組件130上的基材102的較上表面118。孔111在氣體分佈板110上可具有不同形狀、數量、密度、尺寸、及分佈。在一實施例中，可選擇孔111的直徑為大約0.01英寸至大約1英寸之間。
氣源120係連接至蓋112，以提供氣體通過蓋112，接著通過形成於氣體分佈板110中的孔111，至處理空間106。真空幫浦109係連接至腔室100，以使處理空間106中的氣體維持在預定壓力。
射頻電源122係連接至蓋112及/或至氣體分佈板 110以提供射頻功率(RF power)，射頻功率在氣體分佈板110及基材支撐組件130之間產生電場，使得可由氣體分佈板110及基材支撐組件130之間存在的氣體產生電漿。可以在各種射頻頻率下施加射頻功率。舉例來說，可在大約0.3兆赫(MHz)至大約200MHz之間的頻率下施加射頻功率。在一實施例中，在13.56MHz的頻率下提供射頻功率。
遠端電漿源124，例如是感應耦合遠端電漿源，係連接至氣源120及氣體分佈板110之間。在多個基材的處理之間，可在遠端電漿源124中將清潔氣體(cleaning gas)通電，以遠端地提供用於清潔腔室部件的電漿。藉由電源122提供給氣體分佈板110的射頻功率，進入處理空間106的清潔氣體可進一步被激發。合適的清潔氣體包括但不限於三氟化氮(NF3)、氟氣(F2)、及六氟化硫(SF6)。
在一實施例中，可在腔室100中被處理的基材102，可具有10000平方公分或更多的表面積，例如是25000平方公分或更多的表面積，例如是55000平方公分或更多的表面積。應理解的是，在處理後，基材可被切割以形成較小的其他裝置。在一實施例中，可設置加熱及/或冷卻元件139，以在沉積過程中提供基材支撐組件大約攝氏600度或更少的溫度，例如是在大約攝氏100度至大約攝氏500度之間，或是在大約攝氏200度至大約攝氏500度之間，例如是在大約攝氏300度至大約是攝氏500度之間。
第2圖是根據本揭露的一實施例的層堆疊200的截面視圖。層堆疊200包括基材102、通道層204、閘極絕緣層206、 及金屬層208。基材102可以是由矽酸鹽玻璃(silicate glass)構成。通道層204可以是由非晶矽、低溫多晶矽(low-temperature polycrystalline silicon,LTPS)、或其他金屬氧化物半導體材料所構成。金屬層208可以是由鋁、鈦、銅、或其他合適的金屬所構成。在第2圖的實施例中，通道層204是在基材102及頂閘極結構中的閘極絕緣層206之間。閘極絕緣層206是在金屬層208及通道層204之間。可想像的是，此處所述的實施例也可被用於底閘極結構。
在第2圖所述的實施方式中，閘極絕緣層206具有兩個層。在第3圖的實施例中(更多細節如下所述)，閘極絕緣層306具有三個層，第一中間層310A、高介電常數介電層310B、及第二中間層310C。同時，閘極絕緣層顯示為具有兩個層、更多層是有可能的。舉例來說，閘極絕緣層可具有中間層210A及高介電常數介電層210B的多個交替的層。在一實施例中，閘極絕緣層具有多於兩個層。在另一實施例中，閘極絕緣層具有多於三個層。
在第2圖的實施例中，閘極絕緣層206具有中間層210A及高介電常數介電層210B。中間層210A係不同於高介電常數介電層210B。在一實施例中，中間層210A具有範圍在大約3至大約5之間的介電常數值。中間層210A可以是由合適的材料所構成，例如是由氧化物所構成，例如是二氧化矽(silicon dioxide,SiO2)、氧化鋁(aluminum oxide,Al2O3)、或二氧化鈦(titanium dioxide,TiO2)所構成。中間層210A具有範圍在大約2埃(Angstroms)至大約100埃之間的厚度。在一實施例中，中間層210A係在化學氣相沈積腔室中沉積，化學氣相沈積腔室例如是電 漿輔助化學氣相沈積腔室，例如是第1圖所示的腔室100。
在一實施例中，形成於中間層210A上的高介電常數介電層210B具有範圍在大約20至大約50之間的介電常數值。高介電常數介電層210B係選自以下組成的群組的材料：二氧化鋯(zirconium dioxide,ZrO2)、二氧化鉿(hafnium dioxide,HfO2)、二氧化鈦(titanium dioxide,TiO2)、及氧化鋁(aluminum oxide,Al2O3)。高介電常數介電層210B具有範圍在大約100埃至大約900埃之間的厚度。在一實施例中，高介電常數介電層210B具有範圍在大約250埃至大約600埃之間的厚度。在一實施例中，中間層210A具有100埃的厚度，且高介電常數介電層210B具有600埃的厚度。在一些實施例中，高介電常數介電層210B可在電漿輔助化學氣相沈積腔室中被沉積至基材102上，電漿輔助化學氣相沈積腔室例如是第1圖所示的腔室100。在一實施例中，中間層210A及高介電常數介電層210B在相同的處理腔室中被沉積。
若高介電常數介電層，例如是高介電常數介電層210B，是直接被沉積至通道層204上，則介面會不匹配，其損害顯示裝置的完整性。因此，為了在具有均勻厚度輪廓(uniform thickness profile)的顯示裝置中形成高介電常數介電層，中間層210A係在高介電常數介電層210B及通道層204之間。中間層210A有利地在通道層204及高介電常數介電層210B二者之間具有良好的介面，從而改善黏著力。高介電常數介電層210B有利地具有高介電常數值。高介電常數層可減少導致較高的能量障壁的次臨限擺動，這緩解了顯示裝置中的短通道效應及漏電流。另外， 高介電常數值層可允許較快的驅動電流，從而改善顯示裝置的亮度及性能。
第3圖是根據本揭露的一實施例的層堆疊300的截面視圖。層堆疊300包括基材102、通道層204、閘極絕緣層306、及金屬層208。在一實施例中，通道層204是在基材102及閘極絕緣層306之間。閘極絕緣層306是在金屬層208及通道層204之間。
在第3圖的實施例中，閘極絕緣層306具有第一中間層310A、高介電常數介電層310B、及第二中間層310C。第一中間層310A及第二中間層310C係不同於高介電常數介電層310B。在一實施例中，第一中間層310A具有範圍在大約3至大約5之間的介電常數值。第一中間層310A可以是由合適的材料所構成，例如是由氧化物所構成，例如是二氧化矽、氧化鋁、或二氧化鈦所構成。第一中間層310A具有範圍在大約2埃至大約100埃之間的厚度。在一實施例中，第一中間層310A係在化學氣相沈積腔室中沉積，化學氣相沈積腔室例如是電漿輔助化學氣相沈積腔室，例如是第1圖所示的腔室100。
在一實施例中，第二中間層310C是與第一中間層310A相同的材料。在其他實施例中，第二中間層310C是與第一中間層310A不同的材料。在一實施例中，第二中間層310C具有範圍在大約3至大約5之間的介電常數值。第二中間層310C可以是由合適的材料所構成，例如是由氧化物所構成，例如是二氧化矽、氧化鋁、或二氧化鈦所構成。第二中間層310C具有範圍在大約2埃至大約100埃之間的厚度。在一實施例中，第二中間層310C 係在化學氣相沈積腔室中沉積，化學氣相沈積腔室例如是電漿輔助化學氣相沈積腔室，例如是第1圖所示的腔室100。
在一實施例中，高介電常數介電層310B形成於第一中間層310A及第二中間層310C之間。在一實施例中，第一中間層310A是相鄰於通道層204。在另一實施例中，第二中間層310C是相鄰於通道層204。高介電常數介電層310B具有範圍在大約20至大約50之間的介電常數值。在另一實施例中，高介電常數介電層310B形成於第二中間層310C上。高介電常數介電層310B係選自以下組成的群組的材料：二氧化鋯、二氧化鉿、二氧化鈦、及氧化鋁。高介電常數介電層310B具有範圍在大約100埃至大約900埃之間的厚度。在一實施例中，高介電常數介電層310B具有範圍在大約250埃至大約600埃之間的厚度。在一實施例中，第一中間層310A具有100埃的厚度，高介電常數介電層310B具有600埃的厚度，且第二中間層310C具有100埃的厚度。在一些實施例中，高介電常數介電層310B可在電漿輔助化學氣相沈積腔室中被沉積至基材102上，電漿輔助化學氣相沈積腔室例如是第1圖所示的腔室100。在一實施例中，第一中間層310A、第二中間層310C、及高介電常數介電層310B在相同的處理腔室中被沉積。
藉由將氧化鋯(zirconium oxide)加入多層閘極絕緣層中，可實現較的高介電常數的介電層。包含矽的中間層改善主動通道層(active channel layer)及金屬閘極之間的黏著力及交互作用。氧化鋯介電層增加了閘極絕緣層的介電常數值。閘極絕緣層的高介電常數值減少了導致較高的能量障壁的次臨限擺動，這 緩解了顯示裝置中的短通道效應及漏電流。另外，閘極絕緣層的高介電常數值層允許較快的驅動電流，從而改善顯示裝置的亮度及性能。
雖然上述內容是關於本揭露的實施例，但可在不背離基本範圍的情況下，設計出本揭露的其他和更進一步的實施例，範圍係由下列的申請專利範圍而定。
102:基材
204:通道層
208:金屬層
300:層堆疊
306:閘極絕緣層
310A:第一中間層
310B:高介電常數介電層
310C:第二中間層

Claims (12)

  1. 一層堆疊，包括：一基材；一通道層，設置在該基材上；及一閘極絕緣層，設置在該通道層上，其中該閘極絕緣層包括：一中間層，設置在該通道層上，其中該中間層包括二氧化鈦；及一高介電常數介電層，設置在該中間層上；其中該中間層具有一厚度，該中間層的該厚度範圍在大約2埃至大約100埃之間，該高介電常數介電層具有一厚度，該高介電常數介電層的該厚度的範圍在大約250埃至大約900埃之間，且其中該閘極絕緣層具有一介電常數值，該介電常數值的範圍在大約20至大約50之間。
  2. 如請求項1所述之層堆疊，其中該高介電常數介電層係選自以下組成的群組的一材料：二氧化鋯、二氧化鉿、二氧化鈦、及氧化鋁。
  3. 如請求項1所述之層堆疊，其中該通道層包括非晶矽、低溫多晶矽、或其他金屬氧化物半導體材料。
  4. 如請求項1所述之層堆疊，更包括一金屬層，設置在該閘極絕緣層上。
  5. 一層堆疊，包括：一基材；一通道層，設置在該基材上；及一閘極絕緣層，設置在該通道層上，其中該閘極絕緣層包括： 一第一中間層，其中該第一中間層包括二氧化鈦；一第二中間層；及一高介電常數介電層，在該第一中間層及該第二中間層之間；其中該第一中間層具有一厚度，該第一中間層的該厚度的範圍在大約2埃至大約100埃之間，該高介電常數介電層具有一厚度，該高介電常數介電層的該厚度的範圍在大約250埃至大約900埃之間，且其中該閘極絕緣層具有一介電常數值，該介電常數值的範圍在大約20至大約50之間。
  6. 如請求項5所述之層堆疊，其中該第二中間層包括二氧化鈦、氧化鋁、或二氧化矽。
  7. 如請求項6所述之層堆疊，其中該第一中間層及該第二中間層係不同材料。
  8. 如請求項5所述之層堆疊，其中該高介電常數介電層係選自以下組成的群組的一材料：二氧化鋯、二氧化鉿、二氧化鈦、及氧化鋁。
  9. 如請求項5所述之層堆疊，其中該通道層包括非晶矽、低溫多晶矽、或其他金屬氧化物半導體材料。
  10. 一層堆疊，包括：一非晶矽層；及一閘極絕緣層，設置在該非晶矽層上，其中該閘極絕緣層包括：一二氧化鈦層，設置在該非晶矽層上；及一二氧化鋯層，設置在該二氧化鈦層上； 其中該二氧化鈦層具有一厚度，該二氧化鈦層的該厚度範圍在大約2埃至大約100埃之間，該二氧化鋯層具有一厚度，該二氧化鋯層的該厚度的範圍在大約250埃至大約900埃之間，且其中該閘極絕緣層具有一介電常數值，該介電常數值的範圍在大約20至大約50之間。
  11. 如請求項10所述之層堆疊，更包括一金屬閘極層。
  12. 如請求項11所述之層堆疊，其中該金屬閘極層係設置在該二氧化鋯層的頂端。
TW107142067A 2018-01-04 2018-11-26 層堆疊 TWI821218B (zh)

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