TWI793861B - 電子裝置以及製造電子裝置的方法 - Google Patents
電子裝置以及製造電子裝置的方法 Download PDFInfo
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- TWI793861B TWI793861B TW110142630A TW110142630A TWI793861B TW I793861 B TWI793861 B TW I793861B TW 110142630 A TW110142630 A TW 110142630A TW 110142630 A TW110142630 A TW 110142630A TW I793861 B TWI793861 B TW I793861B
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Abstract
一種電子裝置包括基板、電子元件、第一導電中介層以及第二導電中介層。基板為非平面且包括第一基板接墊以及第二基板接墊。電子元件包括分別對應第一基板接墊以及第二基板接墊的第一元件接墊以及第二元件接墊。當第一元件接墊接觸第一基板接墊時,第二元件接墊與第二基板接墊之間具有高度差。第一導電中介層連接於第一基板接墊以及第一元件接墊之間。第二導電中介層連接於第二基板接墊以及第二元件接墊之間。第一導電中介層與第二導電中介層之間的厚度差介於0.5至1倍的高度差之間。
Description
本揭露是有關於一種電子裝置以及製造電子裝置的方法。
隨著電路變得越來越小,電子元件成份迅速增加,創造新的外形與設計也有其必要性。為了實現這一目標,材料必須變得更智慧且多功能。在某種形式或射出成型的裝置中嵌入電子元件的能力催生了模塑電子(in-mold electronics;IME)技術的興起。
IME是實現先進電路設計與架構的新途徑。透過模塑兩層薄膜成為一種雙面的模塑元件,其中一面用於裝飾薄膜,另一層薄膜電路則模塑至另一面,在兩層薄膜之間通常注入模塑樹脂。這種利用雙層薄膜途徑的模塑電子提供了一種整合重要特性的方法,通常也是利用單層薄膜的應用無法實現或存在挑戰之處。
此外,藉由模塑電子的技術可增加設計的自由度,使印刷電路具有3D變形能力,更具備彎曲性佳及高拉伸性等優點。然而,目前的設置於曲面基板上的電子元件僅具有非常有限的撓曲
性,且電子元件之撓曲可能由於其晶體結構上機械應力不對稱而對效能有負面影響。因此,將實質上為平面的電子元件設置於各種非平面的基板上容易產生應力集中的問題,進而導致電性連接及電氣效能不良,甚至造成電子元件的損壞。
本揭露實施例提供一種電子裝置以及製造電子裝置的方法,其可降低電子元件設置於非平面基板時在接合面上的應力差。
在本揭露的一實施例中,一種電子裝置包括基板、電子元件、第一導電中介層以及第二導電中介層。基板包括非平面的一基板接合面以及設置於接合面上的一第一基板接墊以及一第二基板接墊。電子元件包括一元件接合面以及設置於元件接合面且分別對應第一基板接墊以及第二基板接墊的一第一元件接墊以及一第二元件接墊。當第一元件接墊接觸第一基板接墊時,第二元件接墊與第二基板接墊之間具有一高度差。第一導電中介層連接於第一基板接墊以及第一元件接墊之間。第二導電中介層連接於第二基板接墊以及第二元件接墊之間,其中第一導電中介層與第二導電中介層之間的一厚度差實質上介於0.5至1倍的高度差之間。
在本揭露的一實施例中,一種製造電子裝置的方法包括下列步驟。提供一基板,其中基板包括非平面的一基板接合面以及設置於接合面上的一第一基板接墊以及一第二基板接墊;提供
一電子元件,其中電子元件包括分別對應第一基板接墊以及第二基板接墊的一第一元件接墊以及一第二元件接墊;依據基板的一曲率半徑或電子元件的一長度得到當第一元件接墊接觸第一基板接墊時第二元件接墊與第二基板接墊之間的一高度差;設置一第一導電中介層於第一基板接墊或第一元件接墊上以及設置一第二導電中介層於第二基板接墊或第二元件接墊上,其中第一導電中介層與第二導電中介層之間的一厚度差實質上介於0.5至1倍的高度差之間;以及將電子元件設置於基板上,以使第一元件接墊以及第二元件接墊分別連接第一基板接墊以及第二基板接墊。
100:電子裝置
110:基板
112:基板接合面
114:第一基板接墊
116:第二基板接墊
120:電子元件
122:元件接合面
124:第一元件接墊
126:第二元件接墊
1261:主表面
130:第一導電中介層
140:第二導電中介層
Ah:拱高
L1、L2、L3:長度
R1:曲率半徑
T1、T2、T3:厚度
△h:高度差
S110~S150:步驟
圖1是依照本揭露的一實施例的一種電子裝置的剖面示意圖。
圖2是依照本揭露的一實施例的一種電子裝置的製造流程的示意圖。
圖3是依照本揭露的一實施例的一種電子裝置在製造流程的中間步驟的剖面示意圖。
圖4是依照本揭露的一實施例的不同長度的電子元件設置於基板上的示意圖。
圖5是依照本揭露的一實施例的一種電子裝置的基板的曲率半徑與接墊的高度差之間的關係曲線示意圖。
圖6是依照本揭露的一實施例的一種電子裝置的電子元件的長度與接墊的高度差之間的關係曲線示意圖。
圖7至圖10是依照本揭露的一實施例的一種電子裝置在基板具有不同曲率半徑的條件下,電子元件的長度與接墊的高度差之間的關係曲線示意圖。
圖11是依照本揭露的一實施例的一種電子裝置承受壓力的應力分布示意圖。
圖12是依照本揭露的一實施例的一種電子裝置的基板的拱高與厚度的示意圖。
有關本揭露之前述及其他技術內容、特點與功效,在以下配合參考圖式之各實施例的詳細說明中,將可清楚的呈現。以下實施例中所提到的方向用語,例如:「上」、「下」、「前」、「後」、「左」、「右」等,僅是參考附加圖式的方向。因此,使用的方向用語是用來說明,而並非用來限制本揭露。並且,在下列各實施例中,相同或相似的元件將採用相同或相似的標號。
圖1是依照本揭露的一實施例的一種電子裝置的剖面示意圖。圖2是依照本揭露的一實施例的一種電子裝置的製造流程的示意圖。請同時參照圖1及圖2,在本實施例中,電子裝置100可如圖1所示包括基板110、電子元件120、第一導電中介層130以及第二導電中介層140。本實施例的電子裝置100的製造方法可
包括下列步驟。在一實施例中,執行步驟S110,提供一基板110。在某些實施例中,基板110可包括絕緣基材以及設置於絕緣基材上的導電材料,其中,基板110的絕緣基材可包括聚對苯二甲酸乙二酯(Polyethylene terephthalate,PET)、聚對苯二甲酸乙二酯-1,4環己烷二甲醇酯(Poly(ethylene terephthalateco-1,4-cylclohexylenedimethylene terephthalate),PETG)、聚碳酸酯(Polycarbonate,PC)、聚醯亞胺(Polyimide,PI)、聚甲基丙烯酸甲酯(Poly(methyl methacrylate),PMMA)、聚醚(Polyethersulfone,PES),聚二甲基矽氧烷(Polydimethylsiloxane,PDMS),壓克力(Acrylic)、其任意組合或其他適合的絕緣基材。在一實施例中,基板110可透過例如模塑電子(in-mold electronics,IME)技術而形成。具體而言,模塑電子技術可以在射出成型等裝置中嵌入電子元件,以透過模塑兩層薄膜成為一種雙面的模塑元件,其中一面用於裝飾薄膜,另一層薄膜電路則模塑至另一面,在兩層薄膜之間通常注入模塑樹脂。在這種結構中,包括印刷感測器、電阻以及其他所需元件的電路可與絕緣基材共同形成一個功能完整的獨立元件(電路基板),並以模塑樹脂密合封裝。利用這種作法,基板110可以輕易被形成為多邊形(例如三角形、矩形、或五邊形)、弧形、圓形或具有彎曲邊緣的形狀的結構。
在某些實施例中,基板110為非平面基板。本實施例中,基板110為曲面基板,換句話說,基板110包括用以與電子元件
120接合的基板接合面112,且此基板接合面112為非平面。在一實施例中,基板接合面112的曲率不為零,也就是基板接合面112為一曲面。在本實施例中,基板110包括多個基板接墊,其中,基板接墊包括第一基板接墊114以及第二基板接墊116。當然,本揭露並不限制基板接合面112上的基板接墊的數量。在一實施例中,第一基板接墊114以及第二基板接墊116的材料可包括金、銀、銅、鋁、鎳、錫、其合金或其任意組合。在本實施例中,第一基板接墊114以及第二基板接墊116的材料可為銀,但不以此為限。在一實施例中,基板110的曲率半徑R1實質上介於20至100mm之間,基板110的厚度實質上介於0.1mm至5mm之間,並且,基板110的楊氏係數實質上可介於0.5GPa至20GPa之間。當然,本揭露並不限於此。
在一實施例中,執行步驟S120,提供一電子元件120,其中,電子元件120可為發光二極體、晶片或是其他各種適於設置於基板110上的電子元件120。在本實施例中,電子元件120可包括用以與基板110接合的元件接合面122以及多個元件接墊。在一實施例中,多個元件接墊可設置於元件接合面122上,其中,元件接墊包括第一元件接墊124以及第二元件接墊126。並且,第一元件接墊124以及第二元件接墊126分別面向且對應第一基板接墊114以及第二基板接墊116,以在電子元件120設置於基板110上時與第一基板接墊114以及第二基板接墊116形成電性連接。當然,本揭露並不限制元件接合面122上的元件接墊的數量。
在一實施例中,第一元件接墊124以及第二元件接墊126的材料可包括金、銀、銅、鋁、鎳、錫、其合金或其任意組合。在本實施例中,電子元件120的元件接合面122為一平面,也就是說,元件接合面122的曲率實質上為零。換句話說,在本實施例中,元件接合面122實質上為平面的電子元件120是設置於非平面(例如曲面)的基板110上。因此,欲接合的電子元件120與基板110之間的接合面並非共形(conformal)而會具有一高度差(如圖3所示的高度差△h)。
圖3是依照本揭露的一實施例的一種電子裝置在製造流程的中間步驟的剖面示意圖。請同時參照圖1至圖3,接著,執行步驟S130,依據基板110的曲率半徑R1或電子元件120的長度L1得到當第一元件接墊124接觸第一基板接墊114時第二元件接墊126與第二基板接墊116之間的高度差△h。詳細而言,在本實施例中,由於電子元件120與基板110之間的接合面並非共形(例如基板接合面112為曲面,而元件接合面122為平面),因此,當第一元件接墊124接觸第一基板接墊114時,第二元件接墊126與第二基板接墊116之間具有高度差△h。具體而言,高度差△h為在第二元件接墊126的主表面1261的法線方向上,第二元件接墊126至第二基板接墊116的距離。此高度差△h會導致利用拾取與放置(pick and place)裝置施加壓力以將電子元件120設置(壓合)於基板110上時,第一基板接墊114與第一元件接墊124之間的接合面應力以及第二基板接墊116與第二元件接墊126之間
的接合面應力會產生較大的差異(應力差),因而可能導致基板110與電子元件120之間的電性連接及電氣效能不良,甚至造成電子元件120的損壞(例如變形或開裂等)。
圖4是依照本揭露的一實施例的不同長度的電子元件設置於基板上的示意圖。請參照圖4,在本實施例中,第一元件接墊124以及第二元件接墊126可分別為多個元件接墊中在長度方向上相距最遠的其中兩個。因此,第二元件接墊126與第二基板接墊116之間的高度差△h可視為多個元件接墊與多個基板接墊之間最大的高度差。因此,為了控制電子元件120與基板110的接合面應力差,需先計算出第二元件接墊126與第二基板接墊116之間的高度差△h,而此高度差△h與基板110的曲率半徑R1或電子元件120的長度L1相關聯。在本實施例中,可基於大數據及多元回歸分析方法對基板110的曲率半徑R1/電子元件120的長度L1與接墊116、126的高度差△h之間的對應關係進行分析。
詳細而言,可將第二元件接墊126與第二基板接墊116之間的高度差△h作為因變數,將基板110的曲率半徑R1以及對應的電子元件120的長度L1作為引數,構建多元回歸模型(對應關係式),之後再基於多次試驗的大數據(多個基板具有不同的曲率半徑及/或多個電子元件具有不同的長度),計算出所述多元回歸模型中的係數(例如固定係數及權重係數等),再將計算出的所述係數代入所述多元回歸模型中,得到接墊126、116之間的高度差△h的修正模型。如此便可將基板110的實際曲率半徑R1及/或電
子元件120的實際長度L1代入此對應關係式而得到預測的高度差△h。
圖5是依照本揭露的一實施例的一種電子裝置的基板的曲率半徑與接墊的高度差之間的關係曲線示意圖。請參照圖3及圖5,舉例而言,在本實施例中,在電子元件120具有特定(相同)長度L1的條件下,將第二元件接墊126與第二基板接墊116之間的高度差△h作為因變數,將基板110的不同曲率半徑作為引數,構建多元回歸模型,再基於多次試驗的大數據(多個基板具有不同的曲率半徑),計算出所述多元回歸模型中的係數(例如固定係數及權重係數等),以得到基板110的不同曲率半徑與高度差△h之間的對應關係式。在本實施例中,基板110的曲率半徑R1與接墊116、126的高度差△h之間的對應關係式如下:y=1E-0.6x2-0.0006x+0.0694
其中,y即代表第二元件接墊126與第二基板接墊116之間的高度差△h,而x則代表基板110的曲率半徑。
如此,便可得到第二元件接墊126與第二基板接墊116之間的高度差△h的修正模型(繪示為圖5中的虛線)。之後再將基板110的曲率半徑R1代入此對應關係式,即可得到預測的第二元件接墊126與第二基板接墊116之間的高度差△h。
圖6是依照本揭露的一實施例的一種電子裝置的電子元件的長度與接墊的高度差之間的關係曲線示意圖。請參照圖4及圖6,在另一實施例中,在基板110具有特定(相同)曲率R1的
條件下,將第二元件接墊126與第二基板接墊116之間的高度差△h作為因變數,將電子元件120的不同長度(例如長度L1、L2、L3)作為引數,構建多元回歸模型,再基於多次試驗的大數據(多個電子元件120具有不同的長度),計算出所述多元回歸模型中的係數(例如固定係數及權重係數等),以得到電子元件120的不同長度與高度差△h之間的對應關係式。在本實施例中,電子元件120的不同長度與接墊116、126的高度差△h之間的對應關係式如下:y=0.063x2-0.1065x+0.0692
其中,y即代表第二元件接墊126與第二基板接墊116之間的高度差△h,而x則代表電子元件120的長度。
如此,便可得到第二元件接墊126與第二基板接墊116之間的高度差△h的修正模型(繪示為圖6中的虛線)。之後再將電子元件120的長度L1代入此對應關係式,即可得到預測的第二元件接墊126與第二基板接墊116之間的高度差△h。
圖7至圖10是依照本揭露的一實施例的一種電子裝置在基板具有不同曲率半徑的條件下,電子元件的長度與接墊的高度差之間的關係曲線示意圖。在另一實施例中,圖7至圖10分別繪示了在基板110具有不同曲率半徑(例如圖7的基板110的曲率半徑為20mm、圖8的基板110的曲率半徑為40mm、圖9的基板110的曲率半徑為60mm以及圖10的基板110的曲率半徑為80mm)的條件下,將第二元件接墊126與第二基板接墊116之間的高度差△h作為因變數,將電子元件120的不同長度作為引數,
構建多元回歸模型,再基於多次試驗的大數據(多個基板110具有不同的曲率半徑及多個電子元件120具有不同的長度),計算出所述多元回歸模型中的係數(例如固定係數及權重係數等),以分別得到在基板110具有不同曲率半徑的條件下電子元件120的長度與接墊116、126的高度差△h之間的對應關係式。
具體而言,在圖7的實施例中,在基板110的曲率半徑為20mm的條件下,電子元件120的不同長度與接墊116、126的高度差△h之間的對應關係式如下:y=0.063x2-0.1065x+0.0692
其中,y即代表第二元件接墊126與第二基板接墊116之間的高度差△h,而x則代表電子元件120的長度。
在圖8的實施例中,在基板110的曲率半徑為40mm的條件下,電子元件120的不同長度與接墊116、126的高度差△h之間的對應關係式如下:y=0.0406x2-0.1213x+0.1301
其中,y即代表第二元件接墊126與第二基板接墊116之間的高度差△h,而x則代表電子元件120的長度。
在圖9的實施例中,在基板110的曲率半徑為60mm的條件下,電子元件120的不同長度與接墊116、126的高度差△h之間的對應關係式如下:y=0.0224x2-0.043x+0.0465
其中,y即代表第二元件接墊126與第二基板接墊116之
間的高度差△h,而x則代表電子元件120的長度。
在圖10的實施例中,在基板110的曲率半徑為80mm的條件下,電子元件120的不同長度與接墊116、126的高度差△h之間的對應關係式如下:y=0.0219x2-0.0447x+0.0454
其中,y即代表第二元件接墊126與第二基板接墊116之間的高度差△h,而x則代表電子元件120的長度。
之後,再將基板110的曲率半徑R1以及電子元件120的長度L1代入符合條件的對應關係式,即可得到預測的第二元件接墊126與第二基板接墊116之間的高度差△h。
請接續參照圖1及圖2,依據上述的方法使用多元回歸分析得到接墊116、126之間的高度差△h之後,便可利用設置於基板接墊114、116以及元件接墊124、126之間的導電中介層130、140來補償接墊116、126之間的高度差△h。具體而言,可接續執行步驟S140,設置第一導電中介層130於第一基板接墊114或第一元件接墊124上,並且設置第二導電中介層140於第二基板接墊116或第二元件接墊126上,並使第二導電中介層140的厚度T2實質上大於第一導電中介層130的厚度T1,以利用厚度T2較大的第二導電中介層140來補償接墊116、126之間的高度差△h。在一實施例中,在一實施例中,第一導電中介層130及第二導電中介層140的材料可包括金、銀、銅、鋁、鎳、錫、其合金或其任意組合,在另一實施例中,第一導電中介層130及第二導電中
介層140的材料可包括PEDOT、石墨烯、氧化銦錫(ITO)或其任意組合。在一實施例中,設置第一導電中介層130以及第二導電中介層140的方法包括點膠。當然,本揭露並不以此為限。
經由大數據的應力模擬分析可得知,當第一導電中介層130與第二導電中介層140之間的厚度差(T2-T1)約介於0.5至1倍的高度差△h之間時,可使接墊之間的接合面應力的差異小於10%,符合產品良率的須求。因此,在本實施例中,第一導電中介層130與第二導電中介層140之間的厚度差(T2-T1)設計為介於0.5至1倍的高度差△h之間,在這樣的配置下,第一基板接墊114與第一元件接墊124之間具有第一接合面應力,第二基板接墊116與第二元件接墊126之間具有第二接合面應力,且第一接合面應力以及第二接合面應力之間的差異小於10%。更進一步而言,第一導電中介層130與第二導電中介層140之間的厚度差(T2-T1)可設置成約為2/3倍的高度差△h,在這樣的配置下,經應力模擬分析可發現,除了可使第一接合面應力以及第二接合面應力之間的差異小於10%以外,第一接合面應力以及第二接合面應力的數值也明顯下降。
其中,第一欄的數據代表的是電子元件120的尺寸,第二欄的數據代表的是基板110的曲率半徑,第三欄的數據代表的是第一導電中介層130與第二導電中介層140之間的厚度差(T2-T1)的範圍(即0.5△h至1△h),第四欄的數據代表的是最終選擇的第一導電中介層130與第二導電中介層140之間的厚度差(T2-T1)(即2/3△h),第五欄則是呈現基板110的曲率半徑與接
墊116、126之間的高度差△h的對應關係式。
圖11是依照本揭露的一實施例的一種電子裝置承受壓力的應力分布示意圖。請參照圖1及圖11,之後,再執行步驟S150,將電子元件120設置於基板110上,以使第一元件接墊124以及第二元件接墊126分別經由第一導電中介層130及第二導電中介層140而連接至第一基板接墊114以及第二基板接墊116。在本實施例中,電子元件120可例如利用拾取與放置(pick and place)裝置來拾取並放置於基板110上,並透過此裝置的吸嘴對電子元件120施加一壓力,以將電子元件120壓合於基板110上。透過厚度不同的第一導電中介層130及第二導電中介層140(例如厚度差(T2-T1)為2/3△h)來補償接墊116、126之間的高度差△h,可使第一基板接墊114與第一元件接墊124之間的第一接合面應力以及第二基板接墊116與第二元件接墊126之間的第二接合面應力的差異小於10%。
舉例而言,圖11為表1中基板110的曲率半徑R1為40mm的實施例的應力模擬分析示意圖,由圖11可知,將電子元件120與基板110經壓合後,第一基板接墊114與第一元件接墊124之間的第一接合面應力約為11.129MPa,而第二基板接墊116與第二元件接墊126之間的第二接合面應力約為12.613MPa,由此可知,第一接合面應力與第二接合面應力之間的差異確實小於10%。因此,本揭露實施例的電子裝置100可有效提升電子元件120與基板110之間的電性連接良率及電氣效能,更可提升電子裝置100
的可靠度。
圖12是依照本揭露的一實施例的一種電子裝置的基板的拱高與厚度的示意圖。如前述實施例,基板的厚度介於0.1mm至5mm之間,基板的楊式係數介於0.5GPa至20GPa之間。請參照圖12,在某些實施例中,基板110也可經過特殊的設計以進一步降低電子元件120與基板110之間的接合面應力。具體而言,可透過控制基板110的厚度T3與基板110的拱高Ah之間的比值來調整電子元件120與基板110之間的接合面應力。一般而言,拱高Ah是指鋼板彈簧中主彈簧片與簧眼中心線之間的垂直距離。在曲面的基板110中,基板110在某點的拱高Ah可代表基板110在該點的彎曲程度及凸凹性的反映。
舉例來說,下表3列出了電子裝置在基板110具有不同厚度與不同拱高Ah的條件下,電子元件120與基板110之間的接合面應力值。
由表3可知,當基板110的厚度T3與基板110的拱高Ah之間的比值約為等於0.025時,電子元件120與基板110之間的接合面應力大幅下降至3MPa,因此,在本實施例中,電子裝置可透過將基板110的厚度T3與基板110的拱高Ah之間的比值設計為大於或實質上等於0.025,以將電子元件120與基板110之間的接合面應力降低至可接受的範圍。
綜上所述,本揭露實施例的電子裝置及其製造方法是將電子元件設置於非平面的基板上,並利用設置於基板接墊以及元件接墊之間的導電中介層的厚度差來補償基板接墊以及元件接墊之間的高度差,以降低電子元件與基板的接合面應力之間的差異。基板接墊以及元件接墊之間的高度差可依據基板的曲率半徑或電子元件的長度而得到,而對應的導電中介層之間的厚度差實質上介於0.5至1倍的所述高度差之間。在這樣的配置下,電子元件與基板的接合面應力之間的差異可小於10%,因而能有效提升電子元件與基板之間的電性連接良率及電氣效能,更可提升電子裝置的可靠度。
100:電子裝置
110:基板
112:基板接合面
114:第一基板接墊
116:第二基板接墊
120:電子元件
122:元件接合面
124:第一元件接墊
126:第二元件接墊
1261:主表面
130:第一導電中介層
140:第二導電中介層
L1:長度
R1:曲率半徑
T1、T2:厚度
Claims (16)
- 一種電子裝置,包括:一基板,包括非平面的一基板接合面以及設置於該基板接合面上的一第一基板接墊以及一第二基板接墊;一電子元件,包括一元件接合面以及設置於該元件接合面且分別對應該第一基板接墊以及該第二基板接墊的一第一元件接墊以及一第二元件接墊;一第一導電中介層,連接於該第一基板接墊以及該第一元件接墊之間,其中在設置該第一導電中介層之前,當該第一元件接墊與該第一基板接墊接觸時該第二元件接墊與該第二基板接墊之間具有一高度差,該高度差關聯於該基板的一曲率半徑或該電子元件的一長度;以及一第二導電中介層,連接於該第二基板接墊以及該第二元件接墊之間,其中該第一導電中介層與該第二導電中介層之間的一厚度差介於0.5至1倍的該高度差之間。
- 如請求項1所述的電子裝置,其中該厚度差為2/3倍的該高度差。
- 如請求項1所述的電子裝置,其中該元件接合面為一平面。
- 如請求項1所述的電子裝置,其中該電子元件包括多個元件接墊,該第一元件接墊以及該第二元件接墊分別為該多個元件接墊中在長度方向上相距最遠的其中兩個。
- 如請求項1所述的電子裝置,其中該高度差為在該第二元件接墊的一主表面的一法線方向上,該第二元件接墊至該第二基板接墊的距離。
- 如請求項1所述的電子裝置,其中該基板的材料包括聚對苯二甲酸乙二酯(Polyethylene terephthalate,PET)、PETG、聚碳酸酯(Polycarbonate,PC)、聚醯亞胺(Polyimide,PI)、聚甲基丙烯酸甲酯(Poly(methyl methacrylate),PMMA)、聚醚(Polyethersulfone,PES),聚二甲基矽氧烷(Polydimethylsiloxane,PDMS),壓克力(Acrylic)或其任意組合。
- 如請求項1所述的電子裝置,其中該第一導電中介層及該第二導電中介層的材料包括金、銀、銅、鋁、鎳、錫、其合金或其任意組合。
- 如請求項1所述的電子裝置,其中該第一基板接墊與該第一元件接墊之間具有一第一接合面應力以及該第二基板接墊與該第二元件接墊之間具有一第二接合面應力,且該第一接合面應力以及該第二接合面應力之間的差異小於10%。
- 如請求項1所述的電子裝置,其中該基板的一曲率半徑介於20至100mm之間。
- 一種製造電子裝置的方法,包括:提供一基板,其中該基板包括非平面的一基板接合面以及設置於該接合面上的一第一基板接墊以及一第二基板接墊; 提供一電子元件,其中該電子元件包括分別對應該第一基板接墊以及該第二基板接墊的一第一元件接墊以及一第二元件接墊;依據該基板的一曲率半徑或該電子元件的一長度得到當該第一元件接墊接觸該第一基板接墊時該第二元件接墊與該第二基板接墊之間的一高度差;設置一第一導電中介層於該第一基板接墊或該第一元件接墊上以及設置一第二導電中介層於該第二基板接墊或該第二元件接墊上,其中該第一導電中介層與該第二導電中介層之間的一厚度差介於0.5至1倍的該高度差之間;以及將該電子元件設置於該基板上,以使該第一元件接墊以及該第二元件接墊分別連接該第一基板接墊以及該第二基板接墊。
- 如請求項10所述的製造電子裝置的方法,其中得到該高度差的方法包括:針對在該電子元件具有該長度的條件下,使用多元回歸分析得到該基板的不同曲率半徑與該高度差之間的一對應關係式;以及將該基板的該曲率半徑代入該對應關係式以得到該高度差。
- 如請求項10所述的製造電子裝置的方法,其中得到該高度差的方法包括:針對在該基板的不同曲率半徑的條件下,使用多元回歸分析得到該電子元件的不同長度與該高度差之間的多個對應關係式; 以及將該基板的該曲率半徑以及該電子元件的該長度代入對應的關係式以得到該高度差。
- 如請求項10所述的製造電子裝置的方法,其中該厚度差為2/3倍的該高度差。
- 如請求項10所述的製造電子裝置的方法,其中該高度差為在該第二元件接墊的一主表面的一法線方向上,該第二元件接墊至該第二基板接墊的距離。
- 如請求項10所述的製造電子裝置的方法,其中設置該第一導電中介層以及該第二導電中介層的方法包括點膠。
- 如請求項10所述的製造電子裝置的方法,其中將該電子元件設置於該基板上包括利用拾取與放置裝置拾取該電子元件並施加一壓力以將該電子元件壓合於該基板上。
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