TWI789380B - 具有二維側邊異質結構之半導體裝置及其製造方法 - Google Patents

具有二維側邊異質結構之半導體裝置及其製造方法 Download PDF

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TWI789380B
TWI789380B TW107108902A TW107108902A TWI789380B TW I789380 B TWI789380 B TW I789380B TW 107108902 A TW107108902 A TW 107108902A TW 107108902 A TW107108902 A TW 107108902A TW I789380 B TWI789380 B TW I789380B
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film
metal dichalcogenide
metal
dichalcogenide film
substrate
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TW201835970A (zh
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林時彥
李嗣涔
潘正聖
陳冠超
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台灣積體電路製造股份有限公司
國立臺灣大學
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Abstract

一種具有二維側邊異質結構之半導體裝置的製造方法包含形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜的交錯區域,其中第一金屬二硫屬化物膜及第二金屬二硫屬化物膜係沿著第一基材之表面延伸。第一金屬二硫屬化物膜及第二金屬二硫屬化物膜為不同的金屬二硫屬化物。每一個第二金屬二硫屬化物膜區域係相鄰於第一金屬二硫屬化物膜之區域的相對側邊。

Description

具有二維側邊異質結構之半導體裝置及 其製造方法
本揭露是關於一種半導體裝置的二維材料,特別是關於一種二維結晶異質結構及其製造方法。
二維半導體(亦稱為2D半導體)係厚度為原子尺度之一種天然半導體的型式。2D單層半導體係重要的,因為相較於習知使用的主體型式(bulk form),2D單層半導體具有較強的壓電耦合,可使2D材料用以感測及啟動新的電子元件。過渡金屬二硫屬化物已被用於2D裝置中。單一2D過渡金屬二硫屬化物材料在裝置應用的表現已達到上限。增加2D材料的汲極電流係所追求的。
本揭露之一態樣為一種具有二維側邊異質結構之半導體裝置的製造方法。方法包含沿著第一基材之表面形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜的交錯 區域。第一金屬二硫屬化物膜及第二金屬二硫屬化物膜為不同的金屬二硫屬化物。每一個第二金屬二硫屬化物膜區域係相鄰於第一金屬二硫屬化物膜之區域的相對側邊。
本揭露之另一態樣為具有二維側邊異質結構之半導體裝置的製造方法。方法包含形成第一金屬二硫屬化物膜在基材之表面上。在基材之表面上的第一金屬二硫屬化物膜係被圖案化,以形成複數個溝渠在第一金屬二硫屬化物膜內。溝渠具有寬度WT及長度LT,且第一溝渠係與相鄰之第二溝渠分開距離DT,距離DT為0.5WT至30WT,長度LT為3WT至30WT。接著,形成第二金屬二硫屬化物膜在第一金屬二硫屬化物膜上。第一金屬二硫屬化物膜與該第二金屬二硫屬化物膜為不同金屬二硫屬化物,且第二金屬二硫屬化物膜為單層膜。
本揭露的再一態樣中,一種半導體裝置包含設置在基材上的第一金屬二硫屬化物膜。第一金屬二硫屬化物膜內具有一或多個溝渠。第二金屬二硫屬化物膜係設置在一或多個溝渠內。第一金屬二硫屬化物膜與第二金屬二硫屬化物膜為不同金屬二硫屬化物。閘極介電層係設置在第二金屬二硫屬化物膜之中心部分上。閘極電極層係設置在閘極介電層上,且源極/汲極電極係設置在第二金屬二硫屬化物膜之相對末端部分上。
10:第一基材
15:第一金屬二硫屬化物膜
20:溝渠
25:第二金屬二硫屬化物膜
30:第I型材料
35:第II型材料
45:高分子膜
50:加熱板
55:角落
60:容器
65:溶液
70:第二基材
70A:導電基材
70B:介電層
75:容器
80:溶劑
85:加熱爐
90:第二金屬膜
95:第一金屬膜
100:源極/汲極電極
105:閘極介電層
110:閘極電極
115:導電接觸
120:線
125:溝渠
a:寬度
b:距離
l:長度
DT/DL:距離
LT/LL:長度
WT/WL:寬度
根據以下詳細說明並配合附圖閱讀,使本揭露 的態樣獲致較佳的理解。需注意的是,如同業界的標準作法,許多特徵並不是按照比例繪示的。事實上,為了進行清楚討論,許多特徵的尺寸可以經過任意縮放。
[圖1]係顯示具有不同厚度之MoS2膜的拉曼光譜(Raman spectra)。
[圖2]係顯示具有不同厚度之MoS2膜的光致發光光譜(photoluminescence spectra)。
[圖3]係顯示MoS2膜及WS2膜的能帶排列。
[圖4A]、[圖4B]、[圖4C]、[圖4D]、[圖4E]、[圖4F]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的剖面視圖。
[圖5]係繪示根據本揭露實施例之裝置的閘極電壓相對於汲極電流的關係圖。
[圖6]係顯示在不同基材上的MoS2膜的光致發光光譜。
[圖7A]及[圖7B]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的平面視圖。[圖7C]係繪示根據本揭露一實施例之半導體裝置的製造方法之一階段之圖7B沿著A-A線的剖面視圖。
[圖8A]、[圖8B]、[圖8C]、[圖8D]、[圖8E]、[圖8F]、[圖8G]、[圖8H]、[圖8I]及[圖8J]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的剖面視圖。
[圖9A]、[圖9B]及[圖9C]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的平面視圖。[圖 9D]係繪示根據本揭露一實施例之半導體裝置的製造方法之一階段之圖9C沿著B-B線的剖面視圖。
[圖10A]、[圖10B]及[圖10C]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的平面視圖。[圖10D]係繪示根據本揭露一實施例之半導體裝置的製造方法之一階段之圖10C沿著C-C線的剖面視圖。
[圖11A]、[圖11B]、[圖11D]及[圖11E]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的剖面視圖。[圖11C]係圖11B的平面視圖。
[圖12A]、[圖12B]、[圖12C]及[圖12D]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的平面視圖。[圖12E]係繪示根據本揭露一實施例之半導體裝置的製造方法之一階段之圖12D沿著D-D線的剖面視圖。
[圖13A]、[圖13B]、[圖13C]及[圖13D]係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的平面視圖。[圖13E]係繪示根據本揭露一實施例之半導體裝置的製造方法之一階段之圖13D沿著E-E線的剖面視圖。
須理解的是,以下揭露提供許多不同實施例或例示,以實施發明的不同特徵。以下敘述之成份和排列方式的特定例示是為了簡化本揭露。這些當然僅是做為例示,其目的不在構成限制。舉例而言,元件的尺寸不限於所揭露的 範圍或數值,而是取決於製程條件及/或所要的裝置性質。再者,第一特徵形成在第二特徵之上或上方的描述包含第一特徵和第二特徵有直接接觸的實施例,也包含有其他特徵形成在第一特徵和第二特徵之間,以致第一特徵和第二特徵沒有直接接觸的實施例。許多特徵的尺寸可以不同比例繪示,以使其簡化且清晰。
再者,空間相對性用語,例如「下方(beneath)」、「在...之下(below)」、「低於(lower)」、「在...之上(above)」、「高於(upper)」等,是為了易於描述圖式中所繪示的元素或特徵和其他元素或特徵的關係。空間相對性用語除了圖式中所描繪的方向外,還包含元件在使用或操作時的不同方向。裝置可以其他方式定向(旋轉90度或在其他方向),而本文所用的空間相對性描述也可以如此解讀。除此之外,用語「由…製成(made of)」的意義可為「包含(comprising)」或「由…組成(consisting of)」。
最近關於增進2D裝置表現的研究係在2D晶體異質結構的領域。2D晶體異質結構可提供優於單一材料2D結構的裝置表現。2D晶體異質結構可藉由化學氣相沉積成長或硫化預沉積的過渡金屬而被垂直地建立。舉例而言,相較於MoS2電晶體,WS2/MoS2異質結構裝置係被觀察到具有顯著的汲極電流增加。具有MoS2及WS2/MoS2異質結構做為通道之二個裝置的場效載子遷移率(field-effect mobility)分別為0.27及0.69cm2/V-s。此結果顯示第II型 能帶排列,電子由WS2注入MoS2,且此現象的原因可為在熱平衡下形成較高電子濃度通道。第I型結構為產生強烈光致發光的單一單層,而第II型結構由於較低的光學重組(optical recombination)機率,故第II型結構產生較不顯著的光致發光,其中較低的光學重組機率可能係第II型異質結構所造成。
在本揭露的一些實施例中,2D材料為金屬二硫屬化物(metal dichalcogenide),其厚度為約0.5nm至約10nm。在一些實施例中,金屬二硫屬化物為過渡金屬二硫屬化物。在一些實施例中,過渡金屬二硫屬化物係選自於包含MoS2、WS2、MoSe2、WSe2、MoTe2及WTe2之一族群。
在本揭露的一些實施例中,具有不同厚度的金屬膜係利用射頻濺鍍系統(RF sputtering system)而沉積在基材上。接著,金屬膜被轉化為金屬二硫屬化物膜。舉例而言,在一些實施例中,金屬(例如鉬)係利用濺鍍而沉積在基材(例如藍寶石),其中濺鍍係在能量範圍為約10W至約100W,背景壓力為約5×10-2torr至約5×10-4torr,且氬氣流速為約10sccm至約100sccm下進行。在金屬沉積後,放置樣品於用於硫族化(chalcogenization;例如:硫化)的加熱爐之中心。在硫化過程中,用以做為載流氣體的氬氣之流速為約40sccm至約200sccm,且加熱爐之壓力範圍為約0.1torr至約10torr。樣品的成長溫度為約400℃至約1200℃。約0.5g至約2g的硫粉係在加熱爐上游,於氣體流動下被加熱至其汽化溫度為約120℃至約200℃。
在特定實施例中,鉬係藉由濺鍍而被沉積在藍寶石基材上,濺鍍的能量為約40W,係在背景壓力為約5×10-3torr,且氬氣流速為約40sccm下進行。硫化操作係在氬氣流速為約130sccm,且加熱爐壓力為約0.7torr且溫度為約800℃的條件下進行。硫粉(約1.5g)係放置於加熱爐之氣流上游,並被加熱至其汽化溫度為約120℃。具有不同鉬膜厚度(0.5nm及1.0nm)之兩種樣品係利用相同的硫化步驟所製備。藉由此成長技術,可獲得大面積的MoS2膜在藍寶石基材上。如圖1之拉曼光譜所示,隨著MoS2厚度的增加,二支拉曼峰之間的頻率差值△k增加。被硫化而具有0.5nm及1.0nm厚的鉬之兩個樣品之拉曼峰之頻率差值△k分別為20.8cm-1及24.6cm-1。增加的△k值表示相較於被硫化而具有0.5nm厚的鉬之樣品,被硫化而具有1.0nm厚的鉬之樣品可獲得較多的MoS2層。
在一些實施例中,取代以硫化製程而形成硫基材料(MoS2、WS2等),可進行硒化以形成硒基材料(例如:MoSe2及WSe2),或進行碲化以形成碲基材料(例如:MoTe2及WTe2)。
光致發光(photoluminescence,PL)光譜係另外可用以支持兩個樣品獲得不同MoS2層數目的證據。單層MoS2係具有能階值為約1.9eV的直接能帶材料(direct bandgap material)。隨著層數的增加,MoS2膜之光致發光峰的能量及強度逐漸減少。圖2所示為兩樣品的光致發光光譜。如圖2所示,可觀察到0.5nm厚的鉬之硫化樣品係具 有較強的冷發光。對於1.0nm厚的鉬之硫化樣品,光致發光強度減少,且光致發光峰的能量位移1.82eV。此結果代表具有較厚的鉬膜,可獲得增加的MoS2層數目。剝層的MoS2具有相似的光致發光峰能量1.87eV及明亮的冷發光表示0.5nm厚的鉬之硫化樣品係獲得單層MoS2膜。高解析度穿透式電子顯微鏡(high resolution transmission electron microscopy,HRTEM)證明1層的MoS2係形成在0.5nm的樣品,而3層的MoS2係形成在1.0nm的樣品。因此,較厚的硫化樣品可獲得較多的MoS2層。在一些實施例中,MoS2層的數目與鉬膜厚度有近似於線性的關係,其可使此成長技術對於單層MoS2有好的層數控制能力。此數據顯示相較於多層的MoS2,單層MoS2提供較大的光致發光強度。
金屬二硫屬化物係形成在基材上。在一些實施例中,基材包含氧化矽或氧化鋁基材。在一些實施例中,氧化矽基材包含矽上覆二氧化矽。在特定實施例中,矽基材為導電基材,例如p摻雜矽。在其他實施例中,合適的氧化鋁基材包含藍寶石。
在本揭露中,製備包含第一金屬二硫屬化物膜及第二過渡金屬二硫屬化物膜的異質結構。在一些實施例中,製備WS2/MoS2的異質結構。進行MoS2及WS2樣品的紫外光光電子能譜(ultraviolet photoelectron spectroscopy,UPS)及吸收光譜測量。圖3所示為MoS2及WS2的能帶排列。MoS2及WS2樣品的能階值分別為1.72 eV及1.85eV。MoS2及WS2的截止束縛能(cutoff binding energy,Ecutoff)分別為1.17eV及0.97eV。截止束縛能係費米能階(Fermi level,EF)及價帶最大值(valence band maximum,VBM)之間的差值。功函數(Φ)值為入射光子能量與截止束縛能的差值(Φ=hν-Ecutoff),其中入射光子能量(hν)為21.2eV。根據已知的價帶最大值之位置,導帶最小值(conduction band minimum,CBM)之位置可由兩樣品的能階值而獲得。當兩樣品結合形成異質結構時,可獲得具有較低導帶邊緣的第II型能帶排列的MoS2。由於WS2的功函數小於MoS2,WS2中的電子會在熱平衡下注入MoS2。因此,可獲得具有較高電子濃度的通道,其係可增加製作在具有MoS2通道之WS2/MoS2上之電晶體的場效載子遷移率。
在本揭露一實施例中,如圖4A-4F所示,形成具有底部閘極電極的半導體裝置。在一些實施例中,如圖4A所示,第一金屬膜95係形成在第一基材10上。在特定實施例中,第一金屬膜為藉由濺鍍所形成之約1nm厚的鉬膜,且基材10為藍寶石基材。
如圖4B所示,第一金屬膜95係藉由將金屬與硫族元素反應而轉化成第一金屬二硫屬化物膜15,其中硫族元素係選自於包含S、Se及Te的族群。在特定實施例中,第一金屬二硫屬化物為MoS2,其係藉由將鉬膜在加熱爐內與汽化的硫反應而形成。在其他實施例中,第一金屬二硫屬化物係利用物理氣相沉積(physical vapor deposition,PVD)法或化學氣相沉積(chemical vapor deposition, CVD)法直接沉積在基材上。
在一些實施例中,如圖4C所示,不同於第一金屬膜95的第二金屬膜90係形成在第一金屬二硫屬化物膜15上。在特定實施例中,第二金屬膜係藉由濺鍍而形成之約1nm厚的鎢膜。
接著,如圖4D所示,第二金屬膜90係藉由將金屬與硫族元素反應而轉化成第二金屬二硫屬化物膜25,其中硫族元素係選自於包含S、Se及Te的族群。在特定實施例中,第二金屬二硫屬化物為WS2,其係藉由將鎢膜在加熱爐內與汽化的硫反應而形成。
接著,如圖4E所示,第一金屬二硫屬化物膜15及第二金屬二硫屬化物膜25係被轉移至第二基材70上,藉以形成垂直異質結構。轉移操作可如說明書中所揭露的方式進行。在特定實施例中,第二基材70為具有介電層70B形成在上方的導電基材70A。導電基材70A在一些實施例中為p型摻雜多晶矽,而在另一些實施例中,則為導電金屬。在一些實施例中,源極/汲極電極100係形成在介電層70B上。如圖4E之剖面視圖及圖4F之平面視圖所示,被轉移的第一金屬二硫屬化物膜15及第二金屬二硫屬化物膜25係共形地覆蓋源極/汲極電極100之部分及第二基材70。以下參考圖8A-8J說明轉移金屬二硫屬化物膜的方法。
在一些實施例中,以金屬二硫屬化物膜係形成在導電層上,來取代轉移金屬二硫屬化物膜至導電基材。舉例而言,導電層可形成在基材上,然後第一金屬膜及第二金 屬膜係形成在導電層上。接著,第一金屬膜及第二金屬膜係經過硫族化,以形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜。導電層材料係選擇為可耐硫族化操作溫度。在一些實施例中,在硫族化後,第一金屬二硫屬化物膜及第二金屬二硫屬化物膜係被蝕刻以形成所要的形狀或圖案。
在金屬二硫屬化物膜係形成為直接在導電層之上的其他實施例中,第一金屬膜係形成在導電層上,且第一金屬膜經過硫族化,以形成第一金屬二硫屬化物膜。在一些實施例中,第一金屬二硫屬化物膜係被圖案化(例如藉由蝕刻),以形成所要的形狀或圖案。第二金屬膜係形成在第一金屬二硫屬化物膜上,且第一金屬膜經過硫族化,以形成第一金屬二硫屬化物膜。在一些實施例中,第二金屬二硫屬化物膜係被圖案化(例如藉由蝕刻),以形成所要的形狀或圖案。這些形成金屬二硫屬化物膜直接在導電層上的技術可被用以形成半導體裝置,包含背閘極(back gate)電晶體。
在一些實施例中,導電基材70A為閘極電極,且介電層70B為閘極介電層。在特定實施例中,介電層70B為二氧化矽,在其他實施例中,介電層70B為高介電常數(高k)介電質。第一金屬二硫屬化物膜15及第二金屬二硫屬化物膜25形成電晶體的通道區域。換言之,圖4F的結構包含設置在第一導電層70A上的介電層70B、設置在介電層70B之第一區域上的第二導電層100、設置在介電層70B之第二區域上並與第二導電層100分開的第三導電層100,以及設置在第二導電層100、第三導電層100及介電層70B上的雙 層金屬二硫屬化物15及25。
在一些實施例中,根據在此所揭露的方法製備具有5層MoS2及4層WS2/5層MoS2做為通道的底閘極(bottom-gate)電晶體。5層MoS2通道及4層WS2/5層MoS2異質結構通道電晶體在VDS為10V的ID-VGS比較曲線係顯示於圖5。相較於MoS2電晶體,異質結構裝置可觀察到顯著的汲極電流增加。由曲線中可看出具有MoS2及WS2/MoS2異質結構做為通道之兩個裝置的場效載子遷移率分別為0.27cm2/V-s及0.69cm2/V-s。
二維金屬硫屬化物晶體膜可被轉移至不同基材上,以獲得不同材料之間的能帶排列。舉例而言,在一些實施例中,1層MoS2係分別被轉移至10層WS2/藍寶石及300nm SiO2/Si基材。因為1層MoS2係具有強發光,如圖1及圖2所示,在SiO2/Si基材上的1層MoS2係具有強的光致發光強度,如圖6所示。然而,對於在10層WS2/藍寶石上的1層MoS2,則觀察到弱發光。結果表示由於MoS2/WS2異質結構的第II型能帶排列,1層MoS2之原始的強烈第I型發光係顯著地減少,因為第II型異質結構較低的光學重組機率。
因為單層金屬二硫屬化物排列提供優於垂直金屬二硫屬化物異質結構的發光強度,且金屬二硫屬化物異質結構提供優於單一結構的汲極電流增加,如上所述,側邊二維金屬二硫屬化物異質結構係本揭露一些實施例中所要的。
在本揭露一些實施例中,製備側邊二維晶體異質結構係藉由形成第一金屬二硫屬化物膜15在基材10上, 並圖案化第一金屬二硫屬化物膜15以在第一金屬二硫屬化物膜15內形成奈米尺度的溝渠20,暴露出下方的基材10,如圖7A的平面圖所示。1層第二金屬二硫屬化物膜25係被轉移至被圖案化的第一金屬二硫屬化物膜15,如圖7B所示。在一些實施例中,所獲得的結構為具有週期性第I型材料及第II型材料的側邊二維晶體異質結構。第I型材料30包含填充溝渠20的單層第二金屬二硫屬化物膜25,且第II型材料35包含在第一金屬二硫屬化物膜15上的第二金屬二硫屬化物膜25,如圖7B及圖7C所示,其中圖7C為沿圖7B之A-A線的剖面視圖。
在一些實施例中,第一金屬二硫屬化物膜及第二金屬二硫屬化物膜之厚度範圍為約0.5nm至約10nm。在一些實施例中,第一金屬二硫屬化物膜及第二金屬二硫屬化物膜為彼此不同的過渡金屬二硫屬化物膜,且係選自於包含MoS2、WS2、MoSe2、WSe2、MoTe2及WTe2之一族群。在一些實施例中,金屬二硫屬化物膜係藉由化學氣相沉積(CVD)所形成。在其他實施例中,金屬膜係形成在基材上,然後金屬膜係與硫族反應,以形成金屬二硫屬化物膜。在一些實施例中,基材10包含氧化矽或氧化鋁基材。在一些實施例中,合適的氧化矽基材包含形成在矽晶圓上的二氧化矽。在其他實施例中,合適的氧化鋁基材包含藍寶石。在一些實施例中,第一過渡金屬二硫屬化物膜15係藉由合適的微影技術(包含電子束微影及反應性離子蝕刻)而被圖案化,以形成溝渠20。在一些實施例中,溝渠20具有約1nm 至約10nm的寬度及約15nm至約30nm的長度,且第一溝渠係與相鄰的第二溝渠分開約5nm至約30nm的距離。
在如圖7A所示的一些實施例中,溝渠20具有寬度WT、長度LT,且第一溝渠係與相鄰的第二溝渠分開距離DT,其中距離DT的範圍為約0.5WT至約30WT,且長度LT的範圍為約3WT至約30WT
在本揭露的一些實施例中,製備側邊二維晶體異質結構係利用電子束微影圖案化WS2膜,接著藉由反應性離子蝕刻法蝕刻以在WS2膜內形成奈米尺度的溝渠。在一些實施例中,在轉移1層MoS2至被圖案化的WS2膜之後,可獲得具有週期性第I型材料及第II型材料的側邊二維晶體異質結構。
由於WS2/MoS2異質結構的第II型能帶排列,電子可由WS2注入MoS2。製得具有較高電子濃度的通道,可增加以MoS2作為通道之在MoS2/WS2異質結構上的電晶體之場效載子遷移率。
根據本揭露一些實施例之金屬二硫屬化物膜自一個基材轉移至另一基材及其製作方法係繪示於圖8A至圖8J。如圖8A所示,具有約0.5nm至約10nm之第一金屬二硫屬化物膜15係被形成在第一基材10上。在一些實施例中,第一金屬二硫屬化物膜15係藉由化學氣相沉積所形成。在其他實施例中,第一金屬膜係藉由濺鍍或原子層沉積(atomic layer deposition,ALD)所形成,然後金屬膜係藉由將金屬膜與硫族反應以轉化成金屬二硫屬化物。具有約 100nm至約5μm之厚度的高分子膜45係形成在第一金屬二硫屬化物膜15,如圖8B所示。在一些實施例中,高分子膜45為聚甲基丙烯酸甲酯[poly(methyl methacrylate),PMMA]。在形成高分子膜45之後,加熱樣品,例如藉由將樣品放置於加熱板50上,如圖8C所示。樣品可在約70℃至約200℃的溫度下被加熱約30秒至約20分鐘。在加熱之後,將第一金屬二硫屬化物膜15的角落55自基材10撕離(例如利用鑷子),且樣品係被浸泡在包含溶液65的容器60中,如圖8D所示,以助於第一金屬二硫屬化物膜15與第一基材10的分離,如圖8E所示。在一些實施例中,溶液65為鹼性水溶液。
如圖8F所示,第一金屬二硫屬化物膜15及高分子膜45係轉移至第二基材70。在施加第一金屬二硫屬化物膜15至第二基材70之後,在一些實施例中,樣品可靜置(stand)30分鐘至24小時。在一些實施例中,第二基材70包含氧化矽或氧化鋁基材。在一些實施例中,合適的氧化矽基材包含形成在矽晶圓上的二氧化矽。在其他實施例中,合適的氧化鋁基材包含藍寶石。高分子膜45係利用合適的溶劑自第一金屬二硫屬化物膜15被移除。在一些實施例中,第二基材70/第一金屬二硫屬化物膜15/高分子膜45結構係浸泡在容器75內合適的溶劑80中,如圖8G所示,直至高分子膜45被溶解,如圖8H所示。可使用任何適合溶解高分子膜45的溶劑80。舉例而言,在一些實施例中,當高分子膜45為PMMA膜,丙酮可做為溶劑80。
如圖8I所示,在一些實施例中,對第一金屬二硫屬化物膜15及第二基材70進行退火,其係藉由在溫度為約200℃至約500℃的加熱爐85中加熱約30分鐘至5小時,以從其他基材轉移至裝置,使其具有0.5nm至10nm厚的金屬二硫屬化物膜,如圖8J所示。
在一實施例中,二維金屬硫化物晶體膜的膜轉移操作係以以下步驟進行:(1)旋轉塗佈1.5μm厚的甲基丙烯酸甲酯(PMMA)層在二維金屬硫化物晶體膜上;(2)加熱板以120℃加熱樣品5分鐘;(3)利用鑷子將PMMA/二維晶體膜之角落的一部分自藍寶石基材上撕離;(4)浸泡樣品在KOH溶液中,且完全撕離PMMA/二維晶體膜;(5)放置PMMA/二維晶體膜在具有源極/汲極電極在其上的300nm SiO2/Si基材上;(6)將樣品置於大氣條件下8小時;(7)浸泡樣品在丙酮內以移除PMMA;以及(8)將樣品在350℃的加熱爐內退火2小時,以保留二維金屬硫化物晶體膜在SiO2/Si基材之表面上。
在其他實施例中,以沉積第二金屬膜在第一金屬硫屬化物膜上及溝渠內,並硫族化的操作取代第二金屬硫屬化物膜的轉移操作,如圖9A至圖9D所示。
如圖9A所示,第一金屬二硫屬化物膜15係形成在基材10上,且第一金屬二硫屬化物膜15係被圖案化以形成奈米尺度的溝渠20在第一金屬二硫屬化物膜15內,並暴露出下方的基材10。在一些實施例中,溝渠20具有約1nm至約10nm的寬度及約15nm至約30nm的長度,且第一溝 渠係與相鄰的第二溝渠相隔約5nm至約30nm的距離。約0.5nm至約10nm厚的第二金屬膜90係形成在第一金屬二硫屬化物膜15上且在溝渠20內,如圖9B所示。在一些實施例中,第二金屬膜90係藉由濺鍍所形成,且第二金屬係與第一金屬二硫屬化物膜15的金屬不同。接著,第二金屬膜90係與硫族反應,以形成具有週期性第I型材料及第II型材料的側邊二維晶體異質結構,如圖9C所示。在一些實施例中,第I型材料30包含填充溝渠20的單層第二金屬二硫屬化物膜25,且第II型材料35包含在第一金屬二硫屬化物膜15上的第二金屬二硫屬化物膜25,如圖9C及圖9D所示,其中圖9D為沿圖9C之B-B線的剖面視圖。因此,與圖7C所示之相同的具有週期性第I型材料及第II型材料的側邊二維晶體異質結構也可在不進行膜轉移操作下獲得,如圖9A至圖9D所示。在一些實施例中,第一金屬二硫屬化物膜15之厚度及第二金屬二硫屬化物膜25之厚度係大於單層。
在圖9A所示的一些實施例中,溝渠20具有寬度WT、長度LT,且第一溝渠係與相鄰的第二溝渠分開距離DT,其中距離DT的範圍為約0.5WT至約30WT,且長度LT的範圍為約3WT至約30WT
在其他實施例中,沉積第一金屬膜及第二金屬膜,接著藉由將金屬膜與硫族反應轉化成硫屬化物,如圖10A至圖10D所示。在一些實施例中,約0.5nm至約10nm厚的第一金屬膜係沉積在基材10上,如圖10A所示。沉積第一金屬膜95可藉由濺鍍或原子層沉積。基材10可被遮蔽或 整個基材10可被第一金屬膜95覆蓋,然後被圖案化以形成溝渠20。在一些實施例中,溝渠20具有約1nm至約10nm的寬度及約15nm至約30nm的長度,且第一溝渠係與相鄰的第二溝渠相隔約5nm至約30nm的距離。約0.5nm至約10nm厚的第二金屬膜90係形成在第一金屬膜95上且在溝渠20內,如圖10B所示。在一些實施例中,第二金屬膜90係藉由濺鍍所形成,且第二金屬係與第一金屬不同。接著,第一金屬膜95及第二金屬膜90係藉由與硫族反應,以轉換為硫屬化物膜,進而形成具有週期性第I型材料及第II型材料的側邊二維晶體異質結構,如圖10C所示。在一些實施例中,第I型材料30包含填充溝渠20的單層第二金屬二硫屬化物膜25,且第II型材料35包含在第一金屬二硫屬化物膜15上的第二金屬二硫屬化物膜25,如圖10C及圖10D所示,其中圖10D為沿圖10C之C-C線的剖面視圖。因此,與圖7C所示之相同的具有週期性第I型材料及第II型材料的側邊二維晶體異質結構也可在不進行膜轉移操作下獲得,如圖10A至圖10D所示。本揭露不限於第I型材料及第II型材料的單層。在一些實施例中,第I型材料層及第II型材料層厚度係比單層厚。
圖11A至圖11E係繪示根據本揭露一實施例之半導體裝置的製造方法之各連續階段的視圖。在本揭露一些實施例中,如圖11A之剖面視圖所示,側邊二維晶體異質結構係藉由形成第一金屬二硫屬化物膜15在基材10上所製作。如圖11B之剖面視圖所示,第一金屬二硫屬化物膜15 係接著被圖案化,以形成複數個由第一金屬二硫屬化物膜15所組成的奈米尺度的線120。下方的基材10係圍著線120被暴露出。在一些實施例中,複數個第一金屬二硫屬化物線120係實質為平行的配置。圖11C係圖11B的平面視圖。
接著,如圖11D之剖面視圖所示,第二金屬二硫屬化物膜25係形成在第一金屬二硫屬化物線120上。在一些實施例中,第二金屬二硫屬化物膜25係利用回蝕操作而被平坦化。然後,如圖11E之剖面視圖所示,複數個溝渠125係形成在第一金屬二硫屬化物線120之間的第二金屬二硫屬化物膜25之部分內,其係利用合適的微影技術,包含電子束微影及反應性離子蝕刻。
在一些實施例中,第一金屬二硫屬化物膜120及第二金屬二硫屬化物膜25之厚度範圍為約0.5nm至約10nm。在一些實施例中,第一金屬二硫屬化物膜120為單層。在一些實施例中,第一金屬二硫屬化物膜120及第二金屬二硫屬化物膜25為彼此不同的過渡金屬二硫屬化物膜,且係選自於包含MoS2、WS2、MoSe2、WSe2、MoTe2及WTe2之一族群。在一些實施例中,金屬二硫屬化物膜係藉由化學氣相沉積(CVD)所形成。在一些實施例中,基材10包含氧化矽或氧化鋁基材。在一些實施例中,合適的氧化矽基材包含形成在矽晶圓上的二氧化矽。在其他實施例中,合適的氧化鋁基材包含藍寶石。在一些實施例中,第二金屬二硫屬化物膜25係藉由合適的微影技術(包含電子束微影及反應性離子蝕刻)而被圖案化,以形成溝渠125。在一些實施例中, 線120及溝渠125具有約1nm至約10nm的寬度及約15nm至約30nm的長度,第一線係與相鄰的第二線分開約5nm至約30nm的距離,且第一溝渠係與相鄰的第二溝渠分開約6nm至約31nm的距離。
在一些實施例中,如圖11B及圖11C所示,線120具有寬度WL、長度LL,且第一線係與相鄰的第二線分開距離DL,其中距離DL的範圍為約0.5WL至約30WL,且長度LL的範圍為約3WL至約30WL
根據本揭露,側邊異質結構的應用為多通道電晶體。舉例而言,在WS2膜之溝渠內的MoS2區域內有較高的電子濃度,而WS2的導電性較MoS2差,其結果係與多通道高電子遷移率電晶體(high-electron-mobility transistor,HEMT)相似。主要差異為以側邊異質結構的配置取代直立異質結構。
一種具有側邊二維晶體異質結構之多通道上閘極電晶體的製造方法係如圖12A至圖12E所示。第一過渡金屬二硫屬化物膜15係形成在基材10上,如圖12A的平面視圖所示。側邊多量子井(multi-quantum walls,QWs)係利用本揭露的二維晶體異質結構所製作。如圖12A所示,溝渠20係藉由電子束微影及反應性離子蝕刻以形成為具有約1nm至約10nm的寬度a,且分開距離b為約20nm至約30nm。在一些實施例中,溝渠長度l係小於30nm。溝渠20為半導體裝置的通道區域,且溝渠20包含通道區域的第一中心部分,而通道區域的第二末端部分係在第一中心部分的兩 相對末端。
本揭露的二維晶體異質結構除了載子注入現象,側邊量子井結構更可增加電晶體的裝置遷移率。除此之外,在一些實施例中,量子井數係用以控制裝置的汲極電流水平。
不同於第一金屬二硫屬化物膜15的第二金屬二硫屬化物膜25係形成在第一金屬二硫屬化物膜15上及在溝渠20內,如圖12B所示,藉以形成具有週期性第I型材及第II型材料的側邊二維晶體異質結構,如圖12C所示。接著,閘極介電層105係形成在通道區域30及35之第一中心部分上,閘極電極110係形成在閘極介電層105上,而源極/汲極電極100係形成在通道區域30及35的第二末端部分上,如圖12D及圖12E所示,其中圖12E為沿圖12D之D-D線的剖面視圖。閘極介電層105可由任意合適的介電材料所形成,且可利用合適的沉積、光微影及蝕刻操作來製作。閘極電極110及源極/汲極電極100可藉由合適的金屬沉積及圖案化操作來形成。任何合適的金屬可用以做為電極。
藉由減少通道分開距離b至小於10nm,側邊量子井可成為側邊超晶格(superlattice,SL)結構。超晶格結構與量子井的主要差異係超晶格的載子傳遞係透過迷你能量(mini-bands)而非單一能階。在一些實施例中,藉由超晶格結構的幫助,二維晶體異質結構電晶體的遷移率可進一步的增加。與量子井相似的,汲極電流水平係藉由通道數來控制。由於超晶格結構之單位面積的通道密度係高於量子 井,利用側邊二維晶體超晶格結構做為電晶體的通道預期可獲得較高的汲極電流。
側邊二維晶體異質結構的其他應用係用以熱成像的量子井紅外線光偵測器(quantum-well infrared photodetectors,QWIPs)。典型地,QWIPs係利用垂直多層GaAs/(AlGa)As量子井所製作。由於能帶內轉移的選擇規則的限制,垂直裝置無法吸收垂直入射光。因此,以20μm至30μm的節距尺寸之其他光耦合系統(例如光柵)係難以用於製作裝置。
圖13A至圖13E係繪示根據本揭露一實施例之半導體裝置(例如量子井紅外線光偵測器)的製造方法。如圖13A的平面視圖所示,第一金屬二硫屬化物膜15係形成在基材10上。側邊多量子井係利用本揭露的二維側邊異質結構所製作。如圖13A所示,後續會有通道形成於內的溝渠20係藉由電子束微影及反應性離子蝕刻以形成為具有約1nm至約10nm的寬度a,且分開距離b為約20nm至約30nm。在一些實施例中,溝渠長度l係小於30nm。
不同於第一金屬二硫屬化物膜15的第二金屬二硫屬化物膜25係形成在第一金屬二硫屬化物膜15上及在溝渠20內,如圖13B所示,藉以形成具有週期性第I型材及第II型材料的側邊二維晶體異質結構,如圖13C所示。移除結構的外圍區域以形成被基材10包圍的臺面。在一些實施例中,外圍區域係藉由掩蔽及蝕刻來移除。導電接觸115係形成在二維晶體異質結構的相對末端區域上。在一些實施例 中,導電接觸115係由合適的導電金屬(例如鋁、金、銀、鈷、銅、鎳、鉭、鈦、鎢及其組合)所組成。導電接觸115可藉由濺鍍、CVD、ALD、電鍍或其他合適的方法來形成。
圖13E為沿圖13D之E-E線的剖面視圖。具有週期性第I型材及第II型材料的側邊二維晶體異質結構係如圖13D所示。第I型材料30包含在基材10上的第二金屬二硫屬化物膜25,而第II型材料35包含在第一金屬二硫屬化物膜15上方的第二金屬二硫屬化物膜25。
在本揭露的特定實施例中,具有二維晶體異質結構的側邊量子井結構係提供為具有填充於溝渠的WS2,其中溝渠之寬度a為約1nm至約10nm。在此例示中,通道分開距離b為約20nm至約30nm,且通道長度l為約30nm。製作成具有此配置的QWIPs對垂直入射光相當靈敏。類似於在此所揭露之用以形成電晶體之超晶格結構的奈米範圍之通道分開距離b,相同的態樣亦可應用於紅外線光偵測器。當通道分開距離b為約5nm至約10nm,超晶格結構可形成,且單一能階會成為能帶。在此例示中,超晶格紅外線光偵測器(superlattice infrared photodetectors,SLIPs)亦可用以吸收垂直入射紅外光。SLIPs的主要優點為其較低的操作電壓。
當通道分開距離b為約20nm至約30nm時,所製作的裝置可為QWIP。當通道分開距離b減少至小於10nm,所製作的裝置可為SLIP。在一些實施例中,QWIPs或SLIPs的通道數可為約30至約100。
本揭露提供利用1次電子束微影然後反應性離子束蝕刻製作具有二維側邊異質結構的半導體裝置的優勢。在此所述的操作可應用至大面積二維晶體膜。再者,本揭露提供之具有側邊異質結構的多通道電晶體有顯著增加的裝置表現。除此之外,本揭露提供之側邊量子井結構係對紅外線光偵測器的應用有助益。
本揭露之一實施例為一種具有二維側邊異質結構之半導體裝置的製造方法。方法包含形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜的交錯區域,其中第一金屬二硫屬化物膜及第二金屬二硫屬化物膜係沿著第一基材之表面延伸。第一金屬二硫屬化物膜及第二金屬二硫屬化物膜為不同的金屬二硫屬化物。每一個第二金屬二硫屬化物膜區域係相鄰於第一金屬二硫屬化物膜之區域的相對側邊。在一實施例中,形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜的交錯區域之操作包含形成第一金屬二硫屬化物膜在第一基材的表面上,圖案化在第一基材之表面上的第一金屬二硫屬化物膜,以形成一或多個溝渠在第一金屬二硫屬化物膜內,且形成第二金屬二硫屬化物膜在第一金屬二硫屬化物膜上及在一或多個溝渠內。在一實施例中,利用微影操作及蝕刻操作以形成一或多個溝渠。在一實施例中,微影操作為電子束微影法,而蝕刻操作為反應性離子蝕刻法。在一實施例中,形成第一金屬二硫屬化物膜在第一基材上之操作包含:形成第一金屬膜在第一基材上,以及硫化、硒化或碲化第一金屬膜,以形成第一金屬二硫屬化物膜。在一實施例 中,形成第二金屬二硫屬化物膜之操作更包含:形成第二金屬膜在第一金屬二硫屬化物膜之上,且在一或多個溝渠內,以及硫化、硒化或碲化第二金屬膜,以形成第二金屬二硫屬化物膜。在一實施例中,此一或多個溝渠係具有約1奈米至約10奈米之寬度,以及約15奈米至約30奈米之長度。在一實施例中,第一溝渠係與相鄰之第二溝渠分開約5奈米至約30奈米之距離。在一實施例中,方法包含形成介電層在第二金屬二硫屬化物膜之第一中心部分上方,形成閘極電極在介電層上,以及形成源極/汲極電極在第二末端部分上,其中第二末端部分係在第二金屬二硫屬化物膜之第一中心部分的相對末端。在一實施例中,形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜之交錯區域之操作包含:形成第一金屬膜在基材之表面上,圖案化該第一金屬膜,以在第一金屬膜內形成一或多個溝渠,形成第二金屬膜在一或多個溝渠內,以及硫化、硒化或碲化第一金屬膜及第二金屬膜,以形成第一金屬二硫屬化物膜及第二金屬二硫屬化物膜,其中第一金屬膜與第二金屬膜為不同金屬。在一實施例中,第一金屬二硫屬化物膜具有約0.5奈米至約10奈米之厚度。在一實施例中,方法包含形成第二金屬二硫屬化物膜在第二基材上,以及自第二基材轉移第二金屬二硫屬化物膜至第一金屬二硫屬化物膜。在一實施例中,第二基材為藍寶石。在一實施例中,第一金屬二硫屬化物膜及第二金屬二硫屬化物膜包含過渡金屬二硫屬化物。在一實施例中,過渡金屬二硫屬化物係選自於由WS2、MoS2、WSe2、MoSe2、WTe2、MoTe2 以及上述之任意組合所組成之一族群。在一實施例中,第二金屬二硫屬化物膜為單層膜。在一實施例中,方法包含自第一基材之周圍區域移除第一金屬二硫屬化物膜之一部分,以暴露出周圍區域內之第一基材,以及形成導電接觸在第一金屬二硫屬化物膜之相對末端區域。
本揭露之另一實施例為具有二維側邊異質結構之半導體裝置的製造方法。方法包含形成第一金屬二硫屬化物膜在基材之表面上。在基材之表面上的第一金屬二硫屬化物膜係被圖案化,以形成複數個溝渠在第一金屬二硫屬化物膜內。溝渠具有寬度WT及長度LT,且第一溝渠係與相鄰之第二溝渠分開距離DT,距離DT為0.5WT至30WT,長度LT為3WT至30WT。第一金屬二硫屬化物膜與該第二金屬二硫屬化物膜為不同金屬二硫屬化物,且第二金屬二硫屬化物膜為單層膜。
在本揭露的另一實施例中,一種半導體裝置包含設置在基材上的第一金屬二硫屬化物膜。第一金屬二硫屬化物膜內具有一或多個溝渠。第二金屬二硫屬化物膜係設置在一或多個溝渠內。第一金屬二硫屬化物膜與第二金屬二硫屬化物膜為不同金屬二硫屬化物。閘極介電層係設置在第二金屬二硫屬化物膜之中心部分上。閘極電極層係設置在閘極介電層上,且源極/汲極電極係設置在第二金屬二硫屬化物膜之相對末端部分上。在一實施例中,第二金屬二硫屬化物膜為單層膜。
上述摘要許多實施例的特徵,因此本領域具有 通常知識者可更了解本揭露的態樣。本領域具有通常知識者應理解利用本揭露為基礎可以設計或修飾其他製程和結構以實現和所述實施例相同的目的及/或達成相同優勢。本領域具有通常知識者也應了解與此同等的架構並沒有偏離本揭露的精神和範圍,且可以在不偏離本揭露的精神和範圍下做出各種變化、交換和取代。
15:第一金屬二硫屬化物膜
25:第二金屬二硫屬化物膜
70:第二基材
70A:導電基材
70B:介電層
100:源極/汲極電極

Claims (10)

  1. 一種半導體裝置的製造方法,其中該半導體裝置具有二維側邊異質結構,且該製造方法包含:形成一第一金屬二硫屬化物(dichalcogenide)膜及一第二金屬二硫屬化物膜之複數個交錯區域,其中該第一金屬二硫屬化物膜與該第二金屬二硫屬化物膜沿著一第一基材之一表面延伸,其中該第一金屬二硫屬化物膜及該第二金屬二硫屬化物膜為不同的金屬二硫屬化物且包含不同的金屬,且每一該第二金屬二硫屬化物膜區域係鄰接該第一金屬二硫屬化物膜之一區域的相反側上。
  2. 如申請專利範圍第1項所述之半導體裝置的製造方法,其中該形成該第一金屬二硫屬化物膜及該第二金屬二硫屬化物膜之該些交錯區域之操作包含:形成該第一金屬二硫屬化物膜在該第一基材之該表面上;圖案化在該第一基材之該表面上的該第一金屬二硫屬化物膜,以形成一或複數個溝渠在該第一金屬二硫屬化物膜內;以及形成該第二金屬二硫屬化物膜在該第一金屬二硫屬化物膜之上,且在該或該些溝渠內。
  3. 如申請專利範圍第2項所述之半導體裝置的製造方法,更包含: 形成一介電層在該第二金屬二硫屬化物膜之一第一中心部分上方;形成一閘極電極在該介電層上;以及形成源極/汲極電極在複數個第二末端部分上,其中該些第二末端部分係在該第二金屬二硫屬化物膜之該第一中心部分的相對末端。
  4. 如申請專利範圍第1項所述之半導體裝置的製造方法,其中該形成該第一金屬二硫屬化物膜及該第二金屬二硫屬化物膜之該些交錯區域之操作包含:形成一第一金屬膜在該基材之該表面上;圖案化該第一金屬膜,以在該第一金屬膜內形成一或複數個溝渠;形成一第二金屬膜在該或該些溝渠內;以及硫化、硒化或碲化該第一金屬膜及該第二金屬膜,以形成該第一金屬二硫屬化物膜及該第二金屬二硫屬化物膜,其中該第一金屬膜與該第二金屬膜為不同金屬。
  5. 如申請專利範圍第1項所述之半導體裝置的製造方法,更包含:形成該第二金屬二硫屬化物膜在一第二基材上;以及自該第二基材轉移該第二金屬二硫屬化物膜至該第一金屬二硫屬化物膜。
  6. 如申請專利範圍第1項所述之半導體裝置 的製造方法,其中該第一金屬二硫屬化物膜及該第二金屬二硫屬化物膜包含一過渡金屬二硫屬化物。
  7. 如申請專利範圍第1項所述之半導體裝置的製造方法,更包含:自該第一基材之一周圍區域移除該第一金屬二硫屬化物膜之一部分,以暴露出該周圍區域內之該第一基材;以及形成導電接觸在該第一金屬二硫屬化物膜之複數個相對末端區域。
  8. 一種半導體裝置的製造方法,其中該半導體裝置具有二維側邊異質結構,且該製造方法包含:形成一第一金屬二硫屬化物膜在一基材之一表面上;圖案化在該基材之該表面上的該第一金屬二硫屬化物膜,以形成複數個溝渠在該第一金屬二硫屬化物膜內,其中該些溝渠具有一寬度WT及一長度LT,一第一溝渠係與相鄰之一第二溝渠分開一距離DT,該距離DT為0.5WT至30WT,該長度LT為3WT至30WT;以及形成一第二金屬二硫屬化物膜在該第一金屬二硫屬化物膜上,其中該第一金屬二硫屬化物膜與該第二金屬二硫屬化物膜為不同金屬二硫屬化物,該第二金屬二硫屬化物膜為一單層膜,且該第二金屬二硫屬化物膜的一上表面定義多個凹陷。
  9. 一種半導體裝置,包含:一第一金屬二硫屬化物膜,設置在一基材上,其中該第一金屬二硫屬化物膜內具有一或複數個溝渠;一第二金屬二硫屬化物膜,包含一第一部分設置在該第一金屬二硫屬化物膜之上以及一第二部分設置在該或該些溝渠內,其中該第一金屬二硫屬化物膜與該第二金屬二硫屬化物膜為不同金屬二硫屬化物;一閘極介電層,設置在該第二金屬二硫屬化物膜之一中心部分上;一閘極電極層,設置在該閘極介電層上;以及源極/汲極電極,設置在該第二金屬二硫屬化物膜之複數個相對末端部分上。
  10. 如申請專利範圍第9項所述之半導體裝置,其中該第二金屬二硫屬化物膜為一單層膜。
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