TWI778239B - Visualization of three-dimensional semiconductor structures - Google Patents

Abstract

A semiconductor metrology tool inspects an area of a semiconductor wafer. The inspected area includes a plurality of instances of a 3D semiconductor structure arranged periodically in at least one dimension. A computer system generates a model of a respective instance of the 3D semiconductor structure based on measurements collected during the inspection. The computer system renders an image of the model that shows a 3D shape of the model and provides the image to a device for display.

Description

Visualization of 3D Semiconductor Structures

The present invention relates to semiconductor metrology, and more specifically to generating visualizations that demonstrate the three-dimensional (3D) properties of semiconductor structures.

Three-dimensional semiconductor structures can be characterized using various types of metrics, such as different types of optical metrics and small angle x-ray scattering (SAXS). However, insufficient visualization of the resulting measurements can cause data to be overlooked or not fully understood. This information can be important for debugging a semiconductor process, improving the yield and reliability of the process, or predicting the performance of a semiconductor device. Inadequate visualization also makes comparisons with reference data such as data from critical dimension scanning electron microscopy (CD-SEM) and transmission electron microscopy (TEM) difficult.

Therefore, there is a need for improved techniques for visualizing 3D semiconductor structures. Examples of such structures include, but are not limited to, memory holes, finFETs, and DRAM cells in 3D memory (eg, 3D flash memory).

In some embodiments, a method of visualizing a semiconductor structure includes inspecting an area of a semiconductor wafer in a semiconductor metrology tool. The semiconductor wafer may include at least one of semiconductor logic circuits or semiconductor memory circuits. The detected area is contained in to A plurality of instances of a 3D semiconductor structure are periodically arranged in one less dimension. The method also includes, in a computer system including one or more processors and memory storing instructions executed by the one or more processors, generating a respective instance of one of the 3D semiconductor structures based on the detection a model. The method further includes rendering, in the computer system, an image of the model showing a 3D shape of the model and providing the image to a device for display.

In some embodiments, a semiconductor inspection system includes a semiconductor metrology tool and a computer system having one or more processors and memory storing one or more programs executed by the one or more processors. The one or more programs contain instructions for performing all or a portion of the above methods. In some embodiments, a non-transitory computer-readable storage medium stores one or more programs configured to be executed by a computer system. The one or more programs contain instructions for performing all or a portion of the above methods.

100: Charts

110: Charts

200: Method

202: step/detection step

204: Steps

206: Steps

208: Steps

210: Steps

212: Steps

214: Steps

216: Steps

218: Steps

220: Steps

222: Steps

224: Steps

226: User input

300: Video

302-1 to 302-7: Memory holes

304: Modeled slice/slice

350: Video

352-1: Channel

352-2: Channel

352-4: Clearance

400A: Video

400B: New Image/Image

400C: New Image/Image

400D: New Image/Image

402: Top surface

404: Front Side Surface

406: Bottom surface

500: Video

502: Top surface

504: Front Side Surface

506: Bend

550: Video

552: Top Surface

554: Front Side Surface

600: Video

602: Side View

604: Arrow

606-1 to 606-6: Cross Sections

700: Video

702-1 to 702-5: Cross Sections

704-1: Outline

704-2: Outline

720: Video

722-1 to 722-5: Cross Sections

724-1: Outline

724-2: Outline

740: Video

742-1 to 742-4: Cross Sections

744-1: Outline

744-2: Outline

800: Video

802: Modeled volume/volume

804-1: Memory hole

804-2: Memory hole

804-3: Memory hole

810: Video

900: Video

902: Bottom surface

904: User selectable cross section

1000: Semiconductor Inspection System

1002: Processor

1004: Communication Bus

1006: User Interface

1008: Display

1010: Memory

1012: Operating Systems

1014: Model Generation Module

1016: Model update mod

1018: Image presentation module

1020: Image transmission module

1022: Database

1030: Internet

1032: Semiconductor Metrology Tools / Metrology Tools

For a better understanding of the various described embodiments, reference should be made to the following description in conjunction with the following drawings.

1A shows a graph showing the variation of the CD profile of a memory hole along its depth.

FIG. 1B shows a graph showing the slope of a memory hole along its depth.

2 shows a flowchart of one method of visualizing semiconductor structures in accordance with some embodiments.

3A shows an image of an isometric projection of a modeled slice of a 3D semiconductor memory device having a plurality of memory holes, according to some embodiments.

3B shows an image of two finFETs according to some embodiments An isometric projection of the modeled part.

4A-4D show images of a modeled memory hole presented from different perspectives, according to some embodiments.

5A and 5B show images, which are perspective views of each modeled memory hole, according to some embodiments.

6 shows an image including a perspective view of a modeled memory hole along with cross-sections of the model at various depths, according to some embodiments.

7A-7C show architectural views of respective modeled memory holes in accordance with some embodiments.

8A and 8B show opaque and translucent images of a modeled volume in a semiconductor with memory holes, according to some embodiments.

9 shows an image including a bottom surface of a modeled memory hole and a user-selectable cross-section, according to some embodiments.

10 is a block diagram of a semiconductor inspection system in accordance with some embodiments.

Throughout the drawings and the description, the same reference numerals refer to corresponding parts.

Reference will now be made in detail to the various embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of one of the various described embodiments. However, it will be apparent to those of ordinary skill that the various described embodiments may be practiced without these specific details. In other instances, well-known methods, procedures, components, circuits, and networks have not been described in detail so as not to unnecessarily obscure aspects of the embodiments.

1A shows a graph 100 showing the variation of the critical dimension (CD) profile (eg, diameter) of a memory hole along its depth. The memory hole extends vertically through a three A three-dimensional (3D) semiconductor memory structure (eg, 3D flash memory), where the vertical direction (in other figures, the z-axis) corresponds to depth. The CD profile is measured in nanometers (nm). Diagram 100 corresponds to a vertical cross-section of a memory hole.

FIG. 1B shows a graph 110 of the slope of a memory hole along its depth. Ideally the slope should be zero so that the chart shows a straight vertical line. In practice, however, the memory hole at any given depth may have an offset relative to one of the holes at its surface. This offset, measured in nanometers, is the slope. It can be determined by measuring the offset between a specified point on the surface of the memory hole (eg, the center of the memory hole, a specified point on the circumference of the memory hole, etc.) and a corresponding point at the depth Determines the slope at a given depth.

Graphs 100 and 110, each showing the variation of a parameter along a single dimension, limit the information conveyed by the low-dimensional graphs. Each of graphs 100 and 110 provides only a limited indication of the shape of memory holes. A more robust visualization method to address this problem by providing a sense of the 3D shape of a memory hole or another semiconductor structure will now be described.

FIG. 2 shows a flowchart of a method 200 of semiconductor structure visualization in accordance with some embodiments. Method 200 produces images that show 3D shapes and thus avoid the disadvantages of graphs 100 and 110 (FIGS. 1A and 1B). The method 200 is described with reference to FIGS. 3A-8 , which give examples of images showing the 3D shape of a semiconductor structure. (Technically, the images show models of semiconductor structures, where the models are generated based on the results of semiconductor metrics, as described below). The steps in method 200 may be combined or broken down.

In method 200, an area of a semiconductor wafer is inspected (202) using a semiconductor metrology tool (eg, metrology tool 1032, Figure 10). The semiconductor wafer includes at least one of semiconductor logic circuits or semiconductor memory circuits. The circuit may only be partially fabricated at the time of the detection. The detected region is included in at least one dimension (eg, in only one dimension or in two dimensions). A plurality of instances of a 3D semiconductor structure are periodically arranged in one dimension. Optical metrology or small angle x-ray scattering (SAXS) may be performed (204) to detect the region. Examples of optical metrology techniques that can be performed include spectral ellipsometry, single wavelength ellipsometry, beam profile ellipsometry, beam profile reflectometry, single wavelength reflectometry, angle-resolved reflectometry, spectral reflectance measurement, scatterometry and Raman spectroscopy. Examples of SAXS techniques that can be performed include transmissive SAXS, reflective SAXS, and grazing incidence SAXS.

In some embodiments, the 3D semiconductor structure is a memory hole in a 3D memory (eg, 3D flash memory), a fin field effect transistor (finFET) or portion thereof, or a dynamic random access Memory (DRAM) cells or portions thereof. A memory hole can be inspected when it is empty (eg, after etching but before filling), when it is filled, or at some intermediate step between etching and completing filling. Likewise, other structures can be tested at various steps in their processes. The detected area may thus include (206) a periodic configuration of memory holes in a 3D memory, a periodic configuration of finFETs, or an array of DRAM cells. Alternatively, other 3D semiconductor structures can be inspected.

Steps following steps 202, 204, and/or 206 (ie, steps 208, etc.) are performed in a computer system (eg, the computer system of semiconductor inspection system 1000, Figure 10) communicatively coupled to the metrology tool.

Based on the measurements collected during inspection step 202, a model of a respective instance of one of the 3D semiconductor structures is generated (208). In some embodiments, according to step 206, the respective instance is either a respective memory hole, a respective finFET or a portion thereof, or a respective DRAM cell or a portion thereof.

In some embodiments, to generate this model, a geometric model (ie, a parameterized geometric model) of a 3D semiconductor structure with parameterized dimensions is obtained (210). the geometric model A model can also contain information about material properties and is therefore a parametric geometry/material model. The parameterized geometric model (eg, a geometry/material model) is typically formed in advance prior to the detection step 202 . The measurements collected during the detection step 202 are used (212) to determine the value of the parameterized dimension. This determination can be made by performing regression on the parameters of a geometric model (eg, a geometric/material model). For example, this determination can be made using a machine learning model trained using a training set of measurements (actual and/or simulated) for which a determination has been made for a parameterized geometric model (eg, The corresponding parameter value of the geometry/material model).

In some other embodiments, to generate this model, a set of measurements (actual and/or simulated) are obtained (214) for different instances of the 3D semiconductor structure. Each group is marked with its own value for the dimension. Machine learning is performed using the set and the measurements collected during the detection step 202 to determine (216) the value of the size for the respective instance. One of the parametric geometric models of the 3D semiconductor structure was not used.

An image of a model showing a 3D shape of a model is presented (218). The image may show a portion of the 3D shape of the model, eg, because one or more surfaces and/or sides are obscured or absent, and/or because the image includes a limited number of cross-sections. Alternatively, the imagery may show the full 3D shape of the model, eg, using augmented or virtual reality (AR/VR) or holography. Models and images can be voxelized such that their equivalence is built using voxels (volume elements, the 3D equivalents of which are pixels). The image is provided (224) to a device for display. In one example, the image is provided to one of the display screens of the computer system performing steps 208-224 (eg, display 1008, Figure 10). In another example, the image is transmitted to a different electronic device (eg, a client computer or mobile electronic device with a display, an AR/VR viewer, a 3D stereoscopic viewer, a holographic display system, etc.) for display. In yet another example, the image is transmitted to a 3D printer that can additionally manufacture an object having the shape of the model, This displays the 3D shape of the model.

In some embodiments, the image includes (220) a projection for two-dimensional (2D) display. For example, the projection may be an axonometric projection (eg, an isometric, bi-contoured, or unequal) projection of the sides of the display model. The dimensions of the projections can therefore share a common scale or have different scales. When the projection is to be displayed in 2D, it shows one of the 3D shapes of the model (but not the entire 3D shape according to some embodiments, as some sides and/or surfaces may be obscured by visible sides and/or surfaces).

3A shows an image 300 of a modeled one of a 3D semiconductor memory device (eg, a 3D flash memory) having a plurality of memory holes 302-1 through 302-7, according to some embodiments An isometric projection of one of the slices 304 . Slice 304 may include multiple layers (eg, a series of alternating oxide (SiO ₂ ) and nitride (Si ₃ N ₄ ) layers) through which memory holes 302 extend vertically. Image 300 shows only the 2D top surfaces of memory holes 302-1, 302-4, and 302-7, but shows cross-sectional views of memory holes 302-2, 302-3, 302-5, and 302-6. The cross-sectional views of memory holes 302-3 and 302-6 show the 3D shape of their iso-back half relative to the plane through which they have been iso-sliced. Image 300 is thus an instance of the image of step 220 . The 3D shapes of memory holes 302-3 and 302-6 may be displayed using outlines (as in Figure 3A), shading, shading, or other suitable graphics techniques for 2D projection of 3D objects. Image 300 is thus an instance of the image of step 220 .

3B shows an image 350 that is an isometric projection of a modeled portion of two finFETs, according to some embodiments. The first finFET has a channel 352-1 and the second finFET has a channel 352-2. Channels 352 are separated by a gap 352-4 that separates one of the two finFETs. With respect to the memory holes 302-3 and 302-6 of Figure 3A, the 3D shape of these structures may be shown using outlines (as in Figure 3B), shading, shading, or other suitable graphics techniques. Image 350 is another example of the image of step 220 .

As shown in images 300 and 350, the images of steps 218 and 224 may show the 3D shape of instances of a semiconductor structure or portion thereof (eg, instances of memory holes 302 or channels 352).

In some embodiments, the viewing angle of the image may be changed in response to user input 226 . 4A shows an image 400A of a modeled memory hole presented from a first perspective, according to some embodiments. From the first perspective, image 400A shows the top surface 402 and front side surface 404 of the memory hole. Using outlines (or shading, shading, etc.) to show a 3D shape of a memory hole: Image 400A shows the 3D curvature of front side surface 404 . The bottom surface 406 and backside surface of the memory hole are shadowed in this view. In response to receiving user input 226 specifying a change in viewing angle, the computer system performing method 200 presents (218) a new image 400B, 400C or 400D from the changed viewing angle and provides (224) the new image 400B, 400C or 400D for use device for display. (Alternatively, the new image may have been presented and stored before user input 226 was received, and provided in response to user input 226). This process can be repeated to allow the user to view the memory holes from multiple perspectives (eg, viewing images 400B, 400C, and/or 400D in sequence). For example, the user can rotate the view of the memory hole in a specified direction. Image 400B shows the 3D curvature of front side surface 404 but does not show a side view of top surface 402, bottom surface 406, or one of the back side surfaces. Image 400C shows only a bottom view of bottom surface 406 . Image 400D shows only a top view of top surface 402 . Images 400C and 400D are not examples of the images of step 218 because they do not show a 3D shape, but if they were rotated slightly to show a side surface or part of a side surface, they would show a 3D shape.

In some embodiments, the model itself may be changed in response to user input 226 (eg, so that the arrow labeled "User Input 226" returns to step 208 instead of step 218), instead of changing the perspective from which the image is presented, eg, User input 226 may specify individual instances A change in one or more dimensions (eg, distances) or angles of a model of an item. The model is updated in response to user input 226 so that the model no longer corresponds to the measurements collected during the detection of step 202 . An image of the updated model is then presented and sent to the user's device for display. This modification allows the user to explore how much headroom a semiconductor structure has before reaching a point of failure (eg, before an adjacent conductive structure is shorted). The image of the updated model may be annotated to indicate update(s) of the model (eg, to indicate a change in size, a change in one or more angles, etc.). The annotation may be user-driven (eg, indicating a specified distance or angle based on user input 226).

5A shows an image 500 that is a perspective view of a modeled memory hole, according to some embodiments. Like image 400A (FIG. 4A), image 500 shows the 3D curvature of a top surface 502 and a front side surface 504 of the memory hole. But image 500 also shows a slope, whereas the memory holes of image 400A have no slope (ie, the slope is substantially zero, so that the memory holes are substantially straight in the vertical direction). A top portion of the memory hole in image 500 slopes downward at an oblique angle until a bend 506 in a middle portion of the memory hole (where the memory hole is curved toward the vertical plane). A bottom portion of the memory hole extends downward without significant inclination. If the slope is defined as an offset relative to the top surface (as discussed with respect to Figure IB), then the slope of the bottom portion below the bend 506 is substantially constant.

5B shows an image 550, which is a perspective view of a different modeled memory hole, according to some embodiments. Like image 400A (FIG. 4A) and image 500 (FIG. 5A), image 550 shows the 3D curvature of a top surface 552 and a front side surface 554 of the memory hole. Image 550 shows that top surface 552 is elliptical. The shape of the front side surface 554 implies that the memory holes maintain this elliptical shape as they extend downward.

In which the respective instances of the 3D semiconductor structures are some of the respective memory holes In an embodiment, the images show the elliptical shape of the memory hole for a plurality of cross-sections (eg, horizontal cross-sections) of the respective memory hole. The images may also show the helicity of the respective memory holes and/or the inclination of the memory holes for multiple cross-sections. Helicity indicates a change in orientation of the shape of an ellipse and can be defined as a degree of rotation (eg, as measured in degrees or radians) of the long (or equivalently, short) axis of the ellipse relative to the top surface. For example, FIG. 6 shows an image 600 including a perspective view (here, side view 602 ) of a modeled memory hole along with cross-sections of the memory hole at various depths, according to some embodiments. 606-1 to 606-6. Arrows 604 between the side view 602 and the respective cross-sections 606 indicate the depths for the respective cross-sections 606 . Cross-section 606 shows the size (eg, CD) and oval shape of the memory holes at various depths. Cross-section 606 also shows the helicity of the memory holes at various depths: the ellipse of cross-section 606 rotates with increasing depth. Although the memory holes in FIG. 6 have a slope of substantially zero, the cross-section 606 may also exhibit slope, for example, by having varying positions within its surrounding rectangle to demonstrate offset relative to the top surface (if it exists).

In some embodiments, the image highlights or otherwise indicates a deviation from an elliptical shape for a plurality of cross-sections. For example, a particular cross-section 606 may not be exactly elliptical. Portions of a cross-section that deviate from an ellipse (eg, fall outside the ellipse or cannot reach the edges of the ellipse) can be highlighted (eg, shown with a particular color, shading, or fill pattern). More generally, an image may highlight or otherwise indicate a deviation of a 3D shape or a portion thereof (eg, a cross-section) from a nominal shape. A memory hole and ellipse are just one example of a respective structure and nominal shape for which this deviation can be shown. Other examples are possible.

In some embodiments, the cross-sections may be shown such that they appear to be arranged along an axis (eg, the z-axis corresponding to depth), where the axis appears to be at an inclination (eg, at an oblique angle) to the page intersect. In this configuration, the cross-sections may partially overlap (eg, where the respective cross-sections Partially shaded continuous cross section).

In some embodiments, the image includes an architectural view of the model in which the cross-sections are connected by contour lines (eg, the contour lines intersect corresponding points on the circumference of each cross-section). This architectural view shows the 3D shape of the model (but not the entire 3D shape, due to the limited number of cross-sections and contours), but will be displayed in 2D. 7A-7C show images 700, 720, and 740 of architectural views of modeled memory holes, according to some embodiments.

In image 700, cross sections 702-1 to 702-5 are connected by contour lines 704-1 and 704-2. Cross-section 702 is elliptical, as shown by the major and minor axes of the ellipse for cross-section 702 . If the elliptical shape of a memory hole, as quantified by its ellipticity (eg, the ratio of the length of the major axis to the minor axis), remains constant as a function of depth, so does the memory hole CD and thus its size. Memory holes are not helical: the ellipse of cross-section 702 does not rotate with depth. However, memory holes do have a slope that varies with depth (as shown by the curvature of contour lines 704-1 and 704-2).

In image 720, cross-sections 722-1 to 722-5 are connected by contour lines 724-1 and 724-2. The elliptical shape, and thus ellipticity, changes with depth, with the minor axis increasing in length and becoming the major axis. The size of a memory hole, and thus its CD, varies significantly with depth. However, the ellipse does not rotate, indicating no helicity.

In image 740, cross-sections 742-1 to 742-4 are connected by contour lines 744-1 and 744-2. While the ellipticity and CD of the cross-section 742 remain constant, the memory holes exhibit helicity: the ellipse of the cross-section 742 rotates with increasing depth. The axis of the visible ellipse rotates.

The use of multiple cross-sections can thus provide extensive information about the 3D shape, as shown in Figures 6 and 7A-7C.

8A and 8B show a die in a semiconductor according to some embodiments Images 800 and 810 of volume 802 are modeled. Volume 802 includes memory holes 804-1, 804-2, and 804-3, which may be part of a periodic 2D configuration of memory holes. In image 800, volume 802 is shown as opaque. Image 800 shows the top surface of memory hole 804-1, a portion of the top surface of memory hole 804-2, and a portion of the top surface of memory hole 804-3 along with a cross-sectional vertical profile of memory hole 804-3. In image 810, volume 802 is translucent and the 3D shapes of all three memory holes 804-1, 804-2, and 804-3 are visible. Thus, both images 800 and 810 show at least a portion of the 3D shape of at least one semiconductor structure (as modeled in step 208), but image 810 shows significantly more 3D information than image 800.

In some embodiments, the image includes at least one of a top surface or a bottom surface of the modeled respective instances of the 3D semiconductor structure and also includes between the top surface and the modeled respective instances of the 3D semiconductor structure A user-selectable cross-section between the bottom surfaces (eg, a horizontal cross-section perpendicular to the vertical z-axis). For example, FIG. 9 shows an image 900 including a bottom surface 902 of a modeled memory hole and a user-selectable cross-section 904 in accordance with some embodiments. User selectable cross section 904 may be translucent. The vertical position of the user-selectable cross-section 904 can be changed based on the user input 226 (eg, in response to the user input 226 specifying a new vertical position, the computer executing the method 200 repeats steps 218 and 220 to present and provide for use therein or a new image of the optional cross-section 904 in the last specified vertical position). By providing multiple cross-sections (ie, top and/or bottom surfaces and user-selectable cross-sections), the image shows the 3D shape of the model (but not the entire 3D shape, due to the limited number of cross-sections and contours) , but the imagery can be used for 2D display. In some embodiments, the image includes a plurality of user-selectable cross-sections, one or more (eg, all) of which may be translucent.

In some embodiments, the imagery either includes (222) an AR/VR image or a 3D stereoscopic image. The device to which the image is provided in step 224 can thus be an AR/VR viewing device device (eg, AR/VR goggles; AR glasses) or a 3D stereoscopic viewer.

For example, the AR/VR image is a first AR/VR image of a model presented from a first perspective. The method 200 further includes, after sending the first AR/VR imagery to the AR/VR viewing device for display, receiving 226 user input requesting a change in viewing angle. In response to the user input, step 222 is repeated to render a second AR/VR image of the model from a second perspective. Each step 224 sends the second AR/VR imagery to the AR/VR viewing device for display. In this way, the user can effectively move around the image in AR/VR.

In another example, the AR/VR image has a first AR/VR image of the model that corresponds to an appearance as one of the values of a parameter of the model determined based on measurements collected during the detection of step 202 . The method 200 further includes, after sending the first AR/VR imagery to the AR/VR viewing device for display, receiving 226 user input requesting a change in one of the values of the parameter. In response to the user input, the values of the parameters for the model are changed and a second AR/VR image of the model is presented per step 222 having an appearance corresponding to the changed values. Each step 224 sends the second AR/VR imagery to the AR/VR viewing device for display. In this way, the user can explore potential variations in the 3D shape of the semiconductor structure (eg, how much margin the semiconductor structure has before reaching a point of failure).

In some embodiments, an image generated according to method 200 shows (eg, highlights) the uncertainty associated with its 3D shape of the model according to step 218 . For example, to the extent that there is uncertainty in CD, a region of uncertainty at the side of the associated modeled semiconductor structure instance (eg, along the walls of a memory hole) may differ from the associated modeled semiconductor structure instance A color, shading, or fill pattern display of the remainder of the item to indicate uncertainty in the precise location of those sides. Blur (for example, blurring of edges) or dots can be used to indicate uncertainty sex. An animation can be shown in which the 3D shape is shown changing within a range of possibilities according to the uncertainty (eg, the position of the edge changes). Other examples are possible.

The metrics described above, such as tilt, ellipticity, deviation from a nominal shape (eg, an elliptical shape), and helicity are merely examples of metrics that may be shown in an image generated using method 200 . Other indices (eg, derived indices, indices generated using a Fourier transform, etc.) may also or alternatively be displayed.

In some embodiments, generating an image according to method 200 includes continuously displaying an animation of successive portions of the 3D shape. For example, the animation may continuously show successive cross-sections (such as cross-sections of increasing or decreasing depth). In another example, the animation shows the rotation of a 3D shape, with successive sections rotating in and out of view.

In some embodiments, the data for the model may be overlaid on the image of the model, such that the image provided to a user's device in step 224 includes the overlaid data. This data may contain numbers that specify the values used for one or more parameters/indicators of the model. The data can contain vectors specifying electric fields or strains. Other examples are possible.

The images shown in FIGS. 3A-8 are merely examples of 3D visualization techniques that may be used in method 200 . Other examples are possible. In some embodiments, the images generated by method 200 are used to predict the performance of a semiconductor device. In some embodiments, images generated by method 200 are used for comparison with reference images (eg, CD-SEM or TEM images). In some embodiments, the images generated by method 200 are used to identify program or design changes.

10 is a block diagram of a semiconductor inspection system 1000 in accordance with some embodiments. Semiconductor inspection system 1000 includes a semiconductor metrology tool 1032 and has one or more processors 1002 (eg, CPU and/or GPU), optional user interface 1006, memory 1010, and A computer system that interconnects one or more of these components with a communication bus 1004. The computer system may be communicatively coupled to the metrology tool 1032 through one or more networks 1030 . The computer system may further include one or more network interfaces (wired and/or wireless, not shown) for communicating with the metrology tool 1032 and/or the remote computer system. In some embodiments, metrology tool 1032 performs optical metrology and/or SAXS.

User interface 1006 may include a display 1008 and/or one or more input devices (eg, a keyboard, mouse, touch-sensitive surface of display 1008, etc.). Display 1008 may display an image of method 200 in accordance with some embodiments.

Memory 1010 includes volatile and/or non-volatile memory. Memory 1010 (eg, non-volatile memory within memory 1010) includes a non-transitory computer-readable storage medium. The memory 1010 optionally includes one or more storage devices remotely located from the processor 1002 and/or a non-transitory computer-readable storage medium removably insertable into the computer system. In some embodiments, memory 1010 (eg, a non-transitory computer-readable storage medium of memory 1010 ) stores the following modules and data, or a subset or superset thereof, including those used to handle various basic system services and an operating system 1012 , a model generation module 1014 , a model update module 1016 , an image rendering module 1018 , an image transmission module 1020 , and a self-metric tool 1032 , and programs for performing hardware-dependent tasks A database 1022 of measurements.

Memory 1010 (eg, the non-transitory computer-readable storage medium of memory 1010 ) thus includes instructions for performing method 200 ( FIG. 2 ) in conjunction with metrology tool 1032 . Each of the modules stored in memory 1010 corresponds to a set of instructions for performing one or more functions described herein. Split modules need not be implemented as split software programs. Modules and various subsets of modules may be combined or otherwise reconfigured. In some embodiments, memory 1010 stores a subset or superset of the modules and/or data structures identified above.

Figure 10 is intended more as a functional description of the various features that may be present in a semiconductor inspection system rather than as a structural schematic. For example, the functionality of the computer system in semiconductor inspection system 1000 may be divided among multiple devices. A portion of the modules stored in memory 1010 may alternatively be stored in one or more other computer systems communicatively coupled to the computer system of semiconductor inspection system 1000 through one or more networks.

For purposes of illustration, the preceding description has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the scope of the patentable scope of the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teachings. These embodiments were chosen in order to best illustrate the principles underlying the scope of the invention and its practical application, to thereby enable those skilled in the art to best utilize the invention with various modifications as are suitable for the particular use contemplated. Example.

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Claims (42)

A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on A model of a respective instance of the 3D semiconductor structure is generated by inspection of an area of a semiconductor wafer comprising a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic configuration by a semiconductor metrology tool; presenting (rendering) an image of the model showing a 3D shape of the model, the image comprising: at least one of a top surface or a bottom surface of the respective instance of the 3D semiconductor structure, and the 3D semiconductor structure a user-selectable translucent cross-section between the top surface and the bottom surface of each instance; and providing the image to a device for display. The computer-readable storage medium of claim 1, wherein the image includes a projection of the model to be displayed in two dimensions. The computer-readable storage medium of claim 1, wherein the image shows uncertainty for the 3D shape in the model. The computer-readable storage medium of claim 1, wherein the image indicates the 3D shape or the 3D The deviation of a cross-section of a shape from a nominal shape. The computer-readable storage medium of claim 1, wherein the image comprises an animation that successively displays successive portions of the 3D shape. The computer-readable storage medium of claim 1, wherein: the image is a 3D stereoscopic image; and providing the image includes sending the image to a 3D stereoscopic viewer. The computer-readable storage medium of claim 1, wherein: the plurality of instances of the 3D semiconductor structure include a periodic arrangement of memory holes in a 3D memory; and the respective instances of the 3D semiconductor structure include A respective memory hole. The computer-readable storage medium of claim 7, wherein the image shows an elliptical shape of the respective memory holes for a plurality of cross-sections of the respective memory holes. The computer-readable storage medium of claim 8, wherein the image shows a helicity of the respective memory holes for the plurality of cross-sections, wherein the helicity is indicative of a change in orientation of the elliptical shape. The computer-readable storage medium of claim 7, wherein the image indicates a deviation from an elliptical shape for the plurality of cross-sections. The computer-readable storage medium of claim 7, wherein the image shows the tilt of the respective memory holes. The computer-readable storage medium of claim 1, wherein: the plurality of instances of the 3D semiconductor structure include a periodic configuration of finFETs; and the respective instances of the 3D semiconductor structure include a respective finFET or a respective finFET part. The computer-readable storage medium of claim 1, wherein: the plurality of instances of the 3D semiconductor structure include an array of DRAM cells; and the respective instances of the 3D semiconductor structure include a respective DRAM cell or a respective DRAM cell part. The computer-readable storage medium of claim 1, wherein generating the model of the respective instances of the 3D semiconductor structure comprises: obtaining a geometric model of the 3D semiconductor structure having parameterized dimensions; and using the model in the Measurements collected during inspection to determine the value of these parameterized dimensions. The computer-readable storage medium of claim 1, wherein generating the model of the respective instances of the 3D semiconductor structure comprises: obtaining sets of measurements for the different instances of the 3D semiconductor structure, the sets marked with rulers and performing machine learning using the sets and measurements collected during the inspection to determine the values of the dimensions for the respective instance, wherein the generation is performed without using one of the 3D semiconductor structures. Executed in the case of a parametric geometric model. The computer-readable storage medium of claim 1, wherein inspecting the region of the semiconductor wafer comprises performing an optical metrology technique selected from the group consisting of: spectral ellipsometry, single-wavelength ellipsometry, Beam profile ellipsometry measurement, beam profile reflection measurement, single wavelength reflection measurement, angle-resolved reflection measurement, spectral reflection measurement, scattering measurement and Raman spectroscopy. The computer-readable storage medium of claim 1, wherein detecting the region of the semiconductor wafer includes performing small angle x-ray scattering. A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on A model of a respective instance of the 3D semiconductor structure is generated by inspection of an area of a semiconductor wafer comprising a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic arrangement by a semiconductor metrology tool; a first perspective presenting a first augmented reality or virtual reality (AR/VR) image of the model showing a 3D shape of the model; providing the first AR/VR image to an AR/VR viewing device for display; after providing the first AR/VR image to the AR/VR viewing device for display, receiving a request for a change in viewing angle user input; in response to the user input, presenting a second AR/VR image of the model from a second perspective; and providing the second AR/VR image to the AR/VR viewing device for display . A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on A model of a respective instance of the 3D semiconductor structure is generated by inspection of an area of a semiconductor wafer comprising a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic configuration by a semiconductor metrology tool; presenting A first augmented reality or virtual reality (AR/VR) image of the model displayed with an appearance corresponding to a value of a parameter of the model as determined based on measurements collected during the detection a 3D shape of the model; providing the first AR/VR imagery to an AR/VR viewing device for display; after providing the first AR/VR imagery to the AR/VR viewing device for display , receive user input requesting a change in one of the values of the parameter; in response to the user input, change the value of the parameter for the model; present the parameter with an appearance corresponding to one of the changed values a second AR/VR image of one of the models; and providing the second AR/VR image to the AR/VR viewing device for display. A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on A model of a respective memory hole is generated by inspection of an area of a semiconductor wafer including a periodic arrangement of memory holes in a three-dimensional (3D) semiconductor memory by a semiconductor metrology tool; presentation showing the an image of the model of a 3D shape of the model, wherein the image shows an elliptical shape of the respective memory hole for a plurality of cross-sections of the respective memory hole, and shows the respective memory for the plurality of cross-sections helicity of a body pore, wherein the helicity is indicative of a change in orientation of the elliptical shape; and providing the image to a device for display. A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on A model of a respective instance of the 3D semiconductor structure is generated by inspection of a region of a semiconductor wafer comprising a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic configuration by a semiconductor metrology tool, which Including: obtaining sets of measurements for different instances of the 3D semiconductor structure, the sets being labeled with respective values of dimensions; and performing machine learning using the sets and measurements collected during the inspection to determine the the values of those dimensions of that respective instance, wherein the generating is performed without using a parametric geometric model of the 3D semiconductor structure; rendering an image of the model showing a 3D shape of the model; and providing the image to a device for display. A method of visualizing a semiconductor structure, comprising: in a semiconductor metrology tool: on a semiconductor wafer comprising at least one of a semiconductor logic circuit or a semiconductor memory circuit, inspecting the semiconductor wafer for inclusion in at least one dimension a region on a plurality of instances of a three-dimensional (3D) semiconductor structure that is periodically arranged; and on a memory that includes one or more processors and stores instructions executed by the one or more processors In the computer system: generating a model of each instance of the 3D semiconductor structure based on the detection; presenting an augmented reality or virtual reality (AR/VR) image of the model showing a 3D shape of the model; and The AR/VR imagery is provided to an AR/VR viewing device for display. The method of claim 22, wherein the AR/VR image is a first AR/VR image of the model presented from a first perspective, the method further comprising, after sending the first AR/VR image to the AR /VR viewing device for display after: receiving user input requesting a change in perspective; in response to the user input, presenting a second AR/VR image of the model from a second perspective; and The second AR/VR imagery is sent to the AR/VR viewing device for display. The method of claim 22, wherein the AR/VR image has a first AR/VR of the model corresponding to an appearance as determined based on a value of a parameter of the model based on measurements collected during the detection image, the method further comprising, after sending the first AR/VR image to the AR/VR viewing device for display: receiving user input requesting a change in one of the values of the parameter; responsive to the using input, make the change in the values of the parameter for the model; present a second AR/VR image of the model with an appearance corresponding to the change; and the second AR/VR image VR images are sent to the AR/VR viewing device for display. The method of claim 22, wherein the AR/VR imagery exhibits uncertainty for the 3D shape in the model. The method of claim 22, wherein the AR/VR imagery indicates the 3D shape or a deviation of a cross-section of the 3D shape from a nominal shape. The method of claim 22, wherein the AR/VR imagery includes an animation of the 3D shape continuously showing successive portions of the 3D shape. The method of claim 27, wherein the animation shows a rotation of the 3D shape. The method of claim 22, wherein the presenting includes overlaying data for the model on the AR/VR imagery. The method of claim 22, wherein: the plurality of instances of the 3D semiconductor structure include a periodic arrangement of memory holes in a 3D memory; and the respective instances of the 3D semiconductor structure include a respective memory hole. The method of claim 30, wherein the AR/VR image shows an elliptical shape of the respective memory holes. The method of claim 31, wherein the AR/VR imagery exhibits helicity for the elliptical shape, wherein the helicity is indicative of a change in orientation of the elliptical shape. The method of claim 30, wherein the AR/VR imagery indicates a deviation from an elliptical shape for the respective memory holes. The method of claim 30, wherein the AR/VR image shows the slope of the respective memory holes. The method of claim 22, wherein: the plurality of instances of the 3D semiconductor structure include a periodic configuration of finFETs; and the respective instances of the 3D semiconductor structure include a respective finFET or a respective finFET part. The method of claim 22, wherein: the plurality of instances of the 3D semiconductor structure include an array of DRAM cells; and the respective instances of the 3D semiconductor structure include a respective DRAM cell or a portion of a respective DRAM cell. The method of claim 22, wherein generating the model of the respective instance of the 3D semiconductor structure comprises: obtaining a geometric model of the 3D semiconductor structure with parameterized dimensions; and using measurements collected during the inspection to Determine the values of these parameterized dimensions. The method of claim 22, wherein generating the model of the respective instances of the 3D semiconductor structure comprises: obtaining sets of measurements for different instances of the 3D semiconductor structure, the sets being marked with respective values of dimensions; and performing machine learning using the sets and measurements collected during the inspection to determine the values of the dimensions for the respective instance, wherein the generation is performed without using a parameterized geometric model of the 3D semiconductor structure Executed under the circumstances. The method of claim 22, wherein inspecting the region of the semiconductor wafer comprises performing an optical metrology technique selected from the group consisting of: spectral ellipsometry, single wavelength ellipsometry Circular polarization measurement, beam profile elliptical polarization measurement, beam profile reflection measurement, single wavelength reflection measurement, angle-analytic reflection measurement, spectral reflection measurement, scattering measurement and Raman spectroscopy. The method of claim 22, wherein inspecting the region of the semiconductor wafer includes performing small angle x-ray scattering. A semiconductor inspection system comprising: a semiconductor metrology tool; one or more processors; and memory storing one or more programs executed by the one or more processors, the one or more programs including Instructions for performing the following operations: based on inspection by the semiconductor metrology tool of an area of a semiconductor wafer containing a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic configuration, generating an indication of the 3D semiconductor structure; a model of each instance; presenting an augmented reality or virtual reality (AR/VR) image of the model showing a 3D shape of the model; and providing the AR/VR image to an AR/VR viewing device for display. A non-transitory computer-readable storage medium storing one or more programs for execution by one or more processors of a computer system, the one or more programs including instructions for performing the following operations: based on The 3D semiconductor is produced by the inspection of a region of a semiconductor wafer containing a plurality of instances of a three-dimensional (3D) semiconductor structure in a periodic configuration by a semiconductor metrology tool a model of each instance of a structure; presenting an augmented reality or virtual reality (AR/VR) image of the model showing a 3D shape of the model; and providing the AR/VR image to an AR/VR image VR viewing device for display.

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