TWI771252B - Electronic test system and electronic test method - Google Patents

Abstract

An electronic test system includes a reader, a memory, and a processor. The reader is configured to read and write a plurality of data. The memory is configured to store a plurality of commands. The processor is configured to obtain a plurality of commands from the memory to perform the following steps: generating the first random sequence data by the processor; writing the first random sequence data by the reader; reading the read value by the reader, and confirming by the processor whether the read value is the same as the first random sequence data; when the read value is the same as the first random sequence data, the processor generates the second random sequence data, wherein the first random sequence data and the second random sequence data do not overlap; and when the read value is different from the first random sequence data, the first random sequence data is output by the reader.

Description

Electronic test system and electronic test method

This case is about a test system and test method, and especially about an electronic test system and electronic test method.

With the development of the Dynamic Random Access Memory (DRAM) structure, it is easy to have specific data on the client side to cause DRAM to occur. Generally speaking, it is necessary to input various test conditions on the production side (system factory) to find out the problem, but the conditions need not be repeated and the number of conditions is extremely large, so that the production side cannot effectively find out the specific problem causing the problem. condition.

SUMMARY The purpose of this summary is to provide a simplified summary of the disclosure to give the reader a basic understanding of the disclosure. This summary is not an exhaustive overview of the disclosure, and it is not intended to identify key/critical elements of the present embodiments or to delimit the scope of the present disclosure.

A technical aspect of the content of this case relates to an electronic test system, which includes a reader, a memory and a processor. The reader/writer is used to read and write plural information. The memory is used to store a plurality of instructions. The processor is used for obtaining the complex number instruction from the memory to perform the following steps: generating the first random number sequence information by the processor; writing the first random number sequence information by the reader writer; reading the read value by the reader writer, and The processor confirms whether the read value is the same as the first random number sequence information; when the read value is the same as the first random number sequence information, the processor generates second random number sequence information, wherein the first random number sequence information is the same as the first random number sequence information. The information of the two random number sequences is not repeated; and when the read value is different from the information of the first random number sequence, the first random number sequence information is output by the reader/writer.

One of the technical aspects of the content of this case is related to an electronic testing method. The electronic testing method comprises: generating first random number sequence information; writing the first random number sequence information; reading the read value to confirm whether the read value is the same as the first random number sequence information; when the read value is the same as the first random number sequence information When the same, the second random number sequence information is generated, wherein the first random number sequence information and the second random number sequence information are not repeated; and when the read value is different from the first random number sequence information, the first random number sequence information is output.

Therefore, according to the technical content of this case, the electronic testing system and electronic testing method shown in the embodiments of this case can automatically quantify and generate random and non-repetitive test information.

After referring to the following embodiments, those with ordinary knowledge in the technical field of this case can easily understand the basic spirit and other inventive purposes of this case, as well as the technical means and implementation modes adopted in this case.

In order to make the description of the present disclosure more detailed and complete, the following provides an illustrative description for the implementation aspects and specific embodiments of the present case; but this is not the only form of implementing or using the specific embodiments of the present case. The features of various specific embodiments as well as method steps and sequences for constructing and operating these specific embodiments are encompassed in the detailed description. However, other embodiments may also be utilized to achieve the same or equivalent function and sequence of steps.

Unless otherwise defined in this specification, the scientific and technical terms used herein have the same meanings as understood and commonly used by those of ordinary skill in the technical field to which this case belongs. In addition, unless contradicting the context, the singular noun used in this specification covers the plural form of the noun; and the plural noun used also covers the singular form of the noun.

In addition, as used herein, "coupled" may mean that two or more elements are in direct physical or electrical contact with each other, or are in indirect physical or electrical contact with each other, or two or more elements operate with each other or action.

FIG. 1 is a schematic diagram illustrating an electronic testing system according to an embodiment of the present application. As shown in the figure, the electronic testing system 100 includes a reader/writer 110 and a host 120 . In addition, the host 120 includes a memory 121 and a processor 123 . In connection relationship, the reader/writer 110 is coupled to the host 120 . In the host 120 , the processor 123 is coupled to the memory 121 . In another embodiment, the sensor 110 , the memory 121 and the processor 123 may be disposed in a single device, which is not limited herein.

In order to automatically quantify and generate random and non-repetitive test information, the present application provides an electronic test system 100 as shown in FIG. 1 , and the detailed description of the related operations will be described later.

In one embodiment, the reader/writer 110 is used for reading and writing multiple pieces of information. The memory 121 is used for storing a plurality of instructions. The processor 123 is used for obtaining the complex instruction from the memory 121 to perform the following steps: generating the first random number sequence information by the processor 123 ; writing the first random number sequence information by the reader/writer 110 ; reading the information by the reader/writer 110 The read value is obtained, and the processor 123 confirms whether the read value is the same as the first random number sequence information; when the read value is the same as the first random number sequence information, the processor 123 generates the second random number sequence information, The first random number sequence information and the second random number sequence information are not repeated; and when the read value is different from the first random number sequence information, the reader 110 outputs the first random number sequence information.

In order to make the above operation of the electronic test system 100 easier to understand, please refer to FIG. 2 and FIG. 3 together. FIG. 2 is a schematic diagram illustrating a use situation of the electronic test system as shown in FIG. 1 according to an embodiment of the present application. , FIG. 3 is a schematic diagram illustrating a use situation of the electronic testing system as shown in FIG. 1 according to an embodiment of the present application.

Please refer to FIG. 1 to FIG. 3 together. In operation, in one embodiment, the processor 123 generates first random sequence information (eg, sequence information 210 or 230 ). Then, the first random sequence information (eg, sequence information 210 or 230 ) is written by the reader/writer 110 . Then, the read value (for example: read value 220 or 240) is read by the reader/writer 110, and the processor 123 confirms whether the read value (for example: read value 220 or 240) is the same as the first random number sequence Information (eg: sequence information 210 or 230) is the same.

For example, the reader/writer 110 may be a testing machine (Automatic Test Equipment, ATE). The testing machine 110 may write the first random sequence information (eg, sequence information 210 or 230 ) into the electronic component 900 , and the electronic component 900 can be a dynamic random access memory (DRAM), and the test machine 110 can read a read value (for example: read value 220 or 240) from the electronic component 900, and use the processor 123 Confirm whether the read value (eg: read value 220 or 240) is the same as the first random sequence information (eg: sequence information 210 or 230), but this case is not limited to this.

Then, when the read value (for example: read value 220 ) is the same as the first random number sequence information (for example: number sequence information 210 ), the processor 123 generates second random number sequence information (for example: the Sequence information 230 or sequence information 210A of Figure 3), wherein the first random sequence information (eg: sequence information 210) and the second random sequence information (eg: sequence information 230 of Figure 2 or sequence information 210A of Figure 3) ) will not be repeated.

Then, when the read value (eg, read value 240 ) is different from the first random sequence information (eg, sequence information 230 ), the reader/writer 110 outputs the first random sequence information (eg, sequence information 230 ) .

Please refer to FIGS. 1 to 3 together. In one embodiment, the reader/writer 110 is used to write the second random sequence information (for example, the sequence information 230 of the second graph or the sequence information 210A of the third graph) .

Then, the read value (for example, the read value 240 in Fig. 2 or the read value 220A in Fig. 3) is read by the reader/writer 110, and the processor 123 confirms whether the read value (for example: the first The read value 240 of Figure 2 or the read value 220A of Figure 3) is the same as the second random number sequence information (eg, the sequence information 230 of Figure 2 or the sequence information 210A of Figure 3).

Next, when the read value (eg, read value 220A) is the same as the second random sequence information (eg, sequence information 210A), the processor 123 generates third random sequence information (eg, sequence information 230A) , wherein the first random sequence information (eg: sequence information 210 ), the second random sequence information (eg: sequence information 230 in Figure 2 or sequence information 210A in Figure 3 ) and the third random sequence information (eg: sequence information 230A) will not be repeated.

Then, when the read value (eg, the read value 240 ) is different from the second random sequence information (eg, the sequence information 230 ), the reader 110 outputs the second random sequence information (eg, the sequence information 230 ) .

In one embodiment, the second random sequence information includes a plurality of second random sequence information (eg, sequence information 230 in Figure 2, sequence information 210A and 230A in Figure 3), and the first random sequence information (eg: The sequence information 210 ) and the plurality of second random sequence information (for example, the sequence information 230 in Figure 2 and the sequence information 210A and 230A in Figure 3 ) do not overlap.

Referring to FIG. 2 , in one embodiment, the first random sequence information (eg, sequence information 210 ) and the second random sequence information (eg, sequence information 230 ) both include 2-bit sequence information. For example, the first random sequence information may be sequence information 210, and the information in sequence information 210 may be 0001001110101110, the second random sequence information may be sequence information 230, and the information in sequence information 230 may be 1101001110100010, and the sequence information Both the information in the information 210 and the information in the sequence information 230 can include 2-bit sequence information, and the 2-bit sequence information can be composed of 0 or 1, but this case is not limited to this.

Please refer to FIG. 2 , in one embodiment, the length of the first sequence information of the first random sequence information (eg, sequence information 210 ) and the length of the second sequence information of the second random sequence information (eg, sequence information 230 ) are both Including at least one of 8-bit, 16-bit and 32-bit. For example, the first random sequence information can be sequence information 210, and the information in the sequence information 210 can be 0001001110101110, there are 16 numbers in total, that is, the length of the first sequence information is 16 bits, and the second random sequence information can be The sequence information 230, and the information in the sequence information 230 can be 1101001110100010, there are 16 numbers in total, that is, the length of the second sequence information is 16 bits. In addition, the information in the sequence information 210 and the information in the sequence information 230 can also be 8 numbers or 32 numbers, that is, the length of the information of the first sequence and the length of the information of the second sequence can both be 8 bits or 32 bits, but this case is not limited to this.

FIG. 4 is a flowchart illustrating an electronic testing method according to an embodiment of the present application. The electronic testing method 400 of FIG. 4 includes the following steps:

Step 410: generate random number sequence information;

Step 420: Write random number sequence information;

Step 430: Confirm whether the read value is the same as the random number sequence information;

Step 440: Output random number sequence information.

To make the electronic test method 400 easier to understand, please refer to FIGS. 2-4 together. In one embodiment, please refer to step 410 , the first random sequence information (eg, sequence information 210 or 230 ) can be further generated.

In one embodiment, please refer to step 420, and the first random sequence information (eg, sequence information 210 or 230) can be further written.

In one embodiment, please refer to step 430, the read value (for example: read value 220 or 240) can be further read to confirm whether the read value (for example: read value 220 or 240) is the same as the first random number sequence information (Example: sequence information 210 or 230) is the same.

In one embodiment, please refer to step 430. When the read value (eg, read value 220) is the same as the first random sequence information (eg, sequence information 210), step 410 is executed to generate second random sequence information (eg: sequence information 230 or 210A), wherein the first random sequence information (eg: sequence information 210 ) and the second random sequence information (eg: sequence information 230 or 210A ) do not overlap.

In one embodiment, please refer to step 430. When the read value (eg, read value 240) is different from the first random number sequence information (eg, sequence information 230), step 440 is executed to output the first random number sequence information (Example: Sequence Info 230).

Please refer to FIG. 2 to FIG. 4 together. In one embodiment, please refer to step 410 to further generate second random sequence information (eg, sequence information 230 or 210A).

In one embodiment, please refer to step 420, and the second random sequence information (eg, sequence information 230 or 210A) can be further written.

In one embodiment, please refer to step 430, the read value (for example: read value 240 or 220A) can be further read to confirm whether the read value (for example: read value 240 or 220A) is consistent with the second random number sequence information (Example: sequence information 230 or 210A) is the same.

In one embodiment, please refer to step 430 , when the read value (eg, read value 220A) is the same as the second random sequence information (eg, sequence information 210A), step 410 is executed to be generated by the processor 123 The third random sequence information (eg: sequence information 230A), wherein the first random sequence information (eg: sequence information 210), the second random sequence information (eg: sequence information 230 or 210A) and the third random sequence information (eg: sequence information 210A) Sequence information 230A) will not be repeated.

In one embodiment, please refer to step 430. When the read value (eg, read value 240) is different from the second random sequence information (eg, sequence information 230), step 440 is executed to output the second random sequence information (Example: Sequence Info 230).

In one embodiment, the second random sequence information includes a plurality of second random sequence information (eg, sequence information 230, 210A, and 230A), and the first random sequence information (eg, sequence information 210) and a plurality of second random sequence information Information (eg: sequence information 230, 210A and 230A) will not be repeated.

Please refer to FIGS. 2 and 4. In one embodiment, the first random sequence information (eg, sequence information 210 ) and the second random sequence information (eg, sequence information 230 ) both include 2-bit sequence information. For example, the first random sequence information may be sequence information 210, and the information in the sequence information 210 may be 0001001110101110, the information in the sequence information 210 may include 2-bit sequence information, and the 2-bit sequence information may be 0 or 1, but this case is not limited to this.

Please refer to FIG. 2 and FIG. 4. In one embodiment, the length of the first sequence information of the first random sequence information and the length of the second sequence information of the second random sequence information both include 8 bits, 16 bits and 32 bits. at least one of the bits. For example, the first random sequence information may be sequence information 210, and the information in sequence information 210 may be 0001001110101110, there are 16 numbers in total, that is, the length of the first sequence information is 16 bits. In addition, the information in sequence information 210 It can also be 8 numbers or 32 numbers, that is, the length of the first sequence information is 8 bits or 32 bits, but this case is not limited to this.

FIG. 5 is a schematic diagram illustrating a usage situation of the electronic testing system shown in FIG. 1 according to an embodiment of the present application. As shown in the figure, in one embodiment, the electronic testing system 100 can find a starting (START) point G in a sequence information group with an information length of 32 bits, and generate a plurality of random sequence information at the starting point G . For example, the total number of sequence information in a sequence information group with an information length of 32 bits can be 2 ⁹⁶ x 3, and the starting point G can be obtained from the 2 ⁹⁶ x 3 sequence information, and the starting point G can be placed in 0～2 ²⁴ pieces of sequence information in the sequence information group, and generate a plurality of random number sequence information at the starting point G, and the generated plurality of random number sequence information can be 2 ¹⁶ pieces.

In addition, when the number of random number sequence information generated by the electronic testing system 100 can be 2 ^96-14× 3, and the generated random number sequence information will never be repeated, when the number of random number sequence information generated by the electronic testing system 100 is less than 2 ^96-14× 3 When writing, if the starting point G is different, the generated random number sequence information will not be repeated. Even if the starting point G is the same, you can select the same starting point G and then shuffle once every 216 random number sequence information. , and the starting point G can be randomly generated or the last ending point can continue to generate random sequence information.

It can be seen from the above embodiments of the present case that the application of the present case has the following advantages. The electronic testing system and electronic testing method shown in the embodiment of the present application can automatically quantify and generate random and non-repetitive test information.

Although the specific examples of this case are disclosed in the above-mentioned embodiments, they are not intended to limit this case. Those with ordinary knowledge in the technical field to which this case belongs can, without departing from the principles and spirit of this case, carry out Various changes and modifications, therefore, the scope of protection in this case should be defined by the scope of the patent application attached hereto.

100: Electronic Test Systems 110: Reader 120: host 121: Memory 123: Processor 900: Electronic Components 210, 230, 210A, 230A: Sequence information 220, 240, 220A, 240A: read value 400: Electronic Test Methods 410 to 440: Steps G: starting point

In order to make the above and other objects, features, advantages and embodiments of the present case more clearly understood, the descriptions of the accompanying drawings are as follows: FIG. 1 is a schematic diagram illustrating an electronic testing system according to an embodiment of the present application. FIG. 2 is a schematic diagram illustrating a usage situation of the electronic testing system shown in FIG. 1 according to an embodiment of the present application. FIG. 3 is a schematic diagram illustrating a usage situation of the electronic testing system shown in FIG. 1 according to an embodiment of the present application. FIG. 4 is a flowchart illustrating an electronic testing method according to an embodiment of the present application. FIG. 5 is a schematic diagram illustrating a usage situation of the electronic testing system shown in FIG. 1 according to an embodiment of the present application.

Domestic storage information (please note in the order of storage institution, date and number) none Foreign deposit information (please note in the order of deposit country, institution, date and number) none

100: Electronic Test Systems

110: Reader

120: host

121: Memory

123: Processor

900: Electronic Components

Claims (10)

An electronic test system comprising: a reader/writer for reading and writing plural information; a memory for storing a plurality of instructions; and a processor for retrieving the instructions from the memory to perform the following steps: generating a first random number sequence information by the processor; write the first random number sequence information by the reader; Read a read value by the reader, and confirm by the processor whether the read value is the same as the first random number sequence information; When the read value is the same as the first random number sequence information, generating a second random number sequence information by the processor, wherein the first random number sequence information and the second random number sequence information do not overlap; and When the read value is different from the first random number sequence information, the first random number sequence information is output by the reader/writer. The electronic testing system as described in claim 1, further comprising: writing the second random number sequence information by the reader; Read the read value by the reader, and confirm by the processor whether the read value is the same as the second random number sequence information; When the read value is the same as the second random number sequence information, a third random number sequence information is generated by the processor, wherein the first random number sequence information, the second random number sequence information and the third random number sequence information not repeat; and When the read value is different from the second random number sequence information, the second random number sequence information is output by the reader/writer. The electronic testing system of claim 1, wherein the second random number sequence information includes a plurality of second random number sequence information, and the first random number sequence information and the second random number sequence information do not overlap. The electronic testing system of claim 1, wherein the first random number sequence information and the second random number sequence information both include a 2-bit sequence information. The electronic testing system of claim 1, wherein a first sequence information length of the first random sequence information and a second sequence information length of the second random sequence information both include 8 bits, 16 bits and 32 bits. at least one of the bits. An electronic test method comprising: generating a first random number sequence information; write the first random number sequence information; Read a read value, and confirm whether the read value is the same as the information of the first random number sequence; When the read value is the same as the first random number sequence information, a second random number sequence information is generated, wherein the first random number sequence information and the second random number sequence information are not repeated; and When the read value is different from the first random number sequence information, the first random number sequence information is output. The electronic testing method as described in claim 6, further comprising: write the second random number sequence information; Read the read value, and confirm whether the read value is the same as the second random number sequence information; When the read value is the same as the second random number sequence information, a third random number sequence information is generated, wherein the first random number sequence information, the second random number sequence information and the third random number sequence information do not overlap; and When the read value is different from the second random number sequence information, the second random number sequence information is output. The electronic testing method of claim 6, wherein the second random number sequence information includes a plurality of second random number sequence information, and the first random number sequence information and the second random number sequence information do not overlap. The electronic testing method of claim 6, wherein the first random number sequence information and the second random number sequence information both include a 2-bit sequence information. The electronic testing method of claim 6, wherein a first sequence information length of the first random sequence information and a second sequence information length of the second random sequence information both include 8 bits, 16 bits and 32 bits. at least one of the bits.

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