CN106802785A - A kind of stack analysis method and device - Google Patents
A kind of stack analysis method and device Download PDFInfo
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- CN106802785A CN106802785A CN201611145387.5A CN201611145387A CN106802785A CN 106802785 A CN106802785 A CN 106802785A CN 201611145387 A CN201611145387 A CN 201611145387A CN 106802785 A CN106802785 A CN 106802785A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
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Abstract
The embodiment of the invention discloses a kind of method and apparatus of stack parsing,Can be in stack resolving,By obtaining a minimum bit address for stack frame such as the first stack frame,The call relation that second function calls the first function corresponding to this stack frame can be obtained from this stack frame,And the length information of the first stack frame can be obtained from the first stack frame according to constant offset,Such that it is able to determine the minimum bit address of the second stack frame according to the length information of the first stack frame and the minimum bit address of the first stack frame,The call relation of each function can be back and forth obtained with this,BP registers need not be used when call stack is obtained,Also without the save register value in stack frame,And the SP registers for being used belong to the register for being exclusively used in stack frame substantially in each application scenarios,SP registers will not be optimised as other use,Can correctly obtain,So as to save register resources during call stack is obtained,Systematic function is not interfered with.
Description
Technical field
The present invention relates to data processing field, more particularly to a kind of stack analysis method and device.
Background technology
During data processing is carried out by computer, can be realized by executive process corresponding to the process
Function.In computer systems, a process can include one or more threads, and each thread can be configured corresponding
Stack, the stack can be as the private room of the thread, the private privileges for storing the thread.According to a complicated journey for thread
Degree, when the thread is performed, it is necessary to order performs several functions to realize the function of the thread, therefore the privately owned money of these functions
Source is also stored in the stack frame of stack corresponding to the thread, generally, can be using a stack frame as the privately owned of function
Space, the private privileges for storing the function.According to the call relation between function, position of the corresponding stack frame of function in stack
Putting also has difference, is distinguished with the height of frame address and stack frame neighbouring relations, and the stack frame of called function is normally at and calls letter
Several next layers of stack frame, that is, the stack frame address of the function that is called is relatively low.
To realize a function for thread, it is necessary to obtain related to the thread each by from the corresponding stack of the thread
Call relation between individual function, generally, since the innermost layer stack frame of stack is the minimum stack frame in address, obtains this most
Call relation between function corresponding to internal layer stack frame and function corresponding to last layer stack frame, according to stack address from low to high,
The function calling relationship for obtaining preservation in stack frame in layer, the process for obtaining the call relation of each function in a thread can
To be referred to as obtaining the process of the call stack of the thread.It is important commissioning means that call stack is obtained in thread running, if obtaining
Taking the mode of call stack can have performance very high, reliable, it is possible to reduce the influence to thread performance, improve it and apply model
Enclose.
The method of traditional acquisition call stack recalls algorithm for stack, refers to, it is necessary to preserve radix in stack frame in the algorithm
Pin (base pointer, BP) register value, the BP register values preserved in a stack frame are used to identify this stack frame and upper
Incidence relation between layer stack frame, therefore the last layer stack frame of this stack frame can be derived according to the BP register values.It can be seen that, obtain
During taking call stack, its difficult point be how the position that the content in current stack frame determines last layer stack frame, and
Traditional algorithm need it is extra in stack frame preserve BP register values, and need BP registers to be exclusively used in pushing away stack and could be deposited according to BP
Device value could realize, thus waste the valuable register resources of CPU, influence performance.
The content of the invention
In order to solve the above-mentioned technical problem, a kind of frame analysis method and device is the embodiment of the invention provides, is adjusted obtaining
Register resources have been saved with during stack, systematic function has not been interfered with.
In a first aspect, the invention provides a kind of stack analytic method, the stack corresponding to a thread is applied to, in the stack
With multiple stack frames, methods described includes：
The minimum bit address of the first stack frame is obtained, the first stack frame is a stack frame in the multiple stack frame, described
First stack frame is the stack frame for preserving first function private privileges, and the first function is the letter that the thread is used
Number；
According to the minimum bit address of the first stack frame, the IA of second function is obtained from the first stack frame, it is described
Second function is used to call first function in the thread, and the IA of the second function is used to indicate second function to adjust
With the call relation of first function；
The position indicated by minimum bit address according to constant offset and the first stack frame, from the first stack frame
Obtain the length information of the first stack frame；
The length information of minimum bit address and the first stack frame according to the first stack frame determines the second stack frame
Minimum bit address, the second stack frame is the stack frame for preserving the second function private privileges.
In the first possible implementation of first aspect, the minimum bit address for obtaining the first stack frame, including：
The minimum bit address of the first stack frame is obtained from the corresponding stack pointer SP registers of the first stack frame.
With reference to the first possible implementation of first aspect or first aspect, in second possible implementation
In, also include：
The minimum bit address of the second stack frame is saved in the corresponding SP registers of the second stack frame.
In the third possible implementation of first aspect, the first stack frame is the stack in the stack innermost layer
Frame.
In the 4th kind of possible implementation of first aspect, also include：
Move is performed, the move is used to indicate for the length information of the first stack frame to be pressed onto described first
In stack frame；
One address is set apart from the constant offset with the minimum bit address of the first stack frame in the first stack frame
Space；
The length information of the first stack frame is stored in the address space.
Second aspect, the present invention provides a kind of stack resolver, is applied to the stack corresponding to a thread, has in the stack
There are multiple stack frames, described device includes acquiring unit, instruction addressing unit, length information unit and determining unit：
The acquiring unit, the minimum bit address for obtaining the first stack frame, the first stack frame is the multiple stack frame
In a stack frame, the first stack frame is the stack frame for preserving first function private privileges, and the first function is described
The function that thread is used；
The instruction addressing unit, for the minimum bit address according to the first stack frame, obtains from the first stack frame
The IA of two functions, the second function is used to call first function, the instruction of the second function in the thread
Address is used to indicate second function to call the call relation of first function；
The length information unit, for indicated by the minimum bit address according to constant offset and the first stack frame
Position, obtains the length information of the first stack frame from the first stack frame；
The determining unit, for the length letter of the minimum bit address according to the first stack frame and the first stack frame
Breath determines the minimum bit address of the second stack frame, and the second stack frame is the stack for preserving the second function private privileges
Frame.
In the first possible implementation of second aspect, the acquiring unit is specifically for from the first stack frame
The minimum bit address of the first stack frame is obtained in corresponding stack pointer SP registers.
With reference to the first possible implementation of second aspect or second aspect, in second possible implementation
In, also including storage unit：
The storage unit, for the minimum bit address of the second stack frame to be saved in into the corresponding SP of the second stack frame
In register.
In the third possible implementation of second aspect, the first stack frame is the stack in the stack innermost layer
Frame.
In the 4th kind of possible implementation of second aspect, also including execution unit, setting unit and memory cell：
The execution unit, for performing move, the move is used to indicate the length of the first stack frame
Degree information is pressed onto in the first stack frame；
The setting unit, in the first stack frame with the minimum bit address of the first stack frame apart from the fixation
Skew sets an address space；
The memory cell, the length information for storing the first stack frame in the address space.
By above-mentioned technical proposal as can be seen that being stored apart from the position of constant offset with minimum bit address by stack frame
The length information of the stack frame, can be in stack resolving, by obtaining a minimum bit address for stack frame such as the first stack frame
The call relation that second function calls the first function corresponding to this stack frame can be obtained from this stack frame, it is possible to according to
Constant offset obtains the length information of the first stack frame from the first stack frame, such that it is able to according to the first stack frame length information and
The minimum bit address of the first stack frame determines the minimum bit address of the second stack frame, that is, stack frame corresponding to second function position
Put, can back and forth obtain the call relation of each function from each layer stack frame successively with this, can obtain call stack during,
Need not use to BP registers, it is not required that the save register value in stack frame, and the SP registers for being used should at each
With the register that is exclusively used in stack frame is belonged in scene substantially, SP registers will not be optimised as other use, can correctly obtain
Take, so as to save register resources during call stack is obtained, do not interfere with systematic function.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, without having to pay creative labor, may be used also
Other accompanying drawings are obtained with according to these accompanying drawings.
Fig. 1 is a kind of schematic layout pattern of the stack based on stack backtracking algorithm；
Fig. 2 is a kind of schematic diagram of the layout of stack provided in an embodiment of the present invention；
Fig. 3 is a kind of flow chart of the method for stack parsing provided in an embodiment of the present invention；
Fig. 4 is a kind of structural representation of stack resolver provided in an embodiment of the present invention；
Fig. 5 is a kind of hardware architecture diagram of computer equipment provided in an embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawings, embodiments of the invention are described.
During data processing is carried out by computer, can be realized by executive process corresponding to the process
Function.In computer systems, a process can include one or more threads, and each thread can be configured corresponding
Stack.When a thread is performed, it is necessary to order performs several functions to realize the function of the thread, namely to realize a line
The function of journey obtains the call relation of each function in a thread, it is necessary to know the call relation between several functions
Process is properly termed as the process of the call stack for obtaining the thread.Each function has its corresponding stack frame, Ke Yiyong in one thread
In the private privileges for storing the function.According to the call relation between function, position of the corresponding stack frame of function in stack also has
Difference, is distinguished with the height of frame address and stack frame neighbouring relations, and the stack frame of called function is normally at the stack of call function
The next layer of frame, that is, the stack frame address of the function that is called is relatively low.
The method of traditional acquisition call stack recalls algorithm for stack, in the algorithm, it is necessary to preserve BP deposits in stack frame
Device value, the BP register values preserved in a stack frame are used to identify the incidence relation between this stack frame and last layer stack frame, therefore
The last layer stack frame of this stack frame can be derived according to the BP register values.As shown in figure 1, being the stack that algorithm is recalled based on stack
Schematic layout pattern, in Fig. 1, A stack frames are the corresponding stack frames of function A, and B stack frames are the corresponding stack frames of function B, bp.A representative functions
The BP register values of the corresponding A stacks frames of A, can serve to indicate that the position of A stack frames, similarly, the corresponding B stacks of bp.B representative functions B
The BP register values of frame, can serve to indicate that the position of B stack frames, the BP register values of the corresponding C stacks frames of bp.C representative functions C,
Can serve to indicate that the position of C stack frames.Corresponding stack frame can be got according to BP register values, can be protected in each stack frame
Have between the BP register values of last layer stack frame, and the function corresponding to the stack frame and function corresponding to last layer stack frame
Call relation, the call relation between function can be stored in the form of Function return addresses in stack frame, be with A stack frames
Example, can get the call relation between A return addresses i.e. function B and functions A, and be used for according to bp.A from A stack frames
Indicate the bp.B of B stack frame positions.
It follows that traditional algorithm needs the extra preservation BP register values in stack frame, just can be by BP register values
Determine the position of last layer stack frame.And in order to ensure the reliability of acquisition call stack, in addition it is also necessary to which BP registers are exclusively used in pushing away
The positioning of stack location, wastes the valuable register resources of CPU, influences performance.
Therefore, the method that the embodiment of the invention provides a kind of parsing of stack, by stack frame with minimum bit address distance
The position of constant offset stores the length information of the stack frame, can be in stack resolving, by obtaining stack frame such as the
The minimum bit address of one stack frame can obtain second function from this stack frame and call first function corresponding to this stack frame
Call relation, it is possible to obtain the length information of the first stack frame from the first stack frame according to constant offset, such that it is able to according to the
The minimum bit address of the length information of one stack frame and the first stack frame determines the minimum bit address of the second stack frame, that is, second
The position of stack frame corresponding to function, the call relation of each function, Ke Yi can be back and forth obtained with this from each layer stack frame successively
During obtaining call stack, it is not necessary to use BP registers, it is not required that the save register value in stack frame, and used
Stack pointer (Stack Pointer, SP) register belong to the register for being exclusively used in stack frame substantially in each application scenarios,
SP registers will not be optimised as other use, can correctly obtain, so as to save deposit during call stack is obtained
Device resource, does not interfere with systematic function.
As shown in Fig. 2 being the schematic diagram of the layout of stack in the embodiment of the present invention, three stack frames, each stack are included in stack
Frame has the function corresponding to it, and length information, the return ground of the function corresponding to stack frame of the stack frame can be preserved in stack frame
The information such as location, local variable.A stack frames are the corresponding stack frames of function A, and B stack frames are the corresponding stack frames of function B, and C stack frames are function C
Corresponding stack frame.
In frame, the function corresponding to next layer of low address stack frame of function call typically as corresponding to high address stack frame,
Therefore in Fig. 2, function C call function B, function B call functions A.Call relation between function can be by the return of function ground
Location is embodied, such as the A return addresses preserved in A stacks frame can embody the call relation of function B call functions A.In stack
The return address preserved in frame can be a connection register (Link Register, LR) value.
Generally use SP register pair stack frame address to be identified, the lowest order ground of the corresponding A stacks frames of SP.A representative functions A
Location, the minimum bit address of the corresponding B stacks frames of SP.B representative functions B, the minimum bit address of the corresponding C stacks frames of SP.C representative functions C,
The position of the stack frame in stack can be determined by the minimum bit address of stack frame.
In order to quickly determine the position of last layer stack frame, and extra register need not be used, in the present invention
In embodiment, the length information of stack frame is introduced as the foundation for determining last layer stack frame position.The length information of stack frame is used for
The length of the stack shared by stack frame is identified, for example, can be 8kb or 16bit etc..The length of the stack frame is preserved in each stack frame
Degree information, as shown in Fig. 2 A1 is used to represent the length of A stack frames, B1 is used to represent the length of B stack frames, and C1 is used to represent C stack frames
Length.The length information of one stack frame may remain in the ad-hoc location in stack frame, so as to from stack frame quick and precisely
Acquisition, in embodiments of the present invention, the storage of the length information of stack frame can fixed inclined apart from the minimum bit address of the stack frame
The position of shifting, the constant offset can be directed to all stack frames unification configurations in a stack, or according to stack frame length
It is separately configured.So as to when the minimum bit address of stack frame is obtained, can quickly be navigated at this by constant offset
The position of this stack frame length information is stored in stack frame.
By taking A stack frames as an example, local variable i.e. A local variables, the stack frame length of function A can be preserved in the A stack frames
A1 and A return addresses, the A return addresses i.e. call relation of function B and functions A can be obtained according to SP.A from A stack frames, will
SP.A can navigate to the position of storage A stack frame length information in A stack frames by constant offset, so as to get stack frame length
A1, the SP.B of B stack frames can be determined according to SP.A and stack frame length A1, can be obtained from each layer stack frame successively by that analogy
Call relation between each function.
Method provided in an embodiment of the present invention can apply to the debugging stage of program, for example, in the program debugging stage, such as
The program of fruit debugging starts a leak (bug), can first determine the position of bug occur, if it is some letter that the position is corresponding
Number, then illustrate that the function or other functions may have problem during the function is called, then according to these functions
Between call relation, these functions can be detected successively so that it is determined that there is the function of bug, such that it is able to this
The program of function carries out corresponding treatment to avoid the appearance of the bug.
The program operation phase can also be applied to, for example, program needs to use function A, function B, function C and letter when running
Number D, wherein function D call functions C, function C call function B, function B call function A, program is in operation if there is mistake
By mistake, the position for finding mistake can be first determined, it is function B that such as the position is corresponding, then can deduce function B and its upper strata letter
May there is problem in number, according to the call relation between function, can successively detection function B, function C and function D so as to really
Make the function for mistake occur.
Next, the method that a kind of stack parsing that the embodiment of the present invention is provided is discussed in detail.Fig. 3 is the embodiment of the present invention
A kind of flow chart of the method for stack parsing for providing, is applied to the stack corresponding to a thread, and the method includes：
S301：The minimum bit address of the first stack frame is obtained, the first stack frame is a stack frame in the multiple stack frame,
The first stack frame is the stack frame for preserving first function private privileges, and the first function is that the process is used
Individual function.
One thread generally requires the multiple functions of order execution could realize the function of the thread, and each function has its right
The stack frame answered, stack frame can be used for preserving the private privileges of function, for example, the local variable of the function, return address etc.
Information.
There can be multiple stack frames in stack corresponding to one thread, the first stack frame can be in the plurality of stack frame
It is individual, for example, the first stack frame can be the stack frame of innermost layer in frame, i.e. the minimum stack frame in address, or except outermost layer stack
Frame other stack frames in other words beyond address highest stack frame.
In the embodiment of the present invention, the first stack frame can be obtained from the corresponding SP registers of the first stack frame most
Low order address.
S302：According to the minimum bit address of the first stack frame, the IA of second function is obtained from the first stack frame.
First stack frame is the corresponding stack frame of first function, in embodiments of the present invention, can will call the first function
Upper layer functions are referred to as second function, and the IA of second function can be used for mark second function and call calling for first function
Relation.It is called function that the call relation can call first function, i.e. first function including second function, and second function is
How call function, and second function is realized calling first function.
One IA of function often has a plurality of, and any one IA in a plurality of IA can
The call relation between the function and called function is indicated, therefore, obtained by any one IA for getting function
Know the corresponding call relation of the function.In implementing, the IA of second function is often with the return ground of first function
The form of location is stored in the corresponding first stack frame of first function.
Minimum bit address according to the first stack frame can get the first stack frame, by preserving the stack frame institute in stack frame
The return address of corresponding function, therefore after the first stack frame is got, just can get the first letter from the first stack frame
Several return addresses is the IA of second function.
S303：The position indicated by minimum bit address according to constant offset and the first stack frame, from described first
The length information of the first stack frame is obtained in stack frame.
Constant offset can be used to indicate that the ground that the stack frame length information is stored in the minimum bit address of stack frame and the stack frame
The distance between location, the position that the length information of the stack frame is stored in each stack frame can relatively be fixed in the stack frame
Position, therefore constant offset can be a known fixed numbers.
Can obtain storing the stack frame length information by the constant offset amount by the lowest order address offset of the first stack frame
Address, the position indicated by the address can obtain the length information of the first stack frame.For example, the lowest order ground of the first stack frame
Location is the 10th bit (bit), and constant offset is 8bit, then the address for storing the length information of the first stack frame is 18bit, according to
Position indicated by the address can get the length information of the first stack frame.
S304：The length information of minimum bit address and the first stack frame according to the first stack frame determines second
The minimum bit address of stack frame, the second stack frame is the stack frame for preserving the second function private privileges.
The length of one stack frame can be understood as between the minimum bit address of the stack frame and the highest addresses of the stack frame
Difference, therefore, the length of minimum bit address and the stack frame according to stack frame can calculate the highest order of the stack frame
Address.
When having call relation between two functions, one can be call function, and another can be called letter
Number, each self-corresponding stack frame of the two functions can be two stack frames with neighbouring relations, namely the corresponding stack of call function
The highest addresses of the minimum bit address stack frame corresponding with called function of frame are identical, it is known that the lowest order ground of the two stack frames
Difference between location is the length of the corresponding stack frame of called function.For example, second function calls first function, then second function
Corresponding second stack frame and the corresponding first stack frame of first function have adjacent relation, the minimum bit address of the first stack frame and
The difference of the minimum bit address of two stack frames is the length of the first stack frame.
Therefore, can be calculated according to the length information of the first stack frame for obtaining, and the minimum bit address of the first stack frame
Go out the minimum bit address of the second stack frame, for example, the minimum bit address of the first stack frame is 10bit, the length of the first stack frame is
15bit, the then minimum bit address that can calculate the second stack frame is 10+15=25bit.
By above-mentioned technical proposal as can be seen that being stored apart from the position of constant offset with minimum bit address by stack frame
The length information of the stack frame, can be in stack resolving, by obtaining a minimum bit address for stack frame such as the first stack frame
The call relation that second function calls the first function corresponding to this stack frame can be obtained from this stack frame, it is possible to according to
Constant offset obtains the length information of the first stack frame from the first stack frame, such that it is able to according to the first stack frame length information and
The minimum bit address of the first stack frame determines the minimum bit address of the second stack frame, that is, stack frame corresponding to second function position
Put, can back and forth obtain the call relation of each function from each layer stack frame successively with this, can obtain call stack during,
Need not use to BP registers, it is not required that the save register value in stack frame, and the SP registers for being used should at each
With the register that is exclusively used in stack frame is belonged in scene substantially, SP registers will not be optimised as other use, can correctly obtain
Take, so as to save register resources during call stack is obtained, do not interfere with systematic function.
Generally, can since the minimum stack frame in the innermost layer stack frame i.e. address of stack, obtain the innermost layer stack
Call relation between function corresponding to frame and function corresponding to last layer stack frame, the first stack frame can in embodiments of the present invention
Being the stack frame in the stack innermost layer.
When it is innermost layer function that the first stack frame is innermost layer stack frame i.e. first function, except including in the call stack of acquisition
Outside call relation between each function, the relevant information called needed for innermost layer function can also be included, in program counter
Be stored with needed for innermost layer function the relevant information called in (Program Counter, PC), so, when first function is for most
During interior layer functions, the relevant information called needed for first function can be got by PC, so that being wrapped in the call stack for obtaining
The information for containing is more perfect.
In embodiments of the present invention, after the minimum bit address of the second stack frame is calculated, can be by the second stack frame most
Low order address is saved in the corresponding SP registers of the second stack frame, so as in subsequent operation can according to preserve the second stack frame
Minimum bit address, from the second stack frame obtain call second function function IA.
In the introduction above, the corresponding SP registers of the second stack frame and the corresponding SP registers of the first stack frame can be same
Individual SP registers, can preserve a minimum bit address for stack frame, by taking the first stack frame as an example, SP registers in the SP registers
Middle preservation be the first stack frame minimum bit address, according to aforesaid operations step, when the minimum bit address for calculating the second stack frame
Afterwards, then the address information preserved in the SP registers can be updated, the first stack frame that will be preserved in the SP registers
Minimum bit address be updated to the minimum bit address of the second stack frame.
By updating the minimum bit address of the stack frame preserved in SP registers, required function can flexibly, be efficiently obtained
Between call relation.
For example, for a thread, it is necessary to using five functions, first function, second function, the 3rd function,
4th function and the 5th function, first function are innermost layer function, and what is initially preserved in SP registers is the thread
The minimum bit address of the corresponding stack frame (innermost layer stack frame) of the required innermost layer function for using, the function in needing to obtain the thread
Between call relation when, it is necessary to since innermost layer stack frame, according to stack address from low to high, in layer obtain and protect in stack frame
The call relation of the function deposited.But, in some cases, it can be possible to need to obtain the 3rd function and thereon between layer functions
Call relation, for example, second function call, first function is had learned that, second function of the 3rd function call, now
Only need to know the call relation between the 3rd function, the 4th function and the 5th function, in this case, if SP is posted
What is preserved in storage is still the minimum bit address of the corresponding stack frame of first function, then the call relation between function is obtained
When, it is still the call relation that the function preserved in stack frame is in layer obtained since innermost layer stack frame, can now repeat to obtain
Call relation between first function, second function and the 3rd function, increased workload, reduce operating efficiency.
In this case, when having learned that second function call, first function, after second function of the 3rd function call, can
The 3rd minimum bit address of stack frame corresponding to function is updated to by the minimum bit address of the stack frame preserved in SP registers, with
It is easy to when need to only know the 3rd function and thereon call relation between layer functions, can be directly right from the 3rd function institute
Stack frame is answered to start to perform.
In the above-described embodiments, can be stored with the length information of the stack frame in each stack frame, next will be to stack frame
The concrete mode of the middle length information for storing the stack frame is launched to introduce, and concrete operations are as follows：
Move is performed, the move is used to indicate for the length information of the first stack frame to be pressed onto described first
In stack frame.
Move can be a command information, the storage of the length information for realizing stack frame.In implementing,
It can be data transmission (MOV) instruction.
The length information of the first stack frame can be stored at some position of the first stack frame by the move,
The selection of the position, can be set apart from the constant offset with the minimum bit address of the first stack frame in the first stack frame
Put an address space；The length information of the first stack frame is stored in the address space.
For example, the minimum bit address of the first stack frame is 10bit, constant offset is 5bit, then can be in the first stack frame
Address is that an address space is set at position indicated by 15bit, the length information for storing the first stack frame.
From above-mentioned introduction, the length information that just can realize being stored in stack frame the stack frame is instructed by one, when
After getting the minimum bit address of the first stack frame, according to the first stack frame length information, the second stack frame just can be determined most
Low order address.
And in traditional approach, in order to obtain the position of last layer stack frame, generally require a plurality of command information, reference picture 1,
Bp.B can be used to indicate that the position of the corresponding stack frames of function B, it is necessary to perform a plurality of instruction in traditional approach, just can be by
Bp.B is stored in the corresponding stack frames of function A.
Compared to traditional approach, the embodiment of the present invention is effectively reduced the bar number of instruction, so as to reduce by the way of
The loss of systematic function, and the internal memory that move takes is minimum, so as to effectively reduce the size of executable file.
Apparatus embodiments of the invention
Fig. 4 is a kind of structural representation of stack resolver provided in an embodiment of the present invention, and described device includes obtaining single
Unit 401, instruction addressing unit 402, length information unit 403 and determining unit 404：
The acquiring unit 401, the minimum bit address for obtaining the first stack frame, the first stack frame is the multiple stack
A stack frame in frame, the first stack frame is the stack frame for preserving first function private privileges, and the first function is institute
State the function that thread is used.
The instruction addressing unit 402, for the minimum bit address according to the first stack frame, obtains from the first stack frame
The IA of second function, the second function is used to call first function, the finger of the second function in the thread
Making address is used for the call relation for indicating second function to call first function.
The length information unit 403, it is signified for the minimum bit address according to constant offset and the first stack frame
The position for showing, obtains the length information of the first stack frame from the first stack frame.
The determining unit 404, for the minimum bit address according to the first stack frame and the length of the first stack frame
Degree information determines the minimum bit address of the second stack frame, and the second stack frame is for preserving the second function private privileges
Stack frame.
Optionally, the acquiring unit from the corresponding stack pointer SP registers of the first stack frame specifically for obtaining institute
State the minimum bit address of the first stack frame.
Optionally, described device can also include storage unit：
The storage unit, for the minimum bit address of the second stack frame to be saved in into the corresponding SP of the second stack frame
In register.
Optionally, the first stack frame is the stack frame in the stack innermost layer.
Optionally, described device can also include execution unit：
The execution unit, for performing move, the move is used to indicate the length of the first stack frame
Degree information is pressed onto in the first stack frame；
One address is set apart from the constant offset with the minimum bit address of the first stack frame in the first stack frame
Space；
The length information of the first stack frame is stored in the address space.
Fig. 4 is the device embodiment that technical solution of the present invention is described from network equipment side, feature in embodiment corresponding to Fig. 4
Explanation may refer to the related description of embodiment corresponding to Fig. 3, no longer repeat one by one here.
By above-mentioned technical proposal as can be seen that being stored apart from the position of constant offset with minimum bit address by stack frame
The length information of the stack frame, can be in stack resolving, by obtaining a minimum bit address for stack frame such as the first stack frame
The call relation that second function calls the first function corresponding to this stack frame can be obtained from this stack frame, it is possible to according to
Constant offset obtains the length information of the first stack frame from the first stack frame, such that it is able to according to the first stack frame length information and
The minimum bit address of the first stack frame determines the minimum bit address of the second stack frame, that is, stack frame corresponding to second function position
Put, can back and forth obtain the call relation of each function from each layer stack frame successively with this, can obtain call stack during,
Need not use to BP registers, it is not required that the save register value in stack frame, and the SP registers for being used should at each
With the register that is exclusively used in stack frame is belonged in scene substantially, SP registers will not be optimised as other use, can correctly obtain
Take, so as to save register resources during call stack is obtained, do not interfere with systematic function.
Fig. 5 is a kind of hardware architecture diagram of computer equipment provided in an embodiment of the present invention, the computer equipment
500 include memory 501, receiver 502, and the processor 503 being connected with memory 501, receiver 502 respectively, storage
Device 501 is used to store batch processing instruction, and the programmed instruction that processor 503 is used to call memory 501 to store performs following behaviour
Make：
Triggering receiver 502 obtains the minimum bit address of the first stack frame, during the first stack frame is the multiple stack frame
One stack frame, the first stack frame is the stack frame for preserving first function private privileges, and the first function is the thread
Use the function for arriving；
According to the minimum bit address of the first stack frame, the IA of second function is obtained from the first stack frame, it is described
Second function is used to call first function in the thread, and the IA of the second function is used to indicate second function to adjust
With the call relation of first function；
The position indicated by minimum bit address according to constant offset and the first stack frame, from the first stack frame
Obtain the length information of the first stack frame；
The length information of minimum bit address and the first stack frame according to the first stack frame determines the second stack frame
Minimum bit address, the second stack frame is the stack frame for preserving the second function private privileges.
Alternatively, processor 503 can be central processing unit (Central Processing Unit, CPU), memory
501 can be the internal storage of random access memory (Random Access Memory, RAM) type, and receiver 502 can
So that comprising General Physics interface, physical interface can be ether (Ethernet) interface or asynchronous transfer mode
(Asynchronous Transfer Mode, ATM) interface.Processor 503, receiver 502 and memory 501 can be integrated into
One or more independent circuits or hardware, such as：Application specific integrated circuit (Application Specific Integrated
Circuit, ASIC).
The explanation of feature may refer to the related description of embodiment corresponding to Fig. 3 in embodiment corresponding to Fig. 5, here no longer
Repeat one by one.
By above-mentioned technical proposal as can be seen that being stored apart from the position of constant offset with minimum bit address by stack frame
The length information of the stack frame, can be in stack resolving, by obtaining a minimum bit address for stack frame such as the first stack frame
The call relation that second function calls the first function corresponding to this stack frame can be obtained from this stack frame, it is possible to according to
Constant offset obtains the length information of the first stack frame from the first stack frame, such that it is able to according to the first stack frame length information and
The minimum bit address of the first stack frame determines the minimum bit address of the second stack frame, that is, stack frame corresponding to second function position
Put, can back and forth obtain the call relation of each function from each layer stack frame successively with this, can obtain call stack during,
Need not use to BP registers, it is not required that the save register value in stack frame, and the SP registers for being used should at each
With the register that is exclusively used in stack frame is belonged in scene substantially, SP registers will not be optimised as other use, can correctly obtain
Take, so as to save register resources during call stack is obtained, do not interfere with systematic function.
One of ordinary skill in the art will appreciate that：Realizing all or part of step of above method embodiment can pass through
Programmed instruction related hardware is completed, and foregoing routine can be stored in a computer read/write memory medium, and the program exists
During execution, the step of including above method embodiment is performed；And foregoing storage medium can be in following media at least one
Kind：Read-only storage (English：Read-only memory, abbreviation：ROM), RAM, magnetic disc or CD etc. are various can store
The medium of program code.
It should be noted that each embodiment in this specification is described by the way of progressive, each embodiment it
Between identical similar part mutually referring to what each embodiment was stressed is the difference with other embodiment.
For especially for equipment and system embodiment, because it is substantially similar to embodiment of the method, so describe fairly simple,
The relevent part can refer to the partial explaination of embodiments of method.Equipment and system embodiment described above is only schematic
, wherein can be as the unit that separating component is illustrated or may not be physically separate, be shown as unit
Part can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple networks
On unit.Some or all of module therein can be according to the actual needs selected to realize the purpose of this embodiment scheme.
Those of ordinary skill in the art are without creative efforts, you can to understand and implement.
The above, only certain specific embodiments of the invention, but protection scope of the present invention are not limited thereto,
Any one skilled in the art the invention discloses technical scope in, the change or replacement that can be readily occurred in,
Should all be included within the scope of the present invention.Therefore, protection scope of the present invention should be with scope of the claims
It is defined.
Claims (10)
1. a kind of stack analytic method, it is characterised in that be applied to the stack corresponding to a thread, has multiple stacks in the stack
Frame, methods described includes：
The minimum bit address of the first stack frame is obtained, the first stack frame is a stack frame in the multiple stack frame, described first
Stack frame is the stack frame for preserving first function private privileges, and the first function is the function that the thread is used；
According to the minimum bit address of the first stack frame, the IA of second function, described second are obtained from the first stack frame
Function is used to call first function in the thread, and the IA of the second function is used to indicating second function to call the
The call relation of one function；
The position indicated by minimum bit address according to constant offset and the first stack frame, obtains from the first stack frame
The length information of the first stack frame；
The length information of minimum bit address and the first stack frame according to the first stack frame determines the second stack frame most
Low order address, the second stack frame is the stack frame for preserving the second function private privileges.
2. method according to claim 1, it is characterised in that the minimum bit address of the acquisition the first stack frame, including：
The minimum bit address of the first stack frame is obtained from the corresponding stack pointer SP registers of the first stack frame.
3. method according to claim 1 and 2, it is characterised in that also include：
The minimum bit address of the second stack frame is saved in the corresponding SP registers of the second stack frame.
4. method according to claim 1, it is characterised in that the first stack frame is the stack in the stack innermost layer
Frame.
5. method according to claim 1, it is characterised in that also include：
Move is performed, the move is used to indicate for the length information of the first stack frame to be pressed onto the first stack frame
In；
One address space is set apart from the constant offset with the minimum bit address of the first stack frame in the first stack frame；
The length information of the first stack frame is stored in the address space.
6. a kind of stack resolver, it is characterised in that be applied to the stack corresponding to a thread, has multiple stacks in the stack
Frame, described device includes acquiring unit, instruction addressing unit, length information unit and determining unit：
The acquiring unit, the minimum bit address for obtaining the first stack frame, during the first stack frame is the multiple stack frame
One stack frame, the first stack frame is the stack frame for preserving first function private privileges, and the first function is the thread
Use the function for arriving；
The instruction addressing unit, for the minimum bit address according to the first stack frame, the second letter is obtained from the first stack frame
Several IAes, the second function is used to call first function, the IA of the second function in the thread
For indicating second function to call the call relation of first function；
The length information unit, for the position indicated by the minimum bit address according to constant offset and the first stack frame
Put, the length information of the first stack frame is obtained from the first stack frame；
The determining unit, the length information for the minimum bit address according to the first stack frame and the first stack frame is true
The minimum bit address of the second stack frame is made, the second stack frame is the stack frame for preserving the second function private privileges.
7. device according to claim 6, it is characterised in that the acquiring unit is specifically for from the first stack frame pair
The minimum bit address of the first stack frame is obtained in the stack pointer SP registers answered.
8. the device according to claim 6 or 7, it is characterised in that also including storage unit：
The storage unit, for the minimum bit address of the second stack frame to be saved in into the corresponding SP deposits of the second stack frame
In device.
9. device according to claim 6, it is characterised in that the first stack frame is the stack in the stack innermost layer
Frame.
10. device according to claim 6, it is characterised in that also including execution unit, setting unit and memory cell：
The execution unit, for performing move, the move is used to indicate to believe the length of the first stack frame
Breath is pressed onto in the first stack frame；
The setting unit, in the first stack frame with the minimum bit address of the first stack frame apart from the constant offset
One address space is set；
The memory cell, the length information for storing the first stack frame in the address space.
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| CN201611145387.5A CN106802785B (en) | 2016-12-13 | 2016-12-13 | A kind of stack analysis method and device |
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| CN106802785B CN106802785B (en) | 2019-07-09 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110489179A (en) * | 2019-08-02 | 2019-11-22 | 北京字节跳动网络技术有限公司 | Obtain method, apparatus, medium and the equipment of call stack stack frame function signature |
| CN110764941A (en) * | 2019-09-05 | 2020-02-07 | 北京字节跳动网络技术有限公司 | Method, device, medium and equipment for acquiring call stack frame instruction offset |
| WO2020073200A1 (en) * | 2018-10-09 | 2020-04-16 | 华为技术有限公司 | Program debugging method and system |
| CN112882695A (en) * | 2021-03-02 | 2021-06-01 | 百果园技术(新加坡)有限公司 | Parameter transmission method and device, computer equipment and storage medium |
| CN113238800A (en) * | 2021-05-25 | 2021-08-10 | 上海安路信息科技股份有限公司 | Stack structure and function calling method and system |
| CN114064302A (en) * | 2020-07-30 | 2022-02-18 | 华为技术有限公司 | Method and device for interprocess communication |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120297370A1 (en) * | 2011-05-16 | 2012-11-22 | Texas Instruments Incorporated | Stack Analysis for Post Mortem Analysis |
| CN103019787A (en) * | 2012-12-14 | 2013-04-03 | 华为技术有限公司 | Function call relation determining method, hotfix updating method and hotfix updating device |
| CN105678168A (en) * | 2015-12-29 | 2016-06-15 | 北京神州绿盟信息安全科技股份有限公司 | Method and apparatus for detecting Shellcode based on stack frame abnormity |
-
2016
- 2016-12-13 CN CN201611145387.5A patent/CN106802785B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120297370A1 (en) * | 2011-05-16 | 2012-11-22 | Texas Instruments Incorporated | Stack Analysis for Post Mortem Analysis |
| CN103019787A (en) * | 2012-12-14 | 2013-04-03 | 华为技术有限公司 | Function call relation determining method, hotfix updating method and hotfix updating device |
| CN105678168A (en) * | 2015-12-29 | 2016-06-15 | 北京神州绿盟信息安全科技股份有限公司 | Method and apparatus for detecting Shellcode based on stack frame abnormity |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020073200A1 (en) * | 2018-10-09 | 2020-04-16 | 华为技术有限公司 | Program debugging method and system |
| CN110489179A (en) * | 2019-08-02 | 2019-11-22 | 北京字节跳动网络技术有限公司 | Obtain method, apparatus, medium and the equipment of call stack stack frame function signature |
| CN110764941A (en) * | 2019-09-05 | 2020-02-07 | 北京字节跳动网络技术有限公司 | Method, device, medium and equipment for acquiring call stack frame instruction offset |
| CN110764941B (en) * | 2019-09-05 | 2023-04-18 | 北京字节跳动网络技术有限公司 | Method, device, medium and equipment for acquiring call stack frame instruction offset |
| CN114064302A (en) * | 2020-07-30 | 2022-02-18 | 华为技术有限公司 | Method and device for interprocess communication |
| CN114064302B (en) * | 2020-07-30 | 2024-05-14 | 华为技术有限公司 | Inter-process communication method and device |
| CN112882695A (en) * | 2021-03-02 | 2021-06-01 | 百果园技术(新加坡)有限公司 | Parameter transmission method and device, computer equipment and storage medium |
| CN112882695B (en) * | 2021-03-02 | 2023-11-28 | 百果园技术(新加坡)有限公司 | Parameter transmission method, parameter transmission device, computer equipment and storage medium |
| CN113238800A (en) * | 2021-05-25 | 2021-08-10 | 上海安路信息科技股份有限公司 | Stack structure and function calling method and system |
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|---|---|
| CN106802785B (en) | 2019-07-09 |
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