TWI770735B - 半導體封裝及其製造方法 - Google Patents

半導體封裝及其製造方法 Download PDF

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TWI770735B
TWI770735B TW109145549A TW109145549A TWI770735B TW I770735 B TWI770735 B TW I770735B TW 109145549 A TW109145549 A TW 109145549A TW 109145549 A TW109145549 A TW 109145549A TW I770735 B TWI770735 B TW I770735B
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substrate
package
spacers
semiconductor
lid
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TW109145549A
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TW202127603A (zh
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陳揚哲
林振華
曾皇文
其翔 梁
劉醇明
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台灣積體電路製造股份有限公司
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

本發明一些實施例揭露一種半導體封裝，其包含：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其安置於該半導體晶片上；及數個間隔件，其等自該封裝蓋延伸穿過該第一基板中之對應孔。該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面。

Description

半導體封裝及其製造方法
本發明實施例係有關半導體封裝及其製造方法。
隨著運算速度及異質整合之要求不斷提高，更大數目個矽晶片組裝至一單一封裝中。因此，多晶片封裝大小(>4000mm2)及重量增加。較重封裝會在表面安裝技術(SMT)程序期間使球柵陣列(BGA)扭曲，因為BGA之熔化焊料凸塊無法支撐封裝重量。若BGA顯著變形以接觸相鄰焊料凸塊，則會發生橋接且可導致電短路。
本發明的一實施例係關於一種半導體封裝，其包括：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其安置於該半導體晶片上；及數個間隔件，其等自該封裝蓋延伸穿過該第一基板中之對應孔，其中該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面。
本發明的一實施例係關於一種半導體封裝，其包括：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其呈一環或一框架形狀，該封裝蓋具有一開口且安置於該半導體晶片上；一第二基 板，其安置於該第一基板下方；及數個間隔件，其等自該封裝蓋延伸穿過該第一基板中之對應孔，其中該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面而接觸該第二基板之一主表面。
本發明的一實施例係關於一種製造一半導體封裝之方法，該方法包括：將一封裝蓋定位於安置於一第一基板之一第一主表面上之一晶片上，其中該封裝蓋具有自該封裝蓋之一周邊延伸之複數個間隔件，且該第一基板具有對應於該複數個間隔件之複數個孔；及將該等間隔件定位於該等孔中，使得該等間隔件穿過該基板之一第一主表面且延伸超過該基板之一第二對置主表面以形成一封裝半導體裝置。
15:半導體晶片
20:重佈層
25:模製件
30:導電柱/焊料凸塊
50:封裝基板
50A:第一主表面/上表面/前表面
50B:第二主表面/後表面
55:焊球/球柵陣列
60:底膠材料
65:封裝蓋
65A:頂板部分
65B:壁部分
70:間隔件
72:熱壓縮接合頭
73:窄部分
75:通孔
79:額外間隔件
80:開口蓋
80A:開口
80B:壁部分
85:熱介面材料(TIM)/焊料層
88:透明片
90:印刷電路板
95:淺孔
D1:突出量
D2:厚度
D3:距離
自結合附圖來解讀之以下詳細描述最佳理解本揭露。需要強調的是，根據行業標準做法，各種構件未按比例繪製且僅用於說明。事實上，為使討論清楚，可任意增大或減小各種構件之尺寸。
圖1繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖2A及圖2B繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖3繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖4繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖5A及圖5B繪示根據本發明之一實施例之一半導體裝置 封裝之一循序製造操作之各個階段之一者。
圖6繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖7A及圖7B繪示根據本發明之實施例之半導體裝置封裝。
圖8A及圖8B繪示根據本發明之實施例之半導體裝置封裝。
圖9A、圖9B、圖9C及圖9D繪示根據本發明之實施例之一半導體裝置封裝之組件。
圖10A及圖10B繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖10C及圖10D繪示根據本發明之實施例之一半導體裝置封裝之組件。
圖11A及圖11B繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖12繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作之各個階段之一者。
圖13繪示根據本發明之一實施例之一半導體裝置封裝。
以下揭露提供用於實施所提供之標的之不同特徵之諸多不同實施例或實例。下文將描述組件及配置之特定實例以簡化本揭露。當然，此等僅為實例且不意在限制。例如，在以下描述中，「使一第一構件形成於一第二構件上方或一第二構件上」可包含其中形成直接接觸之該第 一構件及該第二構件之實施例，且亦可包含其中額外構件可形成於該第一構件與該第二構件之間使得該第一構件及該第二構件可不直接接觸之實施例。另外，本揭露可在各種實例中重複元件符號及/或字母。此重複係為了簡單及清楚且其本身不指示所討論之各種實施例及/或組態之間的一關係。
此外，為便於描述，諸如「下面」、「下方」、「下」、「上方」、「上」及其類似者之空間相對術語在本文中可用於描述一元件或構件與另一(些)元件或構件之關係，如圖中所繪示。空間相對術語除涵蓋圖中所描繪之定向之外，亦意欲涵蓋裝置在使用或操作中之不同定向。設備可依其他方式定向(旋轉90度或依其他定向)且亦可因此解譯本文所使用之空間相對描述詞。另外，術語「由...製成」可意謂「包括」或「由...組成」。在本揭露中，一片語「A、B及C之一者」意謂「A、B及/或C」(A、B、C、A及B、A及C、B及C或A、B及C)，且除非另有描述，否則不意謂來自A之一元件、來自B之一元件及來自C之一元件。
用於一半導體裝置之封裝包含具有不同熱膨脹係數(CTE)之各種材料。因此，封裝可由於熱膨脹係數失配而在表面安裝技術處理期間彎曲。特定言之，當封裝之一封裝蓋與一基板之間的熱膨脹係數之失配較大時，封裝往往會彎曲。在一些實施例中，封裝之封裝蓋由在高溫處具有約17×10-6C-1之一熱膨脹係數之Cu製成，且封裝基板由在高溫處具有約10×10-6C-1之一熱膨脹係數之一聚合材料製成。在此一情況中，基板朝向封裝蓋中凸彎曲(哭臉翹曲)，且彎曲基板壓擠安置於封裝基板之後側上之熔化焊料凸塊更靠近彼此，尤其是BGA之轉角處之焊料凸塊。隨著BGA變形，相鄰焊料凸塊可接觸且引起橋接以藉此引起非想要電短路。
另一方面，若封裝基板具有高於封裝蓋之一熱膨脹係數，則在表面安裝處理期間發生具有朝向封裝蓋之一凹面形狀之封裝之一相反條件(一笑臉翹曲)。在此條件下，中心中之焊料凸塊可形成一橋接。
本發明之實施例提供使BGA不變形且防止焊球橋接之一間隔件。本發明之一些實施例係針對包含一積體扇出(InFO)封裝、一基板上覆晶圓上覆晶片(CoWoS)封裝及一多晶片模組(MCM)之三維(3D)IC封裝技術。在一些實施例中，採用其他適合封裝。在一些實施例中，期望在整個表面安裝處理期間維持封裝基板與一印刷電路板(PCB)之間的一均勻間隙。
圖1至圖6繪示根據本發明之一實施例之一半導體裝置封裝之一循序製造操作。應瞭解，可在由圖1至圖6展示之程序之前、該程序期間及該程序之後提供額外操作，且方法之額外實施例可替換或消除下文將描述之一些操作。操作/程序之順序可互換。
如圖1中所展示，一半導體晶片15模製於一封裝基板50上。在一些實施例中，半導體晶片15係一積體扇出晶片、系統單晶片、晶圓級晶片尺寸封裝或基板上覆晶圓上覆晶片。在一些實施例中，半導體晶片15放置於一引線框架上或連接至一重佈層(佈線)20。在一些實施例中，封裝係一覆晶封裝，且半導體晶片15嵌入諸如一熱固性樹脂之一模製件25中。此外，引線框架或重佈層20連接至導電柱或焊料凸塊30。
重佈層20經形成有一或多個金屬層及一或多個金屬間介電層。金屬間介電層安置於金屬層之間。導電構件(諸如通路)安置於金屬間介電層之一介電材料中，必須連接金屬層中之導電構件(諸如跡線或佈線)。在一些實施例中，介電材料係(例如)二氧化矽、氮化物、碳化物、 聚合物或另一絕緣或介電材料，且可使用一化學汽相沈積(CVD)、旋塗或其他沈積程序形成。導電構件可使用一鑲嵌或雙鑲嵌程序形成，其中在重佈層20中之介電層中蝕刻開口，且將諸如銅、鋁或其類似者之一導電材料沈積於開口中且接著平坦化導電材料。藉由形成多個金屬層及金屬間介電層來累積重佈層，其中跡線及通路自封裝基板50上之導電結構路由電連接，隨後在封裝基板50上安置半導體晶片15至重佈層20之頂面。
封裝基板50具有其上經由重佈層20上之柱或焊料凸塊30附接半導體晶片15之一第一主表面50A及包含一焊球陣列(球柵陣列)55之一第二主表面50B。在一些實施例中，導電通路或佈線層形成於封裝基板50中以將重佈層上之柱或焊料凸塊30電連接至基板50之第二主表面50B上之焊球55。在一些實施例中，封裝基板50由諸如樹脂或陶瓷之一絕緣材料製成。
具有引線框架之半導體晶片15或重佈層20由底膠材料60附接至封裝基板。底膠材料60施加於模製件25之側及半導體晶片15之底部下之空間及封裝基板50之上表面50A。底膠材料60填充柱或焊料凸塊30之間的區域。在一些實施例中，底膠材料60亦安置於半導體晶片15之側上。在一些實施例中，底膠材料60係環氧樹脂，諸如填充二氧化矽之環氧樹脂、聚醯亞胺或其他適合絕緣材料。底膠材料60藉由跨封裝基板50之頂部分佈應力而非允許其集中於柱或焊料凸塊30中來提高機械可靠性。另外，底膠材料60提供免受外部環境中之水分及污染物之囊封。
在一些實施例中，一熱介面材料(TIM)85安置於半導體晶片15上。熱介面材料85包含諸如含錫合金(例如PbSn、AgSn、SnAgCu、CuSnNi、AgCuSbSn、AuSn及/或CuSn)之一焊料材料。在一些實施例 中，PbSn焊料具有約50W/mK之一熱導率，且AgSn焊料具有約78W/mK之一熱導率，SnAgCu焊料具有約60W/mK之一熱導率，CuSnNi焊料具有約64W/mK之一熱導率，AgCuSbSn焊料具有約57W/mK之一熱導率，AuSn焊料具有約57W/mK之一熱導率，且CuSn焊料具有約65W/mK之一熱導率。在一些實施例中，一墊層(圖中未展示)形成於半導體晶片15與熱介面材料85之間。在一些實施例中，墊層由包含鋁、銅、銀、金、鎳、鎢、鈦、其等之合金及/或其等之多層之一適合導電材料形成。
在一些實施例中，熱介面材料85係導熱凝膠、膏狀物、墊、油脂或具有約0.5W/mK至約10W/mK之間的熱導率之相變材料。在一些實施例中，熱油脂可為懸浮於聚矽氧基凝膠中之一陶瓷或金屬，諸如氧化鈹、氮化鋁、氧化鋁、氧化鋅、銀、鋁或其類似者。在一些實施例中，熱介面材料85係鎵合金之一液態金屬膏或經回焊以將熱介面材料黏著至一表面之一金屬合金墊。在一些實施例中，熱介面材料係填充有陶瓷粉末之一非導電陶瓷基膏，諸如氧化鈹、氮化鋁、氧化鋁或氧化鋅。
如圖2A及圖2B中所展示，一封裝蓋65隨後定位於具有半導體晶片15之封裝基板上。封裝蓋65充當耗散由半導體晶片15產生之熱之一散熱器。封裝蓋65由一導熱材料製成。在一些實施例中，封裝蓋由鋁、銅、鎳、鈷及其等之合金或其他導熱材料製成。在一些實施例中，封裝蓋65由諸如CuMo、CuW或CuBe之Cu合金製成。在一些實施例中，封裝蓋由包含陶瓷、碳化矽、氮化鋁、石墨及其類似者之一複合材料製成。
如圖2A(橫截面圖)及圖2B(透視圖)中所展示，封裝蓋65包含一頂板部分65A及一壁部分65B，且進一步包含自壁部分65B之底部延伸之複數個間隔件70。間隔件70與封裝蓋65一體成型為一單件式元 件。在一些實施例中，封裝蓋65在平面圖中具有一方形形狀。如圖2A及圖2B中所展示，封裝基板50中形成自前表面50A穿至後表面50B以分別接收複數個間隔件70之複數個通孔75。在一些實施例中，通孔75由一標準鑽孔程序或一雷射鑽孔程序形成。壁部分65B之一高度在自約0.5mm至約5mm之一範圍內且壁部分65B之一厚度在自約1mm至約10mm之一範圍內。
在一些實施例中，間隔件70安置於壁部分之四個轉角處且一或多個間隔件沿壁部分65B之側安置於轉角間隔件之間。在一些實施例中，一個間隔件安置於轉角間隔件之間的各側之中心處(間隔件之總數係8)。在其他實施例中，兩個間隔件在包含各側處之轉角間隔件之空間之間依一相等間隔安置於轉角間隔件之間(間隔件之總數係12)。間隔件70之數目係不受限的，且在一些實施例中，3個至20個間隔件安置於壁部分65B之各側之轉角間隔件之間。在一些實施例中，各側處之間隔件70之數目及間隔(節距)係相同的。在一些實施例中，無間隔件安置於壁部分65B之轉角處。
在一些實施例中，間隔件70之節距大於球柵陣列55之節距。在一些實施例中，球柵陣列具有自約200μm至約800μm之範圍內之一節距。在一些實施例中，間隔件70之節距在自約1mm至約10mm之一範圍內，且在其他實施例中，在自約2mm至約5mm之一範圍內。
當封裝蓋之形狀(在平面圖中)呈矩形(非方形)時，短側與長側之間的各側處之間隔件70之數目係不同的。在一些實施例中，短側及長側之各側處之間隔件70之數目係相同的。在一些實施例中，短側及長側兩者之間隔件70依相同間隔(節距)配置，且在其他實施例中，短側處之間 隔件70之間隔不同於長側處之間隔件70之間隔。
在一些實施例中，間隔件70具有呈一圓形橫截面之一柱形狀。在其他實施例中，橫截面形狀係包含方形、橢圓形或多邊形(例如六邊形)之矩形。間隔件之橫截面形狀匹配封裝基板中之通孔75之橫截面形狀。間隔件70及通孔75之容限經維持使得間隔件70與通孔75之間緊密配合。在一些實施例中，間隔件70之直徑在自約100μm至約2mm之一範圍內，且在其他實施例中，在自約500μm至約1mm之一範圍內。在一些實施例中，間隔件70之直徑比通孔之直徑大0.5%至5%。在一些實施例中，間隔件之直徑比通孔75之直徑大約1μm至約10μm。當間隔件之直徑大於通孔75之直徑時，封裝基板50由比間隔件70撓性或柔軟之材料製成以使間隔件70壓入配合至通孔75。
在其他實施例中，間隔件70之直徑等於或小於通孔之直徑。在一些實施例中，間隔件70之直徑比通孔之直徑小0.5%至5%。在一些實施例中，間隔件之直徑比通孔75之直徑小約10μm至約50μm。
在一些實施例中，間隔件70之直徑等於或小於壁部分65B之厚度。在一些實施例中，間隔件70之直徑係壁部分65B之厚度之約30%至約100%，且在其他實施例中，在自壁部分65B之厚度之約50%至約80%之一範圍內。
間隔件70之高度大於封裝基板50之厚度，使得當封裝蓋65組裝至封裝基板50時，間隔件70延伸超過封裝基板50之後表面50B。在一些實施例中，間隔件70之突出量D1(參閱圖5A)相同於或小於焊球55自後表面50B之厚度D2。
接著，如圖3中所展示，藉由將間隔件70插入至通孔75中 來將封裝蓋65附接至封裝基板50。在一些實施例中，將封裝蓋65壓入配合至封裝基板50。
接著，(諸如)藉由使用一熱壓縮接合頭72來加熱封裝蓋65且將其壓成經由焊料層(熱介面材料)85與半導體晶片15緊密接觸(如圖4中所展示)以藉此導致其中封裝蓋65接合至晶片15及封裝基板50之一半導體裝置，如圖5A(橫截面圖)及圖5B(透視圖)中所展示。
在將熱及壓力施加於封裝蓋65期間，焊料層(熱介面材料)85流動以在封裝蓋65與晶片15之間形成一連續及實質上平坦焊料層。在一些實施例中，熱壓縮接合頭72將焊料層85加熱至約150℃至約400℃之一溫度。在一些實施例中，將焊料層85加熱至約200℃至約300℃之一溫度。在一實施例中，將焊料層85加熱至約250℃之一溫度。在一些實施例中，在將封裝蓋65壓成與半導體晶片15接觸時施加之壓力在自約50kPa至約20MPa之範圍內。在一些實施例中，所施加之壓力在自約300kPa至約3MPa之範圍內。在一些實施例中，所施加之壓力在自約500kPa至約2MPa之範圍內。連續焊料層85充當具有足夠熱導率以自半導體晶片15輻射熱之一改良熱介面材料(TIM)層。來自半導體晶片15之熱由連續熱介面材料85傳遞至封裝蓋65。封裝蓋65耗散晶片15之熱以容許半導體晶片15以較高速度及較小熱應力操作。
在一些實施例中，當封裝蓋65之間隔件70之直徑小於封裝基板50之通孔75之直徑時，一黏著材料(例如環氧樹脂黏著劑)用於將間隔件70固定至封裝基板50。
接著，將圖5A及圖5B中所展示之封裝半導體裝置安裝於一板90(諸如一印刷電路板(PCB))上，如圖6中所展示。在一些實施例 中，使用一表面安裝程序將封裝半導體裝置安裝至印刷電路板90。
在表面安裝程序期間，施加熱以至少部分熔化球柵陣列之焊球55以將焊球55分別接合至形成於印刷電路板90上之電極墊。如圖6中所展示，由一剛性材料製成之蓋65之間隔件70維持封裝基板50之後表面50B與印刷電路板90之間的一均勻及足夠間隙。因此，施加於球柵陣列之焊球55之壓力係均勻的，其可防止焊球55之非所要變形。在一些實施例中，封裝基板50之後表面50B之間的間隙之距離變動係間隙之平均距離之約1%至約5%(例如當以20個至50個點量測時)。
圖7A及圖7B亦展示間隔件70之效應。如上文所闡述，封裝半導體裝置會因封裝基板50與封裝蓋65之間的熱膨脹係數差而彎曲。圖7A展示皺眉臉翹曲(上凸)且圖7B展示笑臉翹曲(下凸)。在兩種情況中，封裝基板50之後表面50B與印刷電路板90之間的間隔件70防止焊球55橋接或變形。
在一些實施例中，如圖8A及圖8B中所展示，封裝基板50之後表面50B與印刷電路板90之間的一距離D3(間隙或空間)在自約20μm至約800μm之一範圍內，在其他實施例中，距離在自約50μm至約500μm之一範圍內。在特定實施例中，距離在自約100μm至約400μm之一範圍內。換言之，將間隔件70之突出量D1(參閱圖5A)設定為等於距離D3。
在一些實施例中，由一黏著材料(例如環氧樹脂黏著劑)將封裝蓋65之間隔件70固定至印刷電路板90。在此一情況中，間隔件70之突出量D1歸因於黏著材料之厚度而略小於距離D3。
在其他實施例中，間隔件70之一部分嵌入印刷電路板90中。在一些實施例中，淺孔95形成於電路板90之上表面中以使間隔件70 之端配合至淺孔中，如圖8A中所展示。在一些實施例中，淺孔95之深度在自約5μm至約200μm之一範圍內。在此一情況中，間隔件70之突出量D1比距離D3大淺孔95之深度。
此外，在一些實施例中，如圖8B中所展示，間隔件70之端包含具有一較小直徑之一窄部分73。在一些實施例中，窄部分73配合至淺孔95中。在一些實施例中，窄部分73具有一錐形形狀。圖8A及圖8B中所展示之組態可更剛性或更緊密固定封裝基板50之後表面50B與印刷電路板90之間的間隙或空間。
圖9A至圖9D展示根據本發明之實施例之封裝蓋65之各種組態。
在一些實施例中，間隔件70之中心與壁部分65B之中心對準，如圖9A中所展示。在其他實施例中，間隔件70之中心自壁部分65B之中心向內或向外移位，如圖9B中所展示。在特定實施例中，壁部分65B之外表面與間隔件70之最外部分齊平，如圖9C中所展示，且在其他實施例中，壁部分65B之內表面與間隔件70之最內部分齊平，如圖9D中所展示。取決於裝置組態(例如球柵陣列55之配置)來選擇間隔件70之一適合組態。間隔件70之實施例適應球柵陣列之焊球55之不同球大小及節距之各種設計。
本發明之實施例亦可允許不使封裝基板實質變形之高達260℃之處理溫度以藉此防止橋接及短路。
圖10A及圖10B展示根據本發明之實施例之具有一環或框架形狀之一開口蓋。相同或類似於使用圖1至圖9D闡釋之材料、組態、尺寸、結構、條件及操作之材料、組態、尺寸、結構、條件及操作可用於以 下實施例中，且可省略一些闡釋。
在一些實施例中，半導體晶片15包含諸如一電荷耦合裝置(CCD)裝置或一CMOS影像感測器之一影像感測器，其自外部接收光且產生對應於光之一影像信號。在一些實施例中，半導體晶片15係一光(例如紅外光)感測器。在此一情況中，封裝應具有接收入射光之一開口。
如圖10A及圖10B中所展示，使用具有一環或一框架形狀之一開口蓋80替代上文所展示之封閉封裝蓋65。類似於封裝蓋65，開口蓋80包含包圍一開口80A之一壁部分80B及自壁部分80B之底部突出之複數個間隔件70。
開口蓋80由一導熱材料製成。在一些實施例中，開口蓋80充當耗散由半導體晶片15產生之熱之一散熱器。然而，不同於封裝蓋65，無導熱路徑提供於半導體晶片15之頂部至封裝蓋65之間(無頂板部分且無熱介面材料)，因此，與開口蓋80一起使用之半導體晶片15產生比與封裝蓋65一起使用之半導體晶片15少之熱。在其他實施例中，一外部散熱器透過開口80A附接至半導體晶片15，或一冷卻風扇提供於開口80A上方以冷卻半導體晶片15。
在一些實施例中，開口蓋80由鋁、銅、鎳、鈷及其等之合金或其他導熱材料製成。在一些實施例中，開口蓋80由諸如CuMo、CuW或CuBe之Cu合金製成。在一些實施例中，開口蓋80由包含碳化矽、氮化鋁、石墨及其類似者之一複合材料製成。在一些實施例中，開口蓋80由包含陶瓷、碳化矽、氮化鋁、石墨及其類似者之一複合材料製成。
在一些實施例中，一透明片88放置於開口80A中(如圖10C中所展示)或覆蓋開口80A(如圖10D中所展示)以保護半導體晶片15。在一 些實施例中，透明片由玻璃或塑膠製成。在一些實施例中，透明片使可見光及/或紅外光通過。
在一些實施例中，壁部分80B之一高度等於或小於自封裝基板50之前表面50A量測之半導體晶片15之高度。在其他實施例中，壁部分80B之高度大於半導體晶片15之高度。
在一些實施例中，壁部分之內部塗佈有一光吸收材料或具有一粗糙化表面。在一些實施例中，粗糙化表面之粗糙度Ra在自約1μm至約100μm之一範圍內。
此外，在一些實施例中，填充一透明樹脂以覆蓋開口蓋80中之半導體晶片15以保護半導體晶片15。
類似於圖5A及圖5B，藉由經由壓入配合將間隔件70插入至通孔75中來將開口蓋80附接至封裝基板50，如圖11A及圖11B中所展示。
在一些實施例中，當開口蓋80之間隔件70之直徑小於封裝基板50之通孔75之直徑時，使用一黏著材料(例如環氧樹脂黏著劑)將間隔件70固定至封裝基板50。
接著，將圖11A及圖11B中所展示之封裝半導體裝置安裝於一板90(諸如一印刷電路板(PCB))上，如圖12中所展示。在一些實施例中，使用一表面安裝程序將封裝半導體裝置安裝至印刷電路板90。
在表面安裝程序期間，施加熱以至少部分熔化球柵陣列之焊球55以將焊球55分別接合至形成於印刷電路板90上之電極墊。如圖12中所展示，由一剛性材料製成之開口蓋80之間隔件70維持封裝基板50之後表面50B與印刷電路板90之間的一均勻及足夠間隙。因此，施加於球柵 陣列之焊球55之壓力係均勻的，其可防止焊球55之非所要變形。在一些實施例中，封裝基板50之後表面50B之間的間隙之距離變動係間隙之平均距離之約1%至約5%(例如當以20個至50個點量測時)。
圖13展示根據本發明之實施例之具有間隔件之一封裝蓋。相同或類似於使用圖1至圖12闡釋之材料、組態、尺寸、結構、條件及操作之材料、組態、尺寸、結構、條件及操作可用於以下實施例中，且可省略一些闡釋。
在以上實施例中，間隔件70經安置以包圍球柵陣列55。當半導體晶片15之大小較大時，封裝基板之中心部分無法由間隔件70適當支撐以維持封裝基板50與印刷電路板90之間的一均勻氣體距離。
在一些實施例中，一或多個額外間隔件79安置於封裝基板50與印刷電路板90之間，如圖13中所展示。在一些實施例中，額外間隔件79由鋁、銅、鎳、鈷及其等之合金或其他導熱材料製成。在一些實施例中，額外間隔件79由諸如CuMo、CuW或CuBe之Cu合金製成。在一些實施例中，額外間隔件79由包含碳化矽、氮化鋁、石墨及其類似者之一複合材料製成。在一些實施例中，額外間隔件79由包含陶瓷、碳化矽、氮化鋁、石墨及其類似者之一複合材料製成。在一些實施例中，額外間隔件79由相同於封裝蓋65或開口蓋80之材料製成。在其他實施例中，額外間隔件79由不同於封裝蓋65或開口蓋80之一材料製成。在此一情況中，額外間隔件79之剛性小於或大於封裝蓋65或開口蓋80之剛性。
在一些實施例中，當額外間隔件79由一導電材料製成時，額外間隔件79經安置以不接觸球柵陣列之焊球55。在一些實施例中，當額外間隔件79由一絕緣材料製成時，額外間隔件79接觸或不接觸球柵陣 列之焊球55。在一些實施例中，當安置多個額外間隔件79時，額外間隔件79經配置成相對於封裝基板50之中心(或半導體晶片15之中心)點對稱。
根據本揭露之實施例，由於間隔件與一封裝蓋或一開口蓋一體成型(其穿過封裝基板而著陸於印刷電路板)，因此可有效防止或抑制封裝在一熱程序期間之變形。
根據本揭露之一態樣，一種半導體封裝包含：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其安置於該半導體晶片上；及數個間隔件，其等自該封裝蓋延伸穿過該第一基板中之對應孔。該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面。在以上及以下實施例之一或多者中，該等間隔件由相同於該封裝蓋之一材料製成。在以上及以下實施例之一或多者中，該等間隔件及該封裝蓋形成一整體組件。在以上及以下實施例之一或多者中，該封裝蓋由鋁、鋁合金、銅、銅合金、不鏽鋼或陶瓷製成。在以上及以下實施例之一或多者中，該銅合金選自由CuMo、CuW及CuBe組成之群組。在以上及以下實施例之一或多者中，該封裝蓋透過一熱介面材料與該半導體晶片接觸。在以上及以下實施例之一或多者中，該半導體封裝進一步包含安置於該第一基板之該第二主表面上之一球柵陣列。在以上及以下實施例之一或多者中，該球柵陣列具有自200μm至800μm之範圍內之一節距。在以上及以下實施例之一或多者中，該第一基板安置於一第二基板上。在以上及以下實施例之一或多者中，該等間隔件接觸該第二基板之一主表面。在以上及以下實施例之一或多者中，該第二基板係一印刷電路板。在以上及以下實施例之一或多者中，該第一基板與該第二基板分離達自20μm至800μm之範圍內之一距離。在以上及以下實施例之一或多 者中，該等間隔件安置於該封裝蓋之至少轉角處。
根據本揭露之另一態樣，一種半導體封裝包含：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其呈一環或一框架形狀，該封裝蓋具有一開口且安置於該半導體晶片上；一第二基板，其安置於該第一基板下方；及數個間隔件，其等自該封裝蓋延伸穿過該第一基板中之對應孔。該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面而接觸該第二基板之一主表面。在以上及以下實施例之一或多者中，該半導體晶片係一影像感測器或一光感測器。在以上及以下實施例之一或多者中，該封裝蓋由鋁、鋁合金、銅、銅合金、不鏽鋼或陶瓷製成。在以上及以下實施例之一或多者中，該第二基板包含與該等間隔件配合之孔。在以上及以下實施例之一或多者中，該半導體封裝進一步包含安置於該開口中或該開口上之一透明蓋。
根據本揭露之另一態樣，在製造一半導體封裝之方法中，將一封裝蓋定位於安置於一第一基板之一第一主表面上之一晶片上。該封裝蓋具有自該封裝蓋之一周邊延伸之複數個間隔件，且該第一基板具有對應於該複數個間隔件之複數個孔。將該等間隔件定位至該等孔中，使得該等間隔件穿過該基板之一第一主表面且延伸超過該基板之一第二對置主表面以形成一封裝半導體裝置。在以上及以下實施例之一或多者中，由一表面安裝程序將該封裝半導體裝置附接至一第二基板。
本發明之一實施例係一種半導體封裝，其包含安置於一基板之一第一主表面上之一晶片。一封裝蓋或環安置於該半導體晶片上，且間隔件自該封裝蓋或環延伸穿過該基板中之對應孔。該等間隔件在該基板 之一第一主表面處進入該等孔且延伸超過該基板之一對置第二主表面。在一實施例中，該等間隔件由相同於該封裝蓋或環之一材料製成。在一實施例中，該等間隔件及該封裝蓋或該環形成一整體組件。在一實施例中，該封裝蓋或環由銅、銅合金或不鏽鋼製成。在一實施例中，該銅合金選自由CuMo、CuW及CuBe組成之群組。在一實施例中，該封裝蓋透過一熱介面材料與該半導體晶片接觸。在一實施例中，該半導體封裝包含安置於該基板之一第二主表面上之一球柵陣列。在一實施例中，該球柵陣列具有自200μm至800μm之範圍內之一節距。在一實施例中，該基板安置於一第二基板上。在一實施例中，該等間隔件接觸該第二基板之一主表面。在一實施例中，該第二基板係一印刷電路板。在一實施例中，該基板與該第二基板分離達自20μm至800μm之範圍內之一距離。在一實施例中，該基板與該第二基板分離達自50μm至500μm之範圍內之一距離。在一實施例中，該基板與該第二基板分離達自100μm至400μm之範圍內之一距離。在一實施例中，該等間隔件圍繞該封裝蓋或環之一周邊安置。在一實施例中，該封裝蓋或環在平面圖中呈實質上矩形形狀。在一實施例中，該封裝蓋或環之各側上存在三個間隔件。在一實施例中，該等間隔件之各者圍繞該封裝蓋或環之一周邊與一相鄰間隔件隔開達一實質上相同距離。在一實施例中，間隔件定位於該封裝蓋或環之轉角處。在一實施例中，該等孔之一直徑在自100μm至1,000μm之範圍內。在一實施例中，該等間隔件之一直徑比該等孔之該直徑小10μm至50μm。在一實施例中，該半導體晶片係一積體扇出晶片、系統單晶片、晶圓級晶片尺寸封裝或基板上覆晶圓上覆晶片。在一實施例中，該半導體封裝包含該半導體晶片與該基板之間的一底膠填充層。
本發明之另一實施例係一種方法，其包含將一封裝蓋或環定位於安置於一基板之一第一主表面上之一晶片上。該封裝蓋或環具有自該封裝蓋或環之一周邊延伸之複數個間隔件，且該基板具有對應於該複數個間隔件之複數個孔。將該等間隔件定位至該等孔中，使得該等間隔件穿過該基板之一第一主表面且延伸超過該基板之一第二對置主表面。在一實施例中，該方法包含在將該封裝蓋或環定位於該半導體晶片上之前穿過該基板鑽探該複數個孔。在一實施例中，該方法包含在將該封裝蓋或環定位於該半導體晶片上之前在該半導體晶片上形成一層熱介面材料。在一實施例中，該封裝蓋透過該熱介面材料接觸該半導體晶片。在一實施例中，該方法包含在將該封裝蓋或環定位於該半導體晶片上之前在該半導體晶片與該基板之間供應一底膠材料。在一實施例中，該方法包含在將該封裝蓋或環定位於該基板上之前將該半導體晶片焊接至該基板之該第一主表面。在一實施例中，該基板包含安置於該基板之一第二主表面上之一球柵陣列。在一實施例中，該球柵陣列具有自200μm至800μm之範圍內之一節距。在一實施例中，該方法包含將該基板附接至一第二基板之一第一主表面。在一實施例中，將該基板焊接至該第二基板之該第一主表面。在一實施例中，該第二基板係一印刷電路板。在一實施例中，該複數個間隔件接觸該第二基板之該第一主表面。在一實施例中，該基板與該第二基板分離達自20μm至800μm之範圍內之一距離。在一實施例中，該基板與該第二基板分離達自50μm至500μm之範圍內之一距離。在一實施例中，該基板與該第二基板分離達自100μm至400μm之範圍內之一距離。在一實施例中，該等間隔件由相同於該封裝蓋或環之一材料製成。在一實施例中，該等間隔件及該封裝蓋或該環形成一整體組件。在一實施例中，該封裝蓋或環由 銅、銅合金或不鏽鋼製成。在一實施例中，該銅合金選自由CuMo、CuW及CuBe組成之群組。在一實施例中，該封裝蓋或環在平面圖中呈實質上矩形形狀。在一實施例中，該封裝蓋或環之各側上存在三個間隔件。在一實施例中，該複數個間隔件之各者圍繞該封裝蓋或環之一周邊與一相鄰間隔件隔開達一實質上相同距離。在一實施例中，間隔件定位於該封裝蓋或環之轉角處。在一實施例中，該等孔之一直徑在自100μm至1,000μm之範圍內。在一實施例中，該等間隔件之一直徑比該等孔之該直徑小10μm至50μm。在一實施例中，該半導體晶片係一積體扇出晶片、系統單晶片、晶圓級晶片尺寸封裝或基板上覆晶圓上覆晶片。
上文已概述若干實施例或實例之特徵，使得熟習技術者可較佳理解本發明之態樣。熟習技術者應瞭解，其可容易地使用本揭露作為設計或修改用於實施相同目的及/或達成本文所引入之實施例之相同優點之其他程序及結構之一基礎。熟習技術者亦應認識到，此等等效構造不應背離本發明之精神及範疇，且其可在不背離本發明之精神及範疇之情況下對本文作出各種改變、取代及更改。
15:半導體晶片
20:重佈層
25:模製件
30:導電柱/焊料凸塊
50:封裝基板
50A:第一主表面/上表面/前表面
50B:第二主表面/後表面
55:焊球/球柵陣列
60:底膠材料
65:封裝蓋
65A:頂板部分
65B:壁部分
70:間隔件
75:通孔
85:熱介面材料(TIM)/焊料層

Claims (10)

  1. 一種半導體封裝，其包括：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，用於耗散由半導體晶片產生之熱，其包含一頂板部分安置於該半導體晶片上及一壁部分與該頂板部分連接，該壁部分自該頂板部分往該第一基板延伸；及數個間隔件，其等自該封裝蓋的該壁部分延伸穿過該第一基板中之對應孔，其中該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面，以及每一間隔件的至少一部分被該第一基板圍繞。
  2. 如請求項1之半導體封裝，其中該等間隔件及該封裝蓋形成一整體組件。
  3. 如請求項1之半導體封裝，其中該封裝蓋由鋁、鋁合金、銅、銅合金、不鏽鋼或陶瓷製成。
  4. 如請求項1之半導體封裝，其中該封裝蓋透過一熱介面材料與該半導體晶片接觸。
  5. 如請求項1之半導體封裝，其進一步包括安置於該第一基板之該第二 主表面上之一球柵陣列。
  6. 如請求項1之半導體封裝，其中該第一基板安置於一第二基板上，且該等間隔件接觸該第二基板之一主表面。
  7. 一種半導體封裝，其包括：一半導體晶片，其安置於一第一基板之一第一主表面上；一封裝蓋，其呈一環或一框架形狀，該封裝蓋具有包圍一開口的一壁部份且安置於該半導體晶片上；一第二基板，其安置於該第一基板下方；及數個間隔件，其等自該封裝蓋的該壁部分延伸穿過該第一基板中之對應孔，該等間隔件由相同於該封裝蓋之一材料製成，其中該等間隔件在該第一基板之一第一主表面處進入該等孔且延伸超過該第一基板之一對置第二主表面而接觸該第二基板之一主表面，以及每一間隔件的至少一部分被該第一基板圍繞。
  8. 如請求項7之半導體封裝，其中該半導體晶片係一影像感測器或一光感測器。
  9. 如請求項7之半導體封裝，其中該第二基板包含與該等間隔件配合之孔。
  10. 一種製造一半導體封裝之方法，該方法包括： 將一封裝蓋定位於安置於一第一基板之一第一主表面上之一晶片上，其中該封裝蓋具有一頂板部分安置於該晶片上及一壁部分與該頂板部分連接，該壁部分自該頂板部分往該第一基板延伸，該封裝蓋還具有自該封裝蓋的該壁部分延伸之複數個間隔件，該等間隔件由相同於該封裝蓋之一材料製成，且該第一基板具有對應於該複數個間隔件之複數個孔；及將該等間隔件定位至該等孔中，使得該等間隔件穿過該基板之一第一主表面且延伸超過該基板之一第二對置主表面以形成一封裝半導體裝置，且每一間隔件的至少一部分被該第一基板圍繞。
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