TWI759636B - 影像感測器晶片級封裝 - Google Patents

影像感測器晶片級封裝 Download PDF

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TWI759636B
TWI759636B TW108136088A TW108136088A TWI759636B TW I759636 B TWI759636 B TW I759636B TW 108136088 A TW108136088 A TW 108136088A TW 108136088 A TW108136088 A TW 108136088A TW I759636 B TWI759636 B TW I759636B
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Taiwan
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substrate
cover glass
dam
top surface
pixel array
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TW108136088A
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TW202015195A (zh
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范純聖
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美商豪威科技股份有限公司
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Abstract

一種影像感測器晶片級封裝包括像素陣列、覆蓋像素陣列的防護玻璃、壩和粘合層。像素陣列嵌入在半導體基板的基板頂表面中。半導體基板包括圍繞像素陣列的半導體基板的週邊區域中的多個導電焊盤。壩至少部分地圍繞像素陣列並且位於(i)防護玻璃和半導體基板之間，以及(ii)像素陣列和多個導電焊盤之間的基板頂表面的區域上。粘合層(i)位於防護玻璃和半導體基板之間，(ii)至少部分地圍繞壩，並且(iii)被配置為將防護玻璃粘合到半導體基板。

Description

影像感測器晶片級封裝
本發明涉及影像感測器領域，尤其涉及一種影像感測器晶片級封裝。
諸如獨立數位相機、移動設備、汽車部件和醫療設備之類的消費者設備中的相機模組通常包括透鏡元件和影像感測器。由相機模組捕獲的影像的品質部分取決於透鏡元件與影像感測器的正確對準。
本文公開了旨在促進透鏡元件與影像感測器的準確且可再現的對準的實施例。
根據本發明的第一觀點，影像感測器晶片級封裝包括像素陣列、覆蓋像素陣列的防護玻璃、壩(dam)和粘合層。像素陣列嵌入在半導體基板的基板頂表面中。半導體基板包括圍繞像素陣列的半導體基板的週邊區域中的多個導電焊盤。壩至少部分地圍繞像素陣列並且位於(i)防護玻璃和半導體基板之間，以及(ii)像素陣列和多個導電焊盤之間的基板頂表面的區域上。粘合層(i)位於防護玻璃和半導體基板之間，(ii)至少部分地圍繞壩，並且(iii)被配置為將防護玻璃粘合到半導體基板。
根據本發明的第二觀點，影像感測器晶片級封裝包括絕緣基板、影像感測器、積體電路和第一再分佈層。絕緣基板包括穿過其中的第一多個導電通孔。積體電路位於絕緣基板和影像感測器之間，並且在絕緣基板的頂表面上方的第一高度處具有頂表面。第一再分佈層(i)將積體電路電連接到第一多 個導電通孔中的每個導電通孔，以及(ii)跨越影像感測器和絕緣基板的頂表面之間的距離。該距離超過第一高度。
根據本發明的第三觀點，一種用於製造影像感測器晶片級封裝的方法包括利用粘合劑將防護玻璃粘結到半導體基板。粘合劑佔據圍繞嵌入在半導體基板的基板頂表面中的第一像素陣列的壩間區域。壩間區域至少部分地由以下界定：(i)至少部分地圍繞第一像素陣列的壩，(ii)至少部分地圍繞與第一像素陣列相鄰的相應像素陣列的相鄰壩，以及(iii)基板頂表面的壩間表面。
190‧‧‧相機
100‧‧‧影像感測器晶片級封裝
200‧‧‧影像感測器晶片級封裝
298X和298Z‧‧‧正交方向
298Y‧‧‧方向
220‧‧‧半導體基板
240‧‧‧壩
250‧‧‧粘合層
260‧‧‧防護玻璃
221‧‧‧底表面
225‧‧‧側表面
229‧‧‧頂表面
227‧‧‧像素陣列
226‧‧‧影像感測器
228‧‧‧導電焊盤
210‧‧‧絕緣基板
211‧‧‧底表面
219‧‧‧頂表面
216‧‧‧導電焊盤
214‧‧‧導電通孔
224‧‧‧引線接合
259‧‧‧頂表面
400‧‧‧影像感測器晶片級封裝
450‧‧‧粘合層
460‧‧‧防護玻璃
463‧‧‧腔體
461‧‧‧防護玻璃底表面
462‧‧‧最小距離
409‧‧‧封裝頂表面
469‧‧‧頂表面
408‧‧‧均勻的高度
470‧‧‧罩幕
474‧‧‧區域
475‧‧‧區域
479‧‧‧頂表面
478‧‧‧厚度
425‧‧‧再分佈層
424‧‧‧隔離層
500‧‧‧影像感測器晶片級封裝
535‧‧‧積體電路
535‧‧‧再分佈層
539H‧‧‧高度
539‧‧‧頂表面
514‧‧‧導電通孔
538‧‧‧導電焊盤
535H‧‧‧距離
539H‧‧‧高度
539‧‧‧表面
537‧‧‧間隙厚度
600‧‧‧元件晶圓
626‧‧‧影像感測器
625‧‧‧元件間區域
611‧‧‧第一列
612‧‧‧第二列
700‧‧‧晶圓組件
629‧‧‧頂表面
710‧‧‧基板
719‧‧‧頂表面
800‧‧‧晶圓組件
716‧‧‧焊盤間區域
820‧‧‧溝槽
716‧‧‧焊盤間區域
821‧‧‧寬度
900‧‧‧晶圓組件
900‧‧‧晶圓組件
1000‧‧‧晶圓組件
1045‧‧‧壩間區域
1100‧‧‧晶圓組件
115‧‧‧粘合層
1159‧‧‧頂表面
1200‧‧‧方法
1240‧‧‧步驟
1210、1220和1230‧‧‧步驟
1210‧‧‧步驟
1212、1214和1216‧‧‧步驟
122‧‧‧步驟
1222‧‧‧步驟
1300‧‧‧防護玻璃組件
1360‧‧‧防護玻璃晶圓
1380‧‧‧間隔組件
1302‧‧‧切割平面
1361‧‧‧底表面
1400‧‧‧封裝元件晶圓
1500‧‧‧CSP
1550‧‧‧粘合層
1580‧‧‧間隔層
1560‧‧‧防護玻璃
1610、1620和1630‧‧‧步驟
圖1描繪了包括影像感測器封裝的實施例的相機。
圖2是影像感測器封裝的示意性剖視圖，影像感測器封裝是圖1的影像感測器封裝的實施例。
圖3是在實施例中圖示圖2的影像感測器封裝的一部分的平面示意圖。
圖4是第一影像感測器晶片級封裝的示意性剖視圖，該第一影像感測器晶片級封裝是圖1的影像感測器封裝的實施例。
圖5是第二影像感測器晶片級封裝的示意性剖視圖，該第二影像感測器晶片級封裝是圖1的影像感測器封裝的實施例。
圖6是在實施例中的包括多個影像感測器的元件晶圓的俯視圖。
圖7是在實施例中的在絕緣基板上包括圖6的元件晶圓的晶圓元件的剖視圖。
圖8是在實施例中在從圖6的元件晶圓移除材料之後的圖7的晶 圓組件的剖視圖。
圖9是在實施例中在添加再分佈層之後的圖8的晶圓組件的剖視圖。
圖10是在實施例中在添加圍繞每個影像感測器的壩之後的圖9的晶圓組件的剖視圖。
圖11是在實施例中的晶圓組件的剖視圖，該晶圓組件是圖10的晶圓元件，在相鄰的壩之間其上具有粘合層。
圖12是圖示在實施例中用於製造圖4的影像感測器晶片級封裝的方法的流程圖。
圖13是在實施例中其上具有多個間隔元件的防護玻璃元件的剖視圖。
圖14是在實施例中的封裝元件晶圓的剖視圖，該封裝元件晶圓包括圖13的防護玻璃元件和圖9的晶圓組件。
圖15是第三影像感測器晶片級封裝的示意性剖視圖，該第三影像感測器晶片級封裝是圖1的影像感測器封裝的實施例。
圖16是圖示在實施例中用於製造圖15的影像感測器晶片級封裝的方法的流程圖。
此處本發明將針對發明具體實施例及其觀點加以詳細描述，此類描述為解釋本發明之結構或步驟流程，其係供以說明之用而非用以限制本發明之申請專利範圍。因此，除說明書中之具體實施例與較佳實施例外，本發明亦 可廣泛施行於其他不同的實施例中。以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技術之人士可藉由本說明書所揭示之內容輕易地瞭解本發明之功效性與其優點。且本發明亦可藉由其他具體實施例加以運用及實施，本說明書所闡述之各項細節亦可基於不同需求而應用，且在不悖離本發明之精神下進行各種不同的修飾或變更。
圖1描繪了對場景成像的相機190。相機190包括影像感測器晶片級封裝100。這裡，為了簡潔起見，“影像感測器晶片級封裝(image-sensor chip-scale package)”被簡化為“CSP”。
圖2是作為CSP 100的實施例的影像感測器晶片級封裝200的示意性剖視圖。圖2的示意圖的剖面平行於包括正交方向298X和298Z的平面，所述正交方向298X和298Z各自與方向298Y正交。CSP 200包括半導體基板220、壩240、粘合層250和防護玻璃260。圖3是半導體基板220和壩240的平面示意圖。在下面的描述中最好一起查看圖2和圖3。圖2的剖視圖在例如圖3的剖面2中。
半導體基板220具有底表面221、側表面225、頂表面229和嵌入在其中的像素陣列227。像素陣列227是影像感測器226的一部分。半導體基板220包括在圍繞像素陣列227的半導體基板220的週邊區域中的多個導電焊盤228。每個導電焊盤228電連接到影像感測器226，並且可以但不必暴露在頂表面229上，頂表面229可以包括導電焊盤228的表面。導電焊盤228可以是影像感測器226的一部分。
壩240至少部分地圍繞像素陣列227並且位於防護玻璃260和半導體基板220之間，在像素陣列227和導電焊盤228之間的頂表面229的區域上。防護玻璃260覆蓋像素陣列227並且在壩240的頂表面249上方。
CSP 200還可以包括絕緣基板210，絕緣基板210具有底表面211和頂表面219。絕緣基板210包括多個導電焊盤216，每個導電焊盤216例如通 過穿過絕緣基板210的多個導電通孔214的相應一個導電通孔電連接到多個底部導電焊盤212中的相應一個底部導電焊盤。導電焊盤216和212可以分別暴露在頂表面219和底表面211上。每個導電焊盤228通過相應的引線接合224電連接到導電焊盤216和底部導電焊盤212中的至少一個。任何一個導電通孔214可以是貫穿通孔、盲通孔或掩埋通孔。
絕緣基板210可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於氧化物、焊接罩幕材料、碳化矽、二氧化矽、氮化矽、氧化鋁、苯並環丁烯(BCB)、電介質、聚醯亞胺、樹脂及其組合。絕緣基板210可以是印刷電路板。壩240可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於環氧丙烯酸酯、低聚物、聚丙烯酸甲酯、丙烯酸、矽石(silica)、聚二甲基矽氧烷、環氧樹脂、二氧化矽及其任何組合。半導體基板220可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於矽、鍺及其任何組合。粘合層250可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於巰基酯、丙烯酸、環氧、聚醯亞胺和聚二甲基矽氧烷及其任意組合。防護玻璃260包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於鋁矽酸鹽玻璃、無堿玻璃、硼矽酸鹽玻璃、石英玻璃及其組合。
粘合層250將防護玻璃260粘結到半導體基板220，並且在適用時，粘結到絕緣基板210。粘合層250還保護引線接合224。粘合層250可以由環氧樹脂形成，並且具有頂表面259。粘合層250的缺點在於它在固化時收縮，使得頂表面259在表面229和/或表面219上方可能具有不均勻的高度。CSP 200的平面頂表面便於CSP 200與透鏡元件的組裝，透鏡元件例如擱置在頂表面259上。為了獲得最佳影像品質，透鏡元件必須與CSP 200對準，使得其光軸正交於像素陣列227的平面。當頂表面259具有不均勻的高度時，這種對準受到阻礙。
圖4是作為CSP 100的實施例的影像感測器晶片級封裝400的示意性剖視圖。CSP 400彌補了CSP 200的上述問題。圖4的示意圖的剖面平面與 包括正交方向298X和298Z的平面平行。CSP 400包括半導體基板220、壩240、粘合層450和防護玻璃460。用於粘合層450和防護玻璃460的候選材料分別與用於粘合層250和防護玻璃260的候選材料相同。CSP還可以包括在半導體基板220下方的絕緣基板210。
半導體基板220、壩240和防護玻璃460可以在影像感測器226上方形成腔體463。腔體可以由半導體基板220的頂表面229、壩240的內側表面245和防護玻璃460的防護玻璃底表面461形成。腔體可以具有對應於防護玻璃底表面461和頂表面229之間的最小距離462的最小高度。最小距離462可以大於或等於壩240的高度。例如，最小距離462可以等於壩240的高度與壩240和防護玻璃460之間的任何粘合劑(例如，粘合層450)的厚度之和。最小距離462在例如30微米到50微米之間。
粘合層450(i)位於防護玻璃460和半導體基板220之間，(ii)至少部分地圍繞壩240，以及(iii)被配置為將防護玻璃460粘合到半導體基板220。粘合層450可以跨越防護玻璃底表面461和頂表面229之間。當CSP 400包括絕緣基板210時，粘合層450可以跨越絕緣基板210的頂表面219和防護玻璃底表面461之間。
CSP 400具有封裝頂表面409。封裝頂表面409包括位於像素陣列227、壩240和粘合層450上方的相應區域。防護玻璃460具有防護玻璃底表面461和頂表面469。封裝頂表面409包括頂表面469的至少一部分。封裝頂表面409具有相對於防護玻璃底表面461的在3微米內均勻的高度408。這種均勻性有利於上述透鏡元件與像素陣列227的對準。封裝頂表面409可以是影像感測器晶片級封裝的最頂層表面。
CSP 400可以在防護玻璃頂表面469上包括不透明罩幕470。不透明罩幕470位於壩240和粘合層450中的至少一個上方。例如，不透明罩幕470包括區域474和區域475中的至少一個，區域474和區域475分別直接在壩240和粘合層450上方。不透明罩幕470具有頂表面479。當CSP 400包括不透 明罩幕470時，封裝頂表面409包括頂表面479的一部分。
構成粘合層450的材料可以與構成不透明罩幕470的材料不同。不透明罩幕470可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於鎢、鉬、光致抗蝕劑材料及其任何組合。不透明罩幕470具有厚度478，其可以小於3微米。
CSP 400可以包括再分佈層425。再分佈層425包括多個導電段，每個導電段電連接到相應的導電焊盤228並且從基板頂表面229朝底表面221延伸。當CSP 400包括絕緣基板210時，再分佈層425的每個導電段可以將相應的導電焊盤228電連接到相應的導電焊盤216。
CSP 400可以包括在側表面225和再分佈層425之間的隔離層424。隔離層424的部分可以在頂表面229和再分佈層425之間。隔離層424可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於聚醯亞胺、碳化矽、氧化物及其任何組合。隔離層424例如經由等離子體增強化學氣相沉積形成。
圖5是影像感測器晶片級封裝500的示意性剖視圖，影像感測器晶片級封裝500是包括積體電路535的CSP 100的實施例。CSP 500彌補了CSP 200的上述問題。圖5的示意圖的剖面平面與包括正交方向298X和298Z的平面平行。
CSP 500包括絕緣基板210、影像感測器226、積體電路530和再分佈層535。積體電路530位於絕緣基板210和影像感測器226之間，並且在絕緣基板的頂表面上方的高度539H處具有頂表面539。除了多個導電通孔214之外，絕緣基板210可以包括多個導電通孔514。任何一個導電通孔514可以是貫穿通孔，盲通孔或掩埋通孔。積體電路530可以包括數位訊號處理器，諸如影像信號處理器。
再分佈層535將積體電路530電連接到絕緣基板210的多個導電通孔514中的每一個。例如，積體電路530可以包括多個導電焊盤538，每個導電焊盤通過再分佈層535電連接到相應的導電通孔214。再分佈層535可以將影像感測器226電連接到積體電路530，例如，當積體電路530包括影像信號處理器時。
再分佈層535跨越影像感測器和絕緣基板的頂表面539之間的距離535H。距離535H超過高度539H表面539和221之間的間隙厚度537。間隙厚度537在例如5微米和25微米之間。距離535H可以對應於絕緣基板210的頂表面219和半導體基板220的底表面221之間的再分佈層535的厚度。
CSP 500可以包括再分佈層525，再分佈層525將影像感測器226電連接到多個導電通孔214中的每一個。再分佈層525包括多個導電段，每個導電段電連接到相應的導電焊盤228並且從基板頂表面229朝絕緣基板210的頂表面219延伸。當CSP 500包括絕緣基板210時，再分佈層525的每個導電段可以將相應的導電焊盤228電連接到相應的導電焊盤216。再分佈層535的至少一部分可以在絕緣基板210和再分佈層525之間。
CSP 500可以包括再分佈層525和半導體基板220之間的隔離層524。CSP 500可以包括再分佈層535和積體電路530之間的隔離層534。隔離層524和534類似於隔離層424。隔離層534的至少一部分可以在積體電路530的側表面533上。
圖6是在平行於x-y平面-即，由方向298X和298Y張成的平面-的平面中的元件晶圓600的俯視圖。元件晶圓600具有直徑614，該直徑可以在一百毫米到五百毫米之間，例如，三百毫米或四百五十毫米。元件晶圓600包括多個晶圓接合(wafer-bound)影像感測器626，並且可以被單體化，使得每個晶圓接合影像感測器626成為相應的影像感測器226。為了清楚說明，圖6將元件晶圓600描繪為包括少於五十個影像感測器226。元件晶圓600可以包括比圖6中描繪的更多或更少的影像感測器226。
元件晶圓600包括多個元件間區域625。每個元件間區域625位於至少一對相鄰的晶圓接合影像感測器626之間。例如，元件晶圓600包括第一列611的影像感測器626、第二列612的影像感測器626，以及它們之間的元件間區域625。
圖7是晶圓組件700的剖視圖，晶圓組件700包括在絕緣基板710上的元件晶圓600。圖7的剖視圖在例如圖6的剖面平面7中。元件晶圓600包括頂表面629；半導體基板220的頂表面229對應於頂表面629的區域。可以將基板710單體化以產生多個絕緣基板210。因此，基板710包括多個導電焊盤216。絕緣基板710包括頂表面719；絕緣基板210的頂表面219對應於頂表面719的區域。
元件晶圓600包括導電焊盤228，每個導電焊盤228電連接到晶圓接合影像感測器626。每個導電焊盤228可以暴露在頂表面629上，頂表面629可以包括導電焊盤228的表面。絕緣基板710包括多個導電焊盤216。導電焊盤216可以暴露在頂表面719上。
頂表面719包括在相鄰導電焊盤216之間的焊盤間區域716。焊盤間區域716可以對應於頂部表面719的直接位於元件間區域625下方的區域。焊盤間區域716可以包括頂表面719的部分但不是全部，並且不包括例如一個或多個導電焊盤216的任何表面。
圖8是晶圓組件800的剖視圖。晶圓組件800可以通過去除對應於元件間區域625的元件晶圓600的材料而暴露焊盤間區域716來產生。這種材料去除可以用於單體化元件晶圓600以產生多個半導體基板220。晶圓元件800包括溝槽820，溝槽820部分地由相鄰半導體基板220的相對側表面225和對應於焊盤間區域716的頂表面719界定。溝槽820具有由相對側表面225確定的寬度821，其可以在方向298Z上變化。
圖9是晶圓組件900的剖視圖，晶圓組件900是晶圓組件800的修改，其中每個半導體基板220在其上包括相應的再分佈層425。在晶圓元件900中，每個半導體基板220還可以包括相應的隔離層，使得隔離層424位於側表面225和再分佈層425之間。如在圖4的CSP 400中那樣，隔離層424的一部分可以在頂表面229和再分佈層425之間。
圖10是晶圓組件1000的剖視圖，晶圓組件1000是晶圓組件900另外加上對於每個半導體基板220的至少部分地圍繞每個像素陣列227的壩240。為了清楚起見，圖10中所示的晶圓組件1000的兩個像素陣列227由附圖標記227(1)和227(2)表示，並且圍繞像素陣列227(1,2)的壩240由相應的附圖標記240(1,2)表示。晶圓元件1000包括至少部分地由壩240(1)、壩240(2)和焊盤間區域716界定的壩間區域1045。
圖11是晶圓組件1100的剖視圖，晶圓組件1100是在壩間區域1045中具有粘合層1150的晶圓組件1000。用於粘合層1150的候選材料與用於粘合層250的材料相同。粘合層1150具有頂表面1159，其至少一部分可以在壩240的頂表面249上方延伸。
圖12是圖示用於製造影像感測器晶片級封裝的方法1200的流程圖。方法1200包括步驟1240，並且可以包括步驟1210、1220和1230中的至少一個。
步驟1230包括用粘合劑將防護玻璃粘結到半導體基板。粘合劑佔據圍繞嵌入在半導體基板的基板頂表面中的第一像素陣列的壩間區域。壩間區域至少部分地由以下限定：(i)至少部分地圍繞第一像素陣列的壩，(ii)至少部分地圍繞與第一像素陣列相鄰的相應像素陣列的相鄰壩，以及(iii)基板頂表面的壩間表面。在步驟1230的示例中，防護玻璃晶圓經由粘合層1150粘結到晶圓組件1100。
當半導體基板附著到其下的絕緣基板時以及當壩間區域包括電 連接到第一像素陣列的導電元件時，方法1200可以包括步驟1210。步驟1210包括暴露位於壩間表面下方的絕緣基板的基板區域。在步驟1210的示例中，暴露絕緣基板710的焊盤間區域716以產生晶圓元件800。
步驟1210可以包括步驟1212、1214和1216中的至少一個。步驟1212包括形成穿過壩間區域的溝槽，半導體基板的兩個相對側壁限定溝槽的寬度。在步驟1212的示例中，晶圓組件700(圖7)的溝槽820穿過壩間區域716形成，以產生晶圓元件800(圖8)。
步驟1214包括用隔離層塗覆兩個相對側壁中的每一個。在步驟1214的示例中，晶圓元件800的側表面225(圖8)塗覆有隔離層424，以產生晶圓元件900(圖9)。步驟1216包括在隔離層上設置導電組件。在示例步驟1216中，再分佈層425設置在晶圓組件900的隔離層424上(圖9)。
當壩和相鄰壩各自具有高於基板頂表面的壩高度時，方法1200可以包括步驟1220。步驟1220包括用粘合劑填充壩間區域，使得基板頂表面上方的粘合劑的最大高度超過壩高度。在步驟1220中，可以經由光刻、衝壓、納米壓印工藝或其任何組合來施加粘合劑。在步驟1220的示例中，焊盤間區域716填充有粘合層1150(圖11)。步驟1220可以包括步驟1222，該步驟包括用粘合劑覆蓋基板區域和導電元件。在步驟1222的示例中，焊盤間區域716和再分佈層425被粘合層1150覆蓋(圖11)。
圖13是在平行於x-y平面的平面中的防護玻璃組件1300的剖視圖。防護玻璃組件1300包括防護玻璃晶圓1360和附著到其的多個間隔組件1380。防護玻璃晶圓1360是上述方法1200，步驟1230的防護玻璃晶圓的示例。防護玻璃晶圓1360具有直徑1314，該直徑可以等於圖6的元件晶圓600的直徑614。防護玻璃元件1300可以與元件晶圓600對準，使得每個間隔元件1380與元件晶圓600的相應元件間區域625對準。防護玻璃晶圓1360具有底表面1361。圖13圖示了切割平面1302，每個切割平面1302可以與底表面1361正交。切割平面1302可以與間隔元件1380相交。
間隔元件1380可以是形成網格圖案的單片間隔元件的部件。間隔元件1380可以包括選自包括以下材料的組的至少一種材料，這些材料包括但不限於鎢、鉬、光致抗蝕劑材料及其任何組合。
圖14是封裝元件晶圓1400的示意性剖視圖。圖14的剖視圖在例如圖13的剖平面14中。封裝元件晶圓1400包括經由粘合層1450附著到晶圓元件900的防護玻璃元件1300。用於粘合層1450的候選材料與用於圖2的粘合層250的候選材料相同。半導體基板220、間隔元件1380、防護玻璃晶圓1360和粘合劑1450可以形成影像感測器226上方的腔體1463。腔體可以由半導體基板220的頂表面229、粘合層1450的側表面1455、間隔元件1380的側表面1355和防護玻璃晶圓1360的底表面1361界定。腔體可以具有對應於底表面1361和頂表面229之間的最小距離1362的最小高度。最小距離1362可以等於圖4的最小距離462。
圖15是CSP 1500的示意性剖視圖，CSP 1500可以從沿著圖13的切割平面1302單體化封裝元件晶圓1400產生。CSP 1500包括絕緣基板210、半導體基板220、粘合層1550、間隔層1580和防護玻璃1560。粘合層1550、間隔層1580和防護玻璃1560分別對應于封裝元件晶圓1400的粘合層1450、間隔元件1380和防護玻璃晶圓1360。
圖16是圖示用於製造影像感測器晶片級封裝的方法1600的流程圖。方法1600包括步驟1610、1620和1630中的至少一個。
步驟1630包括用粘合劑將防護玻璃粘結到元件晶圓。防護玻璃包括附著到其的多個間隔組件。元件晶圓包括多個影像感測器和多個元件間區域。相應體積的粘合劑將多個間隔元件中的每個間隔元件粘結到多個元件間區域中的相應一個元件間區域。每個元件間區域包括多個導電元件中電連接到元件晶圓的多個影像感測器中的一個影像感測器的相應一個導電元件。元件間區域中的每一個可以在一對相鄰的影像感測器之間。在步驟1620的示例中，防護 玻璃晶圓1360被粘結到元件晶圓600以產生封裝元件晶圓1400。
步驟1610可以在步驟1630之前執行，並且包括在防護玻璃上形成多個間隔組件。在步驟1610的示例中，間隔組件1380形成在防護玻璃晶圓1360上或附著到防護玻璃晶圓1360。
當元件晶圓被安裝在包括位於多個元件間區域中的相應一個內的多個基板區域的絕緣基板上時，可以應用步驟1620。步驟1620包括用粘合劑覆蓋多個導電元件中的每個導電元件和多個基板區域中的每個基板區域。在步驟1620的示例中，晶圓組件900的再分佈層425和基板區域716用粘合層1450覆蓋。
特徵的組合
在不脫離本發明的範圍的情況下，可以以各種方式組合上述特徵以及下面要求保護的特徵。以下列舉的示例說明了一些可能的非限制性組合：
(A1)一種影像感測器晶片級封裝(CSP)包括像素陣列、覆蓋像素陣列的防護玻璃、壩和粘合層。像素陣列嵌入在半導體基板的基板頂表面中。半導體基板包括在圍繞像素陣列的半導體基板的週邊區域中的多個導電焊盤。壩至少部分地圍繞像素陣列並且位於(i)防護玻璃和半導體基板之間，以及(ii)像素陣列和多個導電焊盤之間的基板頂表面的區域上。粘合層(i)位於防護玻璃和半導體基板之間，(ii)至少部分地圍繞壩，以及(iii)被配置為將防護玻璃粘合到半導體基板。
(A2)CSP(A1)可以具有封裝頂表面，封裝頂表面(i)位於像素陣列、壩和粘合層中的每一個上方，(ii)包括防護玻璃的防護玻璃頂表面的至少一部分，以及(iii)相對於防護玻璃的與防護玻璃頂表面相對的底表面具有在3微米內的均勻的高度。
(A3)在CSP(A2)中，封裝頂表面可以是影像感測器晶片級 封裝的最頂部表面。
(A4)任何CSP(A2)和(A3)還可以包括在防護玻璃頂表面上並且在壩和粘合層中的至少一個上方的不透明罩幕，封裝頂表面包括不透明罩幕的頂表面的一部分。
(A5)在任何CSP(A4)中，不透明罩幕和粘合層可以由不同的材料形成。
(A6)在任何CSP(A1)-(A5)中，粘合層可以跨越基板頂表面和防護玻璃的底表面之間。
(A7)任何CSP(A1)-(A6)還可以包括再分佈層，所述再分佈層包括多個導電段，每個導電段電連接到多個導電焊盤中的相應一個並且從基板頂表面朝半導體基板的與基板頂表面相對的基板底表面延伸。
(A8)任何CSP(A7)還可以包括基板側表面和再分佈層之間的隔離層，基板側表面位於基板頂表面和與其相對的基板底表面之間。
(A9)任何CSP(A1)-(A8)還可以包括在半導體基板的與基板頂表面相對的基板底表面上的隔離層。隔離層包括穿過其中的多個導電通孔，每個導電通孔電連接到像素陣列。
(A10)在任何CSP(A1)-(A9)中，粘合層可以包括巰基酯、丙烯酸、環氧、聚醯亞胺和聚二甲基矽氧烷中的至少一種。
(A11)在任何CSP(A1)-(A10)中，壩可以包括環氧丙烯酸酯、低聚物、聚丙烯酸甲酯、矽石、聚二甲基矽氧烷、環氧樹脂和二氧化矽中的至少一種。
(B1)一種影像感測器晶片級封裝(CSP)包括絕緣基板、影像感測器、積體電路和第一再分佈層。絕緣基板包括穿過其中的第一多個導電通孔。積體電路位於絕緣基板和影像感測器之間，並且在絕緣基板的頂表面上方的第一高度處具有頂表面。第一再分佈層(i)將積體電路電連接到第一多個導電通孔中的每個導電通孔，以及(ii)跨越影像感測器和絕緣基板的頂表面之間的距離；該距離超過第一高度。
(B2)任何CSP(B1)還可以包括第二再分佈層，該第二再分佈層將影像感測器電連接到穿過絕緣基板的第二多個導電通孔中的每個導電通孔。
(C1)一種用於製造影像感測器晶片級封裝的方法包括用粘合劑將防護玻璃粘結到半導體基板。粘合劑佔據圍繞嵌入在半導體基板的基板頂表面中的第一像素陣列的壩間區域。壩間區域至少部分地由以下界定：(i)至少部分地圍繞第一像素陣列的壩，(ii)至少部分地圍繞與第一像素陣列相鄰的相應像素陣列的相鄰壩，以及(iii)基板頂表面的壩間表面。
(C2)任何方法(C1)，其中壩和相鄰壩各自具有在基板頂表面上方的壩高度，可以包括用粘合劑填充壩間區域，使得基板頂表面上方的粘合劑的最大高度超過壩高度。
(C3)任何方法(C2)，其中半導體基板附著到其下方的絕緣基板，壩間區域包括電連接到第一像素陣列的導電元件，還可以包括(i)暴露位於壩間表面下方的絕緣基板的基板區域；並且，在填充的步驟中，(ii)用粘合劑覆蓋基板區域和導電元件。
(C4)在任何方法(C2)中，暴露基板區域的步驟可以包括：(i)形成穿過壩間區域的溝槽，半導體基板的兩個相對側壁限定溝槽的寬度；(ii)用隔離層塗覆兩個相對側壁中的每個側壁；以及(iii)將導電組件設置在隔離層上。
(D1)一種用於製造影像感測器晶片級封裝的方法包括用粘合劑將防護玻璃粘結到元件晶圓。防護玻璃包括附著到其的多個間隔組件。元件晶圓包括多個影像感測器和多個元件間區域。相應體積的粘合劑將多個間隔元件中的每個間隔元件粘結到多個元件間區域中的相應一個元件間區域。每個元件間區域包括多個導電元件中電連接到元件晶圓的多個影像感測器中的一個影像感測器的相應一個導電元件。多個元件間區域中的每個元件間區域可以位於多個影像感測器中的一對相鄰影像感測器之間。
(D2)任何方法(D1)還可以包括：在粘結的步驟之前，在防護玻璃上形成多個間隔組件。
(D3)任何方法(D1)和(D2)，其中元件晶圓安裝在包括位於多個元件間區域中的相應一個元件間區域內的多個基板區域的絕緣基板上，還可以包括：在粘結的步驟之前，用粘合劑覆蓋多個導電元件中的每個導電元件和多個基板區域中的每個基板區域。
在不脫離本發明的範圍的情況下，可以在上述方法和系統中進行改變。因此應當注意的是，包含在上面的描述中或者在附圖中示出的內容應該被解釋為說明性的而不是限制意義的。在本文中，除非另有說明，否則形容詞“示例性”意味著用作示例、實例或圖示。以下權利要求旨在涵蓋本文描述的所有一般和具體特徵，以及在語言方面可以被說成介於其間的本方法和系統的範圍的所有陳述。
400‧‧‧影像感測器晶片級封裝
298X和298Z‧‧‧正交方向
220‧‧‧半導體基板
240‧‧‧壩
450‧‧‧粘合層
460‧‧‧防護玻璃
226‧‧‧影像感測器
463‧‧‧腔體
229‧‧‧頂表面
245‧‧‧內側表面
461‧‧‧底表面
229‧‧‧頂表面
462‧‧‧最小距離
409‧‧‧封裝頂表面
227‧‧‧像素陣列
469‧‧‧頂表面
408‧‧‧高度
470‧‧‧不透明罩幕
474‧‧‧區域
475‧‧‧區域
479‧‧‧頂表面
425‧‧‧再分佈層
228‧‧‧導電焊盤
221‧‧‧底表面
216‧‧‧導電焊盤
424‧‧‧隔離層

Claims (13)

  1. 一種影像感測器晶片級封裝，包括：絕緣基板，包括第一複數個導電焊盤；半導體基板，位於該絕緣基板之上，該半導體基板包含(i)像素陣列，嵌入在半導體基板的基板頂表面中，與(ii)圍繞該像素陣列的該半導體基板的週邊區域中的第二複數個導電焊盤；防護玻璃，覆蓋該像素陣列，該防護玻璃具有(i)防護玻璃底表面，包括直接位於該第一複數個導電焊盤上方的表面區域，(ii)與該防護玻璃底表面相對的防護玻璃頂表面，以及(iii)橫跨在該防護玻璃底表面和該防護玻璃頂表面之間的傾斜側面；壩，至少部分地圍繞該像素陣列並且位於(i)該防護玻璃和該半導體基板之間，以及(ii)該像素陣列和該第二複數個導電焊盤之間的該基板頂表面的區域上；粘合層，(i)位於該防護玻璃和該半導體基板之間，(ii)至少部分地圍繞該壩，(iii)被配置為將該防護玻璃粘合到該半導體基板，以及(iv)橫跨在該第一複數個導電焊盤和該表面區域之間；以及不透明罩幕，(i)位於該壩上方的該防護玻璃頂表面之第一區域上，(ii)位於該傾斜側面之上，以及(iii)位於該粘合層上方中的該防護玻璃頂表面之第二區域上。
  2. 如請求項1所述的影像感測器晶片級封裝，具有封裝頂表面，該封裝頂表面(i)位於該像素陣列、該壩和該粘合層中的每一個上方，(ii)包括該防護玻璃的該防護玻璃頂表面的至少一部分，並且(iii)相對於該防護玻璃底表面具有在3微米內的均勻的高度。
  3. 如請求項2所述的影像感測器晶片級封裝，其中該封裝頂表面是該影像感測 器晶片級封裝的最頂部表面。
  4. 如請求項1所述的影像感測器晶片級封裝，其中該不透明罩幕和該粘合層由不同的材料形成。
  5. 如請求項1所述用的影像感測器晶片級封裝，其中該粘合層跨越該基板頂表面和該防護玻璃底表面之間。
  6. 如請求項1所述的影像感測器晶片級封裝，還包括：再分佈層，包括複數個導電段，每個導電段電連接到該第二複數個導電焊盤中的相應一個導電焊盤，並且從該基板頂表面朝該半導體基板的與該基板頂表面相對的基板底表面延伸。
  7. 如請求項6所述的影像感測器晶片級封裝，還包括基板側表面和該再分佈層之間的隔離層，其中該基板側表面位於該基板頂表面和與其相對的基板底表面之間。
  8. 如請求項1所述的影像感測器晶片級封裝，其中該粘合層包括巰基酯、丙烯酸、環氧、聚醯亞胺和聚二甲基矽氧烷中的至少一種。
  9. 如請求項1所述的影像感測器晶片級封裝，其中該壩包括環氧丙烯酸酯、低聚物、聚丙烯酸甲酯、矽石、聚二甲基矽氧烷、環氧樹脂和二氧化矽中的至少一種。
  10. 如請求項1所述的影像感測器晶片級封裝，其中該絕緣基板包括穿過其中的複數個導電通孔，每個導電通孔電性連接該像素陣列。
  11. 一種用於製作影像感測器晶片級封裝的方法，包括：用粘合劑將防護玻璃粘結到半導體基板，該粘合劑佔據圍繞嵌入在該半導體基板的基板頂表面中的第一像素陣列的壩間區域，該壩間區域至少部分地通過以下界定：(i)至少部分地圍繞該第一像素陣列的壩，(ii)至少部分地圍繞與該第一像素陣列相鄰的相應像素陣列的相鄰壩，以及(iii)該基板頂表 面的壩間表面；用該粘合劑填充該壩間區域，使得該基板頂表面上方的粘合劑的最大高度超過該壩和該相鄰壩之壩高度；其中該壩間區域包括與該第一像素陣列電連接的導電元件；暴露位於該壩間表面下方的該絕緣基板的基板區域；並且在填充的步驟中，用該粘合劑覆蓋該基板區域和該導電元件。
  12. 如請求項11所述的用於製作影像感測器晶片級封裝的方法，暴露上述基板區域的步驟包括：形成穿過該壩間區域的溝槽，該半導體基板的兩個相對側壁限定該溝槽的寬度；用隔離層塗覆該兩個相對側壁中的每個側壁；以及將該導電元件設置在該隔離層上。
  13. 一種影像感測器晶片級封裝，包括：絕緣基板，包括第一複數個導電焊盤；半導體基板，位於該絕緣基板之上，該半導體基板包含(i)像素陣列，嵌入在半導體基板的基板頂表面中，與(ii)圍繞該像素陣列的該半導體基板的週邊區域中的第二複數個導電焊盤；防護玻璃，覆蓋該像素陣列，該防護玻璃具有底表面包括直接位於該第一複數個導電焊盤上方的表面區域；壩，至少部分地圍繞該像素陣列並且位於(i)該防護玻璃和該半導體基板之間，以及(ii)該像素陣列和該第二複數個導電焊盤之間的該基板頂表面的區域上；粘合層，(i)位於該防護玻璃和該半導體基板之間，(ii)至少部分地圍繞該壩，(iii)被配置為將該防護玻璃粘合到該半導體基板，以及(iv)橫跨在該第 一複數個導電焊盤和該表面區域之間；以及不透明罩幕，(i)位於該壩上方的該防護玻璃頂表面之第一區域上，以及(ii)位於該粘合層上方中的該防護玻璃頂表面之第二區域上。
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