TWI750998B - Method for combining the retaining wall structure of an ic carrier board and the optical structure of a light emitting diode - Google Patents

Abstract

A method for combining the retaining wall structure of an IC carrier board and the optical structure of a light emitting diode are used to solve the problem that the conventional retaining wall structure is prone to adhesive overflow. The method includes providing a substrate, applying a photosensitive layer to the substrate by hot pressing in a vacuum environment, applying a retaining wall structure to the photosensitive layer by hot pressing in a vacuum environment, projecting the retaining wall structure onto the photosensitive layer outside the substrate by etching; and baking the photosensitive layer at a curing temperature to be shaped.

Description

Combining method of retaining wall structure of IC carrier board and light emitting diode optical structure

The present invention relates to a combination method and structure of an IC carrier, in particular to a packaging structure, a combination method and a light-emitting diode optical structure of a retaining wall structure of an IC carrier that can be used as a reflector cup or an IC protection structure.

Light Emitting Diode (LED) is a semiconductor device that can convert current into light in a specific wavelength range. It has been widely used in the current in various fields. The conventional light-emitting diode structure has a substrate and an electrode located on the substrate. A light-emitting diode chip can be disposed on the substrate and electrically connected to the electrode. A blocking wall structure can surround the light-emitting diode. The bulk chip is disposed on the substrate, and a package body can be covered above the light-emitting diode chip.

The retaining wall structure of the conventional light-emitting diode structure is bonded to the substrate by means of dispensing or screen printing, and an adhesive is applied to the substrate, and then the retaining wall structure is adhered to the substrate. Wherein, if the adhesive is applied too little, the bonding stability of the retaining wall structure and the substrate is likely to be poor; and if the adhesive is applied too much, the retaining wall structure will be squeezed during the process of bonding the retaining wall structure to the substrate. Adhesive, so that the adhesive will overflow from the inner ring surface and the outer ring surface of the retaining wall structure, and the adhesive overflowing from the inner ring surface of the retaining wall structure will affect the subsequent application if it contacts the electrode. Therefore, usually The space between the electrode and the retaining wall structure will be reserved before the operation, so that the space utilization rate is not ideal, and it also affects the It affects the overall work efficiency, resulting in poor manufacturing convenience.

In view of this, it is still necessary to improve the conventional combination method of the retaining wall structure.

In order to solve the above problems, the purpose of the present invention is to provide a method for combining the retaining wall structure of an IC carrier board, which can avoid the overflow of adhesives, and can be produced in a large area, and can improve the overall operation efficiency and process convenience. By.

Another object of the present invention is to provide a method for combining the retaining wall structure of the IC carrier board, which can reduce the manufacturing cost.

Another object of the present invention is to provide a method for combining the retaining wall structure of an IC carrier board, which can improve product quality.

Another object of the present invention is to provide a light-emitting diode optical structure, which can improve space utilization.

The directionality or similar terms used throughout the present disclosure, such as "front", "back", "left", "right", "top (top)", "bottom (bottom)", "inside", "outside" , "side surface", etc., mainly refer to the directions of the attached drawings, each directionality or its similar terms are only used to assist the description and understanding of the various embodiments of the present invention, and are not intended to limit the present invention.

The use of the quantifier "a" or "an" for the elements and components described throughout the present invention is only for convenience and provides a general meaning of the scope of the present invention; in the present invention, it should be construed as including one or at least one, and a single The concept of also includes the plural case unless it is obvious that it means otherwise.

Similar terms such as "combined", "combined" or "assembled" mentioned in the full text of the present invention mainly include the components that can be separated without destroying the components after being connected, or the components that cannot be separated after being connected. Those with ordinary knowledge in the art can choose according to the material of the components to be connected or the assembly requirements.

The method for combining a retaining wall structure of an IC carrier of the present invention includes the following steps: providing a substrate; applying a photosensitive layer on the substrate by thermal pressure in a vacuum environment; forming a retaining wall structure in a vacuum environment bonding on the photosensitive layer by thermocompression; etching and removing the photosensitive layer projecting the retaining wall structure to the part outside the substrate; and baking the photosensitive layer at a curing temperature to form a shape.

The light-emitting diode optical structure of the present invention is manufactured by the aforementioned method of combining the retaining wall structure of the IC carrier board, wherein a chip is electrically connected to an electrode layer of the substrate, and the retaining wall structure is disposed around the chip .

Accordingly, in the method for bonding the barrier wall structure of the IC carrier board and the light-emitting diode optical structure of the present invention, the photosensitive layer is thermally pressed onto the substrate, and the barrier wall structure is thermally bonded to the photosensitive layer. layer, and then use the etching method to project the retaining wall structure to the photosensitive layer outside the substrate to remove the photosensitive layer, which can avoid the situation that it is difficult to control the amount of the adhesive and the glue overflow occurs. The method can be produced in a large area, and has the effect of improving the overall operation efficiency and the convenience of the process.

Wherein, the curing temperature may be 120-180°C. In this way, the photosensitive layer can be cured and shaped to strengthen the connection structure, which has the effect of improving product quality.

Wherein, the photosensitive layer can be in the form of a film, and the photosensitive layer is attached to the substrate. In this way, the structure is simple and easy to manufacture, and has the effect of reducing the manufacturing cost.

Wherein, the photosensitive layer can be formed by coating or spraying photosensitive glue on the substrate, and pre-baking at 80-120° C. to shape. In this way, the process is convenient for matching materials and structures, and has the effect of improving the convenience of manufacturing.

Wherein, the substrate may have a substrate layer and an electrode layer connected, the photosensitive layer covers the electrode layer when applied on the substrate, and after etching and removing part of the photosensitive layer, the photosensitive layer The electrode layer may or may not be partially covered. In this way, after removing part of the photosensitive layer, the electrode layer can be used to electrically connect the chip, which has the effect of improving the convenience of use.

Wherein, the retaining wall structure can be combined with another photosensitive layer, and the other photosensitive layer on the retaining wall structure can be combined with the photosensitive layer on the substrate. In this way, the retaining wall structure can be more stably combined with the base plate, which has the effect of improving the combination stability.

Wherein, the retaining wall structure may have an outer annular surface and an inner annular surface, and the photosensitive layer may be flush with the outer annular surface and the inner annular surface. In this way, it can be ensured that the part of the photosensitive layer that is not combined with the retaining wall structure can be precisely etched and removed, which has the effect of improving product quality.

Wherein, there may be a radial distance or an axial relative position between the electrode layer and the retaining wall structure less than or equal to 0.15 mm. In this way, an electrode layer with a larger area can be disposed on the base material layer, so that the electrode layer can have a sufficient area for the electrical connection of a larger chip, which has the effect of improving the space utilization rate.

〔this invention〕

1: Substrate

11: Substrate layer

12: Electrode layer

2: photosensitive layer

3: Retaining wall structure

3a: first gear

3b: Second gear

31: outer ring surface

32: inner ring surface

4: Wafer

D: Radial spacing

[FIG. 1] A cross-sectional view of a substrate according to a preferred embodiment of the present invention.

[FIG. 2] A cross-sectional view of a photosensitive layer applied to a substrate according to a preferred embodiment of the present invention.

[FIG. 3] A cross-sectional view of the retaining wall structure combined with the photosensitive layer according to a preferred embodiment of the present invention.

[FIG. 4] A cross-sectional view of the optical structure of a light-emitting diode according to a preferred embodiment of the present invention.

[FIG. 5] A cross-sectional view of the axial relative position between the retaining wall structure and the electrode layer according to a preferred embodiment of the present invention.

[FIG. 6] A cross-sectional view of another aspect of the optical structure of a light-emitting diode according to a preferred embodiment of the present invention.

In order to make the above and other objects, features and advantages of the present invention more apparent and comprehensible, the following The preferred embodiment of the present invention is given and described in detail with the accompanying drawings as follows: Please refer to FIG. 1, which is a preferred implementation of the method for combining the retaining wall structure of the IC carrier board of the present invention. For example, it includes the following steps: providing a substrate 1, the substrate 1 may have a base material layer 11 and an electrode layer 12, the electrode layer 12 is attached to the base material layer 11, and the base material layer 11 may be made of ceramic, It is made of insulating materials such as silicon oxide. The electrode layer 12 can be made of metal materials such as copper and aluminum. The electrode layer 12 can be designed according to the wiring requirements of the actual circuit, and the electrode layer 12 is formed after processing. Electronic circuits can be electrically connected to various electronic components or circuit modules.

Please refer to FIG. 2 , in a vacuum environment, a photosensitive layer 2 is applied on the substrate 1 by hot pressing, and when the photosensitive layer 2 is applied on the substrate 1 by hot pressing, the photosensitive layer 2 can be partially Or completely cover the electrode layer 12 , which is not limited in the present invention; in this embodiment, the photosensitive layer 2 is described as completely covering the electrode layer 12 .

In detail, the shape of the photosensitive layer 2 is based on the principle that the photosensitive layer 2 can be bonded to the substrate 1 by thermocompression, and the present invention is not limited. For example, the photosensitive layer 2 can be in the shape of a film, and The entire film of the photosensitive layer 2 is attached to the substrate 1, the thickness of the photosensitive layer 2 can be 150um~200um, and the thickness of the photosensitive layer 2 is preferably enough to cover the electrode layer 12 and the base material layer 11. The height difference can avoid gaps or voids caused by the height difference, which can strengthen the structure and improve the quality of the product; It is formed by pre-baking at ~120°C, which is not limited in the present invention.

Referring to FIG. 3, then, also in a vacuum environment, a retaining wall structure 3 is thermally bonded on the photosensitive layer 2 of the substrate 1. The retaining wall structure 3 can be disposed around the electrode layer 12, and The retaining wall structure 3 and the photosensitive layer 2 are not axially opposed; wherein, the retaining wall structure 3 can be made of materials such as metal, plastic or glass.

Please refer to FIG. 4 , project the retaining wall structure 3 beyond the base material layer 11 Part of the photosensitive layer 2 is removed by etching, so that the photosensitive layer 2 is only located between the base material layer 11 and the retaining wall structure 3, and after etching and removing part of the photosensitive layer 2, the electrode layer 12 is not covered by the photosensitive layer 2. The photosensitive layer 2 is covered, so that the electrode layer 12 can be completely exposed, so that the electrode layer 12 can be used to electrically connect a chip 4. The chip 4 can be, for example, a light-emitting chip or an IC chip, which is not limited in the present invention. Finally, the photosensitive layer 2 is baked at a curing temperature, so that the photosensitive layer 2 can be cured and shaped; wherein, the curing temperature can preferably be 120-180°C.

Please refer to FIG. 4 , which is a light-emitting diode optical structure made by the above-mentioned combination method of the barrier structure of the IC carrier board. The barrier structure 3 is arranged around the electrode layer 12 , and the photosensitive layer 2 Without covering the electrode layer 12 , the chip 4 can be located on the electrode layer 12 , so that the retaining wall structure 3 can be disposed around the chip 4 , and the chip 4 is electrically connected to the electrode layer 12 . Wherein, the chip 4 is disposed on the electrode layer 12 in the form of flip-chip; alternatively, the chip 4 can also be electrically connected to the electrode layer 12 in the form of wire-bonding, The present invention is not limited.

In addition, the retaining wall structure 3 may have an outer annular surface 31 and an inner annular surface 32, and the photosensitive layer 2 is flush with the outer annular surface 31 and the inner annular surface 32; in this way, the retaining wall can be accurately The photosensitive layer 2 (here, the photosensitive layer 2 that is not combined with the retaining wall structure 3) where the structure 3 is projected onto the parts other than the base material layer 11 is etched and removed, which can improve product quality and facilitate the next step. work and applications.

In addition, as shown in FIG. 4 , there may be a radial distance D between the electrode layer 12 and the inner annular surface 32 of the retaining wall structure 3 , and the radial distance D may preferably be less than or equal to 0.15mm; in this way, the An electrode layer 12 with a larger area can be disposed on the base material layer 11, so that the electrode layer 12 can have a sufficient area for the electrical connection of the larger wafer 4, which can improve the space utilization rate.

Please refer to FIGS. 5 and 6. In other embodiments, the retaining wall structure 3 may partially overlap the electrode layer 12, so that the retaining wall structure 3 and the electrode layer 12 may be axially opposite to each other. After projecting the retaining wall structure 3 to the photosensitive layer 2 outside the base material layer 11, the photosensitive layer 2 is removed by etching, so that part of the electrode layer 12 may not be covered by the photosensitive layer 2 to be exposed; In an example, another photosensitive layer 2 can also be combined with the bottom of the blocking wall structure 3 in advance, and then another photosensitive layer 2 on the blocking wall structure 3 can be combined with the photosensitive layer 2 on the substrate 1, so that the blocking wall structure 3 can be combined with the photosensitive layer 2 on the substrate 1. The wall structure 3 can be more firmly combined with the substrate 1 .

In addition, it should be noted that the shape of the retaining wall structure 3 is not limited in the present invention. For example, the retaining wall structure 3 may have a first blocking portion 3a and a second blocking portion 3b. The first blocking portion 3a and the The second blocking portion 3b can be joined by the above-mentioned bonding method, so that the photosensitive layer 2 can be provided between the first blocking portion 3a and the second blocking portion 3b.

To sum up, in the method for bonding the barrier wall structure of the IC carrier board and the light emitting diode optical structure of the present invention, the photosensitive layer is thermally pressed onto the substrate, and the barrier wall structure is thermally pressed onto the substrate. The photosensitive layer is then removed by projecting the retaining wall structure to parts other than the substrate by etching, so as to avoid the situation of glue overflow due to the conventional difficulty in controlling the amount of the adhesive, and the retaining wall structure of the present invention The combination method can be produced in a large area, and can have the effect of improving the overall operation efficiency and the convenience of the process.

Although the present invention has been disclosed by the above-mentioned preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications relative to the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the patent application attached hereto.

1: Substrate

11: Substrate layer

12: Electrode layer

2: photosensitive layer

3: Retaining wall structure

31: outer ring surface

32: inner ring surface

4: Wafer

D: Radial spacing

Claims (9)

A method for combining a retaining wall structure of an IC carrier board, comprising the following steps: providing a substrate; applying a photosensitive layer on the substrate under vacuum environment by hot pressing; under vacuum environment, hot pressing a retaining wall structure bonding on the photosensitive layer; etching and removing the photosensitive layer projecting the retaining wall structure to the part outside the substrate; and baking the photosensitive layer at a curing temperature to form a shape. The method for bonding a retaining wall structure of an IC carrier board according to claim 1, wherein the curing temperature is 120-180°C. The method for combining the barrier wall structure of the IC carrier board according to claim 1, wherein the photosensitive layer is in the form of a film, and the photosensitive layer is attached to the substrate. The method for combining the retaining wall structure of an IC carrier board according to claim 1, wherein the photosensitive layer is formed by coating or spraying photosensitive adhesive on the substrate, and pre-baking at 80-120°C for shaping. The method for bonding a retaining wall structure of an IC carrier board as claimed in claim 1, wherein the substrate has a base material layer and an electrode layer connected together, the photosensitive layer covers the electrode layer when applied on the substrate, and is removed by etching After part of the photosensitive layer, the photosensitive layer partially covers the electrode layer or does not cover the electrode layer. The method for combining a barrier wall structure of an IC carrier board according to claim 1, wherein the barrier wall structure is combined with another photosensitive layer, and the other photosensitive layer on the barrier wall structure is combined with the photosensitive layer on the substrate. A light-emitting diode optical structure, made by the method for combining the barrier structure of an IC carrier board according to any one of claims 1 to 6, wherein a chip is electrically connected to an electrode layer of the substrate, and the barrier wall Structures are disposed around the wafer. The light-emitting diode optical structure of claim 7, wherein the retaining wall structure has An outer annular surface and an inner annular surface, the photosensitive layer is flush with the outer annular surface and the inner annular surface. The light-emitting diode optical structure of claim 7, wherein a radial distance or an axial relative position between the electrode layer and the retaining wall structure is less than or equal to 0.15 mm.

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