TWI744156B - Heat-dissipating semiconductor package and method for manufacturing the same - Google Patents

Heat-dissipating semiconductor package and method for manufacturing the same Download PDF

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Publication number
TWI744156B
TWI744156B TW109147118A TW109147118A TWI744156B TW I744156 B TWI744156 B TW I744156B TW 109147118 A TW109147118 A TW 109147118A TW 109147118 A TW109147118 A TW 109147118A TW I744156 B TWI744156 B TW I744156B
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Taiwan
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heat dissipation
adhesive layer
substrate
chip
layer
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TW109147118A
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Chinese (zh)
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TW202230642A (en
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李東昇
龐規浩
魏兆璟
郭晉村
李佩螢
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頎邦科技股份有限公司
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Priority to TW109147118A priority Critical patent/TWI744156B/en
Priority to CN202120299508.1U priority patent/CN215008198U/en
Priority to CN202110144595.8A priority patent/CN114520201A/en
Priority to JP2021026656A priority patent/JP7152544B2/en
Priority to KR1020210023228A priority patent/KR102485002B1/en
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Publication of TWI744156B publication Critical patent/TWI744156B/en
Publication of TW202230642A publication Critical patent/TW202230642A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3672—Foil-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates

Abstract

This invention discloses a heat-dissipating semiconductor package and its manufacturing method. A thermal paste is adhered to a substrate, a heat-dissipating layer of the thermal paste contacts a chip mounted on the substrate to dissipate heat from the chip. An attaching portion of the thermal paste is attached on the substrate and surrounds an adhesive layer of the chip to form a space between the attaching portion and the substrate. The space surrounding the adhesive layer is used to accommodate the extruded adhesive layer so as to prevent the adhesive layer from overflowing or protruding from the thermal paste.

Description

半導體散熱封裝構造及其製造方法Semiconductor heat dissipation package structure and manufacturing method thereof

本發明關於一種半導體散熱封裝構造及其製造方法，尤其是一種可避免溢膠而污染封裝構造的半導體散熱封裝構造及其製造方法。 The present invention relates to a semiconductor heat dissipation package structure and a manufacturing method thereof, and in particular to a semiconductor heat dissipation package structure and a manufacturing method thereof that can avoid contamination of the package structure due to glue overflow.

由於電子產品的效能提升，因此會造成晶片運算時產生高熱，當晶片溫度過熱時，將造成晶片損壞，使得電子產品無法使用。 Due to the improved performance of electronic products, high heat will be generated during the operation of the chip. When the temperature of the chip is overheated, the chip will be damaged, making the electronic product unusable.

請參閱台灣申請第109209860號專利揭露一種「薄膜覆晶封裝結構」，其揭露以一第一散熱件13的一黏著層貼附於晶片12及薄膜基板11上，以對該晶片12進行散熱，請參閱第1C圖，該黏著層的邊緣與基材、導熱層、金屬層的邊緣平齊，因此，當該薄膜覆晶封裝結構被擠壓時，該黏著層將會因外力施壓，而溢流或變形而凸出該基材、該導熱層、該金屬層的該邊緣，進而污染該薄膜覆晶封裝結構。 Please refer to Taiwan Patent Application No. 109209860 which discloses a "thin film on chip package structure", which discloses that an adhesive layer of a first heat sink 13 is attached to the chip 12 and the film substrate 11 to dissipate the chip 12. Please refer to Figure 1C. The edge of the adhesive layer is flush with the edges of the substrate, the thermal conductive layer, and the metal layer. Therefore, when the film-on-chip package structure is squeezed, the adhesive layer will be pressed by external force. Overflow or deformation protrudes the edge of the substrate, the thermally conductive layer, and the metal layer, thereby contaminating the film-on-chip packaging structure.

此外，當捲收複數個薄膜覆晶封裝結構時，溢流或變形而凸出該基材、該導熱層、該金屬層的該邊緣的該黏著層，會造成薄膜覆晶封裝結構互相黏著，其影響了該薄膜覆晶封裝結構的品質及良率。 In addition, when several chip-on-film packaging structures are rolled up, overflow or deform to protrude the adhesive layer on the edge of the substrate, the thermally conductive layer, and the metal layer, which will cause the chip-on-film packaging structures to adhere to each other. This affects the quality and yield of the film-on-chip package structure.

本發明的主要目的是避免設置於一基板與一散熱片之間的一黏著層溢流或凸出該散熱片，而污染一半導體散熱封裝構造，且可避免捲收複數個半導體散熱封裝構造時，溢流或凸出該散熱片的各該黏著層，造成各該半導體散熱封裝構造互相黏著。 The main purpose of the present invention is to prevent an adhesive layer disposed between a substrate and a heat sink from overflowing or protruding from the heat sink, thereby contaminating a semiconductor heat dissipation package structure, and avoiding multiple semiconductor heat dissipation package structures from being rolled up , Overflowing or protruding from the adhesive layers of the heat sink, causing the semiconductor heat dissipation package structures to adhere to each other.

本發明之一種半導體散熱封裝構造包含一基板、一晶片、一黏著層及一散熱片，該基板具有一電路層，該晶片與該基板的該電路層電性連接，且該晶片顯露出一顯露表面，該黏著層設置於該基板，且該黏著層環繞該晶片，該散熱片包含一載體及一散熱層，該散熱層設置於該載體，該散熱片以該散熱層接觸該晶片的該顯露表面，且該散熱片以一貼附部貼附於該黏著層，並使該貼附部與該基板之間形成一容膠空間，該容膠空間並環繞該黏著層。 A semiconductor heat dissipation package structure of the present invention includes a substrate, a chip, an adhesive layer, and a heat sink. The substrate has a circuit layer, the chip is electrically connected to the circuit layer of the substrate, and the chip is exposed On the surface, the adhesive layer is disposed on the substrate, and the adhesive layer surrounds the chip, the heat sink includes a carrier and a heat dissipation layer, the heat dissipation layer is disposed on the carrier, and the heat sink contacts the exposed portion of the chip with the heat dissipation layer On the surface, the heat sink is attached to the adhesive layer by an attaching part, and a glue containing space is formed between the sticking part and the substrate, and the glue containing space surrounds the adhesive layer.

本發明之一種半導體散熱封裝構造的製造方法包含提供結合有一晶片的一基板，該晶片與該基板的一電路層電性連接，且該晶片顯露出一顯露表面；將一黏著層設置於該基板，該黏著層環繞該晶片；將包含有一載體及一散熱層的一散熱片設置於該基板，並使該散熱層接觸該晶片的該顯露表面，該散熱片並以一貼附部貼附於該黏著層，以在該貼附部與該基板之間形成一容膠空間，且該容膠空間並環繞該黏著層。 A manufacturing method of a semiconductor heat dissipation package structure of the present invention includes providing a substrate combined with a chip, the chip is electrically connected to a circuit layer of the substrate, and the chip has an exposed surface; and an adhesive layer is disposed on the substrate , The adhesive layer surrounds the chip; a heat sink including a carrier and a heat dissipation layer is arranged on the substrate, and the heat dissipation layer is in contact with the exposed surface of the chip, and the heat sink is attached to the chip with an attachment portion The adhesive layer forms a glue containing space between the attaching part and the substrate, and the glue containing space surrounds the adhesive layer.

本發明藉由位於該貼附部與該基板之間且環繞該黏著層的該容膠空間，使得該黏著層受壓時，能容納被壓力擠出的該黏著層，以避免該黏著層溢流出或凸出於該散熱片，並可避免捲收複數個半導體散熱封裝構造時，造成該些半導體散熱封裝構造互相黏著，而影響該些半導體散熱封裝構造的品質及良率。 The present invention utilizes the glue containing space located between the attaching portion and the substrate and surrounding the adhesive layer, so that when the adhesive layer is pressed, the adhesive layer extruded by pressure can be contained, so as to prevent the adhesive layer from overflowing. It flows out or protrudes from the heat sink, and can prevent the semiconductor heat dissipation package structures from sticking to each other when multiple semiconductor heat dissipation package structures are rolled up, which affects the quality and yield of the semiconductor heat dissipation package structures.

本發明的一種半導體散熱封裝構造100的製造方法，請參閱第1至6圖，首先，請參閱第1及2圖，提供結合有一晶片120的一基板110，該晶片120與該基板110的一電路層111電性連接，在本實施例中，該電路層111設置於該基板110的一表面，一保護層112覆蓋該電路層111，且該保護層112並顯露出該電路層111的複數個內接腳111a，該晶片120以複數個凸塊121結合於該電路層111的該些內接腳111a，且該晶片120顯露出一顯露表面122，較佳地，以一填充膠113填充於該基板110與該晶片120之間，該填充膠113並包覆該些凸塊121。 A method of manufacturing a semiconductor heat dissipation package structure 100 of the present invention, please refer to Figures 1 to 6. First, refer to Figures 1 and 2. A substrate 110 incorporating a chip 120 is provided. The chip 120 and one of the substrate 110 The circuit layer 111 is electrically connected. In this embodiment, the circuit layer 111 is disposed on a surface of the substrate 110, a protective layer 112 covers the circuit layer 111, and the protective layer 112 exposes a plurality of the circuit layers 111 Internal pins 111a, the chip 120 is bonded to the internal pins 111a of the circuit layer 111 with a plurality of bumps 121, and the chip 120 exposes an exposed surface 122, preferably filled with a filler 113 Between the substrate 110 and the chip 120, the filler 113 covers the bumps 121.

接著，請參閱第3及4圖，將一黏著層130設置於該基板110，並使該黏著層130環繞該晶片120，在本實施例中，該黏著層130除了設置於該基板110外，該黏著層130也可同時設置於該填充膠113上。 Next, referring to FIGS. 3 and 4, an adhesive layer 130 is disposed on the substrate 110, and the adhesive layer 130 surrounds the chip 120. In this embodiment, the adhesive layer 130 is disposed on the substrate 110, The adhesive layer 130 can also be disposed on the filler 113 at the same time.

將該黏著層130設置於該基板110的方法可選自於塗佈，但不以此為限，例如可預先形成一環狀黏著層130，再將該環狀黏著層130貼附於該基板110上，並使該環狀黏著層130環繞該晶片120。 The method for disposing the adhesive layer 130 on the substrate 110 can be selected from coating, but is not limited to this. For example, a ring-shaped adhesive layer 130 can be formed in advance, and then the ring-shaped adhesive layer 130 can be attached to the substrate. 110 and make the ring-shaped adhesive layer 130 surround the chip 120.

之後，請參閱第5及6圖，將一散熱片140設置於該基板110，以形成該半導體散熱封裝構造100，該散熱片140包含有一載體141及一散熱層142，該散 熱層142設置於該載體141，該散熱片140以該散熱層142的一接觸面142a接觸該晶片120的該顯露表面122，較佳地，該接觸面142a的一接觸面積不小於該顯露表面122的一表面積，以使該散熱層142能全面性地覆蓋該晶片120的該顯露表面122，以增加散熱/導熱面積及散熱效能。 Afterwards, referring to FIGS. 5 and 6, a heat sink 140 is disposed on the substrate 110 to form the semiconductor heat dissipation package structure 100. The heat sink 140 includes a carrier 141 and a heat dissipation layer 142. The thermal layer 142 is disposed on the carrier 141, and the heat sink 140 contacts the exposed surface 122 of the chip 120 with a contact surface 142a of the heat dissipation layer 142. Preferably, a contact area of the contact surface 142a is not smaller than the exposed surface A surface area of 122, so that the heat dissipation layer 142 can fully cover the exposed surface 122 of the chip 120, so as to increase the heat dissipation/heat conduction area and heat dissipation efficiency.

請參閱第5及6圖，該散熱片140以一貼附部140a貼附環繞該晶片120的該黏著層130，該貼附部140a並環繞該晶片120，以在該貼附部140a與該基板110之間形成一容膠空間S，該容膠空間S並環繞該黏著層130，在本實施例中，該散熱片140以位於該貼附部140a的該散熱層142貼附於該黏著層130，或者，請參閱第7圖，在不同的實施例中，該散熱片140以位於該貼附部140a的該載體141貼附於該黏著層130。 Please refer to Figures 5 and 6, the heat sink 140 is attached to the adhesive layer 130 surrounding the chip 120 with an attaching portion 140a, and the attaching portion 140a surrounds the chip 120 so that the attaching portion 140a and the A glue containing space S is formed between the substrates 110, and the glue containing space S surrounds the adhesive layer 130. In this embodiment, the heat sink 140 is attached to the adhesive layer by the heat dissipation layer 142 located at the attaching portion 140a. The layer 130, or, please refer to FIG. 7, in a different embodiment, the heat sink 140 is attached to the adhesive layer 130 by the carrier 141 located at the attaching portion 140a.

請參閱第5及6圖，在本實施例中，該貼附部140a的一邊緣140b垂直投影至該基板110，並於該基板110形成該容膠空間S的一極限邊緣S1，較佳地，該容膠空間S的該極限邊緣S1與該黏著層130的一外側邊緣131之間具有一間距，該間距不小於20微米。 Referring to FIGS. 5 and 6, in this embodiment, an edge 140b of the attaching portion 140a is vertically projected to the substrate 110, and an extreme edge S1 of the glue-tolerant space S is formed on the substrate 110, preferably There is a distance between the extreme edge S1 of the glue containing space S and an outer edge 131 of the adhesive layer 130, and the distance is not less than 20 microns.

請參閱第5圖，本發明藉由位於該貼附部140a與該基板110之間且環繞該黏著層130的該容膠空間S容納受壓變形或溢流的該黏著層130，以避免該黏著層130溢流出或凸出該散熱片140，而污染該半導體散熱封裝構造100，且可避免捲收複數個半導體散熱封裝構造100時，造成該些半導體散熱封裝構造100互相黏著，而影響該些半導體散熱封裝構造100的品質及良率。 Referring to FIG. 5, the present invention uses the adhesive layer 130 located between the attaching portion 140a and the substrate 110 and surrounding the adhesive layer 130 to accommodate the adhesive layer 130 that is deformed or overflowed under pressure, so as to avoid the The adhesive layer 130 overflows or protrudes from the heat sink 140 to contaminate the semiconductor heat dissipation package structure 100, and can prevent the semiconductor heat dissipation package structures 100 from being adhered to each other when multiple semiconductor heat dissipation package structures 100 are rolled up, thereby affecting the The quality and yield of these semiconductor heat dissipation package structures 100.

本發明之保護範圍當視後附之申請專利範圍所界定者為準，任何熟知此項技藝者，在不脫離本發明之精神和範圍內所作之任何變化與修改，均屬於本發明之保護範圍。 The scope of protection of the present invention shall be determined by the scope of the attached patent application. Anyone who is familiar with the art and makes any changes and modifications without departing from the spirit and scope of the present invention shall fall within the scope of protection of the present invention. .

100:半導體散熱封裝構造 110:基板 111:電路層 111a:內接腳 112:保護層 113:填充膠 120:晶片 121:凸塊 122:顯露表面 130:黏著層 131:外側邊緣 140:散熱片 140a:貼附部 140b:邊緣 141:載體 142:散熱層 142a:接觸面 S:容膠空間 S1:極限邊緣100: Semiconductor heat dissipation package structure 110: substrate 111: circuit layer 111a: inner pin 112: protective layer 113: Filling glue 120: chip 121: bump 122: reveal the surface 130: Adhesive layer 131: Outer edge 140: heat sink 140a: attaching part 140b: Edge 141: Carrier 142: heat dissipation layer 142a: contact surface S: Glue capacity S1: Extreme edge

第1、3及5圖：本發明製造半導體散熱封裝構造的剖視圖。 Figures 1, 3, and 5: cross-sectional views of the semiconductor heat dissipation package structure manufactured by the present invention.

第2、4及6圖：本發明製造半導體散熱封裝構造的上視圖。 Figures 2, 4, and 6: Top views of the semiconductor heat dissipation package structure manufactured by the present invention.

第7圖：本發明另一實施例之半導體散熱封裝構造的剖視圖。 Fig. 7: A cross-sectional view of a semiconductor heat dissipation package structure according to another embodiment of the present invention.

100:半導體散熱封裝構造 100: Semiconductor heat dissipation package structure

110:基板 110: substrate

111:電路層 111: circuit layer

111a:內接腳 111a: inner pin

112:保護層 112: protective layer

113:填充膠 113: Filling glue

120:晶片 120: chip

121:凸塊 121: bump

122:顯露表面 122: reveal the surface

130:黏著層 130: Adhesive layer

131:外側邊緣 131: Outer edge

140:散熱片 140: heat sink

140a:貼附部 140a: attaching part

140b:邊緣 140b: Edge

141:載體 141: Carrier

142:散熱層 142: heat dissipation layer

142a:接觸面 142a: contact surface

S:容膠空間 S: Glue capacity

S1:極限邊緣 S1: Extreme edge

Claims (8)

一種半導體散熱封裝構造，包含：一基板，具有一電路層；一晶片，與該基板的該電路層電性連接，且該晶片顯露出一顯露表面；一黏著層，設置於該基板，且該黏著層環繞該晶片；以及一散熱片，包含一載體及一散熱層，該散熱層設置於該載體，該散熱片以該散熱層接觸該晶片的該顯露表面，且該散熱片以一貼附部貼附於該黏著層，並使該貼附部與該基板之間形成一容膠空間，該容膠空間並環繞該黏著層，該貼附部環繞該晶片，且該貼附部的一邊緣垂直投影至該基板，並於該基板形成該容膠空間的一極限邊緣，該極限邊緣與該黏著層的一外側邊緣之間具有一間距，該間距不小於20微米。 A semiconductor heat dissipation package structure includes: a substrate with a circuit layer; a chip electrically connected to the circuit layer of the substrate, and the chip reveals an exposed surface; an adhesive layer disposed on the substrate, and the The adhesive layer surrounds the chip; and a heat sink, including a carrier and a heat dissipation layer, the heat dissipation layer is disposed on the carrier, the heat sink contacts the exposed surface of the chip with the heat dissipation layer, and the heat sink is attached with a The part is attached to the adhesive layer, and a glue containing space is formed between the sticking part and the substrate, the glue containing space surrounds the adhesive layer, the sticking part surrounds the chip, and a part of the sticking part The edge is vertically projected to the substrate, and a limit edge of the glue-tolerant space is formed on the substrate. There is a distance between the limit edge and an outer edge of the adhesive layer, and the distance is not less than 20 microns. 如請求項1之半導體散熱封裝構造，其中該散熱層以一接觸面接觸該顯露表面，該接觸面的一接觸面積不小於該顯露表面的一表面積。 According to the semiconductor heat dissipation package structure of claim 1, wherein the heat dissipation layer contacts the exposed surface with a contact surface, and a contact area of the contact surface is not less than a surface area of the exposed surface. 如請求項1之半導體散熱封裝構造，其中該散熱片以位於該貼附部的該散熱層貼附於該黏著層。 According to the semiconductor heat dissipation package structure of claim 1, wherein the heat sink is attached to the adhesive layer by the heat dissipation layer located at the attachment portion. 如請求項1之半導體散熱封裝構造，其中該散熱片以位於該貼附部的該載體貼附於該黏著層。 According to the semiconductor heat dissipation package structure of claim 1, wherein the heat sink is attached to the adhesive layer by the carrier located at the attachment portion. 一種半導體散熱封裝構造的製造方法，包含：提供結合有一晶片的一基板，該晶片與該基板的一電路層電性連接，且該晶片顯露出一顯露表面；將一黏著層設置於該基板，該黏著層環繞該晶片；以及將包含有一載體及一散熱層的一散熱片設置於該基板，該散熱層設置於該 載體，並使該散熱層接觸該晶片的該顯露表面，該散熱片並以一貼附部貼附於該黏著層，以在該貼附部與該基板之間形成一容膠空間，且該容膠空間並環繞該黏著層，該貼附部環繞該晶片，且該貼附部的一邊緣垂直投影至該基板，並於該基板形成該容膠空間的一極限邊緣，該容膠空間的該極限邊緣與該黏著層的一外側邊緣之間具有一間距，該間距不小於20微米。 A method for manufacturing a semiconductor heat dissipation package structure includes: providing a substrate combined with a chip, the chip is electrically connected to a circuit layer of the substrate, and the chip has an exposed surface; and an adhesive layer is disposed on the substrate, The adhesive layer surrounds the chip; and a heat sink including a carrier and a heat dissipation layer is disposed on the substrate, and the heat dissipation layer is disposed on the Carrier, and make the heat dissipation layer contact the exposed surface of the chip, the heat sink is attached to the adhesive layer with an attachment part to form a glue-containing space between the attachment part and the substrate, and the The glue containing space surrounds the adhesive layer, the sticking part surrounds the chip, and an edge of the sticking part is projected vertically to the substrate, and an extreme edge of the glue containing space is formed on the substrate. There is a distance between the extreme edge and an outer edge of the adhesive layer, and the distance is not less than 20 microns. 如請求項5之半導體散熱封裝構造的製造方法，其中該散熱層以一接觸面接觸該顯露表面，該接觸面的一接觸面積不小於該顯露表面的一表面積。 According to claim 5, the method for manufacturing a semiconductor heat dissipation package structure, wherein the heat dissipation layer contacts the exposed surface with a contact surface, and a contact area of the contact surface is not less than a surface area of the exposed surface. 如請求項5之半導體散熱封裝構造的製造方法，其中該散熱片以位於該貼附部的該散熱層貼附於該黏著層。 According to claim 5, the method for manufacturing a semiconductor heat dissipation package structure, wherein the heat sink is attached to the adhesive layer by the heat dissipation layer located at the attachment portion. 如請求項5之半導體散熱封裝構造的製造方法，其中該散熱片以位於該貼附部的該載體貼附於該黏著層。 According to claim 5, the method for manufacturing a semiconductor heat dissipation package structure, wherein the heat sink is attached to the adhesive layer by the carrier located at the attachment portion.
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