TWI736756B - Semiconductor device - Google Patents

Abstract

A semiconductor device includes: a semiconductor stack including a first region and a second region protruded from the first region and surrounded by the first region from a top view; a first contact structure disposed on the first region; and a first conductive structure including a first part and a second part connecting to the first part, wherein the first part is disposed on the first region and the second part is disposed on the second region, and the first conductive structure electrically connects to the first contact structure.

Description

Semiconductor components

This application relates to a semiconductor device, especially a semiconductor device with a conductive structure.

Semiconductor components include compound semiconductors composed of III-V elements, such as gallium phosphide (GaP), gallium arsenide (GaAs), or gallium nitride (GaN). The semiconductor components can be optoelectronic semiconductor components such as light emitting diodes (LEDs). ), laser, light detector, solar cell or power device (Power Device). Among them, the structure of the light emitting diode includes a p-type semiconductor layer, an n-type semiconductor layer and an active layer. The electrons and holes provided by the p-type semiconductor layer and the p-type semiconductor layer are recombined in the active layer to convert electrical energy into light energy. How to improve the photoelectric conversion efficiency of optoelectronic semiconductor components is actually one of the focuses of research and development personnel.

A semiconductor device includes: a semiconductor stack includes a first area and a second area, the second area protrudes from the first area, as seen from the top view, the first area surrounds the second area; a first contact structure Disposed on the first area; and a first conductive structure including a first part and a second part connected to the first part, the first part is disposed on the first area, and the second part is disposed on the second area, And the first conductive structure is electrically connected to the first contact structure.

100: Semiconductor components

102: substrate

102a: Long side

102b: short side

103: Semiconductor stack

103a: The first area

103b: second area

103c: sidewall area

104: The first semiconductor layer

106: Light-emitting active layer structure

108: second semiconductor layer

110: First contact structure

1101: The first contact

1101a: first end

1101b: second end

1101c: middle part

112: second contact structure

112a: second contact part

114: The first protective structure

114a: first opening

114b: second opening

116: first conductive structure

116a1: upper surface

116a2: side surface

1161: Part One

1162: Part Two

116a: first conductive part

116b: first electrode part

118: second conductive structure

118a: second conductive part

118a1: upper surface

118a2: side surface

118b: second electrode part

124: The second protective layer

124a: third opening

124b: Fourth opening

200: Semiconductor components

202: substrate

202a: Long side

202b: short side

203: Semiconductor stack

203a: The first area

203b: second area

203c: sidewall area

203b1: recess

203b2: convex part

204: The first semiconductor layer

205: Etching Platform

206: active structure

208: second semiconductor layer

210: first contact structure

212: second contact structure

2121: main body

2122: Extension

214: The first protective structure

214a: first opening

214b: second opening

216: first conductive structure

2161: Part One

2162: Part Two

218: second conductive structure

300: Semiconductor components

302: Substrate

302a: Long side

302b: Short side

303a: The first area

303b: second area

303c: sidewall area

303b1: The first part

303b2: The second part

303b3: The third part

304: first semiconductor layer

308: second semiconductor layer

310: First contact structure

3101: The first contact

3101a: first end

3101b: second end

3101c: middle part

312: second contact structure

316: The first conductive structure

316a: the first conductive part

316b: first electrode part

3161: Part One

3162: Part Two

318: second conductive structure

318a: second conductive part

318b: second electrode part

A1: First contour

B1: second contour

A2: Third contour

B2: Fourth contour

C: corner

W1: first width

W2: second width

F: Flat area

F1: The first joint surface

F2: second joint surface

D: spacing

d: distance

D1: first width

D2: second width

D3: third width

L1: first length

L2: second length

Figure 1 is a schematic top view of the first embodiment of the semiconductor device of this application.

Figures 2A to 2F are the manufacturing flow diagrams of the semiconductor device disclosed in the first embodiment of this application.

Figure 3 is a side cross-sectional view of Figure 1 cut along the line AA'.

Fig. 4 is a side cross-sectional view of the second embodiment of the semiconductor device of the application.

FIG. 5 is a schematic top view of the second embodiment of the semiconductor device of this application.

FIG. 6 is a schematic top view of the third embodiment of the semiconductor device of this application.

Please refer to FIGS. 1 to 3, which show the first embodiment of the semiconductor device 100 of the present application. The substrate 102 is not shown in FIGS. 2A to 2F. The semiconductor device 100 includes a substrate 102 and a semiconductor stack 103 formed on the substrate 102. The semiconductor stack 103 has a first semiconductor layer 104 on the substrate 102, an active structure 106 on the first semiconductor layer 104, and a second semiconductor layer 108 on the active structure 106. The first semiconductor layer 104 and the second semiconductor layer 108 respectively have a different first conductivity and a second conductivity, so as to provide electrons and holes respectively, or provide holes and electrons respectively. The active structure 106 may include a single heterostructure, a double heterostructure, a multi-quantum well, or other structures. The semiconductor stack 103 has a first region 103a and a second region 103b that are different from the first region 103a. The second region 103b protrudes upward from the first region 103a, and is connected to the first region 103a and the second region 103a by a sidewall region 103c. Second area 103b. In detail, in this embodiment, the first region 103a includes the first semiconductor layer 104, and the second region 103b includes the first semiconductor layer 104, the active structure 106, and the second semiconductor layer 108, so that the height of the second region 103b is greater than that of the first semiconductor layer. One area 103a is high, as shown in FIG. 3. In addition, as shown in Figures 1 and 2A, from the top view, the first region 103a of the semiconductor device 100 of this embodiment surrounds the second region 103b, and the semiconductor stack 103 is partially removed and the substrate is exposed 102. Enclose the exposed surface of the substrate 102 around the first area 103b. In detail, the first region 103a can be formed by removing part of the second semiconductor layer 108 and the active structure 106, and exposing a part of the first semiconductor layer 104. In the top view of the semiconductor device of the present application, the range of the first region is expressed in gray scale, so as to clearly define the distribution positions of the first region and the second region.

The substrate 102 can be used to support the semiconductor stack 103 and other layers or structures on it. The substrate 102 can include opaque materials, transparent materials, conductive materials, semiconductor materials, or insulating materials. The semiconductor stack 103 can be grown on the substrate 102 or another growth substrate by an epitaxial method such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE). . If the semiconductor stack 103 is formed on a growth substrate, the semiconductor stack 103 can be bonded to the substrate 102 by substrate transfer technology, and the growth substrate can be selectively removed. In the first embodiment, after the semiconductor stack 103 is grown on the growth substrate, it is bonded to the substrate 102 through a bonding layer (not shown) through a substrate transfer technology. In this embodiment, the substrate 102 is, for example, a sapphire substrate, which is transparent to the light emitted by the active structure 106 as a light-emitting structure. In addition, from the top view, the shape of the substrate 102 can be rectangular, square, diamond, circular, elliptical or irregular. The substrate 102 of this embodiment is rectangular and has two long sides 102a and two short sides 102b. And the intersection of each long side 102a and each short side 102b is the corner C of the substrate 102.

The materials of the first semiconductor layer 104, the second semiconductor layer 108, and the active structure 106 include three-five group compound semiconductors, such as GaAs, InGaAs, AlGaAs, AlInGaAs, GaP, InGaP, AlInP, AlGaInP, GaN, InGaN, AlGaN, AlInGaN, AlAsSb, InGaAsP, InGaAsN, AlGaAsP, etc. In the embodiments of the present disclosure, unless otherwise specified, the above chemical expressions include "compounds conforming to the chemical dosage" and "compounds not conforming to the chemical dosage", where the "compounds conforming to the chemical dosage" are, for example, Group III elements The total element dose of is the same as the total element dose of Group V elements. On the contrary, the "non-chemical dose compound" means that the total element dose of Group III elements is different from the total element dose of Group V elements. For example, the chemical formula is AlGaAs, which means that it contains three-group elements aluminum (Al) and/or gallium (Ga), and contains five-group elements arsenic (As), where the total of the three-group elements (aluminum and/or gallium) The element dose can be the same as or different from the total element dose of the group 5 element (arsenic). In addition, if each compound represented by the above chemical formula is a compound that meets the chemical dose, AlGaAs represents Al _x1 Ga _(1-x1) As, where 0≦x1≦1; AlInP represents Al _x2 In _{(1-x2 )} P, where 0≦x2≦1; AlGaInP stands for (Al _y1 Ga _(1-y1) ) _1-x3 In _x3 P, where 0≦x3≦1, 0≦y1≦1; AlGaN stands for Al _x4 Ga _{( 1-x4)} N, where 0≦x4≦1; AlAsSb represents AlAs _x5 Sb _(1-x5) , where 0≦x5≦1; InGaP represents In _x Ga _1-x P, where 0≦x6≦1 ; InGaAsP stands for In _x Ga _1-x6 As _1-y2 P _y2 , where 0≦x6≦1,0≦y2≦1; InGaAsN stands for In _x Ga _1-x8 As _1-y3 N _y3 , where 0≦x8 ≦1, 0≦y3≦1; AlGaAsP stands for Al _x9 Ga _1-x9 As _1-y4 P _y4 , where 0≦x9≦1, 0≦y4≦1; InGaAs stands for In _x10 Ga _1-x10 As, where, 0≦x10≦1. According to the material of the active structure 106, when the material of the semiconductor stack 100 is AlGaInP series, the active structure 106 can emit infrared light with a peak wavelength between 700 and 1700 nm, red light between 610 nm and 700 nm, Or yellow light with a peak wavelength between 530nm and 570nm. When the material of the semiconductor stack 100 is InGaN series, the active structure 106 can emit blue light, deep blue light with a peak wavelength between 400 nm and 490 nm, or green light with a peak wavelength between 490 nm and 550 nm. When the material of the semiconductor stack 100 is AlGaN series, the active structure 106 can emit ultraviolet light with a peak wavelength between 250 nm and 400 nm.

In this embodiment, the material of the semiconductor stack 103 is an aluminum gallium indium phosphide series material. The semiconductor stack 103 is first formed on a gallium arsenide growth substrate (not shown) by epitaxial growth, and then The substrate 102 is connected to the first semiconductor layer 104 through a transparent bonding layer (not shown), and finally the GaAs growth substrate is removed. The first semiconductor layer 104 may be a p-type semiconductor layer, and the second semiconductor layer 108 may be an n-type semiconductor layer. In another embodiment, the substrate 102 is an epitaxial growth substrate, the first semiconductor layer 104 is an n-type nitride semiconductor layer, and the second semiconductor layer 108 is a p-type nitride semiconductor layer. The material of the substrate 102 can be selected. The material can be selected from sapphire, glass, silicon (Si), gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide (GaAs), phosphorous arsenide Gallium (AsGaP), zinc selenide (ZnSe), zinc sulfide (ZnS) or silicon carbide (SiC), etc.

In this embodiment, the semiconductor device 100 further includes a first contact structure 110 located on the first region 103 a of the semiconductor stack 103 and electrically connected to the first semiconductor layer 104. Referring to Figure 1, the first contact structure 110 includes two first contact portions 1101 symmetrically located on the left and right sides of the second region 103b to improve the uniform distribution of current, and the first contact portion 1101 is disposed adjacent to the substrate The long side 102a of 102. Each first contact portion 1101 of this embodiment includes a first end portion 1101a, a second end portion 1101b, and an intermediate portion 1101c located between the first end portion 1101a and the second end portion 1101b. The first end portion 1101a and the second end portion 1101b are closer to the corner C of the substrate 102 than the middle portion 1101c. In this embodiment, the first contact portion 1101 has an uneven width. In detail, the first end portion 1101a of the first contact portion 1101 has a first width W1, and the middle portion 1101c has a second width W2 different from The first width W1, for example, the second end portion 1101b and the middle portion 110c both have a second width W2 smaller than the first width W1. The external current is injected into the first contact structure 110 through the first end portion 1101a, and the first end portion 1101a with a larger width can withstand higher The current density will not be burnt, and the durability of the semiconductor device 100 will be improved thereby. In another embodiment, the width of the first end portion 1101a and the second end portion 1101b is greater than the width of the middle portion 110c.

Referring to FIGS. 1 and 2C, the semiconductor device 100 of this embodiment further includes a second contact structure 112 located in the second region 103b and formed on the second semiconductor layer 108. The second contact structure 112 is electrically connected to the second semiconductor layer 108 and is separated from the first contact structure 110. From the top view, the second contact structure 112 and the second area 103b of this embodiment have similar contours, and the second contact structure 112 is conformally formed on the second area 103b, and has a top view area smaller than the first area 103b. A top view area of the second region 103b. The second contact structure 112 of this embodiment is located between the two first contact portions 1101, and the first contact structure 110 is closer to the long side 102 a or the short side 102 b of the substrate 102 than the second contact structure 112. The second contact structure 112 of this embodiment is continuously formed on the second semiconductor layer 108. However, in another embodiment, as shown in FIG. 2C', the second contact structure 112 includes a plurality of second contact structures separated from each other. The contact portion 112a can further improve the current dispersion benefit. The materials of the first contact structure 110 and the second contact structure 112 are conductive, and the materials of the first contact structure 110 and the second contact structure 112 can be selected according to the material of the semiconductor stack 103, so that the first contact structure 110 and the second contact structure The two contact structures 112 respectively form good electrical contacts with the first semiconductor layer 104 and the second semiconductor layer 108, such as ohmic contacts. For example, the first contact structure 110 can be selected as a beryllium gold alloy (BeAu), and the second contact structure 112 can be selected as a germanium gold alloy (GeAu). In this embodiment, the top view area of the first contact structure 110 is smaller than the top view area of the second contact structure 112, and the top view area of the first contact structure 110 accounts for 5% to the top view area of the second contact structure 112. 30%, preferably 8%-18%. The area ratio of the first contact structure 110 and the second contact structure 112 described above helps the semiconductor device 100 to achieve a better current dispersion effect.

Referring to FIG. 2D and FIG. 3, the semiconductor device 100 of this embodiment further includes a first protection structure 114 covering the first region 103a, the second region 103b, and the sidewall region 103c of the semiconductor stack 103. The first protection structure 114 can protect the semiconductor stack 103 to increase the mechanical strength of the semiconductor device 100 and at the same time prevent the subsequent electrodes from being electrically connected to the semiconductor stack 103 unexpectedly. The first protection structure 114 of this embodiment fully covers the semiconductor stack 103 and extends to the surface of the substrate 102, and forms a first opening 114a on the first region 103a and a second opening 114b on the second region 103b. The first opening 114 a exposes the first end 1101 a of the first contact structure 110 and the second opening 114 b exposes the second contact structure 112. The first protective structure 114 is a dielectric material, and may optionally include magnesium oxide (MgO), SU8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin (Epoxy), acrylic resin ( Acrylic Resin), cyclic olefin polymer (COC), polymethyl methacrylate (PA), polyethylene terephthalate (PET), polyimide (PI), polycarbonate (PC), poly Polyetherimide, Fluorocarbon Polymer, Glass, Tantalum Oxide (Ta ₂ O ₅ ), Alumina (Al ₂ O ₃ ), Silicon _{Dioxide (SiO 2} ), Titanium Oxide (TiO ₂ ), silicon nitride (SiN _x ), spin-on glass (SOG) or tetraethoxy silicon (TEOS). In another embodiment, the first protection structure 114 includes a plurality of first dielectric layers and a plurality of second dielectric layers (not shown), and each first dielectric layer and each second dielectric layer overlap each other , And the first dielectric layer and the second dielectric layer have different refractive indexes to form a distributed Bragg reflector structure, thereby increasing the mechanical strength of the first protection structure 114 to strengthen the semiconductor The protection of the stack 103 is that when the semiconductor device 100 emits light from the direction of the substrate 102, the first protection structure 114 of the distributed Bragg reflector structure also helps the light reflect to the light emitting surface to increase the efficiency of the semiconductor device 100. For example, the first dielectric layer may be silicon dioxide, and the second dielectric layer may be titanium dioxide. The first protective structure 114 includes 10-50 layers of first and second dielectric layers that overlap each other. The thickness of the first protection structure 114 is 3 μm-20 μm.

In this embodiment, the semiconductor device 100 further includes a first conductive structure 116. Please refer to Figures 1, 2E and 3, the first conductive structure 116 is located on the semiconductor stack 103, and is formed by the first region The domain 103 a extends to the second region 103 b and covers the sidewall region 103 c of the semiconductor stack 103. Furthermore, the first conductive structure 116 is formed on the first protection structure 114 and is connected to the first contact structure 110 through the first opening 114 a of the first protection structure 114. The first conductive structure 116 is electrically connected to the first semiconductor layer 104 through the first end portion 1101 a of the first contact structure 110. In detail, the first conductive structure 116 includes a first portion 1161 and a second portion 1162 connected to the first portion 1161. The first part 1161 is located on the first region 103a of the semiconductor stack 103 and is connected to the first contact structure 110 through the first opening 114a. The second portion 1162 is located on the second region 103 b of the semiconductor stack 103. In this embodiment, the first conductive structure 116 directly contacts the first end portion 1101 a of the first contact structure 110, and the top view area of the first portion 1161 is smaller than the top view area of the second portion 1162. In this embodiment, the first conductive structure 116 includes a first conductive portion 116a and a first electrode portion 116b located on the first conductive portion 116a, and each of the first conductive portion 116a and the second conductive portion 116b includes several layers. A metal stack of metal layers defines the shape of the first conductive portion 116a and the first electrode portion 116b through two photomasks; or, in another embodiment, the first conductive structure 116 may include a plurality of metal layers A metal stack of is formed on the semiconductor stack 103, and the metal stack passes through a single photomask to define the shape of the first conductive structure 116. The first electrode portion 116b covers an upper surface 116a1 and one side surface 116a2 of the first conductive portion 116a, and the first electrode portion 116b and the first contact structure 110 are electrically connected to each other through the first conductive portion 116a . In detail, from the top view, as shown in FIG. 2E, the first conductive portion 116a has a first outline A1, and the first electrode portion 116b has a second outline B1 and is conformally formed outside the first outline A1. , And the second contour B1 surrounds the first contour A1, and the top view area of the first electrode portion 116b is larger than the top view area of the first conductive portion 116a. By covering the first conductive portion 116a through the first electrode portion 116b, the yield and durability of the semiconductor device 100 can be increased. In detail, due to the height difference on the surface of the semiconductor device 100, the first protection structure 114 generally has poor coverage integrity in the sidewall region 103c of the semiconductor stack 103, and some gaps often exist in the first protection structure in the sidewall region 103c. In 114, when the semiconductor element and the carrier board (not shown in the figure) are joined, the adhesive or solder penetrates into the gap of the first protection structure 114, causing electrical failure. Through the first conductive portion 116a of the present embodiment and the first electrode portion 116b covering the first conductive portion 116a, double protection can be provided to maintain the normal electrical properties of the semiconductor device 100. In more detail, since the first conductive portion 116a and the first electrode portion 116b are sequentially located on the sidewall region 103c covered with the first protection structure 114, the subsequent semiconductor device 100 is subjected to the first electrode portion when performing the flip-chip operation. The barrier of 116b reduces the probability that the solder damages the first conductive portion 116a and further penetrates into the gap of the first protective structure 114, thereby reducing the risk of device failure during flip-chip operations, and improving the durability of the semiconductor device 100 ( reliability) and process yield (yield).

In this embodiment, the semiconductor device 100 further includes a second conductive structure 118. Please refer to FIG. 2E and FIG. 3, the second conductive structure 118 is located on the second region 103 b and is electrically connected to the second semiconductor layer 108 of the semiconductor stack 103. Similarly, the second conductive structure 118 can be formed through a single photomask or two photomasks, and the related description can refer to the description of the first conductive structure 116. In this embodiment, the second conductive structure 118 includes a second conductive portion 118a and a second electrode portion 118b located on the second conductive portion 118a. The second electrode portion 118b covers an upper surface 118a1 and one side surface 118a2 of the second conductive portion 118a, and the second electrode portion 118b is electrically connected to the second conductive portion 118a. The second conductive portion 118 a is electrically connected to the second contact structure 112 through the second opening 114 b of the first protection structure 114. In detail, from the top view, as shown in Figure 2E, the second conductive portion 118a has a third contour A2, and the second electrode portion 118b has a fourth contour B2 and is conformally located outside the third contour A2. That is, the fourth contour B2 surrounds the third contour A2, so that the top view area of the second electrode portion 118b is larger than the top view area of the second conductive portion 118a. Through the second conductive portion 118a and the second electrode portion 118b, the yield and durability of the semiconductor device 100 can be increased. In this embodiment, the first conductive structure 116 and the second conductive structure 118 respectively have a first bonding surface F1 and a second bonding surface F2 away from the semiconductor stack 103, and the semiconductor device 100 passes through the first bonding surface F1 and the second bonding surface F1. The two joint surfaces F2 are connected to the carrier board. During flip chip bonding, the first bonding surface F1 and the second bonding surface F2 are in contact with the bonding agent or solder, so that the semiconductor device 100 is electrically connected to the carrier through the bonding agent or the solder, and the light is directed from the substrate 102 Launch outwards.

The above-mentioned first conductive structure 116 and second conductive structure 118 are separated from each other, so that the first conductive structure 116 and the second conductive structure 118 are electrically connected to the first semiconductor layer 104 and the second semiconductor layer 108, respectively, and the first conductive structure The structure 116 and the second conductive structure 118 have different top view areas. In this embodiment, the top view area of the first conductive structure 116 is larger than that of the second conductive structure 118. In this embodiment, the first conductive structure 116 and the second conductive structure 118 have different top-view shapes. For example, the top-view shape of the first conductive structure 116 is irregular, and includes two first portions 1161 from the first The two parts 1162 extend to the corner C, and the top view shape of the second conductive structure 118 is substantially square.

Referring to Figures 1 and 2F, the first conductive portion 116a and the second conductive portion 118a of this embodiment are separated, and the two can be formed at the same time by a process, and then the first conductive portion is separated by partial removal. The portion 116a and the second conductive portion 118a. The first conductive portion 116a and the second conductive portion 118a have different top view areas, and the top view area of the first conductive portion 116a in this embodiment is larger than the top view area of the second conductive portion 118a. In addition, similarly, the first electrode portion 116b and the second electrode portion 118b are also separated from each other, and the two can be formed at the same time by a process, and then the first electrode portion 116b and the second electrode portion 116b are separated from the second electrode portion 116b by partial removal. The electrode portion 118b. The first electrode portion 116b and the second electrode portion 118b have different top view areas, and the top view area of the first electrode portion 116b in this embodiment is larger than the top view area of the second electrode portion 118b. The first conductive portion 116a, the second conductive portion 118a, the first electrode portion 116b, and the second electrode portion 118b may have a single-layer or multi-layer structure. In an embodiment, the materials of the first electrode portion 116b and the second electrode portion 118b are different from the first conductive portion 116a and the second conductive portion 118a. For example, the first conductive portion 116a and the first electrode portion 116b have at least one difference. s material. The first conductive portion 116a and the second conductive portion 118a have substantially the same material, such as gold Metals or alloys, such as metals such as titanium, gold, platinum, nickel, or alloys of the foregoing metals, and the first conductive portion 116a and the second conductive portion 118a may be a laminated structure composed of a plurality of metal layers or alloy layers. The first electrode portion 116b and the second electrode portion 118b have substantially the same material, for example, a metal or alloy, such as: gold, nickel, titanium, platinum, aluminum, tin and other metals or alloys of the foregoing metals, and the first electrode portion 116b And the second electrode portion 118b may have a laminated structure composed of a plurality of metal layers or alloy layers.

As shown in FIG. 3, the first conductive structure 116 and the second conductive structure 118 separated from each other have a distance D of 10 μm to 90 μm to form a small-sized semiconductor device 100. There is a surface between the first conductive structure 116 and the second conductive structure 118, and the surface is a flat area F. The current semiconductor components on the market are usually attached to a temporary film layer (for example, blue film), and then a thimble is used to apply force to the temporary film layer during subsequent processing. The force point roughly corresponds to the two electrodes ( For example, between the first conductive structure 116 and the second conductive structure 118), the semiconductor element can be removed in this way. In the semiconductor device 100 of the present invention, since there is a flat area between the first conductive structure 116 and the second conductive structure 118, when the semiconductor device 100 is removed by using a thimble, it is possible to avoid uneven force on the thimble due to the undulation of the surface. The risk of cracking of the semiconductor element 100 is reduced. In addition, since the first protection structure 114 has a plurality of first dielectric layers and a plurality of second dielectric layers overlapping each other, it also helps to improve the anti-thimble strength of the semiconductor stack 103.

In this embodiment, the first bonding surface F1 of the first electrode portion 116a and the second bonding surface F2 of the second electrode portion 118a are coplanar. Therefore, when the semiconductor device 100 is fixed on a carrier board in a flip chip manner, the coplanar characteristic is favorable To improve the bonding yield of the semiconductor device 100 and the carrier.

In an embodiment, the sum of the top view area of the first conductive structure 116 and the second conductive structure 118 can account for more than 25% of the top view area of the semiconductor stack 103, and more preferably 32% to 60%, by large The area of the first conductive structure 116 and the second conductive structure 118 effectively improves the yield of flip chip bonding and the heat dissipation efficiency.

Please refer to FIG. 2F and FIG. 3, the semiconductor device 100 may optionally include a second protective layer 124 covering the sidewall region 103c of the semiconductor stack 103, the surface of the first region 103a, and the surface of the second region 103b . In detail, the second protection layer 124 covers the semiconductor stack 103, the first protection structure 114, the first conductive structure 116 and the second conductive structure 118. The second protection layer 124 has a third opening 124a to expose the first conductive structure 116, and a fourth opening 124b to expose the second conductive structure 118, so that the semiconductor device 100 can pass through the exposed first conductive structure 116 and the second conductive structure 116. The two conductive structures 118 are electrically connected to a carrier board (such as a printed circuit board) with a circuit structure by solder.

In addition, the second protective layer 124 in this embodiment covers the edges of the first conductive structure 116 and the second conductive structure 118 and extends inward for a distance d, the distance d is, for example, 3-10 μm , to improve reliability. In this embodiment, the material and structure of the second protection layer 124 are different from those of the first protection structure 114. For example, the structure of the first protection structure 114 is a dispersed Bragg reflection structure, and the second protection structure 124 may be a single layer or Double layer. In addition, the material of the second protection structure 124 may include a dielectric material, such as silicon oxide, silicon nitride, or a combination of both. In one embodiment, both the first protection structure 114 and the second protection structure 124 are distributed Bragg reflection structures.

In an embodiment, the second protection structure 124 may be provided between the first conductive portion 116a and the first electrode portion 116b, and between the second conductive portion 118a and the second electrode portion 118b, so that the first conductive portion 116a is located Between the second protection layer 124 and the first protection layer 114. Compared with the second protection structure 124 formed on the first conductive structure 116 and the second conductive structure 118, when the second protection structure 124 is provided between the first conductive portion 116a and the first electrode portion 116b, and the second conductive portion Between 118a and the second electrode portion 118b, the first bonding surface F1 and the second bonding surface F2 are completely exposed to increase the bonding area when bonding with the carrier board to increase the bonding yield. In addition, the first protection structure 114 and the second protection structure 124 may have different top viewing areas. For example, in one embodiment, the first protection structure 114 extends to the upper surface of the substrate 102 and is The substrate 102 is in contact, and the edge of the second protection structure 124 stays on the semiconductor stack 103 and does not extend to the substrate 102.

FIG. 4 is a schematic cross-sectional view of the second embodiment of the semiconductor device 200 of this application. The components of the semiconductor device 200 and their connection relationship are substantially the same as those of the semiconductor device 100 of the first embodiment. The components in the second embodiment are marked by changing the first code of the corresponding component of the first embodiment from 1 to 2. In detail, the semiconductor device 200 of this embodiment includes: a substrate 202 and a semiconductor stack 203 formed on the substrate 202. The semiconductor stack 203 has a first region 203a and a second region 203b different from the first region 203a , And the semiconductor device 200 includes a first contact structure 210 located on the first area 203a, a second contact structure 212 located on the second area 203b, a first protection structure 214 covering the semiconductor stack 203, and a first conductive structure 216 It is located on the semiconductor stack 203 and extends from the first area 203a to the second area 203b, and a second conductive structure 218 is located in the second area 203b.

The main difference between this embodiment and the previous embodiment is that the semiconductor device 200 of this embodiment omits the first conductive portion and the second conductive portion. In other words, the first conductive structure 216 only includes the first electrode equivalent to the first embodiment. The structure of the portion 116b, the second conductive structure 218 only includes a structure equivalent to the second electrode portion 118b in the first embodiment. The thickness of the first conductive structure 216 and the second conductive structure 218 is 1~5 μm (for example: 1.5 μm, 2 μm, 3 μm) to prevent solder from drilling into the gaps that may exist in the first protection structure 214, and to prevent short circuits from occurring In the process of flip chip bonding. In addition, in this embodiment, the second protection structure is omitted. When the first protection structure 214 is a Bragg reflector (DBR), the single first protection structure 214 can have high coating uniformity and high structural strength. In order to save the process of forming the second protection structure.

FIG. 5 shows a top view of the semiconductor device 200 of the second embodiment. Referring to Figures 4 and 5, the second region 203b of the semiconductor stack 203 is surrounded by the first region 203a, and viewed from above, the second region 203b The area 203b has a concave portion 203b1 and two convex portions 203b2 located on both sides of the concave portion 203b1, so that the concave portion 203b1 is away from the long side 202a and the short side 202b of the substrate 202. The first contact structure 210 is located on the first area 203 a, and the second contact structure 212 is located on the second area 203 b and has a main body portion 2121 and two extension portions 2122 connected to the main body portion 2121. Each extension portion 2122 extends in a direction away from the main body portion 2121. The second contact structure 212 is closer to the edge of the substrate 202 than the first contact structure 210 is. The first protection structure 214 covers the semiconductor stack 203 and has a first opening 214a and a second opening 214b. The first opening 214a exposes the first contact structure 210 and the second opening 214b exposes the second contact structure 212, whereby the first conductive structure 216 and the second conductive structure 218 respectively penetrate the first opening 214a and the second opening 214b, and The first contact structure 210 and the second contact structure 212 are electrically connected. In the top view, the first opening 214a has an area smaller than that of the first contact structure 210. The first opening 214a and the second opening 214b each have a first extension direction and a second extension direction. In this embodiment, the first extension direction is different from the second extension direction, and the first extension direction is parallel to that of FIG. 5. The X axis and the second extension direction are parallel to the Y axis, so that the first extension direction is perpendicular to the second extension direction; in other embodiments, the first extension direction is the same as the second extension direction.

FIG. 6 shows a top view of the third embodiment of the semiconductor device 300 of the present application. The cross-sectional view corresponding to FIG. 6 may be similar to that of FIG. 3 or FIG. 4. This embodiment is based on the first embodiment, and the difference between this embodiment and the first embodiment will be described.

The components of the semiconductor device 300 of this embodiment and their connection relationship are similar to those of the first embodiment, except that the second region 303b and the first contact structure 310 of this embodiment have a special configuration. As shown in Figure 6, when viewed from above, the second area 303b has a stepped profile, and the width of the second area 303b can be gradually changed from one end to the other end. For example, the second area 303b in this embodiment has The width of the three segments changes. In detail, from the top view, the second region 303b has a first portion 303b1 with a first width D1, a second portion 303b2 has a second width D2, and a third portion 303b3 with There is a third width D3, and the second part 303b2 is located between the first part 303b1 and the third part 303b3. The width of the second area 303b decreases or increases from the first part 303b1 to the third part 303b2, and the method of decreasing or increasing the width can be continuous or segmented. In this embodiment, the first width D1 is smaller than the second width D2, and the third width D3 is larger than the second width D2.

A first contact structure 310 is formed on the first area 303a, and the first contact structure 310 includes two first contact portions 3101 symmetrically located on the left and right sides of the second area 303b, and each first contact portion 3101 includes a first end portion 3101a, a second end portion 3101b, and a middle portion 3101c are located between the first end portion 3101a and the second end portion 3101b, the width of the first end portion 3101a is greater than the second end portion 3101b and the middle portion 3101c, and the first end The part 3101a is arranged beside the first part 303b1 of the second area 303b, and the middle part 3101c and the second end part 3101b are arranged beside the second part 303b2. In this embodiment, the first contact structure 310 does not extend to the left and right sides of the third portion 303b3, so as to reserve a larger area of the second semiconductor layer 308 to maintain the uniformity of current dispersion and increase the active structure. area. In addition, in the direction of the long side 302a of the substrate 302 (ie, along the Y-axis direction), the second region 303b has a first length L1, and the first contact portion 3101 of the first contact structure 310 has a second length L2 less than The first length L1 and the second length L2 are 30% to 60% of the first length L1, or the second length L2 is 35% to 50% of the first length L1. When the semiconductor device 300 is a light-emitting device and has a miniaturized size (for example, the long side is less than 10 mils), the semiconductor device 300 of this embodiment can pass through the above-mentioned configuration design of the second region 303b and the first contact structure 310 to have a larger size. The light-emitting area, while maintaining good current dispersion uniformity.

Similar to the first embodiment, the first conductive structure 316 of this embodiment includes a first conductive portion 316a with a first profile A1 and a first electrode portion 316b with a second profile A2, and the second profile B2 is conformal The ground is formed outside the first contour A1, and the second contour B1 surrounds the first contour A1. However, in another In an embodiment, the first conductive structure 316 can also be formed on the semiconductor stack 303 through a single photomask to define its pattern as shown in the second embodiment, or only include the first electrode portion 316b.

This application also includes a light-emitting module having the above-mentioned semiconductor element. The light-emitting module includes a plurality of semiconductor elements and a carrier. The plurality of semiconductor elements can be arranged on the carrier in a matrix, and the carrier includes a circuit layer that is electrically connected to the plurality of semiconductor elements. Specifically, the light-emitting module includes several packages arranged on a carrier, and any package includes semiconductor elements with different light-emitting wavelengths, such as a red light semiconductor element, a green light semiconductor element, and a blue light semiconductor element, And a packaging glue (for example: silicon glue) encapsulates the semiconductor elements. The dominant wavelength or peak wavelength of the above-mentioned semiconductor elements of each color is, for example, between 600nm to 660nm, 515nm to 575nm, and 430nm to 490nm, respectively, to form a package that emits white light, and the light-emitting module, for example, As the backlight module of the display.

In another embodiment, the light-emitting module can be directly used as a display panel of a display. The light-emitting module has a plurality of pixels, and any pixel includes a plurality of semiconductor elements. For example, the pixel includes a red light semiconductor element, a green light semiconductor element, and a blue light semiconductor element.

However, the above are only the preferred embodiments of this application, and are not used to limit the scope of implementation of this application. All the shapes, structures, features and spirits described in the scope of the patent application of this application are equal. Changes and modifications shall be included in the scope of patent application of this application.

100: Semiconductor components

102: substrate

103: Semiconductor stack

103a: The first area

103b: second area

103c: sidewall area

104: The first semiconductor layer

106: active structure

108: second semiconductor layer

110: First contact structure

112: second contact structure

114: The first protective structure

114a: first opening

114b: second opening

116: first conductive structure

1161: Part One

1162: Part Two

116a: first electrode part

116a1: upper surface

116a2: side surface

116b: the first conductive part

118: second conductive structure

118a: second conductive part

118a1: upper surface

118a2: side surface

118b: second electrode part

124: The second protective layer

124a: third opening

124b: Fourth opening

D: spacing

F1: The first joint surface

F2: second joint surface

Claims (10)

A semiconductor device includes: a semiconductor stack, including a first area and a second area, the second area protruding from the first area, wherein, as seen from the top view, the first area surrounds the second area Area; a first contact structure provided on the first area; and a first conductive structure electrically connected to the first contact structure and including: a first portion provided on the first area; and a second Part is arranged on the second area and connected to the first part. The semiconductor device according to claim 1, wherein the first region includes a first semiconductor layer, and the second region includes the first semiconductor layer, an active structure, and a second semiconductor layer. The semiconductor device according to claim 1, wherein the first contact structure includes two first contact portions, and as seen from the top view, the two first contact portions are disposed on two opposite sides of the second area. side. The semiconductor device according to claim 1, wherein, as viewed from the top view, the first contact structure includes a first end portion and a middle portion, the first end portion is connected to the middle portion, and the second One end directly contacts the first conductive structure. The semiconductor device according to claim 4, wherein the intermediate portion has a third portion, and the first portion of the first conductive structure and the third portion of the intermediate portion overlap. The semiconductor device according to claim 4, wherein the first contact structure further includes a second end, the first end has a first width, and the second end has a first width smaller than the first width. Two width. The semiconductor device according to claim 1, further comprising a first protection structure formed on the first contact structure. The semiconductor device according to claim 1, further comprising a second contact structure located in the second region, wherein the first contact structure has a first top view area, and the second contact structure has a second top view area, And the first top view area is smaller than the second top view area. The semiconductor device according to claim 8, wherein the first top view area is 5% to 30% of the second top view area. The semiconductor device according to claim 7, wherein the first protection structure has an opening, and the first conductive structure is formed on the first protection structure and is connected to the first contact structure through the opening.

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