TWI733014B - 密封薄膜、電子零件裝置的製造方法及電子零件裝置 - Google Patents

密封薄膜、電子零件裝置的製造方法及電子零件裝置 Download PDF

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Publication number
TWI733014B
TWI733014B TW107111178A TW107111178A TWI733014B TW I733014 B TWI733014 B TW I733014B TW 107111178 A TW107111178 A TW 107111178A TW 107111178 A TW107111178 A TW 107111178A TW I733014 B TWI733014 B TW I733014B
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TW
Taiwan
Prior art keywords
resin layer
sealing
resin
electronic component
film
Prior art date
Application number
TW107111178A
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English (en)
Chinese (zh)
Other versions
TW201903989A (zh
Inventor
野村豐
渡瀨裕介
荻原弘邦
金子知世
鈴木雅彥
Original Assignee
日商昭和電工材料股份有限公司
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Application filed by 日商昭和電工材料股份有限公司 filed Critical 日商昭和電工材料股份有限公司
Publication of TW201903989A publication Critical patent/TW201903989A/zh
Application granted granted Critical
Publication of TWI733014B publication Critical patent/TWI733014B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW107111178A 2017-03-31 2018-03-30 密封薄膜、電子零件裝置的製造方法及電子零件裝置 TWI733014B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017-072159 2017-03-31
JP2017072159 2017-03-31

Publications (2)

Publication Number Publication Date
TW201903989A TW201903989A (zh) 2019-01-16
TWI733014B true TWI733014B (zh) 2021-07-11

Family

ID=63678034

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107111178A TWI733014B (zh) 2017-03-31 2018-03-30 密封薄膜、電子零件裝置的製造方法及電子零件裝置

Country Status (5)

Country Link
JP (1) JP7115469B2 (ja)
KR (1) KR102440947B1 (ja)
CN (2) CN110462818B (ja)
TW (1) TWI733014B (ja)
WO (1) WO2018181761A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022158450A1 (ja) * 2021-01-19 2022-07-28 昭和電工マテリアルズ株式会社 導電性部材、電子装置の製造方法、接続構造体、及び、電子装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090108440A1 (en) * 2007-10-26 2009-04-30 Infineon Technologies Ag Semiconductor device
US20120168951A1 (en) * 2010-12-30 2012-07-05 Hyun-Ki Kim Printed circuit board and semiconductor package comprising the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS616615A (ja) 1984-06-20 1986-01-13 Nippon Sheet Glass Co Ltd 屈折率分布型レンズ
JP2001127095A (ja) 1999-10-29 2001-05-11 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2001244372A (ja) 2000-03-01 2001-09-07 Seiko Epson Corp 半導体装置およびその製造方法
DE102006009789B3 (de) 2006-03-01 2007-10-04 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauteils aus einer Verbundplatte mit Halbleiterchips und Kunststoffgehäusemasse
JP5385247B2 (ja) 2010-12-03 2014-01-08 信越化学工業株式会社 ウエハモールド材及び半導体装置の製造方法
JP5623970B2 (ja) 2011-04-22 2014-11-12 信越化学工業株式会社 樹脂積層体、及び半導体装置とその製造方法
JP5934078B2 (ja) * 2012-11-19 2016-06-15 信越化学工業株式会社 繊維含有樹脂基板及び半導体装置の製造方法
JP6393092B2 (ja) * 2013-08-07 2018-09-19 日東電工株式会社 中空型電子デバイス封止用樹脂シート及び中空型電子デバイスパッケージの製造方法
JP6213128B2 (ja) * 2013-10-09 2017-10-18 富士通株式会社 電子部品パッケージおよび電子部品パッケージの製造方法
JP2016012713A (ja) * 2014-06-05 2016-01-21 日立化成株式会社 樹脂フィルム、半導体装置および半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090108440A1 (en) * 2007-10-26 2009-04-30 Infineon Technologies Ag Semiconductor device
US20120168951A1 (en) * 2010-12-30 2012-07-05 Hyun-Ki Kim Printed circuit board and semiconductor package comprising the same

Also Published As

Publication number Publication date
KR20190132401A (ko) 2019-11-27
JP7115469B2 (ja) 2022-08-09
CN110462818B (zh) 2023-12-26
JPWO2018181761A1 (ja) 2020-02-20
CN110462818A (zh) 2019-11-15
TW201903989A (zh) 2019-01-16
WO2018181761A1 (ja) 2018-10-04
KR102440947B1 (ko) 2022-09-05
CN117438381A (zh) 2024-01-23

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