TWI713006B - Pixel circuit - Google Patents

Abstract

The present disclosure relates to a pixel circuit including a driving circuit, a voltage compensation circuit, and a leakage compensation circuit. The driving circuit is electrically connected to a driving power source and a light emitting element, and is turned on in response to a voltage of a first node. The voltage compensation circuit is electrically connected between the first node and the light-emitting element to generate a compensation voltage signal on the first node according to a threshold voltage value of the driving circuit when the driving circuit receives a data signal. The leakage compensation circuit is electrically connected between the driving power source and the first node, so that when the driving circuit drives the light emitting element, the driving power source compensates the voltage of the first node through the leakage compensation circuit.

Description

Pixel circuit

The present disclosure relates to a pixel circuit, especially a technology that can provide current to drive light-emitting elements

Low temperature poly-silicon thin-film transistor (LTPS) has the characteristics of high carrier mobility and small size, and is suitable for high-resolution, narrow-frame and low-power display panels. However, when the LTPS is turned off, there will still be an obvious leakage path inside the transistor, especially when the operating frequency is low, the leakage phenomenon is more obvious. The leakage phenomenon will cause the current to drive the light-emitting elements in the display panel to be unstable, causing the light-emitting elements to flicker and affect the quality of the display screen.

One aspect of the present disclosure is a pixel circuit including a driving circuit, a voltage compensation circuit, and a leakage compensation circuit. The driving circuit is electrically connected to the driving power supply and the light emitting element. The driving circuit is used for turning on in response to the voltage of the first node to output a driving current to drive the light emitting element. The voltage compensation circuit is electrically connected between the first node and the light-emitting element to receive the In the case of a data signal, the voltage compensation circuit generates a compensation voltage signal on the first node according to the threshold voltage value of the driving circuit. The leakage compensation circuit is electrically connected between the driving power supply and the first node, so that when the driving circuit outputs a driving current, the driving power supply compensates the voltage of the first node through the leakage compensation circuit.

Accordingly, since the driving power source can compensate the voltage of the first node through the leakage compensation circuit, the problem of the voltage on the first node falling along with the remaining leakage paths in the pixel circuit can be improved.

100: pixel circuit

200: pixel circuit

110: drive circuit

120: Voltage compensation circuit

130: Leakage compensation circuit

Td: drive transistor

Tc: control switch

T1: the first switching element

T2: second switching element

T3: third switching element

T4: Fourth switching element

T5: Fifth switching element

T6: The sixth switching element

S(n): control signal

S(n+1)‧‧‧Control signal

S(n-1)‧‧‧Control signal

EM‧‧‧Control signal

N1‧‧‧First node

N2‧‧‧Second node

N3‧‧‧The third node

N4‧‧‧The fourth node

Rc1‧‧‧Leakage path

Rc2‧‧‧Leakage compensation path

L‧‧‧Light-emitting element

A1‧‧‧Curve

A2‧‧‧Curve

A3‧‧‧Curve

B1‧‧‧Curve

B2‧‧‧Curve

B3‧‧‧Curve

C‧‧‧Energy storage element

Vdd‧‧‧Drive power

Vc‧‧‧Drive power

Vdata‧‧‧Data signal

Vref‧‧‧Reference power supply

FIG. 1A is a schematic diagram of a pixel circuit according to some embodiments of the present disclosure.

FIG. 1B is a signal waveform diagram of a pixel circuit according to some embodiments of the present disclosure.

FIGS. 2A to 2E are schematic diagrams of the operation state of the pixel circuit according to some embodiments of the present disclosure.

3A to 3B are simulation diagrams of the operation of the pixel circuit according to some embodiments of the present disclosure.

FIG. 4A is a schematic diagram of a pixel circuit according to some embodiments of the present disclosure.

FIG. 4B is a signal waveform diagram of the pixel circuit according to some embodiments of the present disclosure.

FIGS. 5A to 5E are schematic diagrams of the operation state of the pixel circuit according to some embodiments of the present disclosure.

FIGS. 6A to 6B are simulation diagrams of the operation of the pixel circuit according to some embodiments of the present disclosure.

Hereinafter, multiple embodiments of the present invention will be disclosed in the form of drawings. For clear description, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit the present invention. That is, in some embodiments of the present invention, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventionally used structures and elements will be shown in a simple schematic manner in the drawings.

In this text, when a component is referred to as “connected” or “coupled”, it can be referred to as “electrically connected” or “electrically coupled”. "Connected" or "coupled" can also be used to mean that two or more components cooperate or interact with each other. In addition, although terms such as “first”, “second”, etc. are used herein to describe different elements, the terms are only used to distinguish elements or operations described in the same technical terms. Unless clearly indicated by the context, the terms do not specifically refer to or imply order or sequence, nor are they used to limit the present invention.

Please refer to FIG. 1A, which is a schematic diagram of a pixel circuit 100 according to some embodiments of the present disclosure. The pixel circuit 100 is disposed in the display panel, and includes a driving circuit 110, a voltage compensation circuit 120, and a leakage compensation circuit 130. The pixel circuit 100 is used to receive a plurality of control signals from the controller of the display panel (such as the signals S(n), S(n-1), and S(n+1) indicated in Figure 1A, details will follow Paragraph description) to control the driving circuit 110, the voltage compensation circuit 120 and the leakage compensation circuit 130.

The driving circuit 110 is electrically connected to the driving power supply Vdd and the light emitting element L, and its control terminal is used to turn on in response to the voltage of the first node N1 to output a driving current to drive the light emitting element L. In some embodiments, the light-emitting element L is a pixel on the display panel, and may include a light-emitting diode or an organic light-emitting diode. It is driven by the current formed by the voltage difference between the driving power supplies Vdd and Vc.

The voltage compensation circuit 120 is electrically connected between the first node N1 and the third node N3. When the driving circuit 110 receives the data signal Vdata, the voltage compensation circuit 120 generates a compensation voltage signal on the first node N1 according to the threshold voltage Vth of the driving circuit 110. In some embodiments, the voltage compensation circuit 120 includes a driving transistor Td, and the voltage compensation circuit 120 performs voltage compensation on the first node N1 according to the threshold voltage Vth of the driving transistor Td.

The leakage compensation circuit 130 is electrically connected between the driving power supply Vdd and the first node N1, so that when the driving circuit 110 outputs a driving current, the driving power supply Vdd passes through the leakage compensation circuit 130 to perform current compensation for the voltage of the first node N1.

When the driving circuit 110 drives the light emitting element L to generate light, the voltage on the first node N1 may leak through other paths in the pixel circuit 100 (for example, the first switching element T1, whose operation will be described in detail later), so that The gate voltage of the driving transistor Td drops, thereby affecting the brightness of the light-emitting element L. The present disclosure uses the leakage compensation circuit 130 so that when the driving circuit 110 drives the light emitting element L, the driving power supply Vdd can pass through the leakage compensation circuit 130 to perform current compensation toward the first node N1 with a relatively low voltage to compensate for the first node N1. The voltage drops due to the leakage path in the pixel circuit 100.

In some embodiments, the leakage compensation circuit 130 includes a second switching element T2. When the driving circuit 110 outputs a driving current, both the first switching element T1 and the second switching element T2 are turned off (ie, the control signal S(n- 1), S(n+1) are all disable signals). Although leakage may still occur when the switching elements T1 and T2 are turned off, the leakage compensation circuit 130 compensates for the current of the first node N1 to balance the negative effects of the leakage of the first node N1 from the first switching element T1. influences. In some embodiments, the first switching element T1 and the second switching element T2 can be transistors of the same specification.

In some embodiments, the driving circuit 110 includes a driving transistor Td, a third switching element T3 and a fourth switching element T4. The driving transistor Td is used to turn on in response to the voltage of the first node N1. The third switching element T3 is electrically connected between the driving transistor Td and the light emitting element L. The fourth switching element T4 is electrically connected between the driving transistor Td and the driving power Vdd.

In some embodiments, the pixel circuit 100 further includes an energy storage element C (such as a capacitor). The energy storage element C is electrically connected between the first node N1 and the driving power source Vdd. That is, the energy storage element C is connected in parallel with the leakage compensation circuit 130.

In some embodiments, the pixel circuit 100 further includes a fifth switching element T5 and a sixth switching element T6. The fifth switching element T5 is electrically connected to the third switching element T3 and the reference power source Vref. The sixth switching element T6 is electrically connected to the second node N2 between the fourth switching element T4 and the driving transistor Td.

Please refer to FIGS. 1B and 2A to 2E. FIG. 1B is an operation timing diagram of the pixel circuit 100 according to some embodiments of the present disclosure. The operation of the pixel circuit 100 during different operation periods will be described in detail below. in In some embodiments, the operation process of the pixel circuit 100 at least includes a reset period P1, a data writing period P2, and a light emitting period P3. The first switching element T1 is turned on or off in response to the control signal S(n+1), the second switching element T2 is turned on or off in response to the control signal S(n-1), and the third switching element T3 is in response to The control signal EM is turned on or off, the fourth switching element T4 is turned on or off in response to the control signal EM, the fifth switching element T5 is turned on or off in response to the control signal S(n), and the sixth switching element T6 is responsive The control signal S(n+1) is turned on or off.

In this embodiment, each of the switching elements T1 to T6 shown in FIGS. 2A to 2E and the driving transistor Td are all P-type TFTs (thin film transistors). For the P-type TFT, when the signal received by its gate is at a high voltage level, it will be disabled, and when the received signal is at a low voltage level, it will be enabled. However, this disclosure is not limited to this. N-type transistors can also be used as switches (that is, disabled at low voltage levels, and enabled at high voltage levels).

Please refer to FIGS. 1B and 2A. In this embodiment, the reset period P1 further includes three stages. In the first stage of the reset period P1, the driving transistor Td is turned off, the first switching element T1 is turned off, the second switching element T2 is turned on, the third switching element T3 is turned on, and the fourth switching element T4 is turned on. Both the node N1 and the second node N2 are turned on to the driving power supply Vdd for pre-charging. In some embodiments, the driving power supply Vdd provides a high voltage signal.

Please refer to Figures 1B and 2B. In the second stage of the reset period P1, the driving transistor Td is turned off, the first switching element T1 is turned off, the second switching element T2 is turned on, and the third switching element T3 is turned on. The fourth switching element T4 is turned on and the fifth switching element T5 is turned on, so that the third switching element T3 passes through the fifth The switching element T5 is turned on to the reference power source Vref to reset the voltage on the light-emitting element L. In some embodiments, the reference power ref provides a low-voltage signal.

Please refer to Figures 1B and 2C. In the third stage of the reset period P1, after the third switching element T3 is turned on to the reference power supply Vref through the fifth switching element T5, the driving transistor Td is turned off and the first switch The element T1 is turned on, the second switching element T2 is turned off, the third switching element T3 is turned off, the fourth switching element T4 is turned off, the fifth switching element T5 is turned on, and the sixth switching element T6 is turned on. In addition, at this time, the second node N2 is turned on to the reference power source Vref through the sixth switching element T6, so that the second node N2 is discharged to the reference power source Vref through the sixth switching element T6. At the same time, the first node N1 is discharged to the reference power source Vref through the first switching element T1 and the fifth switching element T5.

Please refer to FIGS. 1B and 2D. During the data writing period P2, the second node N2 receives the data signal Vdata through the sixth switching element T6. At the same time, the first switching element T1 is turned on and the second switching element T2 is turned off, so that the voltage compensation circuit 120 receives the compensation voltage signal through the first switching element T1. At this time, the second node N2 is written with the data signal Vdata, and the first node N1 and the third node N3 are written with the compensation voltage signal “Vdata-Vth (threshold voltage of driving transistor Td)”.

Please refer to Figures 1B and 2E. During the data writing period P3, the driving transistor Td is turned on, the first switching element T1 is turned off, the second switching element T2 is turned off, the third switching element T3 is turned on, and the fourth switching element is turned on. T4 is turned on, the fifth switching element T5 is turned off, and the sixth switching element T6 is turned off. At this time, the driving circuit 110 can generate a driving current I1 to drive the light emitting element L.

Although the leakage compensation circuit 130 (the second switching element T2) and the first switching element T1 are both turned off during the light-emitting period, the current may still pass through the transistor itself (such as the leakage path Rc1 formed by the first switching element T1). ). In the case of leakage, the voltage of the first node N1 will be discharged to the third node N3 through the first switching element T1. Since the voltage of the driving power supply Vdd is greater than the voltage of the first node N1, the driving power supply Vdd can still perform voltage compensation on the first node N1 through the leakage compensation path Rc2 formed by the second switching element T2, and solve the problem of the voltage on the first node N1. Stability issues.

Please refer to FIGS. 3A and 3B. FIG. 3A is a simulation diagram of the voltage change on the first node N1 when the pixel circuit 100 is operating. The horizontal axis is time and the vertical axis is voltage. It can be seen from the diagram that when the operating time is 90-130 microseconds (corresponding to the light-emitting period P3), the voltage on the first node N1 does not drop significantly due to the leakage phenomenon. In Figure 3A, the curve A1 represents the embodiment when the threshold voltage is +0.5V, the curve A2 represents the embodiment when the threshold voltage is zero, and the curve A3 represents the embodiment when the threshold voltage is -0.5V. FIG. 3B is a schematic diagram of the current error rate (Current Error Rate) of the light emitting element L under different data signals Vdata of the pixel circuit 100. The horizontal axis is the data signal Vdata, and the vertical axis is the current abnormality rate. It can be seen from the figure that the circuit proposed in the present disclosure can effectively compensate the threshold voltage variation of the driving transistor Td, and the current error rate (Current Error Rate) is maintained within 5%.

4A and 4B are schematic diagrams of a pixel circuit 200 according to another embodiment of the disclosure. In Figures 4A and 4B, similar elements related to the embodiment of Figures 1A and 1B are denoted by the same reference numerals for ease of understanding, and the specific principles of the similar elements have been described in detail in the previous paragraphs, if not the same as in Figure 4A And the components of Figure 4B have a cooperative operation relationship and necessary introduction, in This will not be repeated here.

In this embodiment, the pixel circuit 200 further includes a control switch Tc. The control switch Tc is electrically connected between the driving power supply Vdd and the second switching element T2. As shown in FIG. 4A, the control switch Tc can be used to control the conduction of the fourth node between the second switching element T2 and the driving power source Vdd, so that the reset process of the pixel circuit can be accelerated.

The control method of the pixel circuit 200 is slightly different from that of the pixel circuit 200 shown in FIG. 1A. In some embodiments, the operation process of the pixel circuit 100 includes a reset period P1, a data writing period P2, a sustain period P21, and a light emitting period P3. The first switching element T1 is turned on or off in response to the control signal S(n), the second switching element T2 is turned on or off in response to the control signal S(n-1), and the third switching element T3 is in response to the control signal. EM is turned on or off, the fourth switching element T4 is turned on or off in response to the control signal EM, the fifth switching element T5 is turned on or off in response to the control signal S(n-1), and the sixth switching element T6 is responsive The control signal S(n+1) is turned on or off.

Please refer to FIGS. 4B and 5A to 5E. FIG. 4B is an operation timing diagram of the pixel circuit 200 according to some embodiments of the present disclosure. Please refer to Figures 4B and 5A. In the first stage of the reset period P1, the driving transistor Td is turned off, the control switch Tc is turned on, the first switching element T1 is turned off, the second switching element T2 is turned on, and the third The switching element T3 is turned on, the fourth switching element T4 is turned on, the fifth switching element T5 is turned on, and the sixth switching element T6 is turned off, so that the first node N1 and the second node are turned on to the driving power supply Vdd. At the same time, the third switching element T3 is turned on to the reference power supply Vref through the fifth switching element T5 to reset the voltage on the light emitting element L (or the third node N3).

Please refer to Figures 4B and 5B. In the second stage of the reset period P1, after the first node N1 is turned on to the driving power source Vdd, the driving transistor Td is turned on, the control switch Tc is turned off, and the first switching element T1 is turned off. On, the second switching element T2 is on, the third switching element T3 is off, the fourth switching element T4 is off, the fifth switching element T5 is on, and the sixth switching element T6 is off, so that the first node N1 passes through the first switching element T1 and the fifth switching element T5 are turned on to the reference power source Vref to reset the voltage of the first node N1.

Please refer to Figures 4B and 5C. During the data writing period P2, the driving transistor Td is turned on, the control switch Tc is turned off, the first switching element T1 is turned on, the second switching element T2 is turned off, and the third switching element T3 is turned off. OFF, the fourth switching element T4 is turned off, the fifth switching element T5 is turned off, and the sixth switching element T6 is turned on, so that the voltage compensation circuit 120 receives the compensation voltage signal through the first switching element T1. That is, the first node N1 receives the compensation voltage signal Vdata through the first switching element T1, the driving transistor Td, and the sixth switching element T6. At this time, the second node N2 is written with the data signal Vdata, and the first node N1 and the third node N3 are written with the compensation voltage signal “Vdata-Vth (threshold voltage of driving transistor Td)”.

Please refer to Figures 4B and 5D. In the sustain period P21, after the driving circuit 110 receives the data signal Vdata, the driving transistor Td is turned on, the control switch Tc is turned off, the first switching element T1 is turned off, and the second switching element T2 is turned off. Turn off, the third switching element T3 is turned off, the fourth switching element T4 is turned off, the fifth switching element T5 is turned off, and the sixth switching element T6 is turned on. Accordingly, the voltage compensation circuit 120 will be turned off.

Please refer to Figures 4B and 5E, during the light-emitting period P3, The drive transistor Td is turned on, the control switch Tc is turned on, the first switching element T1 is turned off, the second switching element T2 is turned off, the third switching element T3 is turned on, the fourth switching element T4 is turned on, the fifth switching element T5 is turned off, and the The six switching element T6 is turned off. At this time, the driving circuit 110 can generate a driving current I1 to drive the light emitting element L.

Similar to the foregoing embodiment, during the light-emitting period P3, the first switching element T1 and the second switching element T2 are both off, but the current may still pass through the transistor itself, causing the voltage on the first node N1 to follow the first The leakage path Rc1 formed by the switching element T1 drops. Since the voltage of the driving power supply Vdd is greater than the voltage of the first node N1, the driving power supply Vdd can still perform voltage compensation on the first node N1 through the leakage compensation path Rc2 formed by the second switching element T2, and solve the problem of the voltage on the first node N1. Stability issues.

Please refer to FIGS. 6A and 6B. FIG. 6A is a simulation diagram of the voltage change on the first node N1 when the pixel circuit 200 is operating. The horizontal axis is time and the vertical axis is voltage. It can be seen from the diagram that when the operating time is 70-120 microseconds (corresponding to the light-emitting period P3), the voltage on the first node N1 does not significantly decrease due to the leakage phenomenon. In Fig. 6A, the curve B1 shows the embodiment when the threshold voltage is +0.5V, the curve B2 shows the embodiment when the threshold voltage is zero, and the curve B3 shows the embodiment when the threshold voltage is -0.5V. FIG. 6B is a schematic diagram of the current error rate (Current Error Rate) of the light-emitting element L under different data signals Vdata of the pixel circuit 100. The horizontal axis is the data signal Vdata, and the vertical axis is the current abnormality rate. It can be seen from the figure that the circuit proposed in the present disclosure can effectively compensate the threshold voltage variation of the driving transistor Td, and the current error rate (Current Error Rate) is maintained within 5%.

The various elements, method steps or techniques in the foregoing embodiments The technical features can be combined with each other, and are not limited to the order of text description or the order of presentation of diagrams in this disclosure.

Although the content of the present invention has been disclosed in the above embodiments, it is not intended to limit the content of the present invention. Anyone who is familiar with the art can make various changes and modifications without departing from the spirit and scope of the content of the present invention. Therefore, the present invention The scope of protection of the content shall be subject to the scope of the attached patent application.

100‧‧‧Pixel circuit

110‧‧‧Drive circuit

120‧‧‧Voltage compensation circuit

130‧‧‧Leakage compensation circuit

Td‧‧‧Control switch

T1‧‧‧First switching element

T2‧‧‧Second switching element

T3‧‧‧Third switching element

T4‧‧‧Fourth switching element

T5‧‧‧Fifth switching element

T6‧‧‧Sixth switching element

S(n)‧‧‧Control signal

S(n+1)‧‧‧Control signal

S(n-1)‧‧‧Control signal

EM‧‧‧Control signal

N1‧‧‧First node

N2‧‧‧Second node

N3‧‧‧The third node

N4‧‧‧The fourth node

L‧‧‧Light-emitting element

C‧‧‧Energy storage element

Vdd‧‧‧Drive power

Vc‧‧‧Drive power

Vdata‧‧‧Data signal

Vref‧‧‧Reference power supply

Claims (15)

A pixel circuit, comprising: a driving circuit electrically connected to a driving power supply and a light emitting element, the driving circuit being used for turning on in response to a voltage of a first node to output a driving current to drive the light emitting element; A voltage compensation circuit is electrically connected between the first node and the light-emitting element, so that when the driving circuit receives a data signal, the voltage compensation circuit is set at the first node according to a threshold voltage value of the driving circuit A compensation voltage signal is generated on the upper side; and a leakage compensation circuit is electrically connected between the driving power supply and the first node, so that when the driving circuit outputs the driving current, the driving power supplies the first node through the leakage compensation circuit One node provides a leakage current to compensate the voltage of the first node. The pixel circuit according to claim 1, wherein the voltage compensation circuit includes a first switching element, the leakage compensation circuit includes a second switching element; when the driving circuit outputs the driving current, the first switching element and The second switching elements are all turned off. The pixel circuit according to claim 2, wherein when the driving circuit receives the data signal, the first switching element is turned on and the second switching element is turned off, so that the voltage compensation circuit receives the data signal through the first switching element Compensation voltage signal. The pixel circuit according to claim 3, wherein the driving circuit includes: a driving transistor to be turned on in response to the voltage of the first node; a third switching element electrically connected to the driving transistor and Between the light-emitting elements; and a fourth switch element, electrically connected between the driving transistor and the driving power supply. The pixel circuit according to claim 4, wherein during a reset period, the driving transistor is turned off, the first switching element is turned off, the second switching element is turned on, the third switching element is turned on, and the fourth switching element is turned on. The switching element is turned on, so that the first node is turned on to the driving power source. The pixel circuit according to claim 5, further comprising: a fifth switch element electrically connected to the third switch element and a reference power source, wherein after the first node is turned on to the driving power source, the fifth switch element The switching element is turned on, so that the third switching element is turned on to the reference power source through the fifth switching element. The pixel circuit of claim 6, further comprising: a sixth switching element electrically connected to a second node between the fourth switching element and the driving transistor, wherein the third switching element transmits After the fifth switching element is turned on to the reference power supply, the driving transistor is turned off, the first switching element is turned on, the second switching element is turned off, and the third switching element is turned off. Off, the fourth switching element is off, the fifth switching element is on, and the sixth switching element is on, so that the second node is discharged to the reference power source through the sixth switching element, and the first node is passed through the first The switching element and the fifth switching element are discharged to the reference power source. The pixel circuit according to claim 2, further comprising: a control switch electrically connected between the driving power supply and the second switching element, wherein when the driving circuit receives the data signal, the first switching element Turning on, the second switching element is turned off, and the control switch is turned off, so that the voltage compensation circuit receives the compensation voltage signal through the first switching element. The pixel circuit according to claim 8, wherein the driving circuit includes: a driving transistor to be turned on in response to the voltage of the first node; a third switching element electrically connected to the driving transistor and Between the light-emitting elements L; and a fourth switch element, electrically connected between the driving transistor and the driving power supply. The pixel circuit according to claim 9, wherein the driving transistor is turned off, the control switch is turned on, the first switching element is turned off, the second switching element is turned on, and the third switching element is turned off during a reset period. When turned on, the fourth switch element is turned on, so that the first node is turned on to the driving power source. The pixel circuit of claim 10, further comprising: a fifth switching element electrically connected to the third switching element and a reference power source, wherein during the reset period, the fifth switching element is turned on, so that the The third switching element is turned on to the reference power supply through the fifth switching element. The pixel circuit according to claim 11, wherein after the first node is turned on to the driving power source, the driving transistor is turned on, the control switch is turned off, the first switching element is turned on, and the second switching element is turned on, The third switching element is turned off, the fourth switching element is turned off, and the fifth switching element is turned on, so that the first node is turned on to the reference power source through the first switching element and the fifth switching element. The pixel circuit according to claim 12, further comprising: a sixth switching element electrically connected to a second node between the fourth switching element and the driving transistor, wherein during a data writing period , The driving transistor is turned on, the control switch is turned off, the first switching element is turned on, the second switching element is turned off, the third switching element is turned off, the fourth switching element is turned off, and the fifth switching element is turned off When off, the sixth switching element is turned on, so that the first node receives the compensation voltage signal through the first switching element, the driving transistor, and the sixth switching element. The pixel circuit according to claim 13, wherein after the driving circuit receives the data signal, the driving transistor is turned on, the control switch is turned off, the first switching element is turned off, the second switching element is turned off, The third The switching element is turned off, the fourth switching element is turned off, the fifth switching element is turned off, and the sixth switching element is turned on. The pixel circuit according to claim 2, further comprising: an energy storage element, electrically connected between the first node and the driving power source, and connected in parallel with the leakage compensation circuit.

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