TWI694292B - Display panel - Google Patents
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- TWI694292B TWI694292B TW108107112A TW108107112A TWI694292B TW I694292 B TWI694292 B TW I694292B TW 108107112 A TW108107112 A TW 108107112A TW 108107112 A TW108107112 A TW 108107112A TW I694292 B TWI694292 B TW I694292B
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- 239000000758 substrate Substances 0.000 claims abstract description 66
- 239000002184 metal Substances 0.000 claims abstract description 47
- 239000010410 layer Substances 0.000 claims description 87
- 239000011241 protective layer Substances 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 15
- 239000012212 insulator Substances 0.000 abstract 3
- 239000011347 resin Substances 0.000 description 10
- 229920005989 resin Polymers 0.000 description 10
- 229910010272 inorganic material Inorganic materials 0.000 description 7
- 239000011147 inorganic material Substances 0.000 description 7
- 239000011368 organic material Substances 0.000 description 6
- 230000001154 acute effect Effects 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 239000002861 polymer material Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
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- 238000009832 plasma treatment Methods 0.000 description 1
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- 238000002834 transmittance Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
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- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract
Description
本揭露是關於一種顯示面板。 This disclosure is about a display panel.
由於液晶顯示器具有小體積、低輻射等優點,所以液晶顯示器成為市場上最常見的顯示器。除去被黑色矩陣遮蔽的不透光區域,每個畫素區域的透光區域,即為顯示面板的開口率,開口率越大,顯示面板的光穿透率越好,整體畫面越亮,功耗越低。 The liquid crystal display has become the most common display on the market due to its advantages of small size and low radiation. Excluding the opaque areas blocked by the black matrix, the transparent area of each pixel area is the aperture ratio of the display panel. The larger the aperture ratio, the better the light transmittance of the display panel and the brighter the overall picture. The lower the consumption.
在畫素結構中,當畫素電極與資料線過於接近時,畫素電極與資料線間的雜散電容Cpd(capacitance between pixel and data line)會變大,導致畫素電極的電壓在多晶矽薄膜電晶體關閉期間,會受到資料線所傳送之訊號的影響,而產生所謂的串音效應(cross talk),進而影響液晶顯示面板的顯示品質。為降低上述畫素結構之串音效應,同時使畫素結構的開口率維持在一定程度,已有許多畫素結構相繼被提出。 In the pixel structure, when the pixel electrode and the data line are too close, the stray capacitance Cpd (capacitance between pixel and data line) between the pixel electrode and the data line will increase, resulting in the voltage of the pixel electrode in the polysilicon film When the transistor is turned off, it will be affected by the signal transmitted by the data line, and a so-called cross talk will be generated, which will affect the display quality of the liquid crystal display panel. In order to reduce the crosstalk effect of the above pixel structure and maintain the aperture ratio of the pixel structure to a certain degree, many pixel structures have been proposed one after another.
本揭露之實施例提供一種顯示面板,藉由設計通 道層具有主體部與分支部以及設計第一閘極具有第一部分與第二部分,可以使屏蔽金屬在第一基板的垂直投影重疊於遮光圖案在第一基板的垂直投影,而免於配置額外的遮光圖案來遮蔽屏蔽金屬,而提升了開口率。 The embodiment of the present disclosure provides a display panel The track layer has a main body portion and a branch portion and the first gate is designed to have a first portion and a second portion, so that the vertical projection of the shielding metal on the first substrate overlaps the vertical projection of the shading pattern on the first substrate without additional configuration The shading pattern to shield the shielding metal, and improve the aperture ratio.
於一實施例中,一種顯示面板包含第一基板與複數畫素單元。畫素單元設置於第一基板上,每一畫素單元包含通道層、絕緣層、第一圖案化金屬層以及畫素電極。通道層設置第一基板上,通道層具有一主體部與連接主體部的至少一分支部,主體部沿第一方向延伸,主體部與分支部夾第一角度。絕緣層覆蓋通道層。第一圖案化金屬層設置於絕緣層上,並包含掃描線與連接掃描線的第一閘極,掃描線沿第二方向延伸,第一閘極與掃描線夾二角度,第一閘極在第一基板的垂直投影位於掃描線在第一基板的垂直投影與分支部在第一基板的垂直投影之間,第一方向垂直於第二方向。畫素電極與通道層電性連接。 In one embodiment, a display panel includes a first substrate and a plurality of pixel units. The pixel unit is disposed on the first substrate, and each pixel unit includes a channel layer, an insulating layer, a first patterned metal layer, and a pixel electrode. The channel layer is disposed on the first substrate. The channel layer has a body portion and at least one branch portion connecting the body portion. The body portion extends along the first direction, and the body portion and the branch portion are at a first angle. The insulating layer covers the channel layer. The first patterned metal layer is disposed on the insulating layer and includes a scan line and a first gate electrode connected to the scan line. The scan line extends along the second direction. The first gate electrode and the scan line are at two angles. The vertical projection of the first substrate is between the vertical projection of the scan line on the first substrate and the vertical projection of the branch portion on the first substrate, and the first direction is perpendicular to the second direction. The pixel electrode is electrically connected to the channel layer.
10、10a‧‧‧顯示面板 10.10a‧‧‧Display panel
100‧‧‧第一基板 100‧‧‧The first substrate
102‧‧‧畫素單元 102‧‧‧Pixel unit
104、104A‧‧‧通道層 104, 104A‧‧‧channel layer
1040‧‧‧主體部 1040‧‧‧Main part
1042‧‧‧分支部 1042‧‧‧ Branch
106‧‧‧畫素電極 106‧‧‧Pixel electrode
108‧‧‧絕緣層 108‧‧‧Insulation
110‧‧‧掃描線 110‧‧‧scan line
112‧‧‧第一閘極 112‧‧‧ First gate
1120‧‧‧第一部分 1120‧‧‧Part 1
1122‧‧‧第二部分 1122‧‧‧Part 2
114、114a‧‧‧第二閘極 114、114a‧‧‧Second gate
1140‧‧‧第三部分 1140‧‧‧Part III
1142‧‧‧第四部分 1142‧‧‧Part 4
116‧‧‧資料線 116‧‧‧Data cable
118‧‧‧源極 118‧‧‧Source
120‧‧‧汲極 120‧‧‧ Jiji
122‧‧‧第二基板 122‧‧‧Second substrate
124‧‧‧遮光圖案 124‧‧‧shading pattern
126‧‧‧第一保護層 126‧‧‧The first protective layer
128‧‧‧彩色濾光單元 128‧‧‧Color filter unit
130‧‧‧顯示介質層 130‧‧‧Display medium layer
132‧‧‧平坦層 132‧‧‧flat layer
134‧‧‧第二保護層 134‧‧‧Second protective layer
136‧‧‧共用電極 136‧‧‧Common electrode
138‧‧‧第三保護層 138‧‧‧The third protective layer
140、140a‧‧‧屏蔽金屬 140, 140a‧‧‧shield metal
D1‧‧‧第一方向 D1‧‧‧First direction
D2‧‧‧第二方向 D2‧‧‧Second direction
M1‧‧‧第一圖案化金屬層 M1‧‧‧ First patterned metal layer
M2‧‧‧第二圖案化金屬層 M2‧‧‧Second patterned metal layer
S1、S2‧‧‧距離 S1, S2‧‧‧Distance
TH1、TH2、TH3‧‧‧接觸洞 TH1, TH2, TH3 ‧‧‧ contact hole
α1‧‧‧第一角度 α1‧‧‧First angle
α2‧‧‧第二角度 α2‧‧‧Second Angle
α3‧‧‧第三角度 α3‧‧‧ Third angle
α4‧‧‧第四角度 α4‧‧‧The fourth angle
α5‧‧‧第五角度 α5‧‧‧The fifth angle
A-A’‧‧‧線段 A-A’‧‧‧ line
閱讀以下詳細敘述並搭配對應之圖式,可了解本揭露之多個樣態。需留意的是,圖式中的多個特徵並未依照該業界領域之標準作法繪製實際比例。事實上,所述之特徵的尺寸可以任意的增加或減少以利於討論的清晰性。 Read the following detailed description and the corresponding diagrams to understand the various aspects of this disclosure. It should be noted that many features in the drawings are not drawn according to the standard practice in the industry. In fact, the size of the features described can be arbitrarily increased or decreased to facilitate clarity of the discussion.
第1圖為根據一實施例之顯示面板之俯視圖;第2圖為第1圖之區域R的放大圖;第3圖為沿第2圖的線段A-A’的剖面示意圖;以及 第4圖為根據另一實施例之顯示面板的放大俯視圖。 Figure 1 is a top view of a display panel according to an embodiment; Figure 2 is an enlarged view of the area R of Figure 1; Figure 3 is a schematic cross-sectional view taken along line A-A' of Figure 2; and FIG. 4 is an enlarged plan view of a display panel according to another embodiment.
以下將以圖式及詳細說明清楚說明本揭露之精神,任何所屬技術領域中具有通常知識者在瞭解本揭露之實施例後,當可由本揭露所教示之技術,加以改變及修飾,其並不脫離本揭露之精神與範圍。舉例而言,敘述「第一特徵形成於第二特徵上方或上」,於實施例中將包含第一特徵及第二特徵具有直接接觸;且也將包含第一特徵和第二特徵為非直接接觸,具有額外的特徵形成於第一特徵和第二特徵之間。此外,本揭露在多個範例中將重複使用元件標號以和/或文字。重複的目的在於簡化與釐清,而其本身並不會決定多個實施例以和/或所討論的配置之間的關係。 The spirit of the present disclosure will be clearly explained in the following figures and detailed descriptions. Any person with ordinary knowledge in the technical field who understands the embodiments of the present disclosure may be changed and modified by the techniques taught in the present disclosure. Depart from the spirit and scope of this disclosure. For example, describing "the first feature is formed on or above the second feature", in the embodiment will include the first feature and the second feature have direct contact; and will also include the first feature and the second feature are indirect Contact, with additional features formed between the first feature and the second feature. In addition, in the present disclosure, element labels and/or words will be reused in multiple examples. The purpose of repetition is to simplify and clarify, and it does not itself determine the relationship between multiple embodiments and/or the configurations in question.
此外,方位相對詞彙,如「在...之下」、「下面」、「下」、「上方」或「上」或類似詞彙,在本文中為用來便於描述繪示於圖式中的一個元件或特徵至另外的元件或特徵之關係。方位相對詞彙除了用來描述裝置在圖式中的方位外,其包含裝置於使用或操作下之不同的方位。當裝置被另外設置(旋轉90度或者其他面向的方位),本文所用的方位相對詞彙同樣可以相應地進行解釋。 In addition, relative words such as "below", "below", "below", "above" or "upper" or similar words are used in this text to facilitate description and are shown in the drawings The relationship from one element or feature to another. In addition to describing the orientation of the device in the drawings, the relative term of orientation includes the different orientation of the device under use or operation. When the device is set separately (rotated 90 degrees or other facing orientation), the relative vocabulary of orientation used in this article can also be interpreted accordingly.
第1圖為根據一實施例之顯示面板10之俯視圖。參照第1圖,顯示面板10包含第一基板100與複數畫素單元102。畫素單元102設置於第一基板100上,為了方便說明,第1圖中繪示了第一方向D1與第二方向D2,且第一方向D1與第
二方向D2相異,例如第一方向D1與第二方向D2分別為第1圖的縱向方向與橫向方向,且其彼此呈正交關係。第一基板100可以是透光基板,例如像是玻璃基板。畫素單元102包括通道層104、第一圖案化金屬層M1、第二圖案化金屬層M2以及畫素電極106。
FIG. 1 is a top view of a
第2圖為第1圖之區域R的放大圖。第3圖為沿第2圖的線段A-A’的剖面示意圖。為了方便說明,畫素電極106在第2圖中省略。參照第2圖及第3圖,畫素單元102更包含絕緣層108。通道層104、絕緣層108、第一圖案化金屬層M1、第二圖案化金屬層M2以及畫素電極106設置於第一基板100上。絕緣層108覆蓋通道層104。第一圖案化金屬層M1設置於絕緣層108上。通道層104具有主體部1040與連接主體部1040的至少一分支部1042,主體部1040沿第一方向D1延伸,主體部1040與分支部1042夾第一角度α1。於本實施例中,第一角度α1為直角,換句話說,主體部1040實質上垂直於分支部1042。於其他實施例中,第一角度α1可為銳角或鈍角,也就是說,主體部1040不垂直於分支部1042。於本實施例中,通道層104的分支部1042的數量為一。於其他實施例中,分支部1042數量可大於一。通道層104的材料可包含多晶材料,例如多晶矽材料,或是金屬氧化物或類似物,且通道層104可藉由進行擴散、離子佈植、電漿處理或是其他合適製程,來改變其部分區域的導電性,以定義出導體區及半導體區。絕緣層108的材料可包含無機材料(例如:氧化矽、氮化矽、氮氧化矽、其它合適的材料、或上述之組合)。
Figure 2 is an enlarged view of the area R of Figure 1. Fig. 3 is a schematic cross-sectional view taken along line A-A' of Fig. 2. For convenience of explanation, the
第一圖案化金屬層M1包括掃描線110與連接掃描線110的第一閘極112,掃描線110沿第二方向D2延伸,第一閘極112包含第一部分1120與第二部分1122,第二部分1122與第一部分1120連接,第一部分1120沿第一方向D1延伸,第二部分1122沿第二方向D2延伸,第二部分1122與掃描線110沿第一方向D1的距離S1介於約1微米至約10微米之間,第一閘極112的第一部分1120與掃描線110夾第二角度α2,第一閘極112在第一基板100的垂直投影位於掃描線110在第一基板100的垂直投影與通道層104的分支部1042在第一基板100的垂直投影之間。於本實施例中,第二角度α2為直角,換句話說,掃描線110實質上垂直於第一閘極112的第一部分1120。於其他實施例中,第二角度α2可為銳角或鈍角,也就是說,掃描線110不垂直於第一閘極112。
The first patterned metal layer M1 includes a
第二部分1122與第一部分1120夾第三角度α3。於本實施例中,第三角度α3為直角,換句話說,第一部分1120實質上垂直於第二部分1122。於其他實施例中,第三角度α3可為銳角或鈍角,也就是說,第一部分1120不垂直於第二部分1122。
The
第一圖案化金屬層M1更包括第二閘極114,第二閘極114電性連接於相鄰另一畫素單元的通道層104A。第二閘極114包含第三部分1140與第四部分1142,第四部分1142與第三部分1140連接,第三部分1140沿第一方向D1延伸,第四部分1142沿第二方向D2延伸,第四部分1142與掃描線110沿第一方向D1的距離S2介於約1微米至約10微米之間。第二閘極114
的第三部分1140與掃描線110夾第四角度α4。於本實施例中,第四角度α4為直角,換句話說,第二閘極114的第三部分1140實質上垂直於掃描線110。於其他實施例中,第四角度α4可為銳角或鈍角,也就是說,第二閘極114的第三部分1140不垂直於掃描線110。於本實施例中,第一閘極112與第二閘極114位於掃描線110的相異側,換句話說,掃描線110位於第一閘極112與第二閘極114之間。於本實施例中,第一閘極112與第二閘極114位於掃描線110的一對角線上。
The first patterned metal layer M1 further includes a
第四部分1142與第三部分1140夾第五角度α5。於本實施例中,第五角度α5為直角,換句話說,第三部分1140實質上垂直於第四部分1142。於其他實施例中,第五角度α5可為銳角或鈍角,也就是說,第三部分1140不垂直於第四部分1142。於一實施例中,第一閘極112的第一部分1120與第二部分1122分別平行於第二閘極114的第三部分1140與第四部分1142。
The
第二圖案化金屬層M2設置於第一圖案化金屬層M1上方,並包含資料線116、源極118與汲極120,源極118與汲極120分別與通道層104電性連接,且汲極120與資料線116與源極118沿第二方向D2間隔開,且汲極120與源極118亦沿第一方向D1間隔開。
The second patterned metal layer M2 is disposed above the first patterned metal layer M1 and includes a
顯示面板10更包括第二基板122、遮光圖案124、第一保護層126、彩色濾光單元128以及顯示介質層130,第二基板122設置於第一基板100的對向。顯示介質層130位於第一基板100與第二基板122之間。遮光圖案124設置於第二基板
122上,且位於第二基板122和顯示介質層130之間。第二圖案化金屬層M2設置於第一保護層126上方。遮光圖案124遮蔽相鄰之多個畫素單元102之多個畫素電極106之間的間隙,例如,遮光圖案124可遮蔽掃描線110、第一閘極112、汲極120與資料線116。於其他實施例中,顯示面板10還可包括其他遮光圖案遮蔽源極118。並且,配置於另一畫素單元102的遮光圖案124可遮蔽第二閘極114。第一保護層126設置於第一圖案化金屬層M1上,具體而言,第一保護層126位於第一圖案化金屬層M1與第二圖案化金屬層M2之間,以使兩者電性絕緣。第一保護層126的材質可為無機材料、有機材料或其組合,無機材料例如是氧化矽、氮化矽、氮氧化矽、或上述至少二種材料的堆疊層。有機材料例如是聚醯亞胺系樹脂、環氧系樹脂或壓克力系樹脂等高分子材料。
The
在本實施例中,顯示介質層130例如為液晶。但本揭露不限於此,在其他實施例中,顯示介質層130也可為有機發光二極體(organic light-emitting diode,OLED)或其他適當材料。在本實施例中,遮光圖案124的材質可為遮光材料,例如:黑色樹脂或金屬。值得說明的是第一基板100另包括配向膜(未繪示),且第二基板122也另包括配向膜(未繪示)等液晶顯示面板10之必要元件,為本領域具通常知識者所熟知,故在此不多加贅述其作用及製作方式。
In this embodiment, the
在本實施例中,為了使顯示介質層130能夠在具有良好平坦度的表面形成,顯示面板10可更包括配置於彩色濾光單元128與顯示介質層130之間的平坦層132。平坦層132的
材質可為無機材料、有機材料或其組合,無機材料例如是氧化矽、氮化矽、氮氧化矽、或上述至少二種材料的堆疊層。有機材料例如是聚醯亞胺系樹脂、環氧系樹脂或壓克力系樹脂等高分子材料。
In this embodiment, in order to enable the
畫素單元102還包括第二保護層134、共用電極136與第三保護層138。第二保護層134位於第二圖案化金屬層M2上,接觸洞TH1貫穿第二保護層134,共用電極136配置於第二保護層134上,第三保護層138配置於第二保護層134與共用電極136上,接觸洞TH2貫穿第三保護層138,畫素電極106配置於第三保護層138上,並透過接觸洞TH2與汲極120電性連接。源極118透過接觸洞TH3與通道層104(例如:主體部1040)電性連接。
The
第二保護層134可以提供保護與平坦化下方疊層的功能,舉例而言,第二保護層134可以保護與平坦化第二圖案化金屬層M2(例如源極118、汲極120與資料線116),第三保護層138可以保護與平坦化共用電極136。第二與第三保護層134、138的材質可為無機材料、有機材料或其組合,無機材料例如是氧化矽、氮化矽、氮氧化矽、或上述至少二種材料的堆疊層。有機材料例如是聚醯亞胺系樹脂、環氧系樹脂或壓克力系樹脂等高分子材料。
The second protection layer 134 can provide the function of protecting and planarizing the underlying stack. For example, the second protection layer 134 can protect and planarize the second patterned metal layer M2 (such as the
共用電極136與畫素電極106之間的電位差能驅動顯示介質層130的液晶分子,進而使顯示面板10顯示畫面。在本實施例中,共用電極136與畫素電極106配置於同一基板(即第一基板100)上。
The potential difference between the
顯示面板10還包括屏蔽金屬(Shielding metal;SM)140,屏蔽金屬140設置於第一基板100上並形成於通道層104所對應的區域,具體而言,屏蔽金屬140位於第一基板100與通道層104之間,換句話說,屏蔽金屬140在第一基板100的垂直投影重疊於通道層104的主體部1040在第一基板100的垂直投影,亦重疊於資料線116在第一基板100的垂直投影,屏蔽金屬140為不透明,其作用為遮蔽光線。舉例而言,可以阻擋來自第一基板100下方的光線(例如:背光模組)及來自側面及上方的反射光線入射到形成在資料線116下方的通道層104的主體部1040,避免通道層104的主體部1040照光所引發的光漏電,有效提升電晶體的元件穩定性與畫面顯示品質。
The
屏蔽金屬140在第一基板100的垂直投影重疊於遮光圖案124在第一基板100的垂直投影。於一實施例中,屏蔽金屬140在第一基板100的垂直投影面積完全落在遮光圖案124在第一基板100的垂直投影面積之內。由於遮光圖案124為不透光區域,屏蔽金屬140是設計在遮光圖案124正下方(例如:屏蔽金屬140在第一基板100的垂直投影重疊於遮光圖案124在第一基板100的垂直投影),因此不會影響開口率。詳細而言,藉由設計通道層104具有主體部1040與分支部1042,以及第一閘極112具有第一部分1120與第二部分1122,可使屏蔽金屬140的位置落在遮光圖案124正下方,也就是說,使屏蔽金屬140在第一基板100的垂直投影重疊於遮光圖案124在第一基板100的垂直投影,如此一來,由於可藉由現有的遮光圖案124遮蔽屏蔽電極,故無須設計額外的遮光圖案124於屏蔽電極
上,使顯示面板10的開口率不受到屏蔽電極的限制,換句話說,在不降低顯示面板10的開口率的前提下,可利用屏蔽電極使通道層104的主體部1040免於受到照而引發光漏電,而有效提升電晶體的元件穩定性與畫面顯示品質。也可以說,因為無須設計額外的遮光圖案124於屏蔽電極上,因此,可以增加顯示面板10的開口率。
The vertical projection of the shielding
由於第二閘極114與第一閘極112分別位於掃描線110的相異側,因此,畫素單元102的屏蔽電極以及配置於相鄰另一畫素單元102的屏蔽電極亦位於掃描線110的相異側。
Since the
第4圖為根據另一實施例之顯示面板10a的放大俯視圖。為了方便說明,畫素電極106在第4圖中省略。第4圖與第2圖之差異在於第二閘極114a相對於第一閘極112的位置。具體而言,第一閘極112與第二閘極114a位於掃描線110的相同側。遮光圖案124a同時遮蔽第一閘極112與第二閘極114。
FIG. 4 is an enlarged plan view of a
以上概述數個實施方式或實施例的特徵,使所屬領域中具有通常知識者可以從各個方面更加瞭解本揭露。本技術領域中具有通常知識者應可理解,且可輕易地以本揭露為基礎來設計或修飾其他製程及結構,並以此達到相同的目的及/或達到在此介紹的實施方式或實施例相同之優點。本技術領域中具有通常知識者也應了解這些相等的結構並未背離本揭露的揭露精神與範圍。在不背離本揭露的精神與範圍之前提下,可對本揭露進行各種改變、置換或修改。 The above summarizes the features of several embodiments or examples, so that those with ordinary knowledge in the art can understand the disclosure from various aspects. Those with ordinary knowledge in this technical field should understand and can easily design or modify other processes and structures based on this disclosure to achieve the same purpose and/or to achieve the embodiments or examples described herein The same advantages. Those of ordinary skill in the art should also understand that these equivalent structures do not deviate from the disclosure spirit and scope of this disclosure. It is possible to make various changes, replacements or modifications to this disclosure without departing from the spirit and scope of this disclosure.
10‧‧‧顯示面板 10‧‧‧Display panel
102‧‧‧畫素單元 102‧‧‧Pixel unit
104、104A‧‧‧通道層 104, 104A‧‧‧channel layer
1040‧‧‧主體部 1040‧‧‧Main part
1042‧‧‧分支部 1042‧‧‧ Branch
110‧‧‧掃描線 110‧‧‧scan line
112‧‧‧第一閘極 112‧‧‧ First gate
1120‧‧‧第一部分 1120‧‧‧Part 1
1122‧‧‧第二部分 1122‧‧‧Part 2
114‧‧‧第二閘極 114‧‧‧The second gate
1140‧‧‧第三部分 1140‧‧‧Part III
1142‧‧‧第四部分 1142‧‧‧Part 4
116‧‧‧資料線 116‧‧‧Data cable
118‧‧‧源極 118‧‧‧Source
120‧‧‧汲極 120‧‧‧ Jiji
124‧‧‧遮光圖案 124‧‧‧shading pattern
140‧‧‧屏蔽金屬 140‧‧‧shield metal
D1‧‧‧第一方向 D1‧‧‧First direction
D2‧‧‧第二方向 D2‧‧‧Second direction
M1‧‧‧第一圖案化金屬層 M1‧‧‧ First patterned metal layer
M2‧‧‧第二圖案化金屬層 M2‧‧‧Second patterned metal layer
R‧‧‧區域 R‧‧‧Region
S1、S2‧‧‧距離 S1, S2‧‧‧Distance
TH2、TH3‧‧‧接觸洞 TH2, TH3‧‧‧contact hole
α1‧‧‧第一角度 α1‧‧‧First angle
α2‧‧‧第二角度 α2‧‧‧Second Angle
α3‧‧‧第三角度 α3‧‧‧ Third angle
α4‧‧‧第四角度 α4‧‧‧The fourth angle
α5‧‧‧第五角度 α5‧‧‧The fifth angle
A-A’‧‧‧線段 A-A’‧‧‧ line
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