CN212569365U - Semiconductor device with a plurality of transistors - Google Patents

Abstract

The utility model provides a semiconductor device, on its substrate, many scanning lines (11) extend in the first direction parallel to each other, many signal lines (12) extend in the second direction as the direction that intersects with above-mentioned first direction parallel to each other, dispose first electrode (115) in the region that is enclosed by above-mentioned scanning lines (11) and above-mentioned signal lines (12), above-mentioned first electrode (115) is controlled through the structure that forms by connecting in series the first TFT that constitutes by first oxide semiconductor (103) and the second TFT that constitutes by second oxide semiconductor (103), above-mentioned first oxide semiconductor (103) and above-mentioned second oxide semiconductor (103) are disposed apart from the interval. According to the present invention, in a semiconductor device using a TFT based on an oxide semiconductor, it is possible to prevent the TFT from being turned on poorly due to the influence of impurities and the like.

Description

Semiconductor device with a plurality of transistors

Technical Field

The present invention relates to a semiconductor device including a display device, a photosensor device, and the like, using a TFT of an oxide semiconductor.

Background

A TFT (thin Film transistor) using an oxide semiconductor can have a higher off resistance than a TFT using Poly-Silicon (Poly-Silicon) and a higher mobility than a TFT using a-Si (Amorphous Silicon), and thus can be used for a display device such as a liquid crystal display device or an organic EL display device, or a semiconductor device such as a sensor.

For example, in a display device, when a defect occurs in a TFT, a bright point or a black point is generated, and in some cases, a linear bright line or a linear black line is generated, which causes the display device to be in a defective state. To prevent this, it is considered to form a plurality of TFTs. Patent document 1 describes: in a thin film transistor substrate using a TFT using a-Si as a switching TFT of a pixel, a plurality of switching TFTs are formed in each pixel in order to prevent pixel defects caused by TFT defects.

In the organic EL display device, a switching TFT and a driving TFT are configured in 1 pixel. Patent documents 2 and 3 describe: in 1 pixel, an oxide semiconductor is used for a switching TFT, and polysilicon is used for a driving TFT.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open No. S64-50028.

Patent document 2: japanese patent laid-open publication No. 2015-225104.

Patent document 3: japanese patent laid-open No. 2017-536646.

In a TFT using an oxide semiconductor, when oxygen is desorbed from the oxide semiconductor in a channel portion, metallization occurs, and the TFT is turned on. The phenomenon of oxygen element detachment from the oxide semiconductor occurs when there are particles of impurities such as metal in the vicinity of the TFT.

In addition, the influence of the impurity sometimes has a property of propagating the oxide semiconductor. In this case, if the impurity is not present in the channel portion, that is, in the drain region and the source region, the channel is also metalized. This is different from the defect caused by impurities in the conventional TFT.

Note that the TFT using an oxide semiconductor can be used as a switching TFT or a control TFT of a semiconductor device such as a sensor in addition to a display device, but the same phenomenon as that of the display device described above occurs in this case.

SUMMERY OF THE UTILITY MODEL

The present invention is directed to prevent a pixel defect or an element defect caused by an oxide semiconductor from occurring due to a TFT when the oxide semiconductor is used for a TFT in a display device or another semiconductor device.

The present invention overcomes the above problems, and has the following specific technical means.

(1) A semiconductor device includes a substrate, a plurality of scanning lines extending in parallel to each other in a first direction, a plurality of signal lines extending in parallel to each other in a second direction that is a direction intersecting the first direction, and a first electrode disposed in a region surrounded by the scanning lines and the signal lines, the first electrode being controlled by a structure in which a first TFT formed of a first oxide semiconductor and a second TFT formed of a second oxide semiconductor are connected in series, the first oxide semiconductor and the second oxide semiconductor being disposed at an interval.

(2) A semiconductor device includes a substrate, a plurality of scan lines extending in parallel to each other in a first direction, a plurality of signal lines extending in parallel to each other in a second direction which is a direction intersecting the first direction, and a first electrode disposed in a region surrounded by the scan lines and the signal lines, the first electrode being controlled by a structure in which a first TFT made of polycrystalline silicon and a second TFT made of an oxide semiconductor are connected in series.

According to the present invention, when an oxide semiconductor is used for a TFT in a display device or another semiconductor device, a pixel defect or an element defect due to the TFT caused by the oxide semiconductor being turned on can be prevented.

Drawings

Fig. 1 is a plan view of a liquid crystal display device.

Fig. 2 is a plan view of a display area of the liquid crystal display device.

Fig. 3 is a cross-sectional view of a display region of the liquid crystal display device.

Fig. 4 is a plan view showing a problem point of a TFT using an oxide semiconductor.

Fig. 5 is a plan view showing the structure of example 1.

Fig. 6 is an equivalent circuit of embodiment 1.

FIG. 7 is a plan view showing the operation of example 1.

Fig. 8 is an equivalent circuit of fig. 7.

Fig. 9 is a plan view showing another embodiment of example 1.

FIG. 10 is a plan view showing still another embodiment of example 1.

FIG. 11 is a plan view showing still another embodiment of example 1.

FIG. 12 is a sectional view of embodiment 1.

Fig. 13 is a plan view corresponding to fig. 12.

Fig. 14 is a sectional view showing a second embodiment of example 1.

Fig. 15 is a plan view corresponding to fig. 14.

FIG. 16 is a sectional view showing a third embodiment of example 1.

Fig. 17 is a plan view corresponding to fig. 16.

Fig. 18 is an equivalent circuit of embodiment 2.

FIG. 19 is a sectional view showing an example of embodiment 2.

Fig. 20 is a plan view corresponding to fig. 19.

Fig. 21 is an equivalent circuit of embodiment 3.

FIG. 22 is a sectional view showing a first embodiment of example 3.

Fig. 23 is a plan view corresponding to fig. 22.

FIG. 24 is a sectional view showing a second embodiment of example 3.

Fig. 25 is a plan view corresponding to fig. 24.

FIG. 26 is a sectional view showing a second embodiment of example 3.

Fig. 27 is a plan view corresponding to fig. 26.

Fig. 28 is an equivalent circuit of embodiment 4.

Fig. 29 is a sectional view showing a first embodiment of example 4.

Fig. 30 is a plan view corresponding to fig. 29.

FIG. 31 is a sectional view showing a second embodiment of example 4.

Fig. 32 is a plan view corresponding to fig. 31.

FIG. 33 is a sectional view showing a third mode of example 4.

Fig. 34 is a plan view corresponding to fig. 33.

Fig. 35 is an equivalent circuit of a pixel of the organic EL display device.

Fig. 36 is an equivalent circuit showing a first embodiment of example 5.

Fig. 37 is an equivalent circuit showing a second embodiment of example 5.

Fig. 38 is a sectional view corresponding to fig. 37.

Fig. 39 is a cross-sectional view of a light sensor.

Fig. 40 is a plan view of the photosensor.

Description of the reference numerals

11: scanning line, 12: video signal line, 13: pixel, 14: display area, 15: terminal area, 16: seal, 17: flexible circuit board, 20: impurities, 30: connection wiring, 51: light-shielding film, 52: base film, 53: polycrystalline silicon, 54: gate insulating film, 55: gate electrode, 56: gate insulating film, 90: detection area, 91: scan line, 92: signal line, 93: power supply line, 94: sensor element, 95: scanning circuit, 96: signal circuit, 97: power supply circuit, 100: TFT substrate, 101: light shielding film, 102: base film, 103: oxide semiconductor, 104: gate insulating film, 105: gate electrode, 106: interlayer insulating film, 107: inorganic passivation film, 108: through hole, 109: through-hole, 110: drain electrode, 111: source electrode, 112: organic passivation film, 113: common electrode, 114: capacitor insulating film, 115: pixel electrode, 116: alignment film, 130: through hole, 131: through-hole, 135: through hole, 136: through-hole, 150: lower electrode, 151: organic EL layer, 152: cathode, 153: protective layer, 154: adhesive, 155: polarizing plate, 160: bank, 200: opposing substrate, 201: color filter, 202: black matrix, 203: protective film, 204: alignment film, 300: liquid crystal layer, 301: liquid crystal molecule, 400: window portion, 500: light-receiving element, 551: aluminum oxide layer, 600: panel, 601: adhesive member, 700: measured object, 800: resist, 1051: aluminum oxide layer, 1091: through-hole, 1111: connection electrode, EL: organic EL layer, Ch: holding capacitance, L: light, Va: anode voltage, Vg: gate voltage, Vk: cathode voltage, Vp: pixel voltage, Vsig: the signal voltage.

Detailed Description

Hereinafter, the present invention will be described in detail with reference to examples. In the following embodiments, the present invention is described mainly with reference to a display device as an example, but the present invention can be applied not only to a display device but also to other semiconductor devices using an oxide semiconductor for a TFT.

[ example 1 ]

Fig. 1 is a plan view showing a liquid crystal display device to which the present invention can be applied. In fig. 1, the TFT substrate 100 and the counter substrate 200 are joined by a seal 16, and a liquid crystal layer is sandwiched between the TFT substrate 100 and the counter substrate 200. A display region 14 is formed in a portion where the TFT substrate 100 and the counter substrate 200 overlap.

In the display region 14 of the TFT substrate 100, the scanning lines 11 extend in the lateral direction (x direction) and are arranged in the longitudinal direction (y direction). Further, the video signal lines 12 extend in the longitudinal direction and are arranged in the lateral direction. The region surrounded by the scanning line 11 and the video signal line 12 forms a pixel 13. The TFT substrate 100 is formed larger than the counter substrate 200, and a portion of the TFT substrate 100 not overlapping the counter substrate 200 forms the terminal region 15. A flexible circuit board 17 is connected to the terminal area 15. A drive IC that drives the liquid crystal display device is mounted on the flexible circuit board 17.

Since the liquid crystal itself does not emit light, a backlight is disposed on the rear surface of the TFT substrate 100. The liquid crystal display panel forms an image by controlling light from a backlight by pixels. The flexible circuit board 17 is bent to the back surface of the backlight, thereby reducing the overall external shape of the liquid crystal display device.

In the liquid crystal display device of the present invention, the TFT used in the display region 14 is a TFT using an oxide semiconductor with a small leakage current. In addition, a scan line driver circuit, for example, is formed in a frame portion near the sealing material, and a TFT using a polycrystalline silicon semiconductor having high mobility is used in the scan line driver circuit.

Fig. 2 is a plan view of a pixel in a display area. Fig. 2 shows a liquid crystal display device of an IPS (In Plane Switching) mode called FFS (Fringe Field Switching) mode. In fig. 2, a TFT using an oxide semiconductor 103 is used. Since the oxide semiconductor TFT has a small leakage current, it is suitable as a switching TFT.

In fig. 2, the scanning lines 11 extend in the lateral direction (x direction) and are arranged in the longitudinal direction (y direction). The video signal lines 12 extend in the vertical direction and are arranged in the horizontal direction. A pixel electrode 115 is formed in a region surrounded by the scanning line 11 and the video signal line 12. In fig. 2, an oxide semiconductor TFT having an oxide semiconductor 103 is formed between the video signal line 12 and the pixel electrode 115. In the oxide semiconductor TFT, the video signal line 12 constitutes a drain electrode, and the scanning line 11 branches to constitute a gate electrode 105 of the oxide semiconductor TFT. The source electrode 111 of the oxide semiconductor TFT extends on the pixel electrode 115 side and is connected to the pixel electrode 115 via a via hole 130.

The pixel electrode 115 is formed in a comb shape. The common electrode 113 is formed in a planar shape below the pixel electrode 115 with a capacitor insulating film interposed therebetween. The common electrode 113 is formed continuously and commonly to each pixel. When a video signal is supplied to the pixel electrode 115, electric lines of force passing through the liquid crystal layer are formed between the pixel electrode 115 and the common electrode 113, and an image is formed by rotating liquid crystal molecules. In fig. 2, a light shielding film (shielding electrode) formed between the TFT and the substrate is omitted.

Fig. 3 is an example of a cross-sectional view of the liquid crystal display device corresponding to fig. 2. In fig. 3, a TFT using an oxide semiconductor 103 is used. Examples of the Oxide semiconductor include IGZO (Indium Gallium Zinc Oxide), ITZO (Indium Tin Zinc Oxide), ZnON (Zinc Oxide Nitride), and IGO (Indium Gallium Oxide). In this embodiment, IGZO is used as the oxide semiconductor.

In fig. 3, a light shielding film 101 is formed of a metal on a TFT substrate 100 formed of a resin such as glass or polyimide. The metal may be the same as the gate electrode 105 and the like described later. The light shielding film 101 is for shielding light so that light from the backlight is not irradiated to a channel portion of a TFT formed later.

Another important function of the light shielding film 101 is to prevent the oxide semiconductor TFT from being affected by the electric charges charged on the substrate 100. In particular, when the substrate 100 is made of resin such as polyimide, the resin is easily charged, and the TFT is easily strongly affected by the resin. In order to prevent this, by applying a predetermined potential to the light shielding film 101, the influence of the charge charged on the substrate 100 on the TFT can be prevented.

A base film 102 is formed so as to cover the light-shielding film 101. The base film 102 prevents the oxide semiconductor 103 formed thereon from being contaminated by impurities from the TFT 100. The base film 102 is often formed of a stacked film of a silicon oxide film (hereinafter, represented by SiO) and a silicon nitride film (hereinafter, represented by SiN). Further, an aluminum oxide film (hereinafter, typically AlO) may be further laminated.

In fig. 3, an oxide semiconductor 103 constituting a TFT is formed over a base film 102. The thickness of the oxide semiconductor 103 is 10nm to 100 nm. The gate insulating film 104 is formed of SiO so as to cover the oxide semiconductor 103. The gate insulating film 104 formed of SiO supplies oxygen element to the oxide semiconductor 103 to stabilize channel characteristics. The gate electrode 105 is formed so as to cover the gate insulating film 104.

The interlayer insulating film 106 is formed of, for example, SiO so as to cover the gate electrode 105. The thickness of the interlayer insulating film 106 is, for example, 150nm to 300 nm. An inorganic passivation film 107 is formed of, for example, SiN over the interlayer insulating film 106. The thickness of the inorganic passivation film 107 is, for example, 100 to 200 nm.

Through holes 108 and 109 are formed so as to penetrate the interlayer insulating film 107, the interlayer insulating film 106, and the gate insulating film 104. For connecting the oxide semiconductor 103 with the drain electrode 110 or connecting the oxide semiconductor 103 with the source electrode 111. The drain electrode 110 in fig. 3 also serves as the video signal line 12, and the source electrode 111 is connected to the pixel electrode 115 via the through holes 130 and 131.

In fig. 3, an organic passivation film 112 is formed so as to cover the drain electrode 110 and the source electrode 111. The organic passivation film 112 is formed of, for example, acrylic resin. The organic passivation film 112 is formed to have a thickness of about 2 to 4 μm in order to reduce the stray capacitance between the video signal line 12 and the common electrode 113 when functioning as a planarization film. In order to connect the source electrode 111 and the pixel electrode 115, a via hole 130 is formed in the organic passivation film 112.

A common electrode 113 is formed on the organic passivation film 112 by a transparent conductive film such as ITO (Indium Tin Oxide). The common electrode 113 is formed in a planar shape and is shared by a plurality of pixels. The capacitor insulating film 114 is formed of SiN so as to cover the common electrode 113. The pixel electrode 115 is formed of a transparent conductive film such as ITO (Indium Tin Oxide) so as to cover the capacitor insulating film 114. The pixel electrode 115 is formed in a comb shape. The capacitor insulating film 114 forms a pixel capacitor between the common electrode 113 and the pixel electrode 115.

An alignment film 116 is formed so as to cover the pixel electrode 115. The alignment film 116 defines an initial alignment direction of the liquid crystal molecules 301. Alignment treatment of the alignment film 116 is performed by rubbing (rubbing) or by photo-alignment treatment using polarized ultraviolet rays. The pretilt angle is not necessary in IPS, and thus photo-alignment treatment is advantageous.

In fig. 3, the counter substrate 200 is disposed with a liquid crystal layer 300 interposed therebetween. A color filter 201 and a black matrix 202 are formed on the counter substrate 200, and a protective film (overcoat film)203 is formed thereon. An alignment film 204 is formed over the protective film 203. The function and alignment treatment of the alignment film 204 are the same as those of the alignment film 116 on the TFT substrate 100 side.

In fig. 3, when a voltage is applied between the common electrode 113 and the pixel electrode 115, electric lines of force are generated as indicated by arrows in fig. 3, and the liquid crystal molecules 301 are rotated to control the transmittance of the liquid crystal layer 300 for light from the backlight. An image is formed by controlling the transmittance of light by pixels.

Fig. 4 is a plan view of a pixel showing a problem in the case where the impurity 20 is present in the drain region of the TFT formed of the oxide semiconductor 103. In fig. 4, the impurities 20 are, for example, fine metal particles generated during sputtering, metal fine particles mixed from a manufacturing apparatus or the like, and the like. Such impurities abstract oxygen from the oxide semiconductor 103, metalize the oxide semiconductor 103, and turn on the TFT.

As shown in fig. 4, in a TFT using an oxide semiconductor 103, there is a feature that: even if the impurity 20 is not present directly on the channel of the TFT, it is present only in the vicinity thereof, and the TFT becomes defective. This is because the impurity 20 is present only in the vicinity of the TFT, and also deprives oxygen from the oxide semiconductor 103 constituting the channel of the TFT.

Fig. 5 is a plan view showing the structure of example 1 for coping with this situation. In fig. 5, 2 TFTs using the oxide semiconductor 103 are connected in series between the video signal line 12 and the pixel electrode 115. Hereinafter, a TFT using an Oxide Semiconductor (also referred to as an OS) may be referred to as an Oxide Semiconductor TFT or an OS-TFT. In fig. 5, a protective electrode 30 made of a metal or an alloy (hereinafter, typically a metal) is disposed between the oxide semiconductor 103 and the drain electrode 110 or between the oxide semiconductor 103 and the source electrode 111. The guard electrode 30 is formed of the same material as the gate electrode 105, for example. The guard electrode 30 will be described later.

Fig. 5 is characterized in that the oxide semiconductors 103 of the 2 oxide semiconductor TFTs are spaced apart. Also, the 2 oxide semiconductors 103 spaced apart by a space are connected together by the guard electrode 30 formed of a metal. According to the structure shown in fig. 5, even if the oxide semiconductor 103 of one TFT is contaminated with the impurity 20, since the oxide semiconductor 103 is spaced apart from each other, the influence thereof does not reach the other TFT. Therefore, any TFT is normal, and the pixel can operate normally.

Further, the equivalent circuit of fig. 5 is as shown in fig. 6. In fig. 6, the drain of one of the oxide semiconductor TFTs is connected to the video signal line 12 and a video signal (Vsig) is input, and the source of the other oxide semiconductor TFT is connected to the pixel electrode 115 and supplied with a pixel voltage (Vp). A gate voltage (Vg) common to the 2 TFTs is supplied to the gate electrode.

Fig. 7 is a plan view of a case where the impurity 20 is present in the drain of one TFT. The impurity 20 affects the channel of one TFT to be propagated, and for example, oxygen is taken out from the channel to metalize the channel, thereby turning on the channel. This causes the TFT to be defective and to become a simple resistor.

However, as shown in fig. 7, the oxide semiconductor 103 of the other TFT is spaced apart from the oxide semiconductor 103 of the one TFT, and therefore the influence of the impurity 20 does not affect the other TFT. Therefore, the other TFT operates normally, and the corresponding pixel does not become defective.

Fig. 8 is an equivalent circuit of fig. 7. In fig. 8, since the channel of one TFT is on, the TFT cannot operate, and is described as a simple resistance. However, since the other TFT normally operates, the switching function for the pixel can be exhibited without any problem.

The oxide semiconductor 103 of 2 TFTs can be formed in various shapes according to the need of layout, and fig. 9 to 11 are examples of the layout of 2 TFTs. Fig. 9 is a diagram in which one TFT is disposed in an upper adjacent pixel and the other TFT is disposed on the scanning line 11. In fig. 9, the protective electrode 30 formed of a metal also functions as a drain electrode or a source electrode. The gate electrode 105 of one TFT branches from the scanning line 11, and the gate electrode of the other TFT is shared by the scanning line 11.

Fig. 10 is a diagram in which 2 oxide semiconductors 30 extending in the y direction constituting a TFT are arranged in the x direction and 2 oxide semiconductors 103 are connected to each other by a guard electrode 30. In the structure of fig. 10, any of the 2 TFTs can use the scanning line 11 as the gate electrode 105.

Fig. 11 is a diagram in which the scanning line 11 is branched into two and the branched scanning line 11 is used as the gate electrode 105 of 2 TFTs. Fig. 11 is a diagram in which 2 TFTs are spaced at intervals in the y direction. In the structure of fig. 11, it is possible to avoid the capacitance generated between the protective electrode 30 connecting the 2 TFTs spaced apart in the y direction and the scanning line 11.

In any of fig. 9 to 11, the oxide semiconductor 103 in 2 TFTs is formed with an interval. In addition, although the protective electrode 30 is used for connection with the oxide semiconductor 103, it may be a common electrode as long as a polysilicon TFT is not simultaneously formed over a substrate. In the examples of fig. 9 to 11, in addition to the above, the arrangement of 2 TFTs can be formed in various shapes according to the requirements of wiring and layout.

As described with reference to fig. 1, in a liquid crystal display device or an organic EL display device, a scanning line driver circuit is formed by TFTs in the periphery of the display region 14. This is because the polysilicon TFT can reduce the ON resistance (ON resistance) as compared with the oxide semiconductor TFT, and thus can improve the operation speed. The display region 14 and the periphery of the display region are formed simultaneously, and thus the layer for the polysilicon TFT is also reflected in the display region.

Fig. 12 is a sectional view of the display region including the oxide semiconductor TFT in such a case. The structure of fig. 12 is formed with an insulating layer for forming a polysilicon TFT in addition to the structure illustrated in fig. 3. In the case where the TFT is formed only of an oxide semiconductor in the pixel region, when a circuit including a polysilicon TFT is formed in a peripheral circuit, a part of a layer including the polysilicon TFT is also present in the display region. In fig. 12, the structure on the organic passivation film is omitted.

In fig. 12, a base film 52 is formed over a substrate 100 of glass or the like. The base film 52 is a laminated structure of, for example, an SiO film and an SiN film. A gate insulating film 54 using TEOS (Tetra Ortho silicate) gas, which is used as a gate insulating film of the polysilicon TFT, is formed on the base film.

The layer above the gate insulating film 54 is basically the same as that described in fig. 3. However, in fig. 12, in the oxide semiconductor 103, a portion connected to the drain electrode 110 or the source electrode 111 via the via hole 108 or the via hole 109 is covered with the protective electrode 30 formed of a metal. When the via 108 or the via 109 is formed, a via is formed on the polysilicon TFT side. The via hole on the polysilicon side needs to be removed with hydrofluoric acid (HF) which disappears the oxide semiconductor 103 after entering the via hole 108 or the via hole 109. In order to prevent this, a protective electrode 30 formed of a metal is formed over the oxide semiconductor 103.

In fig. 12, an aluminum oxide layer (AlO)1051 is formed between the gate electrode 105 and the gate insulating film 104. An oxygen element is supplied from the AlO layer 1051 to the oxide semiconductor 103 to prevent the oxide semiconductor 103 from becoming deficient in the oxygen element.

Fig. 13 is a plan view corresponding to the sectional structure shown in fig. 12. In fig. 13, 2 oxide semiconductor TFTs are arranged between the video signal line 12 and the pixel electrode 115, but the oxide semiconductors 103 are spaced apart from each other. This is because even if one TFT is turned on, the oxide semiconductor 103 of the other TFT is not affected. Fig. 13 is the same as fig. 5 except that the shielding electrode 101 is shown.

Fig. 14 is a sectional view showing a second embodiment of example 1. Fig. 14 is different from fig. 12 in that the protective electrode 30 is not directly stacked on the oxide semiconductor 103, but is electrically connected to the oxide semiconductor 103 through a via hole via an insulating film 104. However, the equivalent circuit is the same. In the structure of fig. 12, the protective electrode 30 made of metal stacked on the oxide semiconductor 103 is covered over the oxide semiconductor 103 by sputtering, but in this case, there is a risk that the oxide semiconductor 103 is contaminated by the metal.

In the structure of fig. 14, when the protective electrode 30 is sputtered, the oxide semiconductor 103 is covered with the gate insulating film 104, and at least the channel portion is protected by the gate insulating film 104 and is not contaminated. Therefore, a TFT having more stable characteristics can be formed. Further, when the via hole on the polysilicon TFT side is cleaned with hydrofluoric acid (HF), the oxide semiconductor 103 is covered with the protective metal 30, and therefore, the influence of hydrofluoric acid (HF) on the oxide semiconductor 103 can also be prevented.

Fig. 15 is a plan view corresponding to the structure of fig. 14. Fig. 15 is the same as fig. 13 except that a through hole indicated by a broken line for connecting the guard electrode 30 and the oxide semiconductor 103 is added as compared with fig. 13. That is, in fig. 15, 2 oxide semiconductors 103 are spaced apart so that the influence of impurities does not simultaneously reach 2 TFTs.

FIG. 16 is a sectional view showing a third embodiment of example 1. In fig. 16, unlike the cases of fig. 12 and 14, the end portion of the oxide semiconductor 103 is not covered with the protective electrode 30 made of metal, and the drain electrode 110 or the source electrode 111 is directly in contact with the oxide semiconductor 103. In a display device or a semiconductor device, when a TFT is formed only of the oxide semiconductor 103, the structure of fig. 16 may be used.

In the case where the oxide semiconductor TFT and the polysilicon TFT are formed over the same substrate, in the structure as in fig. 16, a step of forming a via hole for connecting the drain electrode or the source electrode in the polysilicon TFT and a step of forming a via hole for connecting the drain electrode or the source electrode in the oxide semiconductor TFT are required separately. This is to prevent hydrofluoric acid (HF) from entering a through hole on the oxide semiconductor TFT side and causing the oxide semiconductor to disappear when the polysilicon TFT is cleaned with hydrofluoric acid (HF) after a through hole for connecting a drain electrode or a source electrode is formed in the polysilicon TFT. The other structure of fig. 16 is the same as that of fig. 12.

Fig. 17 is a plan view corresponding to fig. 16. The structure of fig. 17 is the same as that of fig. 13 except that the guard electrode 30 is not present. In fig. 17, in order to show the formation range of the oxide semiconductor 103, a portion of the oxide semiconductor 103 is shaded. In fig. 17, 2 oxide semiconductors 103 constituting the TFT are also formed at intervals from each other.

[ example 2 ]

Embodiment 2 is different from embodiment 1 in that 2 oxide semiconductor TFTs are stacked in the vertical direction. In embodiment 2, the same thing as that in embodiment 1 is that 2 oxide semiconductors 103 constituting TFTs are spaced apart by a space, but the planar layout area can be reduced by the amount by which 2 TFTs are stacked in the vertical direction.

Fig. 18 is an equivalent circuit showing embodiment 2. Fig. 18 is electrically the same as fig. 6 of embodiment 1, but in fig. 18, a case where 2 TFTs are stacked is schematically shown.

Fig. 19 is a sectional view showing an example of the structure of embodiment 2. In fig. 19, a shield electrode 51 is formed over a substrate 100 of glass or the like, a base film 52 is formed so as to cover the shield electrode 51, and a first oxide semiconductor 1031 is formed over the base film 52 so as to form a TFT as a first oxide semiconductor constituting a lower layer. In this embodiment, the protective electrode 30 for the oxide semiconductors 1031, 1032 is not used.

A gate insulating film 54 is formed covering the oxide semiconductor 1031, and a gate electrode 55 is formed on the gate insulating film 54 at a portion corresponding to the channel of the oxide semiconductor 1031. An aluminum oxide layer (AlO)551 is formed between the gate electrode 55 and the gate insulating film 54. An oxygen element is supplied from the AlO layer 551 to the oxide semiconductor to prevent the oxide semiconductor 1031 from becoming deficient in oxygen element.

The gate electrode 55 is covered with a gate insulating film 56, and an upper oxide semiconductor 1032 constituting the TFT is formed thereon. The layer on the upper side than the second oxide semiconductor 1032 is the same as the structure described in fig. 16 of embodiment 1. In fig. 19, a drain electrode 110 connected to the video signal line 12 is connected to a drain region of the first oxide semiconductor 1031 via a through hole 108, and a source region of the first oxide semiconductor 1031 is connected to the second oxide semiconductor 1032 constituting the TFT on the upper side via a connection electrode 1111 via a through hole 1091. Further, the source electrode 111 of the second TFT is connected to the pixel electrode 115.

In the structure of fig. 19, the gate electrode 55 of the first oxide semiconductor TFT on the lower side functions as the second oxide semiconductor TFT on the upper side with the gate insulating film 56 interposed therebetween. Therefore, the second oxide semiconductor TFT on the upper side becomes a double-gate structure. In the structure of fig. 19, the gate electrode 55 of the lower first TFT also functions as a light-shielding film for the upper second TFT.

Fig. 20 is a plan view corresponding to the sectional structure shown in fig. 19. In fig. 20, 2 oxide semiconductor TFTs are stacked and arranged between the video signal line 12 and the pixel electrode 115. In fig. 20, the video signal line 12 is connected to a first oxide semiconductor 1031 constituting a TFT on the lower side via a via hole 108. The first oxide semiconductor 1031 extends rightward in fig. 20, and is connected to the second oxide semiconductor 1032 constituting the TFT on the upper side via a via hole 1091. Further, the source region of the second oxide semiconductor 1032 is connected to the pixel electrode 115 via the drain electrode 111.

In fig. 20, the gate electrode 55 of the lower TFT is a portion from which the scanning line 11 branches, and the gate electrode 105 of the upper TFT is connected to the gate electrode 105 via a via hole. As shown in fig. 20, the lower shielding electrode 51 shields the channel of the lower TFT and the channel of the upper TFT from the backlight.

As shown in fig. 20, in embodiment 2, the area for 2 TFTs becomes smaller than that in the case of fig. 13 in embodiment 1. In addition, 2 oxide semiconductors 1031, 1032 are separated by 3 layers, and therefore the probability that 2 TFTs simultaneously become defective is small.

[ example 3 ]

Embodiment 3 is a structure in which 2 TFTs are connected in series within a pixel, but one TFT is formed of polysilicon and the other TFT is formed of an oxide semiconductor. In general, the cause of the polysilicon TFT becoming defective is different from the cause of the oxide semiconductor becoming defective, and therefore the probability of 2 TFTs becoming defective at the same time is small. Therefore, the structure has very high reliability. On the other hand, patent documents 2 and 3 describe a structure in which a polysilicon TFT and an oxide semiconductor TFT are formed in 1 pixel in an organic EL display device.

However, in patent documents 2 and 3, the switching TFT uses an oxide semiconductor, and the driving TFT uses a polysilicon TFT, and in contrast, the present invention divides TFTs that perform the same function, for example, the switching TFT into 2 TFTs to improve reliability, and the purpose and structure are different. Further, in the structures of patent documents 1 and 2, the source electrode of one TFT (switching TFT) is connected to the other TFT (gate electrode of control TFT), while in the present invention, the source electrode of one TFT is connected to the drain electrode of the other TFT, and thus, the specific circuit structure is also different.

Fig. 21 is an equivalent circuit showing embodiment 3. In fig. 21, a polysilicon TFT is disposed on the side connected to the video signal line, and an oxide semiconductor TFT is disposed on the pixel electrode side. The source of the polysilicon TFT is connected to the drain of the oxide semiconductor.

FIG. 22 is an example of a sectional view showing the structure of example 3. In fig. 22, a shield electrode 51 for a polysilicon TFT is formed over a substrate 100 of glass or the like, a base film 52 is formed so as to cover the shield electrode 51, and polysilicon 53 is formed over the base film 52. As the polysilicon 53, a method of first forming a-Si by CVD and then converting it into polysilicon with an excimer laser is often used. The polysilicon formed by this method can be formed under a Low Temperature process, also called LTPS (Low Temperature polysilicon).

A gate insulating film 54 using TEOS (Tetra Ortho silicate) gas, which is used as a gate insulating film of the TFT, is formed on the polysilicon. A gate electrode 55 for a polysilicon TFT is formed on the gate insulating film 54. A shielding electrode 101 for an oxide semiconductor TFT is formed on the same layer as the gate electrode 55.

A base film 102 for an oxide semiconductor 103 is formed so as to cover the gate electrode 53 and the shielding electrode 101. The base film is composed of 2 or more layers, and in this case, an SiO film is formed in a layer in contact with the oxide semiconductor 103 so that the oxide semiconductor 103 is not reduced. In the case where the oxide semiconductor TFT is used as a dual gate, a gate voltage is applied to the shielding electrode 101.

An oxide semiconductor 103 is formed over the base film 102, but the structure above the oxide semiconductor 103 is the same as that described in fig. 12 of embodiment 1. In fig. 22, similarly to fig. 12, the drain portion and the source portion of the oxide semiconductor 103 are covered with the protective electrode 30. This is to prevent hydrofluoric acid (HF) entering the through hole for the oxide semiconductor TFT from disappearing the oxide semiconductor 103 when the through hole for the polysilicon TFT is cleaned with hydrofluoric acid (HF). In fig. 22, a video signal is supplied through the drain electrode 110 of the via hole 108 formed on the polysilicon TFT side, and the source electrode 111 of the via hole 109 formed on the oxide semiconductor TFT side is connected to the pixel electrode 115.

Fig. 23 is a plan view corresponding to fig. 22. In fig. 23, a drain electrode 110 branched from the video signal line 12 is connected to a drain of the polysilicon TFT via a via 108, a source of the polysilicon TFT is connected to a drain of the oxide semiconductor TFT, and a source of the oxide semiconductor TFT is connected to a pixel electrode 115 via a via 109. The gate electrode 55 of the polysilicon TFT is a portion from which the scanning line 11 branches, and the gate electrode 105 for the oxide semiconductor TFT is connected to the scanning line 11 via a via hole.

FIG. 24 is a sectional view showing a second embodiment of example 3. Fig. 24 is different from fig. 22 in that the protective electrode 30 is not directly stacked on the oxide semiconductor 103 but formed on the gate insulating film 104, and the protective electrode 30 is connected to the oxide semiconductor 103 via a through hole. This is to prevent the risk of contamination of the oxide semiconductor 103 with the protective electrode 30 formed of a metal, as described with reference to fig. 14.

Fig. 25 is a plan view corresponding to fig. 24. Fig. 25 has the same structure as fig. 23 except that a through hole indicated by a broken line for connecting the oxide semiconductor 103 and the protective electrode 30 is added.

FIG. 26 is a sectional view showing a third mode of example 3. Fig. 26 is different from fig. 22 in that the protective electrode 30 is not formed on the oxide semiconductor 103. In fig. 26, when a through hole for connecting a drain electrode or a source electrode is formed in a polysilicon TFT, the through hole is cleaned with hydrofluoric acid (HF), but in this case, in order to prevent hydrofluoric acid (HF) from entering the through hole on the oxide semiconductor TFT side and thereby prevent the oxide semiconductor 103 from entering the through hole on the oxide semiconductor TFT side, it is necessary to bring the through hole on the oxide semiconductor 103 side into a state of being already blocked by the drain electrode and the source electrode or a state of not forming the through hole for the drain electrode and the source electrode on the oxide semiconductor TFT103 side. The other structure of fig. 26 is the same as that of fig. 22.

Fig. 27 is a plan view corresponding to fig. 26. Fig. 27 is the same as fig. 23 except that the guard electrode 30 is not formed.

In each of the embodiments described in embodiment 3, the polysilicon TFT is connected to the video signal line 12 side, and the oxide semiconductor TFT is connected to the pixel electrode 115 side. However, on the contrary, the oxide semiconductor TFT may be connected to the video signal line 12 side and the polysilicon TFT may be connected to the pixel electrode 115 side.

[ example 4 ]

Embodiment 4 is a structure in which a polysilicon TFT and an oxide semiconductor TFT are stacked in order to save space for forming 2 TFTs. Fig. 28 is an equivalent circuit showing embodiment 4. In fig. 28, the polysilicon TFT is disposed on the lower side and the oxide semiconductor TFT is disposed on the upper side. The video signal is input to the polysilicon TFT side, and the oxide semiconductor TFT side is connected to the pixel electrode 115, which is the same as fig. 21.

FIG. 29 is a sectional view showing a configuration example of example 4. The layer structure of fig. 29 is the same as that of fig. 22. However, in fig. 29, the polysilicon TFT and the oxide semiconductor TFT are formed to overlap in a plan view. Incidentally, the positions of the connection electrodes and the through holes are slightly different from those in fig. 22.

In fig. 29, a shielding electrode 51 is formed over a substrate 100. The shielding electrode 51 shields both the polysilicon TFT and the oxide semiconductor TFT from the backlight. A base film 52 is formed to cover the shielding electrode 51. The length of the polysilicon 53 formed over the base film 52 is longer than the length of the oxide semiconductor 103 formed on the upper side.

The gate electrode 55 formed on the gate insulating film 54 formed using TEOS as a raw material can function as a bottom gate of the oxide semiconductor TFT formed on the upper side with the gate insulating film 56 interposed therebetween. In fig. 29, the structure above the oxide semiconductor 103 is the same as that in fig. 22. However, the positions of the drain electrode and the source electrode in the oxide semiconductor TFT are reversed in fig. 29 from fig. 22. However, the circuit aspects are the same. At the end portion of the oxide semiconductor 103, a protective electrode 30 made of metal is formed to be stacked on the oxide semiconductor 103. This is to prevent the oxide semiconductor 103 from disappearing on the oxide semiconductor TFT side when the oxide semiconductor 103 cleans the via hole on the polysilicon TFT side with hydrofluoric acid (HF).

Fig. 30 is a plan view corresponding to fig. 29. In fig. 30, a drain electrode 110 branched from the video signal line 12 is connected to a drain of a polysilicon TFT formed on a lower side in a via hole 108. The polysilicon 53 extends to the right and is connected to the drain of the oxide semiconductor TFT on the right side of the oxide semiconductor 103. The source of the oxide semiconductor TFT is connected to the pixel electrode 115 via the via hole 109 and the source electrode 111.

The polysilicon gate electrode 55 is a portion from which the scanning line 11 branches, and is formed in the same layer as the scanning line 11. The gate electrode 105 for an oxide semiconductor is formed above the gate electrode 55 for a polysilicon TFT. The gate electrode 55 for an oxide semiconductor is connected to the scanning line 11 via a through hole. The polysilicon gate electrode 55 and the oxide semiconductor gate electrode 105 are formed to overlap in a plan view.

FIG. 31 is a sectional view showing a second embodiment of example 4. Fig. 31 is different from fig. 29 in that a protective electrode 30 made of a metal is formed in a layer different from the oxide semiconductor 103 with a gate insulating film 104 interposed therebetween in order to protect the oxide semiconductor 103 from hydrofluoric acid (HF). This can prevent the risk of contamination of the oxide semiconductor when forming the protective electrode 30. The other structure of fig. 31 is the same as fig. 29.

Fig. 32 is a plan view corresponding to fig. 31. The structure of fig. 32 is the same as that of fig. 30 except that a via hole indicated by a dotted line for connecting the oxide semiconductor 103 and the protective electrode 30 is added.

FIG. 33 is a sectional view showing a third mode of example 4. Fig. 33 is different from fig. 29 in that the protective electrode 30 is not formed over the oxide semiconductor 103. Therefore, in fig. 33, as described in fig. 26, when the through-hole on the polysilicon TFT side is cleaned with hydrofluoric acid (HF), it is necessary to bring the through-hole on the oxide semiconductor side into a state in which it is already blocked by the drain electrode and the source electrode, or into a state in which the through-hole for the drain electrode and the source electrode on the oxide semiconductor TFT side is not yet formed. The other structure of fig. 33 is the same as fig. 29.

Fig. 34 is a plan view corresponding to fig. 33. Fig. 34 is the same as fig. 30 except that the guard electrode 30 is not formed.

In the above embodiment, the polysilicon TFT is located below the oxide semiconductor TFT, that is, it is fabricated first in the process. This is because the annealing temperature of the polysilicon 53 is high, and thus when the polysilicon 53 is annealed, the oxide semiconductor 103 is prevented from being denatured. However, even when the oxide semiconductor 103 is resistant to high temperature or when the annealing temperature of the polysilicon 53 is reduced to a low temperature, the oxide semiconductor TFT can be formed first, that is, below the polysilicon TFT.

As described above, by using example 4, it is possible to realize a display device or a semiconductor device which prevents 2 TFTs from being defective at the same time, has high reliability, and has a high manufacturing yield.

[ example 5 ]

In embodiments 1 to 4, the case where the present invention is applied to a liquid crystal display device is described. The utility model discloses also can be applied to organic EL display device. Fig. 35 is an equivalent circuit of a pixel portion of a display region of the organic EL display device. In fig. 35, the video signal lines 12 and the power supply lines 93 extend in the longitudinal direction (y direction) and are arranged in the lateral direction (x direction). Further, the scanning lines 11 extend in the lateral direction and are arranged in the longitudinal direction. The region surrounded by the video signal line 12 or the power supply line 93 and the scanning line 11 becomes a pixel.

In fig. 35, the drain of the control TFT (T2), in which the current flowing through the organic EL Layer (EL) as the light-emitting layer is controlled by the control TFT (T2), is connected to the power supply line 93, and the storage capacitor (Ch) is connected between the power supply line 93 and the drain of the control TFT (T2). The gate of the control TFT (T2) is connected to the source of the switching TFT (T1). The gate of the switching TFT (T1) is connected to the scanning line 11, and the drain is connected to the video signal line 12.

In fig. 35, when the gate of the switching TFT (T1) is turned ON (ON), a video signal is supplied from the video signal line 12 to one electrode of the storage capacitor Ch, and a corresponding video signal is supplied from the power supply line 93 to the storage capacitor Ch. As a result, the gate of the driving TFT (T2) is held at a predetermined potential, and a current corresponding to the potential flows to the organic EL Layer (EL) through the control TFT (T2).

As shown in fig. 35, there are 2 TFTs (T1, T2) in a pixel of the organic EL display device. In a pixel, for example, when the impurity 20 described in embodiment 1 is present, a channel of a TFT formed of the oxide semiconductor 103 is metallized, and the TFT becomes inoperable. The switching TFT (T1) or the control TFT (T2) may be formed of the oxide semiconductor 103, and may be the same for both TFTs.

Fig. 36 is an equivalent circuit showing a case where the switching TFT is formed of an oxide semiconductor. The switching TFT in the organic EL display device is the same as the switching TFT in the pixel of the liquid crystal display device. In fig. 36, the switching TFT is divided into a TFT11 and a TFT 12. The structures of 2 oxide semiconductor TFTs can be applied as well to the structures of the liquid crystal display devices described in embodiments 1 to 4. That is, 2 TFTs of which switches constitute TFTs are connected in series, but 2 oxide semiconductors constituting TFTs are arranged with a space therebetween. This can prevent 2 TFTs from being metallized at the same time and becoming defective in operation.

The same applies to the case where the control TFT (T2) is formed of an oxide semiconductor. Fig. 37 is an equivalent circuit of the case where the control TFT (T2) is configured of 2 TFTs of the TFT21 and the TFT 22. The gate electrodes of the TFT21 and the TFT22 are both connected to the holding capacitance Ch.

Fig. 38 is a sectional view of a display region of an organic EL display device including the control TFTs (T21, T22) in the case where the control TFTs (T21, T22) are formed of the oxide semiconductor 103. The layer structure of fig. 38 is the same as that of the liquid crystal display device shown in fig. 3, except that a TFT is formed of the oxide semiconductor 103, the TFT is covered with the organic passivation film 112, and a via hole 130 for conducting the TFT to the lower electrode 150 is formed. However, the TFT of fig. 3 is a switching TFT, whereas the TFT of fig. 29 is a control TFT and has the same layer structure.

Fig. 38 is different from fig. 3 in that, as TFTs, a first control TFT (T21) and a second control TFT (T21) are formed, and the oxide semiconductor 103 of the TFT (21) and the TFT (22) are formed with an interval therebetween. Also, 2 TFTs are connected by the guard electrode 30.

In fig. 38, a lower electrode 150 as an anode is formed on the organic passivation film 112. A bank 160 having a hole is formed over the lower electrode 150. An organic EL layer 151 as a light-emitting layer is formed in the hole of the bank 160. An upper electrode 152 is formed as a cathode on the organic EL layer 151. The upper electrode 152 is formed in common to each pixel. A protective film 153 having an SiN film or the like is formed to cover the upper electrode 152. A circularly polarizing plate 155 attached via an adhesive 154 for preventing reflection of external light is formed on the protective film 153.

As shown in fig. 38, the portion where the TFT is formed can have the same layer structure in the organic EL display device and the liquid crystal display device. Therefore, the structures described in embodiments 1 to 4 can also be applied to an organic EL display device.

[ example 6 ]

The utility model discloses not only can be applied to display device, can also be applied to various semiconductor devices such as sensor device. There are a number of categories of sensor devices. Fig. 39 is an example of a case where the same structure as that of the organic EL display device is used as a photosensor. That is, the organic EL display device is used as a light emitting element. In fig. 39, in the display region (light-emitting element) of the organic EL display device illustrated in fig. 38, a light-receiving element 500 is disposed on the lower surface of the TFT substrate 100. A panel (faceplate)600 formed of a transparent glass substrate or a transparent resin substrate is disposed on the upper surface of the light emitting element with an adhesive material 601 interposed therebetween. The object 700 to be measured is placed on the panel 600.

In the light-emitting element, a light-emitting region is formed of an organic EL layer 151, a lower electrode 150, and an upper electrode 152. A window 400 in which the organic EL layer, the lower electrode, and the upper electrode are absent is formed in the central portion of the light emitting region, and light can pass through this portion. Further, a reflective electrode is formed below the lower electrode 150, and light L emitted from the organic EL layer 151 travels upward.

In fig. 39, light L emitted from the organic EL layer 151 is reflected by the object 700 to be measured, passes through the window 400, is received by the light receiving element 500 disposed below the TFT substrate 100, and the presence of the object 700 is detected. In the case where the object 700 to be measured is not present, the reflected light is not present, and thus the current does not flow in the light receiving element 500. Thus, the presence or absence of the object under test 700 can be detected.

In fig. 39, 2 oxide semiconductors 103 that control the TFTs are formed at intervals. Therefore, even if a failure occurs in one oxide semiconductor 103, the failure does not propagate to the other oxide semiconductor 103. The 2 oxide semiconductors 103 are connected in series through the protective electrode 30 formed of a metal. The guard electrode 30 is formed of a metal and is therefore opaque, but the portion where the guard electrode 30 is formed can be located at a distance from the hole 400 through which light passes, and therefore does not block light. This is shown by a broken line in the guard electrode 30 in fig. 39.

Fig. 40 is a plan view of the photosensor shown in fig. 39 in which the sensor elements are arranged in a matrix. In fig. 40, the scanning lines 91 extend in the lateral direction (x direction) from the scanning circuits 95 disposed on both sides. The signal line 92 extends in the vertical direction (y direction) from a signal circuit 96 disposed on the lower side, and the power line 93 extends in the downward direction (-y direction) from a power circuit 97 disposed on the upper side. A region surrounded by the scanning line 91 and the signal line 92, or the scanning line 91 and the power supply line 93 is a sensor element 94.

Further, in the optical sensor of the present embodiment, not only the presence or absence of the measured object 700 can be known, but also a two-dimensional image can be read by measuring the intensity of reflection from the measured object 700. Further, by performing detection for each color, a color image or a spectral image can be detected. The resolution of the sensor is determined by the size of the sensor element 94 in fig. 32, and the size of the sensor element that actually functions can be adjusted by driving a plurality of sensor elements 94 together as necessary.

In the examples of fig. 39 and 40, the same structure as that of the organic EL display device is applied to the optical sensor, but the present invention is applicable not only to such a structure but also to an optical sensor using another detection method. And the utility model discloses not only can be applied to optical sensor, can also be applied to other sensors that use the semiconductor device substrate such as capacitive sensor.

Claims (20)

1. A semiconductor device, characterized in that:

a plurality of scanning lines extending in parallel with each other in a first direction and a plurality of signal lines extending in parallel with each other in a second direction which is a direction intersecting the first direction are provided over a substrate of the semiconductor device, a first electrode is provided in a region surrounded by the scanning lines and the signal lines,

the first electrode is controlled by a structure in which a first TFT composed of a first oxide semiconductor and a second TFT composed of a second oxide semiconductor are connected in series,

the first oxide semiconductor and the second oxide semiconductor are arranged with a space,

the first oxide semiconductor and the second oxide semiconductor are connected via a second electrode formed with a metal or an alloy,

the first electrode and the first oxide semiconductor or the second oxide semiconductor are connected via a third electrode formed using a metal or an alloy.

2. The semiconductor device according to claim 1, wherein:

the first oxide semiconductor and the second oxide semiconductor are disposed on the same layer with an interval therebetween.

3. A semiconductor device, characterized in that:

a plurality of scanning lines extending in parallel with each other in a first direction and a plurality of signal lines extending in parallel with each other in a second direction which is a direction intersecting the first direction are provided over a substrate of the semiconductor device, a first electrode is provided in a region surrounded by the scanning lines and the signal lines,

the first electrode is controlled by a structure in which a first TFT composed of a first oxide semiconductor and a second TFT composed of a second oxide semiconductor are connected in series,

the first oxide semiconductor and the second oxide semiconductor are arranged with a space,

the first oxide semiconductor and the second oxide semiconductor are formed in different layers, and the first oxide semiconductor and the second oxide semiconductor overlap in a plan view.

4. A semiconductor device according to any one of claims 1 to 3, wherein:

the first TFT and the second TFT are switching TFTs.

5. A semiconductor device according to any one of claims 1 to 3, wherein:

the first TFT and the second TFT are control transistors that control an amount of current to the first electrode.

6. A semiconductor device according to any one of claims 1 to 3, wherein:

has a first region in which the first electrodes are arranged in a matrix,

and a driving circuit for driving the scanning line or the signal line is formed outside the first region, and the driving circuit is composed of a polysilicon TFT.

7. A semiconductor device according to any one of claims 1 to 3, wherein:

the semiconductor device is a liquid crystal display device.

8. A semiconductor device according to any one of claims 1 to 3, wherein:

the semiconductor device is an organic EL display device.

9. A semiconductor device according to any one of claims 1 to 3, wherein:

the semiconductor device is a light sensor.

10. A semiconductor device, characterized in that:

a plurality of scanning lines extending in parallel with each other in a first direction and a plurality of signal lines extending in parallel with each other in a second direction which is a direction intersecting the first direction are provided over a substrate of the semiconductor device, a first electrode is provided in a region surrounded by the scanning lines and the signal lines,

the first electrode is controlled by a structure in which a first TFT made of polycrystalline silicon and a second TFT made of an oxide semiconductor are connected in series.

11. The semiconductor device according to claim 10, wherein:

the first TFT and the second TFT are disposed in different layers, and the first TFT and the second TFT are disposed in different positions in a plan view.

12. The semiconductor device according to claim 10, wherein:

the first TFT and the second TFT substrate are formed in different layers, and the first TFT overlaps the second TFT in a plan view.

13. The semiconductor device according to claim 10, wherein:

the first TFT and the second TFT are switching TFTs.

14. The semiconductor device according to claim 10, wherein:

the first TFT and the second TFT are control transistors that control an amount of current to the first electrode.

15. The semiconductor device according to claim 10, wherein:

has a first region in which the first electrodes are arranged in a matrix,

and a driving circuit for driving the scanning line or the signal line is formed outside the first region, and the driving circuit is composed of a polysilicon TFT.

16. The semiconductor device according to claim 10, wherein:

the first TFT is formed closer to the substrate than the second TFT.

17. The semiconductor device according to claim 10, wherein:

the first TFT is connected to the signal line, and the second TFT is connected to the first electrode.

18. The semiconductor device according to any one of claims 10 to 17, wherein:

the semiconductor device is a liquid crystal display device.

19. The semiconductor device according to any one of claims 10 to 17, wherein:

the semiconductor device is an organic EL display device.

20. The semiconductor device according to any one of claims 10 to 17, wherein:

the semiconductor device is a light sensor.

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