TWI686924B - Integrated circuit and test method - Google Patents

Abstract

An integrated circuit is provided. The integrated circuit includes a substrate, a first die, and a second die. The substrate includes a first analog substrate pad. The first die is disposed on the substrate and includes a first analog die pad, a first voltage conversion circuit, and a first digital die pad. The first analog substrate pad is electrically connected to the first analog die pad through a first bonding line. The first voltage conversion circuit is electrically connected to the first analog die pad. The first digital die pad is electrically connected to the first voltage conversion circuit. The second die is disposed on the substrate and includes a second digital die pad. The first digital die pad s electrically connected to the first digital die pad through a second bonding line.

Description

Integrated circuit and its test method

The present application relates to an integrated circuit, in particular to an integrated circuit with multiple die packages and its test method.

System integration is currently an important trend in the development of the semiconductor industry. System integration technologies mainly include System in Package (SiP), System on Chip (SoC) and so on. SiP refers to a package that includes multiple dies in an integrated circuit (IC) package. Because SiP has the advantages of miniaturization, heterogeneous integration (Heterogeneous Integration), low cost, short development time, and high product performance, SiP has continuously developed and improved recently. However, for SiP ICs, due to the limited number of pins in the package, there are not enough pins to switch multiple internal die. Therefore, it may not be possible to perform a complete test on the die.

Therefore, the present invention provides an integrated circuit using a multi-die package, which can test multiple dies by sharing the pins with a limited number of pins of the package.

An embodiment of the present invention provides an integrated circuit, which includes a substrate (eg, lead frame), a first die, and a second die. The substrate has a first analog substrate bonding pad (for example, an inner lead bonding pad). The first die is disposed on the substrate and includes a first analog die bonding pad, a first voltage conversion circuit, and a first digital die bonding pad. The first analog substrate bonding pad is electrically connected to the first analog die bonding pad through the first bonding wire. The first voltage conversion circuit is electrically connected to the first analog die bonding pad. The first digital die bonding pad is electrically connected to the first voltage conversion circuit. The second die is disposed on the substrate and has a second digital die bonding pad. The first digital die bonding pad is electrically connected to the second digital die bonding pad through the second bonding wire.

An embodiment of the present invention provides a test method for an integrated circuit. The integrated circuit includes a substrate, a first die, and a second die. The substrate has a first analog substrate bonding pad, the first die has a first analog die bonding pad and a first digital die bonding pad, and the second die has a second digital die bonding pad. The test method includes the steps of: providing a first analog test input signal to the first analog substrate bonding pad during the first test; transmitting the first analog test input signal to the first die through the first analog die bonding pad A first voltage conversion circuit; the first analog conversion input signal is converted into a first digital test input signal by the first voltage conversion circuit; the first digital test input signal is transmitted to the second digital die through the first digital die bonding pad A bonding pad; and using the first digital test input signal to perform a first test operation on the second die.

In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, a preferred embodiment is described below in conjunction with the accompanying drawings, which are described in detail below.

FIG. 1 shows the appearance of an integrated circuit according to an embodiment of the invention. Referring to FIG. 1, in this embodiment, the integrated circuit 1 includes a plurality of dies, and the integrated circuit 1 is packaged in a system in package (SiP) manner, for example. In the embodiment of FIG. 1, the package has a plurality of pins 10, and these pins are flat pins provided on four sides of the package. In other embodiments, the pins of the integrated circuit 1 may be pins arranged in an array, planar pins arranged in a grid array, ball pins arranged in an array, and so on. In the following, the description will be made by taking the integrated circuit 1 including two dies as an example.

Referring to FIGS. 2A-2B, the integrated circuit 1 includes a substrate 20 and dies 21 and 22. In one embodiment, the substrate 20 can be implemented with a lead frame. The dies 21 and 22 can be configured in a horizontal or vertical packaging method. Referring to FIG. 2A, in one embodiment, the dies 21 and 22 are configured by a horizontal packaging method. In this embodiment, both the dies 21 and 22 directly contact the substrate 20. In detail, the dies 21 and 22 are bonded to the substrate 20 in a parallel and non-overlapping manner. Referring to FIG. 2B, in another embodiment, the dies 21 and 22 are configured by a vertical packaging method. In this embodiment, the die 21 directly contacts the substrate 20, and the die 22 is stacked on the die 21. Specifically, the die 21 and 22 are bonded to the substrate 20 in a stacked manner. According to an embodiment of the invention, the integrated circuit 1 is a touch system integrated circuit, and one of the dies 21 and 22 is a sensor integrated circuit, and the other is a microcontroller (Microcontroller, MCU) ). Figures 2A-2B only show the relative positions between the substrate 20 and the die 21 and 22. The metal wires and bonding pads of the substrate 20 and the die 21 and 22 are not shown, and the bonding wires between them will be shown. In Figure 3. Hereinafter, the integrated circuit 1 shown in FIG. 2B will be described as an example.

FIG. 3 shows the layout configuration of the integrated circuit 1 according to an embodiment of the present invention. Referring to FIG. 3, the substrate 20 includes a plurality of bonding pads, and each bonding pad is electrically connected to a pin 10 of the package. In an embodiment, the bonding pad of the substrate 20 is an inner lead bonding pad of the integrated circuit 1. For the sake of clarity, FIG. 3 shows only a part of the bonding pads of the substrate 20, including bonding pads A1~A4 and D1~D3, wherein the bonding pads A1~A4 are used as analog substrate bonding pads for transmitting/receiving analog signals, bonding pads D1~ D3 serves as a digital substrate bonding pad for transmitting/receiving digital signals. As shown in FIG. 3, the die 21 includes a plurality of bonding pads and voltage conversion circuits 210-213. In the embodiment of FIG. 3, the bonding pads of the die 21 include BA1~BA4 and BD1~BD6, BD2', wherein the bonding pads BA1~BA4 serve as analog die bonding pads for transmitting/receiving analog signals, bonding pad BD1 ~BD6 is used as a digital die bonding pad for transmitting/receiving digital signals. In other embodiments, the die 21 may have other analog die bonding pads and/or digital die bonding pads. Each voltage conversion circuit is electrically connected between an analog die bonding pad and a digital die bonding pad. Referring to FIG. 3, the voltage conversion circuit 210 is electrically connected between the analog die bonding pad BA1 and the digital die bonding pad BD6 through the metal lines ML20 and ML22, and the voltage conversion circuit 211 is electrically connected to the analog through the metal lines ML21 and ML23 Between the die bonding pad BA2 and the digital die bonding pad BD5, the voltage conversion circuit 212 is electrically connected between the analog die bonding pad BA3 and the digital die bonding pad BD4 through the metal lines ML24 and ML26, and the voltage conversion circuit 213 The metal wires ML25 and ML27 are electrically connected between the analog die bonding pad BA4 and the digital die bonding pad BD3. The bonding pads of the die 22 include TD1 to TD6, which are used as digital die bonding pads for transmitting/receiving digital signals. In other embodiments, the die 21 may have other digital die bonding pads.

Next, the connection relationship between the substrate 20 and the die 21 and 22 will be explained. Between the substrate 20 and the die 21, the analog substrate bonding pad A1 and the analog die bonding pad BA1 are electrically connected through the bonding wire BL20, and the analog substrate bonding pad A2 and the analog die bonding pad BA2 are electrically connected through the bonding wire BL21. The analog substrate bonding pad A3 and the analog die bonding pad BA3 are electrically connected through the bonding wire BL22, the analog substrate bonding pad A4 and the analog die bonding pad BA4 are electrically connected through the bonding wire BL23, and the digital substrate bonding pad D1 is bonded to the digital die The pad BD1 is electrically connected through the bonding wire BL24, and the digital substrate bonding pad D2 and the digital die bonding pad BD2 are electrically connected through the bonding wire BL25. Between the dies 21 and 22, the digital substrate bonding pads BD5 and TD5 are electrically connected through the bonding wire BL28, the digital substrate bonding pads BD6 and TD6 are electrically connected through the bonding wire BL27, and the digital substrate bonding pads BD4 and TD4 are connected through the bonding wire BL29 Electrically connected, the digital substrate bonding pads BD3 and TD3 are electrically connected through the bonding wire BL30, and the digital substrate bonding pads BD2' and TD1 are electrically connected through the bonding wire BL31. As can be seen from the above, the digital bonding pad D2 of the substrate 20 is electrically connected to the digital die bonding pad BD2 of the die 21 through the bonding wire BL25, and then transferred from the digital die bonding pad BD2 to the BD2 through the bonding wire ML28 on the die 21 ', the last digital die bonding pad BD2 is then electrically connected to the digital die bonding pad TD1 through the bonding wire BL31. In addition, between the substrate 20 and the die 22, the digital substrate bonding pad D3 and the digital die bonding pad TD2 are electrically connected through the bonding wire BL26.

In the embodiment of the present invention, each of the voltage conversion circuits 210 to 213 is operated to generate an output signal having a specific level according to the voltage level of an input signal received. In one embodiment, for example, a voltage conversion circuit can generate an output signal having a low voltage level according to an input signal whose voltage level is lower than a threshold, and can be higher than the voltage level according to The threshold input signal is used to generate an output signal with a high voltage level. In other words, the voltage conversion circuit operates as the same analog-to-digital converter. In another embodiment, for example, a voltage conversion circuit can generate an output signal having a specific voltage level according to at least one input terminal signal. In other words, the voltage conversion circuit operates like a digital analog converter.

According to an embodiment of the invention, each of the voltage conversion circuits 210 to 213 of the die 21 includes a level shift circuit (LS) or a voltage generation circuit (GV), and includes a Switch circuit. FIGS. 4A-4B show voltage conversion circuits 40 and 41 according to an embodiment of the present invention, wherein the voltage conversion circuit 40 can be used as any one of the voltage conversion circuits 210 and 211. The voltage conversion circuit 41 can be used as any one of the voltage conversion circuits 212 and 213. Referring to FIG. 4A, the voltage conversion circuit 40 includes a level shift circuit 400 and a switching circuit 401, wherein the switching circuit 401 further includes switches 401A and 401B. In FIG. 4A, in addition to the voltage conversion circuit 40, a control circuit 42 and a corresponding operation circuit 43 are shown, both of which are provided on the die 21. In order to clearly show the metal wires and bonding pads of the substrate 20, the die 21, and the die 22 and the bonding wires between them, the control circuit 42 and the operation circuit 43 are not shown in FIG. 3. The control circuit 42 is configured to control the switching circuit 401, and the operation circuit 43 is configured to perform a specific operation of the die 21. The bonding pad BAx in FIG. 4A serves as an analog die bonding pad BA1 or BA2, and the bonding pad BDy serves as a bonding pad digital die bonding pad BD5 or BD6. When the voltage conversion circuit 40 serves as the voltage conversion circuit 210, the bonding pad BAx is an analog die bonding pad BA1, and the bonding pad BDy is the digital die bonding pad BD6; when the voltage conversion circuit 40 serves as the voltage conversion circuit 211, the bonding pad BAx It is an analog die bonding pad BA2, and the bonding pad BDy is a digital die bonding pad BD5. The input terminal of the level shift circuit 400 is electrically connected to the bonding pad BAx, and the output terminal thereof is electrically connected to the input terminal IN401 of the switching circuit 401. The switch 401A is electrically connected between the input terminal IN401 and the output terminal OUT401A of the switching circuit 401, and the switch 401B is electrically connected between the input terminal IN401 and the output terminal OUT401B of the switching circuit 401. The control circuit 42 is electrically connected to the switches 401A and 401B to control the on/off state of the switches 401A and 401B. The operation circuit 43 is electrically connected to the output terminal OUT401A, and the bonding pad BDy is electrically connected to the output terminal OUT401B. Hereinafter, the voltage conversion circuit 40 will be described as the voltage conversion circuit 210 as an example.

Referring to FIGS. 3 and 4A, when the integrated circuit 1 is in a test mode to test the operation circuit 43, the analog substrate bonding pad A1 receives the analog test input signal SAin1 from a test machine, and the analog test input signal SAin1 passes through the bonding wire BL20 is transferred to the analog die bonding pad BA1 (bonding pad BAx as the analog die bonding pad BA1). At this time, the level shift circuit 400 receives the analog test input signal SAin1 from the analog die bonding pad BA1 through the metal wire (ie, the metal line ML20), and generates a digital test input signal according to the voltage level of the analog test input signal SAin1 SDin1. For example, when the voltage level of the analog test input signal SAin1 is lower than a threshold, the level shift circuit 400 generates a digital test input signal SDin1 having a low voltage level (ie, logic level "0"); When the voltage level of the analog test input signal SAin1 is higher than a threshold, the level shift circuit 400 generates a digital test input signal SDin1 with a high voltage level (ie, logic level “1”). At this time, the control circuit 42 controls the switch 401A to turn on and controls the switch 401B to turn off, so as to provide a path between the output terminal IN401 and the output terminal OUT401A, so that the digital test input signal SDin1 is provided to the operation circuit 43 through the turned-on switch 401A. Therefore, the operation circuit 43 can be tested according to the digital test input signal SDin1.

Referring to FIGS. 3 and 4A, when the integrated circuit 1 is in the test mode to test an operation circuit of the die 22, the analog substrate bonding pad A1 receives the analog test input signal SAin2 from a test machine, and the analog test input signal SAin2 It is transmitted to the analog die bonding pad BA1 through the bonding wire BL20 (the bonding pad BAx serves as the analog die bonding pad BA1). At this time, the level shift circuit 400 receives the analog test input signal SAin2 from the analog die bonding pad BA1 through the metal wire (ie metal line ML20), and generates a digital test input signal according to the voltage level of the analog test input signal SAin2 SDin2. At this time, the control circuit 42 controls the switch 401A to turn off and controls the switch 401B to turn on, so as to provide a path between the output terminal IN401 and the output terminal OUT401B, so that the digital test input signal SDin2 passes through the turned-on switch 401B and the metal wire (ie metal Line ML22) is provided to the digital die bonding pad BD6 (the bonding pad BDy serves as the analog die bonding pad BA6). The digital test input signal SDin2 is transmitted to the digital die bonding pad TD6 through the bonding wire BL27, and is also transmitted to the specific operation circuit of the die 22, so that the specific operation circuit can be tested according to the digital test input signal SDin2.

In the case where the voltage conversion circuit 40 serves as the voltage conversion circuit 211, the operation of the voltage conversion circuit 40 is similar to the above, and the description is omitted here.

Referring to FIG. 4B, the voltage conversion circuit 41 includes a voltage generating circuit 410 and a switching circuit 411, wherein the switching circuit 411 further includes switches 411A and 411B. In FIG. 4B, in addition to the voltage conversion circuit 41, the control circuit 44 and a corresponding operation circuit 45 are shown, both of which are provided on the die 22. In order to clearly show the metal wires and bonding pads of the substrate 20, the die 21, and the die 22 and the bonding wires between them, the control circuit 44 and the operation circuit 45 are not shown in FIG. 3. The control circuit 44 is configured to control the switching circuit 411, and the operation circuit 45 is configured to perform a specific operation of the die 22. The bonding pad BAm in FIG. 4B serves as an analog die bonding pad BA3 or BA4, and the bonding pad BDn serves as a bonding pad digital die bonding pad BD3 or BD4. When the voltage conversion circuit 41 is used as the voltage conversion circuit 212, the bonding pad BAm is an analog die bonding pad BA3, and the bonding pad BDn is the digital die bonding pad BD4; when the voltage conversion circuit 41 is used as the voltage conversion circuit 213, the bonding pad BAm It is an analog die bonding pad BA4, and the bonding pad BDn is a digital die bonding pad BD3. The input end of the voltage generating circuit 410 is electrically connected to the output end OUT411 of the switching circuit 411, and the output end thereof is electrically connected to the bonding pad BAm. The switch 411A is electrically connected between the input terminal IN411A and the output terminal OUT411 of the switching circuit 411, and the switch 411B is electrically connected between the input terminal IN41B and the output terminal OUT411 of the switching circuit 411. The control circuit 44 is electrically connected to the switches 411A and 411B to control the on/off state of the switches 411A and 411B. The operation circuit 45 is electrically connected to the input terminal IN411A, and the bonding pad BDn is electrically connected to the input terminal IN411B. Hereinafter, the voltage conversion circuit 41 will be used as the voltage conversion circuit 212 as an example.

Referring to FIGS. 3 and 4B, when the integrated circuit 1 is in the test mode to check the result of the operation circuit 45 after the test, the control circuit 44 controls the switch 411A to be turned on and the switch 411B to be turned off, to provide the input terminal IN411A and the output terminal A path between OUT411 causes the digital test output signal SDout1 from the operation circuit 43 to be provided to the voltage generating circuit 410 through the turned-on switch 411A. For example, the operation circuit 45 here is the aforementioned operation circuit 43. Therefore, the digital test output signal SDout1 described here is generated by the tested operation circuit 43. For example, the operation circuit 43 responds to The digital test output signal SDout1 is generated based on the aforementioned test of the digital test input signal SDin1. The voltage generating circuit 410 generates an analog test output signal SAout1 having a specific voltage level according to the digital test output signal SDout1, and transmits it to the analog die bonding pad BA3 (bonding pad BAm as an analog crystal) through a metal wire (ie, metal wire ML24) Grain joint pad BA3). The analog test output signal SAout1 is then transmitted to the analog substrate bonding pad A3 through the bonding wire BL22, and the testing machine receives the analog test output signal SAout1 through the analog substrate bonding pad A3 to check the test result of the operation circuit 43.

Referring to FIGS. 3 and 4B, when the integrated circuit 1 is in the test mode to check the test result of a specific operation circuit of the die 22, a digital test output signal SDout2 from the specific operation circuit passes through a corresponding digital crystal The grain bonding pad and a corresponding bonding wire (for example, the digital die bonding pad TD4 and the bonding wire BL29) are transferred to the digital die bonding pad BD4 (the bonding pad BDn serves as the digital die bonding pad BA4). The digital test output signal SDout2 described herein is generated by the tested specific operation circuit of the die 22, for example, the specific operation circuit generates the digital test output signal SDout1 in response to the test based on the aforementioned digital test input signal SDin2 . At this time, the control circuit 44 controls the switch 411A to turn off and controls the switch 411B to turn on to provide a path between the input terminal IN411B and the output terminal OUT411, so that the digital test output signal SDout2 from the die 22 passes through the metal line (and metal Line ML26) and the turned-on switch 411B are provided to the voltage generating circuit 410. The voltage generating circuit 410 generates an analog test output signal SAout2 having a specific voltage level according to the digital test output signal SDout2, and transmits it to the analog die bonding pad BA3 (bonding pad BAm as an analog crystal) through a metal wire (ie metal wire ML24) Grain joint pad BA3). The analog test output signal SAout2 is then transmitted to the analog substrate bonding pad A3 through the bonding wire BL22, and the testing machine receives the analog test output signal SAout2 through the analog substrate bonding pad A3 to check the test result of the operation circuit 43.

In the case where the voltage conversion circuit 41 serves as the voltage conversion circuit 213, the operation of the voltage conversion circuit 41 is similar to the above, and the description is omitted here.

According to an embodiment of the invention, the substrate 20 can directly receive a digital test input signal from the machine through a digital substrate bonding pad (such as D1 or D2) to test an operation circuit of the die 21 or 22. In this case, the digital test input signal can be directly transmitted to a corresponding operation circuit of the die 21 or 22 through at least one digital die bonding pad, without passing through the voltage conversion circuit. Referring to FIG. 3, for example, a digital test input signal can be transmitted from the digital substrate bonding pad D1 to the digital die bonding pad BD1 through the bonding wire BL24 to test a specific operation circuit on the die 21; or a digital test input signal It can be transferred from the digital substrate bonding pad D2 to the digital die bonding pad BD2 through the bonding wire BL25, and then to the digital die bonding pad TD1 through the metal wire ML28 and the bonding pad BD2' to test a specific operation on the die 22 Circuit.

According to another embodiment of the present invention, in order to avoid the interlacing of the bonding wires between the dies 21 and 22, the electrical connection between the dies 21 and 22 can be transferred through another bonding pad disposed on the dies 22 Pick up. Referring to FIGS. 3 and 5, the digital die bonding pad TD4 in FIG. 5 is not electrically connected to the digital die bonding pad BD4 directly through the bonding wire BL29 as shown in FIG. 3, but through the bonding wire BL51 and the digital die The bonding pad BD3' and the metal wire ML51 are connected to electrically connect the digital die bonding pad BD3; the digital die bonding pad TD3 in FIG. 5 is not directly connected to the digital through the bonding wire BL30 as shown in FIG. 3 The die bonding pad BD3 is electrically connected to the digital die bonding pad BD4 through the connection of the bonding wire BL50, the digital die bonding pad BD4', and the metal wire ML50.

Referring to FIG. 6, according to an embodiment of the present invention, an integrated circuit 1'includes a substrate 20' and a single die 21' disposed on the substrate 20'. The arrangement of bonding pads on the substrate 20' is substantially the same as the substrate 20 of FIG. The die 21' is substantially the same as the die 21 of FIG. 3 except that the die 21' does not have the digital die bonding pads BD3, BD4, BD2, and BD2' of FIG. The electrical connection between the substrate 20' and the die 21' is substantially the same as the electrical connection between the substrate 20 and the die 21 of FIG. 3, the only difference is that the digital substrate bonding pad D2 is through bonding The line BL60 is connected to the digital die bonding pad BD60'. As shown in FIG. 6, the digital die bonding pad BD60' is further electrically connected to the BD60 through the metal wire ML60. Therefore, it can be known that when the final destination digital die bonding pad BD60 is far away from the digital substrate bonding pad D2, it can be transferred to the substrate digital through the redundant digital die bonding pad BD60' closer to the substrate digital bonding pad D2 Bonding pad D2.

According to the above-mentioned embodiment, in this case, a voltage conversion circuit that operates like a digital-to-analog converter and an analog-to-digital converter is provided on a die so that an analog bonding pad of the substrate can also receive test input signals to test the die or Output the analog test results of the die. In addition, through the transfer on a die (such as die 21), the die or another die (such as die 22) can be tested through the same pin pair, so that in the package Under the limited number of pins (that is, the limited number of bonding pads on the substrate), the die can still be tested.

Although the present invention is disclosed as above with preferred embodiments, it is not intended to limit the scope of the present invention. Any person with ordinary knowledge in the technical field can make some changes and without departing from the spirit and scope of the present invention. Retouching, therefore, the protection scope of the present invention shall be subject to the scope defined in the appended patent application.

1. 1’: Integrated circuit

10: Pin

20, 20’: substrate

21, 21’, 22: grain

40, 41: voltage conversion circuit

42, 44: control circuit

43, 45: operating circuit

210...213: voltage conversion circuit

400: level shift circuit

401: Switching circuit

401A, 401B: switch

410: voltage generating circuit

411: Switching circuit

411A, 411B: switch

A1...A4: Analog substrate bonding pads

D1...D3: Digital substrate bonding pads

BA1...BA4, BAx, BAm: Analog die bonding pads

BD1...BD6, BD2’...BD4’, BD60, BD60’, BDy, BDn: digital die bonding pads

BL20…BL31, BL50, BL51, BL60: bonding wire

IN401, IN411A, IN411B: input terminal

OUT401A, OUT401B, OUT411: output

ML20…ML28, ML50, ML51, ML60: metal wire

SAin1, SAin2: analog test input signal

SAout1, SAout2: analog test output signal

SDin1, SDin2: digital test input signal

SDout1, SDout2: digital test output signal

TD1~TD6: digital die bonding pad

Fig. 1 shows the appearance of an integrated circuit according to an embodiment of the present invention. FIG. 2A shows the arrangement of plural dies in an integrated circuit according to an embodiment of the invention. FIG. 2B shows the arrangement of plural dies in an integrated circuit according to another embodiment of the present invention. FIG. 3 shows the layout of bonding pads, bonding wires, and metal wires in an integrated circuit according to an embodiment of the present invention. FIG. 4A shows a voltage conversion circuit according to an embodiment of the present invention. FIG. 4B shows a voltage conversion circuit according to another embodiment of the present invention. FIG. 5 shows the layout of bonding pads, bonding wires, and metal wires in an integrated circuit according to another embodiment of the present invention. FIG. 6 shows the layout of bonding pads, bonding wires, and metal wires in an integrated circuit according to another embodiment of the present invention.

1: Integrated circuit

20: substrate

21, 22: grain

210...213: voltage conversion circuit

A1...A4: Analog substrate bonding pads

D1...D3: Digital substrate bonding pads

BA1...BA4: Analog die bonding pad

BD1...BD6, BD2’: digital die bond pads

BL20...BL31: Bonding wire

ML20...ML28: metal wire

TD1~TD6: digital die bonding pad

Claims (20)

An integrated circuit includes: a substrate having a first analog substrate bonding pad; a first die disposed on the substrate, including: a first analog die bonding pad through which the first analog substrate bonding pad penetrates A first bonding wire is electrically connected to the first analog die bonding pad; a first voltage conversion circuit is electrically connected to the first analog die bonding pad; and a first digital die bonding pad is electrically connected to the A first voltage conversion circuit; and a second die, disposed on the substrate, having a second digital die bonding pad, wherein the first digital die bonding pad is electrically connected to the first through a second bonding wire Two-digit die bonding pad. The integrated circuit as described in item 1 of the patent application range, wherein, when the integrated circuit is in a test mode, the first analog substrate bonding pad receives an analog test input signal, and the first voltage conversion circuit receives the Analog test input signal and generate a digital test input signal according to the voltage level of the analog test input signal. The integrated circuit as described in item 2 of the patent application scope, wherein the first voltage conversion circuit includes: a switching circuit having an input terminal for receiving the digital test input signal, electrically connected to the first die A first output terminal of an operation circuit and a second output terminal electrically connected to the first digital die bonding pad; Wherein, when the integrated circuit receives the analog test input signal in the test mode to test the operating circuit, the switching circuit provides a first path between the input terminal and the first output terminal to The digital test input signal is output to the operation circuit. The integrated circuit as described in item 3 of the patent application scope, wherein, when the integrated circuit receives the analog test input signal in the test mode to test the second die, the switching circuit provides the input A second path between the second output terminal to output the digital test input signal to the first digital die bonding pad. The integrated circuit as described in item 1 of the patent application scope, wherein, when the integrated circuit is in a test mode, the first voltage conversion circuit receives a digital test output signal and generates an analogy based on the digital test output signal Test the output signal, and output the analog test output signal to the first analog die bonding pad. The integrated circuit as described in item 5 of the patent application scope, wherein the first voltage conversion circuit includes: a switching circuit having a first input terminal electrically connected to an operation circuit in the first die, the A second output terminal and an output terminal of the first digital die bonding pad; wherein, when the integrated circuit tests the operation circuit in the test mode, the switching circuit provides between the first input terminal and the A first path between the output terminals to receive the digital test output signal from the operation circuit. The integrated circuit as described in item 6 of the patent application scope, wherein, when the integrated circuit tests the second die in the test mode, the switching circuit A second path between the second input terminal and the output terminal is provided to receive the digital test output signal from the second die. The integrated circuit as described in item 1 of the patent application scope, wherein the substrate further has a second analog substrate bonding pad; wherein the first die further includes: a second analog die bonding pad, which passes through a first Three bonding wires are electrically connected to the second analog substrate bonding pad; a second voltage conversion circuit is electrically connected to the second analog die bonding pad; and a third digital die bonding pad is electrically connected to the second voltage A conversion circuit; and wherein the second die further includes a fourth digital die bonding pad electrically connected to the third digital die bonding pad through a fourth bonding wire. The integrated circuit as described in item 8 of the patent application range, wherein the first voltage conversion circuit includes a level shift circuit that receives an analog test input signal from a bonding pad of the first analog substrate in a test mode And generate a digital test input signal according to the voltage level of the analog test input signal; and wherein the second voltage conversion circuit includes a voltage generating circuit that receives a digital test output signal in the test mode, based on the digital The test output signal is used to generate an analog test output signal having a specific voltage level, and the analog test output signal is output to the second analog substrate bonding pad. The integrated circuit as described in item 1 of the patent application scope, wherein the substrate further includes a first digital substrate bonding pad; Wherein, the first die further includes a third digital die bonding pad, and the first digital substrate bonding pad is electrically connected to the third digital die bonding pad through a third bonding wire. The integrated circuit as described in item 10 of the patent application range, wherein the second die further includes a fourth digital die bond pad, and the third digital die bond pad is electrically connected to the fourth die wire The fourth digital die bonding pad. The integrated circuit as described in item 10 of the patent application range, wherein the first die further includes a fourth digital die bonding pad, and the third digital die bonding pad is electrically connected to the fourth digital die A bonding pad; and wherein the second die further includes a fifth digital die bonding pad, and the fourth digital die bonding pad is electrically connected to the fifth digital die bonding pad through a fourth bonding wire. The integrated circuit as described in item 10 of the patent application range, wherein the first die further includes: a fourth digital die bonding pad, the third digital die bonding pad is electrically connected to the fourth digital die A bonding pad; and an operation circuit electrically connected to the fourth digital die bonding pad. The integrated circuit as described in item 1 of the patent application range, wherein the first die further includes a third digital die bonding pad electrically connected to the first voltage conversion circuit and the first digital die bonding pad And between the first voltage conversion circuit and the first digital die bonding pad. The integrated circuit as described in item 1 of the patent application scope, wherein the first die and the second die are arranged on the substrate by a parallel packaging method. The integrated circuit as described in item 1 of the patent application scope, in which The first die and the second die are arranged on the substrate by a vertical packaging method. A test method for an integrated circuit including a substrate, a first die, and a second die, the substrate having a first analog substrate bonding pad, the first die having a A first analog die bond pad and a first digital die bond pad, the second die has a second digital die bond pad, the test method includes: providing a first analog test during a first test period Input signals to the first analog substrate bonding pad; transmit the first analog test input signal to a first voltage conversion circuit of the first die through the first analog die bonding pad; by the first voltage conversion circuit Converting the first analog test input signal into a first digital test input signal; transmitting the first digital test input signal to the second digital die bond pad through the first digital die bond pad; and using the first A digital test input signal is used to perform a first test operation on the second die. The test method as described in Item 17 of the patent application range, wherein the substrate further has a second analog substrate bonding pad, the first die further has a second analog die bonding pad and a third digital die bonding Pad, the second die has a fourth digital die bonding pad, and the test method further includes: generating a first digital test output signal on the fourth digital die bonding pad in response to the first test operation; Transmitting the first digital test output signal to a second voltage conversion circuit of the first die through the third digital die bonding pad; Converting the first digital test output signal into a first analog test output signal by the second voltage conversion circuit; and transmitting the first analog test output signal to the second analog substrate through the second analog die bonding pad Bonding pad. The test method described in Item 17 of the patent application scope further includes: providing a second analog test input signal to the first analog substrate bonding pad during a second test period; Transmitting the second analog test input signal to the first voltage conversion circuit; converting the second analog test input signal into a second digital test input signal by the first voltage conversion circuit; and using the second digital test input signal To perform a test operation on the first die. The test method as described in item 19 of the patent application range, wherein the substrate further has a second analogous substrate bonding pad, the first die has a second analogous die bonding pad and the test method further includes: reaction In the first test operation, a second digital test output signal is generated from the first die; the second digital test output signal is converted into a second analog test output signal by the second voltage conversion circuit; and through the The second analog die bonding pad transmits the second analog test output signal to the second analog substrate bonding pad.

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