JP2017037924A - Semiconductor package - Google Patents

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JP2017037924A
JP2017037924A JP2015157442A JP2015157442A JP2017037924A JP 2017037924 A JP2017037924 A JP 2017037924A JP 2015157442 A JP2015157442 A JP 2015157442A JP 2015157442 A JP2015157442 A JP 2015157442A JP 2017037924 A JP2017037924 A JP 2017037924A
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semiconductor package
semiconductor element
sulfur
semiconductor
chlorine
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辰徳 猿渡
Tatsunori Sawatari
辰徳 猿渡
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Amkor Technology Japan Inc
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J Devices Corp
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    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
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    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484Connecting portions
    • H01L2224/4845Details of ball bonds
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    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/48505Material at the bonding interface
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    • H01L2224/48507Material at the bonding interface comprising an intermetallic compound
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    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
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    • H01L2924/181Encapsulation

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  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To suppress occurrence of joining defect between a bonding wire and a metal electrode, when performing reliability test at a higher temperature.SOLUTION: A semiconductor package includes: a semiconductor element having a die pad and a plurality of electrode pads placed on the die pad; a connections placed on the electrode pads; a plurality of external terminals placed around the die pads; a wiring for connecting the external terminals and the electrode pads electrically; and a sealing body for sealing at least the semiconductor element and the wiring entirely. The sealing body is a resin material, containing 100 ppm or less of sulfur and chlorine, when measured by whole volume analysis.SELECTED DRAWING: Figure 1

Description

本発明は、半導体パッケージにおける配線の信頼性を改善する技術に関する。   The present invention relates to a technique for improving the reliability of wiring in a semiconductor package.

従来の半導体パッケージでは、半導体素子上の金属電極と外部端子との間を接合するボンディングワイヤ(ワイヤボンディング法で接続するワイヤ)が用いられ、少なくとも半導体素子とボンディングワイヤ全体が封止樹脂によって封止されている(例えば、特許文献1)。ボンディングワイヤの素材も金属であることから、ボンディングワイヤと金属電極との接合部には、合金層が形成される。   In a conventional semiconductor package, a bonding wire (wire connected by a wire bonding method) for bonding between a metal electrode on a semiconductor element and an external terminal is used, and at least the entire semiconductor element and the bonding wire are sealed with a sealing resin. (For example, Patent Document 1). Since the material of the bonding wire is also a metal, an alloy layer is formed at the joint between the bonding wire and the metal electrode.

一方、近年、半導体パッケージは、車載向け(特に、制御系)への展開が加速している。そして、車載用の集積回路(IC)のための各種信頼性試験の認定基準であるAEC−Q100がハイグレード化し、半導体パッケージに対する要求は、ますます増大している。一般用途のICの信頼性試験では、125℃加熱が一般的であるが、車載用のICでは、150〜175℃のより高温での信頼性が要求される。信頼性試験としては、高温で加熱するHTS(High Temperature Storage)試験、高温高湿環境での加熱試験であるPCT(Pressure Cooker Test)及びHAST(Highly Accelerated Temperature and Humidity Stress Test)などがある。   On the other hand, in recent years, development of semiconductor packages for in-vehicle use (particularly, control systems) has been accelerated. AEC-Q100, which is a certification standard for various reliability tests for in-vehicle integrated circuits (ICs), has been upgraded, and the demand for semiconductor packages has been increasing. In general-purpose IC reliability tests, heating at 125 ° C. is common, but in-vehicle ICs require reliability at higher temperatures of 150 to 175 ° C. As the reliability test, there are an HTS (High Temperature Storage) test that heats at a high temperature, a PCT (Pressure Cooker Test) that is a heat test in a high-temperature and high-humidity environment, and a HAST (Highly Integrated Temperature and Humidity Test).

特開2009−59962号公報JP 2009-59962 A

車載用途に対応するために、上記のような信頼性試験を行うと、従来の信頼性試験では顕在化しなかった不良が発生することが問題となっている。例えば、ボンディングワイヤと金属電極との接合不良が生じるという問題が生じることが判明している。   When the reliability test as described above is performed in order to cope with the in-vehicle use, there is a problem that a defect that has not been revealed in the conventional reliability test occurs. For example, it has been found that there is a problem that a bonding failure between a bonding wire and a metal electrode occurs.

本発明は、上記事情に鑑みてなされたものであり、その目的とするところは、より高温での信頼性試験を行う場合に、ボンディングワイヤと金属電極との接合不良が発生することを抑制するところにある。   The present invention has been made in view of the above circumstances, and an object thereof is to suppress the occurrence of bonding failure between a bonding wire and a metal electrode when a reliability test at a higher temperature is performed. By the way.

本実施形態によれば、ダイパッドと前記ダイパッドの上に配置され、複数の電極パッドを有する半導体素子と、前記電極パッドの上に配置される接続部と、前記ダイパッドの周囲に複数個配置される外部端子と、前記外部端子と前記電極パッドと電気的に接続する配線と、少なくとも前記半導体素子及び前記配線全体を封止する封止体とを有し、前記封止体は樹脂材料であり、前記樹脂材料は、全量分析で測定したときにそれぞれ100ppm未満の硫黄及び塩素を含有することを特徴とする半導体パッケージが提供される。   According to the present embodiment, a semiconductor device having a plurality of electrode pads disposed on the die pad and the die pad, a connection portion disposed on the electrode pad, and a plurality of semiconductor devices disposed around the die pad. An external terminal; a wiring electrically connected to the external terminal and the electrode pad; and a sealing body that seals at least the semiconductor element and the entire wiring; and the sealing body is a resin material, Provided is a semiconductor package characterized in that the resin material contains less than 100 ppm of sulfur and chlorine, respectively, when measured by total analysis.

前記封止体は、全量分析で測定したときにそれぞれ50ppm以下の硫黄及び塩素を含有してもよい。   The sealing body may contain 50 ppm or less of sulfur and chlorine, respectively, when measured by total analysis.

前記半導体素子は、複数積層されていてもよい。   A plurality of the semiconductor elements may be stacked.

前記配線は、主成分が銅であってもよい。   The wiring may be composed mainly of copper.

前記外部端子は、リード又は半田バンプのいずれかであってもよい。   The external terminal may be either a lead or a solder bump.

本発明の一実施形態によれば、より高温での信頼性試験を行う場合に、ボンディングワイヤと金属電極との接合不良が発生することを抑制することができる。   According to one embodiment of the present invention, it is possible to suppress the occurrence of a bonding failure between a bonding wire and a metal electrode when performing a reliability test at a higher temperature.

本発明の一実施形態に係る半導体パッケージの概略構成を示す斜視図である。It is a perspective view showing a schematic structure of a semiconductor package concerning one embodiment of the present invention. 図1の半導体パッケージの上面図である。It is a top view of the semiconductor package of FIG. 図2の半導体パッケージのA−B線に沿った断面図である。FIG. 3 is a cross-sectional view taken along line AB of the semiconductor package of FIG. 2. 従来の半導体パッケージのワイヤ接合部付近を示す断面図である。It is sectional drawing which shows the wire junction part vicinity of the conventional semiconductor package.

以下、本発明の一実施形態について、図面を参照しながら詳細に説明する。以下に示す実施形態は本発明の実施形態の一例であって、本発明はこれらの実施形態に限定されるものではない。なお、本実施形態で参照する図面において、同一部分または同様な機能を有する部分には同一の符号を付し、その繰り返しの説明は省略する場合がある。また、図面の寸法比率は説明の都合上実際の比率とは異なったり、構成の一部が図面から省略されたりする場合がある。   Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The following embodiments are examples of the embodiments of the present invention, and the present invention is not limited to these embodiments. Note that in the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference numerals, and repeated description thereof may be omitted. In addition, the dimensional ratio in the drawing may be different from the actual ratio for convenience of explanation, or a part of the configuration may be omitted from the drawing.

[半導体パッケージの構成]
図1乃至図3を用いて、本発明の一実施形態に係る半導体パッケージの構成について説明する。図1は、本発明の一実施形態に係る半導体パッケージの概略構成を示す斜視図である。図2は、図1の半導体パッケージの上面図である。図3は、図2の半導体パッケージのA−B線に沿った断面図である。半導体パッケージ10は、外部端子101、ダイパッド102、半導体素子103、半導体素子保護膜111、金属電極112、接合部113、金属ワイヤ104及び封止樹脂(モールド樹脂)105を含む。
[Structure of semiconductor package]
A configuration of a semiconductor package according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG. 1 is a perspective view showing a schematic configuration of a semiconductor package according to an embodiment of the present invention. FIG. 2 is a top view of the semiconductor package of FIG. FIG. 3 is a cross-sectional view taken along line AB of the semiconductor package of FIG. The semiconductor package 10 includes an external terminal 101, a die pad 102, a semiconductor element 103, a semiconductor element protective film 111, a metal electrode 112, a bonding portion 113, a metal wire 104, and a sealing resin (mold resin) 105.

外部端子101は、この例では、リードフレームであり、半導体パッケージは、QFN(Quad Flat Non−leaded package)であるが、これに限定されるものではなく、QFP(Quad Flat Package)、SOP(Small Outline Package)などで用いられるリードフレームや、BGA(Ball Grid Array)パッケージなどで用いられる半球状の半田などであってもよい。   In this example, the external terminal 101 is a lead frame, and the semiconductor package is a QFN (Quad Flat Non-Leaded Package), but is not limited to this, and is not limited to this, but a QFP (Quad Flat Package), SOP (Small). It may be a lead frame used in an Outline Package or a hemispherical solder used in a BGA (Ball Grid Array) package or the like.

ダイパッド102は、半導体素子103を固定支持する。半導体素子103は、複数の金属電極112を有し、ダイパッド102の上に配置される。また、半導体素子103は、ICチップやLSIチップ等の半導体デバイスである。図1では、ダイパッド102上に1つの半導体素子103を配置する例を示しているが、実際には、ダイパッド102上に複数の半導体素子103を配置することが可能である。   The die pad 102 fixedly supports the semiconductor element 103. The semiconductor element 103 has a plurality of metal electrodes 112 and is disposed on the die pad 102. The semiconductor element 103 is a semiconductor device such as an IC chip or an LSI chip. Although FIG. 1 shows an example in which one semiconductor element 103 is arranged on the die pad 102, a plurality of semiconductor elements 103 can actually be arranged on the die pad 102.

半導体素子保護膜(パッシベーション膜)111は、金属電極112が水分によって腐食することから保護するためにある。半導体素子保護膜111としては、窒化シリコン膜が挙げられるが、これらに限定されるものではなく、公知の技術を用いてよい。   The semiconductor element protective film (passivation film) 111 is for protecting the metal electrode 112 from being corroded by moisture. Examples of the semiconductor element protective film 111 include a silicon nitride film, but the semiconductor element protective film 111 is not limited thereto, and a known technique may be used.

金属電極112と金属ワイヤ104との接合部113には、金属電極112の金属と金属ワイヤ104の金属との合金層が形成される。金属電極112と金属ワイヤ104との電気的な接続を良好に保つには、合金層が安定的に存在することを要する。そこで、高温状態であっても、接合部の合金が変質しないために、接合部に不純物が作用しないようにする必要がある。   An alloy layer of the metal of the metal electrode 112 and the metal of the metal wire 104 is formed at the joint 113 between the metal electrode 112 and the metal wire 104. In order to maintain a good electrical connection between the metal electrode 112 and the metal wire 104, it is necessary that the alloy layer exists stably. Therefore, even in a high temperature state, the alloy at the joint does not change, so it is necessary to prevent impurities from acting on the joint.

接合部に不純物が作用しないようにするためには、接合部をパッシベーション膜で覆うことも考えられる。しかしながら、製造プロセス上、半導体ウェハの全面にパッシベーション膜を塗布した後に、金属電極112を金属ワイヤ104でつなぐために窓を開け、その後、金属電極112を金属ワイヤ104でボンディングする。ボンディングの際、金属電極112と金属ワイヤ104との接合部に、合金層ができるのであるから、接合部は、必然的にパッシベーション膜で覆われないことになる。その後、接合部は、封止樹脂105に覆われるため、封止樹脂と接触する部分が必然的に存在することになる。   In order to prevent impurities from acting on the junction, it is conceivable to cover the junction with a passivation film. However, in the manufacturing process, after a passivation film is applied to the entire surface of the semiconductor wafer, a window is opened to connect the metal electrode 112 with the metal wire 104, and then the metal electrode 112 is bonded with the metal wire 104. Since an alloy layer is formed at the joint between the metal electrode 112 and the metal wire 104 during bonding, the joint is inevitably not covered with the passivation film. After that, since the joint portion is covered with the sealing resin 105, a portion that comes into contact with the sealing resin inevitably exists.

本発明は、接合部に接する部材に含まれる、合金層に悪影響を与える不純物を、低減する。すなわち、封止樹脂に含まれる、合金層と反応し得る不純物濃度を低減する。好ましくは、100ppm未満とする。   The present invention reduces impurities that adversely affect the alloy layer, which are included in a member in contact with the joint. That is, the concentration of impurities that can react with the alloy layer contained in the sealing resin is reduced. Preferably, it is less than 100 ppm.

金属電極112の材質は、この例では、アルミニウムである。しかし、純アルミニウムに限定されるものではなく、アルミニウム合金であってもよい。ここで、アルミニウム合金とは、Al−1%Si、Al−0.5%Cu、Al−1%Si−0.5%Cuなどが挙げられるが、これらに限定されるものではない。   The material of the metal electrode 112 is aluminum in this example. However, it is not limited to pure aluminum, and may be an aluminum alloy. Here, examples of the aluminum alloy include Al-1% Si, Al-0.5% Cu, and Al-1% Si-0.5% Cu, but are not limited thereto.

金属ワイヤ(ボンディングワイヤ)104は、外部端子101と半導体素子103の金属電極112とを電気的に接続する。金属ワイヤ104の素材は、金(Au)であってもよい。例えば、金属ワイヤ104の素材として、高純度(純度>99.99%)の4N系金ワイヤが主に用いられている。もっとも、金とアルミニウムの接合部(Au/Al接合部)の金属間化合物の成長速度が速いため、高温で加熱するHTS試験等を行うと、カーケンダル現象によるボイドが発生し、金ワイヤとアルミニウム電極との接合不良が生じ得ることから、高温での安定性を考えると、ボイドの成長を遅くする合金ワイヤや銅(Cu)ワイヤを用いることが好ましい。銅ワイヤである場合には、銅が主成分であれば、微量な添加材料が含まれていてもよい。微量な添加材料としては、パラジウム(Pd)、金、銀(Ag)などが挙げられるが、これらに限定されるものではない。   A metal wire (bonding wire) 104 electrically connects the external terminal 101 and the metal electrode 112 of the semiconductor element 103. The material of the metal wire 104 may be gold (Au). For example, a high purity (purity> 99.99%) 4N gold wire is mainly used as the material of the metal wire 104. However, because the growth rate of the intermetallic compound at the gold / aluminum junction (Au / Al junction) is high, voids due to the Kirkendall phenomenon occur when HTS tests are performed at high temperatures. In view of stability at high temperatures, it is preferable to use alloy wires or copper (Cu) wires that slow the growth of voids. In the case of a copper wire, a trace amount of additive material may be included as long as copper is the main component. Examples of the trace amount of additive material include, but are not limited to, palladium (Pd), gold, silver (Ag), and the like.

金属ワイヤ104が銅を主成分とした銅ワイヤで、金属電極がアルミニウムである場合には、CuとAlで構成される金属間化合物の主要な層は、CuAl層及びCuAl層であることが知られている。この例では、接合部113は、CuAl層及びCuAl層などの合金層である。しかし、銅は、金に比べて、化学的安定性が低い。そこで、本発明では、高温時において、CuAl合金を変質させる不純物が作用しないにすることが重要となる。 When the metal wire 104 is a copper wire containing copper as a main component and the metal electrode is aluminum, the main layers of the intermetallic compound composed of Cu and Al are Cu 9 Al 4 layer and CuAl 2 layer. It is known that there is. In this example, the joint 113 is an alloy layer such as a Cu 9 Al 4 layer and a CuAl 2 layer. However, copper is less chemically stable than gold. Therefore, in the present invention, it is important that impurities that alter the CuAl alloy do not act at high temperatures.

具体的には、接合部113に接する封止樹脂105に不純物が極力含まれないようにすることが好ましい。ここで、「極力含まれないこと」とは、製造プロセス上、不可避的に含まれてしまうことを除き、意図的に含有させないことを意味する。   Specifically, it is preferable to prevent impurities from being contained in the sealing resin 105 in contact with the joint 113 as much as possible. Here, “not to be included as much as possible” means not to be intentionally included unless it is inevitably included in the manufacturing process.

CuAl層は、水分や不純物に弱い。そのため、封止樹脂から不純物が作用しないためには、該当する不純物が100ppm未満であることが望ましい。 The Cu 9 Al 4 layer is vulnerable to moisture and impurities. Therefore, it is desirable that the corresponding impurity is less than 100 ppm so that the impurity does not act from the sealing resin.

封止樹脂105は、外部からの水分や不純物の混入からダイパッド102、半導体素子103の上部を保護する。封止樹脂105としては、エポキシ樹脂、シアネートエステル樹脂、アクリル樹脂、ポリイミド樹脂、シリコン樹脂などを使用することができる。   The sealing resin 105 protects the upper portion of the die pad 102 and the semiconductor element 103 from entry of moisture and impurities from the outside. As the sealing resin 105, an epoxy resin, a cyanate ester resin, an acrylic resin, a polyimide resin, a silicon resin, or the like can be used.

ところで、封止樹脂105には、半導体パッケージ内で封止樹脂とリードフレーム等の金属との密着性を高めるために、硫黄(S)や塩素(Cl)などの不純物が含有されている。添加されている元素のうち、特に、硫黄や塩素は、CuAl合金層に作用するため好ましくない。   Incidentally, the sealing resin 105 contains impurities such as sulfur (S) and chlorine (Cl) in order to improve the adhesion between the sealing resin and a metal such as a lead frame in the semiconductor package. Of the added elements, sulfur and chlorine are particularly undesirable because they act on the CuAl alloy layer.

Figure 2017037924
Figure 2017037924

表1は、それぞれの評価樹脂(サンプル)において、サンプル数22pcsでHTS試験を行ったときに、銅ワイヤとアルミニウム電極の接合部113が電気的にオープンとなった不良の個数である。表1に示すように、封止樹脂に硫黄が100pppm以上、塩素が50ppm以下含有されている樹脂(サンプル2)を用いた場合、175℃で1000時間のHTS試験を行ったところ、不良は、0pcsであった。しかし、175℃で2000時間のHTS試験を行ったところ、不良は、21pcsとなった。   Table 1 shows the number of defects in which the bonding portion 113 between the copper wire and the aluminum electrode was electrically opened when the HTS test was performed with the number of samples of 22 pcs in each evaluation resin (sample). As shown in Table 1, when using a resin (sample 2) containing 100 ppm or more of sulfur and 50 ppm or less of chlorine in the sealing resin, an HTS test was conducted at 175 ° C. for 1000 hours. 0 pcs. However, when an HTS test was performed at 175 ° C. for 2000 hours, the defect was 21 pcs.

本発明者らが鋭意調査したところ、高温放置試験を行った場合に、銅ワイヤと半導体素子のアルミニウム電極との接合部分の合金層にドライコロージョンによるマイクロクラックが生じることが判明した。上記のとおり、175℃で2000時間放置したときには、接合部分が電気的オープンとなったことが確認されている。本発明者らが上記不良の接合部分の断面研磨後に、EDX(Energy Dispersive X−ray Spectroscopy:エネルギー分散型X線分光法)やEPMA(Electron Probe Micro Analyser:電子線マイクロアナライザ)等による断面の元素解析を行ったところ、硫黄や塩素が確認された。   As a result of intensive investigations by the present inventors, it was found that microcracks due to dry corrosion occur in the alloy layer at the joint portion between the copper wire and the aluminum electrode of the semiconductor element when a high temperature storage test is performed. As described above, it has been confirmed that when left at 175 ° C. for 2000 hours, the joint portion is electrically open. After the present inventors have polished the cross section of the defective joint, the elements of the cross section using EDX (Energy Dispersive X-ray Spectroscopy) or EPMA (Electron Probe Micro Analyzer: Electron Microanalyzer) are used. As a result of analysis, sulfur and chlorine were confirmed.

ここで、図4を用いて、接合部にマイクロクラックが生じることを説明する。図4は、従来の半導体パッケージのワイヤ接合部付近を示す断面図である。半導体素子903上に半導体素子保護膜911及びアルミニウム電極912が配置される。また、アルミニウム電極912とワイヤ904との間には接合部913がある。封止樹脂905には、不純物である塩素915と硫黄916がある。この塩素915と硫黄916が接合部913に衝突することによって、マイクロクラックが生じるのである。そのため、封止樹脂中に塩素や硫黄の含有量が多ければ多いほど、マイクロクラックが生じやすくなる。   Here, it demonstrates that a microcrack arises in a junction part using FIG. FIG. 4 is a cross-sectional view showing the vicinity of a wire bonding portion of a conventional semiconductor package. A semiconductor element protective film 911 and an aluminum electrode 912 are disposed on the semiconductor element 903. In addition, a joint portion 913 is provided between the aluminum electrode 912 and the wire 904. The sealing resin 905 includes impurities such as chlorine 915 and sulfur 916. When the chlorine 915 and sulfur 916 collide with the joint portion 913, micro cracks are generated. Therefore, the greater the content of chlorine and sulfur in the sealing resin, the easier it is for microcracks to occur.

他方、封止樹脂に硫黄及び塩素が50pppm以下含有されている樹脂(サンプル1)を用いた場合、175℃で1000時間のHTS試験を行ったところ、不良は、0pcsであった。また、175℃で2000時間のHTS試験を行ったところ、不良は、0pcsのままであった。   On the other hand, when a resin (sample 1) containing 50 pppm or less of sulfur and chlorine was used as the sealing resin, an HTS test was conducted at 175 ° C. for 1000 hours. The defect was 0 pcs. Moreover, when the HTS test for 2000 hours was performed at 175 degreeC, the defect remained 0 pcs.

以上の結果、封止樹脂に含まれる元素の内、少なくとも、硫黄、塩素の一方又は双方を減らすことが好ましい。封止樹脂105に含まれる不純物の量は、少なくとも、硫黄を100ppm未満にすることが好ましい。より好ましくは、封止樹脂105に含まれる不純物の量は、塩素115及び硫黄116それぞれ100ppm未満である。より好ましくは、封止樹脂105に含まれる不純物の量は、少なくとも硫黄を50ppm以下にすることが好ましい。また、より好ましくは、封止樹脂105に含まれる不純物の量は、塩素115及び硫黄116それぞれ50ppm以下である。   As a result, it is preferable to reduce at least one or both of sulfur and chlorine among the elements contained in the sealing resin. The amount of impurities contained in the sealing resin 105 is preferably at least sulfur less than 100 ppm. More preferably, the amount of impurities contained in the sealing resin 105 is less than 100 ppm each of chlorine 115 and sulfur 116. More preferably, the amount of impurities contained in the sealing resin 105 is preferably at least 50 ppm or less of sulfur. More preferably, the amount of impurities contained in the sealing resin 105 is 50 ppm or less for each of chlorine 115 and sulfur 116.

銅ワイヤを用いた半導体パッケージで、車載向けのより高温の信頼性試験を行うと、塩素115や硫黄116が、接合部113のCuAl層にマイクロクラックを生じさせるおそれがある。これにより、銅ワイヤとアルミニウム電極の接合部113が電気的にオープンとなると考えられる。 When a higher temperature reliability test for in-vehicle use is performed on a semiconductor package using a copper wire, chlorine 115 and sulfur 116 may cause micro cracks in the Cu 9 Al 4 layer of the joint 113. Thereby, it is considered that the joint 113 between the copper wire and the aluminum electrode is electrically opened.

本発明によれば、封止樹脂に従来、密着性向上のために必要であった、塩素や硫黄の含有量をそれぞれ100ppm未満、より好ましくは、50ppm以下まで低減させ、封止性を維持しつつ、銅ワイヤボンディングの信頼性向上を図ることを可能としている。すなわち、高温放置時に、銅ワイヤと半導体素子のアルミニウム電極の接合部において、ドライコロージョンによるマイクロクラックの発生を抑制することができる。   According to the present invention, the contents of chlorine and sulfur conventionally required for improving the adhesion to the sealing resin are each reduced to less than 100 ppm, more preferably to 50 ppm or less, and the sealing property is maintained. However, it is possible to improve the reliability of copper wire bonding. That is, it is possible to suppress the occurrence of microcracks due to dry corrosion at the joint between the copper wire and the aluminum electrode of the semiconductor element when left at high temperature.

また、本発明によれば、金属ワイヤとして銅ワイヤを用いる場合には、高価な金(Au)を用いる場合に比べて、より安価な半導体パッケージを提供することができるという効果を奏する。   In addition, according to the present invention, when a copper wire is used as the metal wire, it is possible to provide a cheaper semiconductor package than when an expensive gold (Au) is used.

なお、封止樹脂中の塩素や硫黄の含有量を低減させると、密着性の劣化が懸念される。しかし、組立工程中のOプラズマ処理や表面粗化によるアンカー効果等によって、添加元素を低減しつつも、密着性の劣化は抑えることが可能である。 In addition, when the content of chlorine and sulfur in the sealing resin is reduced, there is a concern about deterioration of adhesion. However, the deterioration of adhesion can be suppressed while reducing the additive elements by the O 2 plasma treatment during the assembly process, the anchor effect due to surface roughening, and the like.

本発明は上記の実施形態に限られたものではなく、趣旨を逸脱しない範囲で適宜変更することが可能である。   The present invention is not limited to the above-described embodiment, and can be modified as appropriate without departing from the spirit of the present invention.

10:半導体パッケージ 101:外部端子 102:ダイパッド
103、903:半導体素子 104、904:ワイヤ
105、905:封止樹脂 111、911:半導体素子保護膜
112、912:金属電極 113、913:接合部
115、915:塩素 116、916:硫黄 917:マイクロクラック
10: Semiconductor package 101: External terminal 102: Die pad 103, 903: Semiconductor element 104, 904: Wire
105, 905: Sealing resin 111, 911: Semiconductor element protective film
112, 912: Metal electrode 113, 913: Junction 115, 915: Chlorine 116, 916: Sulfur 917: Microcrack

Claims (5)

ダイパッドと
前記ダイパッドの上に配置され、複数の電極パッドを有する半導体素子と、
前記電極パッドの上に配置される接続部と、
前記ダイパッドの周囲に複数個配置される外部端子と、
前記外部端子と前記電極パッドと電気的に接続する配線と、
少なくとも前記半導体素子及び前記配線全体を封止する封止体とを有し、
前記封止体は樹脂材料であり、前記樹脂材料は、全量分析で測定したときにそれぞれ100ppm未満の硫黄及び塩素を含有する
ことを特徴とする半導体パッケージ。
A die pad and a semiconductor element disposed on the die pad and having a plurality of electrode pads;
A connecting portion disposed on the electrode pad;
A plurality of external terminals arranged around the die pad;
A wiring electrically connected to the external terminal and the electrode pad;
A sealing body that seals at least the semiconductor element and the entire wiring;
The sealed package is a resin material, and the resin material contains less than 100 ppm of sulfur and chlorine, respectively, when measured by a total analysis.
前記封止体は、全量分析で測定したときにそれぞれ50ppm以下の硫黄及び塩素を含有することを特徴とする請求項1に記載の半導体パッケージ。   2. The semiconductor package according to claim 1, wherein each of the sealing bodies contains 50 ppm or less of sulfur and chlorine when measured by a total analysis. 前記半導体素子は、複数積層されていることを特徴とする請求項1又は2に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein a plurality of the semiconductor elements are stacked. 前記配線は、主成分が銅であることを特徴とする請求項1乃至3のいずれか一に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein a main component of the wiring is copper. 前記外部端子は、リード又は半田バンプのいずれか一であることを特徴とする請求項1乃至4のいずれか一に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein the external terminal is any one of a lead and a solder bump.
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