TWI649970B - 用於dram式可重組邏輯的設備以及方法 - Google Patents

用於dram式可重組邏輯的設備以及方法 Download PDF

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Publication number
TWI649970B
TWI649970B TW104142212A TW104142212A TWI649970B TW I649970 B TWI649970 B TW I649970B TW 104142212 A TW104142212 A TW 104142212A TW 104142212 A TW104142212 A TW 104142212A TW I649970 B TWI649970 B TW I649970B
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TW
Taiwan
Prior art keywords
reconfigurable
lookup table
memory
logic
dram
Prior art date
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TW104142212A
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English (en)
Chinese (zh)
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TW201633718A (zh
Inventor
Mingyu GAO
高鳴宇
Hongzhong Zheng
鄭宏忠
Krishna T. Malladi
克里希納 Ｔ． 馬拉迪
Original Assignee
Samsung Electronics Co., Ltd.
南韓商三星電子股份有限公司
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Application filed by Samsung Electronics Co., Ltd., 南韓商三星電子股份有限公司 filed Critical Samsung Electronics Co., Ltd.
Publication of TW201633718A publication Critical patent/TW201633718A/zh
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Publication of TWI649970B publication Critical patent/TWI649970B/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17758—Structural details of configuration resources for speeding up configuration or reconfiguration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Manufacturing & Machinery (AREA)
  • Logic Circuits (AREA)
  • Microcomputers (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW104142212A 2014-12-16 2015-12-16 用於dram式可重組邏輯的設備以及方法 TWI649970B (zh)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US201462092822P 2014-12-16 2014-12-16
US201462092825P 2014-12-16 2014-12-16
US201462092819P 2014-12-16 2014-12-16
US62/092,825 2014-12-16
US62/092,822 2014-12-16
US62/092,819 2014-12-16
US14/814,503 US9954533B2 (en) 2014-12-16 2015-07-30 DRAM-based reconfigurable logic
US14/814,503 2015-07-30

Publications (2)

Publication Number Publication Date
TW201633718A TW201633718A (zh) 2016-09-16
TWI649970B true TWI649970B (zh) 2019-02-01

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TW104142212A TWI649970B (zh) 2014-12-16 2015-12-16 用於dram式可重組邏輯的設備以及方法

Country Status (5)

Country Link
US (3) US9954533B2 (enExample)
JP (1) JP6594762B2 (enExample)
KR (3) KR102496680B1 (enExample)
CN (1) CN105703765B (enExample)
TW (1) TWI649970B (enExample)

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Also Published As

Publication number Publication date
KR20160073335A (ko) 2016-06-24
TW201633718A (zh) 2016-09-16
US20160173101A1 (en) 2016-06-16
KR102438730B1 (ko) 2022-08-31
KR102496680B1 (ko) 2023-02-06
KR20160073334A (ko) 2016-06-24
CN105703765B (zh) 2020-10-09
US9577644B2 (en) 2017-02-21
CN105703765A (zh) 2016-06-22
KR20160073324A (ko) 2016-06-24
US20160173103A1 (en) 2016-06-16
KR102440132B1 (ko) 2022-09-05
JP6594762B2 (ja) 2019-10-23
US9503095B2 (en) 2016-11-22
US9954533B2 (en) 2018-04-24
JP2016123092A (ja) 2016-07-07
US20160173102A1 (en) 2016-06-16

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