TWI628810B - Light emitting element and method of manufacturing light emitting element - Google Patents

Light emitting element and method of manufacturing light emitting element Download PDF

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TWI628810B
TWI628810B TW104134281A TW104134281A TWI628810B TW I628810 B TWI628810 B TW I628810B TW 104134281 A TW104134281 A TW 104134281A TW 104134281 A TW104134281 A TW 104134281A TW I628810 B TWI628810 B TW I628810B
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layer
semiconductor layer
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TW201618330A (en
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石崎順也
古屋翔吾
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信越半導體股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0095Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

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Abstract

本發明提供一種發光元件以及發光元件的製造方法,具有窗層兼支持基板及設置於窗層兼支持基板上的發光部,發光部依序包含有第二半導體層、活性層及第一半導體層,其中發光元件具有除去發光部的除去部、除去部以外的非除去部、設置於非除去部的第一半導體層上的第一歐姆電極、及設置於除去部的窗層兼支持基板上的第二歐姆電極,第一半導體層之表面以及發光部之側面的至少一部份以絕緣保護膜所覆蓋,第一半導體層的外周部除外的表面以及窗層兼支持基板的表面為經粗糙化,且發光部側面的Rz為未滿2μm。藉此使漏電不良或ESD不良的發生受到抑制。The invention provides a light-emitting element and a method for manufacturing the light-emitting element, having a window layer and supporting substrate and a light-emitting portion provided on the window layer and supporting substrate, the light-emitting portion includes a second semiconductor layer, an active layer and a first semiconductor layer in sequence Wherein the light-emitting element has a removed portion that removes the light-emitting portion, a non-removed portion other than the removed portion, a first ohmic electrode provided on the first semiconductor layer of the non-removed portion, and a window layer provided on the removed portion and a supporting substrate The second ohmic electrode, at least a part of the surface of the first semiconductor layer and the side surface of the light-emitting portion is covered with an insulating protective film, and the surface except the outer peripheral portion of the first semiconductor layer and the surface of the window layer and supporting substrate are roughened , And the Rz on the side of the light-emitting part is less than 2 μm. This suppresses the occurrence of poor leakage or ESD.

Description

發光元件以及發光元件的製造方法Light emitting element and method of manufacturing light emitting element

本發明係關於一種發光元件以及發光元件的製造方法,特別是關於藉由磊晶成長而形成一第一半導體層、一活性層、一第二半導體層以及一窗層兼支持基板,以及在經除去基板後對經形成有電極的發光元件基板施以粗糙面處理時的結構以及製造方法。 The invention relates to a light-emitting element and a method for manufacturing the light-emitting element, in particular to forming a first semiconductor layer, an active layer, a second semiconductor layer, and a window layer as well as a supporting substrate by epitaxial growth After removing the substrate, the structure and manufacturing method when the rough surface treatment is applied to the light-emitting element substrate on which the electrode is formed.

近年,發光二極體(LED)向著高效率化前進,並漸漸適用於照明設備。習知的照明設備幾乎都是由InGaN系的藍色LED與螢光劑所組合而成的設備。然而,在使用螢光劑時由於無法避免原理上的斯托克斯損失(Stokes loss)的發生,因此會有無法將螢光劑所受光的全部的光變換為其他波長的問題。特別是在相對的較藍色為長波長的黃色與紅色之類的範圍中此問題尤為顯著。 In recent years, light-emitting diodes (LEDs) have advanced toward higher efficiency, and are gradually applied to lighting equipment. The conventional lighting equipment is almost a combination of InGaN blue LED and phosphor. However, when using a phosphor, it is impossible to avoid the occurrence of Stokes loss in principle, so there is a problem that it is impossible to convert all the light received by the phosphor to other wavelengths. This problem is particularly noticeable in the range of yellow and red, which are relatively long blue and relatively blue.

為了解決此問題,近年採用的技術為黃色或紅色LED與藍色LED的組合。此時,並非如COB(chip on board)型般為單面取出光,而是逐漸普及地為在板子之上並排LED並以電絲型進行發光的燈泡類型的照明設備。應用於此類型的設備的LED元件,由於須要擴及電絲全面來取出光,因此並不適用於自元件的單側取出光的類型,理想的元件是具有自晶片全球面取出光的配光。 In order to solve this problem, the technology adopted in recent years is a combination of yellow or red LEDs and blue LEDs. At this time, instead of taking out light on one side like a COB (chip on board) type, it is gradually becoming a light bulb type lighting device in which LEDs are arranged side by side on a board and emit light in a wire type. The LED element used in this type of equipment needs to be expanded and the entire wire to extract light, so it is not suitable for the type of light extraction from one side of the element. The ideal element is a light distribution with light extracted from the global surface of the chip .

一般係為藍色LED的InGaN系LED所使用的是藍寶石基板,由於藍寶石基板相對於發光波長是透明的緣故,因此對於前述的照明設備呈現理想的形態。然而,在黃色或紅色的LED中,對於發光波長將成為光吸收基板的GaAs或Ge作為起始基板,並不適用於前述的用途。 InGaN-based LEDs, which are generally blue LEDs, use a sapphire substrate. Since the sapphire substrate is transparent with respect to the emission wavelength, it exhibits an ideal shape for the aforementioned lighting device. However, in yellow or red LEDs, GaAs or Ge, which will become the light absorbing substrate for the light emission wavelength, as the starting substrate, are not suitable for the aforementioned uses.

為了解決此問題,係揭示有如專利文獻1將透明基板接合於發光部的方法,以及揭示有如專利文獻2使窗層成長至用於支持基板的厚度,而除去係為光吸收基板的起始基板而成為LED的技術。 In order to solve this problem, there is disclosed a method of bonding a transparent substrate to a light-emitting portion as in Patent Document 1, and disclosed as in Patent Document 2 that a window layer is grown to a thickness for supporting a substrate, and a starting substrate which is a light-absorbing substrate is removed And become LED technology.

在專利文獻1所揭示的方法中,由於必須接合所須厚度以上的透明基板,並且在接合後須要將基板削薄至預定的厚度,因此成為了成本上升的原因。另外,一般用於接合的基板具有200μm以上的厚度。LED元件所要求的膜厚,考慮配光特性以及與其他元件的組裝性,由於最多是在100μm前後,所以必須要薄膜化加工至此程度的厚度為止。於薄膜化加工當中,由於因進行加工而使工作時數增加,以及晶圓破損的風險亦變大,成為成本上升以及生產率下降的主要原因。 In the method disclosed in Patent Document 1, a transparent substrate having a required thickness or more must be joined, and the substrate needs to be thinned to a predetermined thickness after joining, which causes a cost increase. In addition, a substrate generally used for bonding has a thickness of 200 μm or more. The required film thickness of the LED element, considering the light distribution characteristics and the assembly with other elements, is at most about 100 μm, so it must be thinned to such a thickness. In thin-film processing, the number of working hours increases due to processing, and the risk of wafer breakage also increases, which becomes a major cause of increased costs and decreased productivity.

另一方面,專利文獻2中所揭示的將藉由結晶成長成長至能用於支持基板的窗層作為支持基板的方法中,由於只須要使窗層成長至所期望的厚度為止即可,而不需要進行薄膜化加工或基板接合、黏著的步驟,故能以低成本來形成,係為優良的方法。 On the other hand, the method disclosed in Patent Document 2 that grows through crystal growth to a window layer that can be used as a support substrate as a support substrate only needs to grow the window layer to a desired thickness, and There is no need to perform the steps of thinning, substrate bonding, and adhesion, so it can be formed at low cost, which is an excellent method.

另外,在具有前述的透明支持基板的發光元件中,一般所採取的手法是防止在發光元件內部的多重反射並以抑制光吸收的方式來提升發光效率。專利文獻3中係提案有:在厚的窗層兼電流擴散層與厚的窗層兼支持基板將發光部夾持的結構中,對窗層兼電流擴散層與窗層兼支持基板施以粗糙化,對發光部則不施以粗糙化的方法。但是此方法必須要形成貫穿窗層兼電流擴散層部的深溝槽(trench),此方法不僅使成本上升,由於上部與下部的電極的高低差過大的緣故,因此難以進行引線接合。即使應用於覆晶型之時也必須形成厚的絕緣膜與非常長的金屬通路,成為成本上升的原因。因此,希望係為上部電極部的窗層兼電流擴散層是薄的。 In addition, in the light-emitting element having the above-mentioned transparent support substrate, a general approach is to prevent multiple reflections inside the light-emitting element and improve the light-emitting efficiency by suppressing light absorption. Patent Document 3 proposes that in a structure in which a thick window layer and current diffusion layer and a thick window layer and support substrate sandwich the light emitting portion, the window layer and current diffusion layer and the window layer and support substrate are roughened No roughening method is applied to the light emitting part. However, this method must form a deep trench penetrating the window layer and the current diffusion layer. This method not only increases the cost, but also makes it difficult to perform wire bonding because the difference in height between the upper and lower electrodes is too large. Even when applied to the flip-chip type, it is necessary to form a thick insulating film and a very long metal via, which causes a rise in cost. Therefore, it is desirable that the window layer and current diffusion layer of the upper electrode portion be thin.

作為窗層兼電流擴散層的厚度薄、上部電極部與下部電極部的高低差少,且光取出部或光反射部具有粗糙面的揭示技術,可列舉出專利文獻4及5。專利文獻4中,雖於光取出面側與相反側的n型半導體層表面形成有粗糙面,但係為對於覆晶型的技術揭示,以自電極側有效率的光反射至窗層側為目的。另外,也揭示有對窗層兼支持基板與發光部雙方施以粗糙化的難度。 Patent Documents 4 and 5 can be cited as disclosed technologies in which the thickness of the window layer and current diffusion layer is thin, the height difference between the upper electrode portion and the lower electrode portion is small, and the light extraction portion or the light reflection portion has a rough surface. In Patent Document 4, although a rough surface is formed on the surface of the n-type semiconductor layer on the light extraction surface side and the opposite side, it is a disclosure of the flip-chip technology, and the efficient reflection of light from the electrode side to the window layer side is purpose. In addition, it is also disclosed that it is difficult to roughen both the window layer and the supporting substrate and the light emitting section.

專利文獻5中,揭示有於發光部表面施以粗糙化,並於發光部側面具有不同角度的平台形狀或單純的平台形狀的技術。此狀況下,基板所採用的是不需要粗糙面的反射型的結構。另外,揭示有發光部表面藉由微影法而形成2μm周期等的凹凸的技術。 Patent Document 5 discloses a technique of roughening the surface of the light-emitting portion and having a platform shape with a different angle or a simple platform shape on the side surface of the light-emitting portion. In this case, the substrate adopts a reflective structure that does not require a rough surface. In addition, there is disclosed a technique of forming irregularities such as a 2 μm period on the surface of the light-emitting portion by the lithography method.

另一方面,於以磊晶成長形成窗層兼支持基板的狀況下,由於晶格不匹配使得基板有大的翹曲,即便採用接觸曝光法以微影法於發光部表面形成2μm以下間距的均勻圖案也是極為困難的。因此,於以磊晶成長形成窗層兼支持基板的狀況下,發光部表面的粗糙化係利用粗化液來進行。 On the other hand, in the case where the window layer and the supporting substrate are formed by epitaxial growth, the substrate has a large warpage due to the lattice mismatch, even if the contact exposure method is used to form a pitch of 2 μm or less on the surface of the light emitting portion by the lithography Uniform patterns are also extremely difficult. Therefore, in the case where the window layer and the support substrate are formed by epitaxial growth, the roughening of the surface of the light-emitting part is performed by the roughening liquid.

〔先前技術文獻〕 [Previous Technical Literature] 〔專利文獻〕 [Patent Literature]

〔專利文獻1〕日本特許第5427585號公報。 [Patent Document 1] Japanese Patent No. 5427585.

〔專利文獻2〕日本特許第4569858號公報 [Patent Document 2] Japanese Patent No. 4569858

〔專利文獻3〕日本特許第4715370號公報 [Patent Document 3] Japanese Patent No. 4715370

〔專利文獻4〕日本特開2007-059518號公報 [Patent Document 4] Japanese Patent Application Publication No. 2007-059518

〔專利文獻5〕日本特開2011-198992號公報 [Patent Document 5] Japanese Patent Laid-Open No. 2011-198992

然而,於以粗化液進行發光部表面的粗糙化後經實施元件分離的狀況下,元件已分離的發光部的側面的形狀成為反映經粗糙化的發光部表面的凹凸的形狀。此為在元件分離中,相對於凹部由於較薄而使發光部的蝕刻較早結束而到達窗層兼支持基板部,凸部則是由於較厚而較晚到達窗層兼支持基板部。因此,於凸部進行蝕刻期間,凹部對發光部過蝕刻,導致於發光部的側面的蝕刻方向的投影視圖中形成凹凸。如此,藉由粗化液對發光部的表面粗糙化之後,於進行元件分離的狀況下,經元件分離的發光部的側面的形狀中電場容易集中於凸部,因此有發生漏電不良或ESD(靜電放電)不良的問題。 However, in the case where the surface of the light-emitting portion is roughened with the roughening liquid and the device is separated, the shape of the side surface of the light-emitting portion where the element has been separated is a shape reflecting the unevenness of the surface of the roughened light-emitting portion. This is because in the element separation, the etching of the light emitting portion ends earlier due to the thinner concave portion and reaches the window layer and support substrate portion, and the convex portion reaches the window layer and support substrate portion later due to the thickness. Therefore, during the etching of the convex portion, the concave portion over-etches the light emitting portion, resulting in the formation of irregularities in the projection view of the etching direction of the side surface of the light emitting portion. In this way, after roughening the surface of the light-emitting portion with the roughening liquid, under the condition of element separation, the electric field in the shape of the side surface of the light-emitting portion separated by the element tends to be concentrated on the convex portion, so that leakage leakage or ESD may occur. Electrostatic discharge) bad problem.

有鑑於上述問題點,本發明的目的為提供一種發光元件以及發光元件的製造方法,係具有窗層兼支持基板與發光部,以粗化液對發光部粗糙化之後,於進行元件分離的發光元件中能抑制漏電不良或ESD不良的發生。 In view of the above problems, an object of the present invention is to provide a light-emitting element and a method for manufacturing the light-emitting element, which has a window layer and a supporting substrate and a light-emitting portion, after roughening the light-emitting portion with a roughening liquid, and then performing light emission after element separation The device can suppress the occurrence of poor leakage or ESD.

為了達成上述目的,本發明提供一種發光元件,具有一窗層兼支持基板及設置於該窗層兼支持基板上的一發光部,該發光部依序包含有係為第二導電型的一第二半導體層、一活性層、及係為第一導電型的第一半導體層,其中該發光元件具有經除去該發光部的一除去部、該除去部以外的一非除去部、設置於該非除去部的該第一半導體層上的一第一歐姆電極、及設置於該除去部的該窗層兼支持基板上的一第二歐姆電極,以及該第一半導體層之表面以及該發光部之側面的至少一部份係以一絕緣保護膜所覆蓋,該第一半導體層的外周部除外的表面以及該窗層兼支持基板的表面係為經粗糙化,且該發光部側面的RZ為未滿2μm。 In order to achieve the above object, the present invention provides a light-emitting device having a window layer and supporting substrate and a light-emitting portion disposed on the window layer and supporting substrate, the light-emitting portion sequentially includes a first type of second conductivity type Two semiconductor layers, an active layer, and a first semiconductor layer of the first conductivity type, wherein the light emitting element has a removed portion from which the light emitting portion is removed, a non-removed portion other than the removed portion, and is provided on the non-removed portion A first ohmic electrode on the first semiconductor layer of the portion, and a second ohmic electrode on the support layer and the window layer provided in the removed portion, and the surface of the first semiconductor layer and the side surface of the light emitting portion At least a part of it is covered with an insulating protective film, the surface except the outer peripheral portion of the first semiconductor layer and the surface of the window layer and supporting substrate are roughened, and the R Z on the side of the light emitting portion is not Full 2μm.

藉由此種發光元件,在能透過粗糙化來提升發光效率的同時,亦可實現依存於發光部側面的凹凸形狀的漏電不良及ESD不良的發生獲得抑制的發光元件。 With such a light-emitting element, it is possible to improve the light-emitting efficiency by roughening, and at the same time, it is possible to realize a light-emitting element that suppresses the occurrence of leakage defects and ESD defects depending on the uneven shape of the side surface of the light-emitting portion.

此時,較佳地,該窗層兼支持基板係由GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC之中的任一個所構成,該第一半導體層、該活性層、該第二半導體層係由AlGaInP或AlGaAs所構成。 At this time, preferably, the window layer and supporting substrate are made of any one of GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), and SiC. The first semiconductor layer, The active layer and the second semiconductor layer are composed of AlGaInP or AlGaAs.

如此一來,作為該窗層兼支持基板、該第一半導體層、該活性層、該第二半導體層,能夠適合使用上述之類的材料。 In this way, as the window layer and supporting substrate, the first semiconductor layer, the active layer, and the second semiconductor layer, the above-mentioned materials can be suitably used.

另外,藉由本發明所提供的一種發光元件的製造方法,包含:發光部形成步驟,係於基板上,以與該基板為晶格匹配系的材料藉由磊晶成長而依序成長一第一半導體層、一活性層、一第二半導體層而形成一發光部;窗層兼支持基板形成步驟,係於該發光部之上以對該基板為非晶格匹配系的材料藉由磊晶成長而形成一窗層兼支持基板;除去步驟,係除去該基板;第一歐姆電極形成步驟,係於該第一半導體層的表面形成一第一歐姆電極;第一粗糙面處理步驟,係於該第一半導體層的表面進行粗糙面處理;元件分離步驟,係形成除去該發光部的一部分的一除去部以及其以外的一非除去部;第二歐姆電極形成步驟,係於經除去該發光部的窗層兼支持基板上形成一第二歐姆電極;覆蓋步驟,係以絕緣保護膜覆蓋該第一半導體層表面以及該發光部的側面的至少一部分;以及第二粗糙面處理步驟,係粗糙化該窗層兼支持基板的表面以及側面,其中於該第一粗糙面處理步驟中,不粗糙化該第一歐姆電極周邊以及在其之後的該元件分離步驟中成為該非除去部的該第一半導體層表面的外周部的區域。 In addition, a method for manufacturing a light-emitting device provided by the present invention includes: a step of forming a light-emitting part on a substrate, and a material that is a lattice matching system with the substrate is sequentially grown by epitaxial growth to a first The semiconductor layer, an active layer, and a second semiconductor layer form a light-emitting portion; the window layer also supports the substrate forming step, which is formed on the light-emitting portion to make the substrate an amorphous matching system by epitaxial growth Forming a window layer and supporting substrate; the removal step is to remove the substrate; the first ohmic electrode forming step is to form a first ohmic electrode on the surface of the first semiconductor layer; the first rough surface treatment step is to The surface of the first semiconductor layer is roughened; the element separation step is to form a removed part and a non-removed part other than a part of the light emitting part; the second ohmic electrode forming step is to remove the light emitting part Forming a second ohmic electrode on the window layer and supporting substrate; the covering step is to cover at least a part of the surface of the first semiconductor layer and the side surface of the light emitting part with an insulating protective film; and the second roughening surface treatment step is to roughen The window layer also supports the surface and the side surface of the substrate, wherein in the first rough surface processing step, the first semiconductor that does not roughen the periphery of the first ohmic electrode and becomes the non-removed portion in the element separation step thereafter The area of the outer periphery of the layer surface.

藉由此種製造方法,在能透過粗糙化來提升發光效率的同時,亦可製造依存於發光部側面的凹凸形狀的漏電不良或ESD不良的發生受到抑制的發光元件。 According to this manufacturing method, the light emitting efficiency can be improved by roughening, and at the same time, a light-emitting element in which the occurrence of poor leakage or ESD defects depending on the uneven shape of the side surface of the light-emitting part can be manufactured.

此時,較佳地,該基板為GaAs或Ge,該窗層兼支持基板為GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC之中的任一個,,以及該第一半導體層、該活性層、該第二半導體層為AlGaInP或AlGaAs。 At this time, preferably, the substrate is GaAs or Ge, and the window layer and supporting substrate is any one of GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), SiC, and The first semiconductor layer, the active layer, and the second semiconductor layer are AlGaInP or AlGaAs.

如此一來,作為基板、窗層兼支持基板、第一半導體層、活性層、第二半導體層,能夠適合使用上述之類的材料。 In this way, as the substrate, the window layer and supporting substrate, the first semiconductor layer, the active layer, and the second semiconductor layer, the above-mentioned materials can be suitably used.

此時,較佳地,該第一粗糙面處理步驟, 係使用有機酸與無機酸的混合液而進行,該有機酸包含:檸檬酸、丙二酸、甲酸、乙酸及酒石酸中的任一種以上,該無機酸包含:鹽酸、硫酸、硝酸及氫氟酸中的任一種以上;以及在該第二粗糙面處理步驟中,係使用包含檸檬酸、丙二酸、甲酸、乙酸及酒石酸的有機酸中的任一種以上,且包含:鹽酸、硫酸、硝酸及氫氟酸的無機酸中的任一種以上,且包含碘的溶液而進行。 At this time, preferably, the first rough surface processing step, It is carried out using a mixture of organic acids and inorganic acids, the organic acids include: any one or more of citric acid, malonic acid, formic acid, acetic acid, and tartaric acid, the inorganic acids include: hydrochloric acid, sulfuric acid, nitric acid, and hydrofluoric acid Any one or more of; and in the second rough surface treatment step, any one or more of organic acids including citric acid, malonic acid, formic acid, acetic acid, and tartaric acid are used, and include: hydrochloric acid, sulfuric acid, nitric acid, and Hydrofluoric acid is carried out in any one or more of inorganic acids and a solution containing iodine.

以這種方式,能確實地將表面粗糙化。 In this way, the surface can be reliably roughened.

此時,該元件分離步驟,能藉由包含鹽酸的濕式蝕刻液的濕式蝕刻法來進行,並於該第一粗糙面處理步驟中使非Al含有層殘留於未粗糙化區域,而作為蝕刻遮罩使用。 At this time, the element separation step can be performed by a wet etching method including a wet etching solution of hydrochloric acid, and in the first rough surface treatment step, the non-Al-containing layer is left in the unroughened area as Etching mask used.

以這種方式,能於經進行元件分離的發光部的側面得到清楚的平台形狀。 In this way, a clear platform shape can be obtained on the side surface of the light-emitting part subjected to element separation.

此時,較佳地,該非Al含有層包含GaAs、InGaP、InGaAs、Ge之中的任一層以上,並於該濕式蝕刻後進行除去該非Al含有層的步驟。 At this time, preferably, the non-Al-containing layer includes any one or more of GaAs, InGaP, InGaAs, and Ge, and the step of removing the non-Al-containing layer is performed after the wet etching.

以這種方式,能於經進行元件分離的發光部的側面更確實地得到清楚的平台形狀。 In this way, a clear platform shape can be more surely obtained on the side surface of the light-emitting portion where the elements are separated.

另外,該元件分離步驟,能藉由包含氯化氫的氣體的乾式蝕刻法來進行。 In addition, this element separation step can be performed by a dry etching method including a gas containing hydrogen chloride.

以這種方式,能於經進行元件分離的發光部的側面得到無收縮的形狀。 In this way, a non-shrinking shape can be obtained on the side surface of the light-emitting part subjected to element separation.

本發明的發光元件以及發光元件的製造方法,在能透過粗糙化來提升發光效率的同時,亦能得到依附於發光部側面的凹凸形狀的漏電不良或ESD不良的發生受到抑制的發光元件。 The light-emitting element and the method of manufacturing the light-emitting element of the present invention can improve the luminous efficiency by roughening, and at the same time, a light-emitting element that suppresses the occurrence of poor leakage or ESD failure depending on the uneven shape of the side surface of the light-emitting portion.

1‧‧‧發光元件 1‧‧‧Lighting element

103‧‧‧第一半導體層 103‧‧‧First semiconductor layer

104‧‧‧活性層 104‧‧‧active layer

105‧‧‧第二半導體層 105‧‧‧Second semiconductor layer

106‧‧‧緩衝層 106‧‧‧buffer layer

107‧‧‧窗層兼支持基板 107‧‧‧Window layer and supporting substrate

108‧‧‧發光部 108‧‧‧Lighting Department

109‧‧‧磊晶基板 109‧‧‧ epitaxial substrate

110‧‧‧發光元件基板 110‧‧‧Light-emitting element substrate

121‧‧‧第一歐姆電極 121‧‧‧The first ohmic electrode

122‧‧‧第二歐姆電極 122‧‧‧The second ohmic electrode

130‧‧‧第三區域 130‧‧‧ third area

131‧‧‧第二區域 131‧‧‧ Second area

150‧‧‧絕緣保護膜 150‧‧‧Insulation protective film

160‧‧‧元件分離預定線 160‧‧‧Part separation line

170‧‧‧除去部 170‧‧‧Removed

180‧‧‧非除去部 180‧‧‧non-removed department

〔第1圖〕係顯示本發明的發光元件的一例的概略圖。 [Figure 1] is a schematic view showing an example of the light-emitting element of the present invention.

〔第2圖〕係顯示本發明的發光元件的製造方法的一例的步驟圖。 [FIG. 2] A step diagram showing an example of a method of manufacturing a light-emitting element of the present invention.

〔第3圖〕係顯示本發明的發光元件的製造方法的製造過程中基板上的發光部與窗層兼支持基板經成長為磊晶基板的概略圖。 [FIG. 3] A schematic diagram showing that the light-emitting portion and the window layer and supporting substrate on the substrate have grown into an epitaxial substrate during the manufacturing process of the method for manufacturing a light-emitting element of the present invention.

〔第4圖〕係顯示本發明的發光元件的製造方法的製造過程中自磊晶基板經除去基板的發光元件基板的概略圖。 [FIG. 4] is a schematic view showing a light-emitting element substrate from the epitaxial substrate through the removal of the substrate in the manufacturing process of the method of manufacturing the light-emitting element of the present invention.

〔第5圖〕係本發明的發光元件的製造方法的製造過程中經形成第一歐姆電極的發光元件基板的概略圖。 [FIG. 5] This is a schematic view of the light-emitting element substrate in which the first ohmic electrode is formed during the manufacturing process of the light-emitting element manufacturing method of the present invention.

〔第6圖〕係本發明的發光元件的製造方法的製造過程中經進行第一粗糙面處理的發光元件基板的概略圖。 [FIG. 6] is a schematic view of a light-emitting element substrate subjected to a first rough surface treatment in the manufacturing process of the method of manufacturing a light-emitting element of the present invention.

〔第7圖〕係本發明的發光元件的製造方法的製造過程中經進行元件分離步驟的發光元件基板的概略圖。 [Figure 7] This is a schematic view of a light-emitting element substrate that has undergone an element separation step in the manufacturing process of the method of manufacturing a light-emitting element of the present invention.

〔第8圖〕係顯示本發明的發光元件的製造方法的製造過程中經形成第二歐姆電極,以及經形成絕緣保護膜的發光元件基板的概略圖。 [FIG. 8] A schematic diagram showing a light-emitting element substrate in which a second ohmic electrode is formed and an insulating protective film is formed in the manufacturing process of the light-emitting element manufacturing method of the present invention.

〔第9圖〕係實施例1的發光元件的概略圖。 [FIG. 9] is a schematic diagram of a light-emitting element of Example 1.

〔第10圖〕係實施例2的發光元件的概略圖。 [Figure 10] is a schematic diagram of a light-emitting element of Example 2.

〔第11圖〕係實施例1中元件分離端部的照片。 [Figure 11] is a photograph of the element separation end in Example 1.

〔第12圖〕係比較例中元件分離端部的照片。 [Figure 12] is a photograph of the element separation end in the comparative example.

〔第13圖〕係顯示實施例以及比較例中發光元件的反向電壓(VR)的頻率的示意圖。 [FIG. 13] A schematic diagram showing the frequency of the reverse voltage (VR) of the light-emitting elements in Examples and Comparative Examples.

〔第14圖〕係顯示實施例以及比較例中發光元件的ESD電壓與ESD不良率的關係的示意圖。 [Fig. 14] is a schematic diagram showing the relationship between the ESD voltage and the ESD defect rate of the light-emitting elements in Examples and Comparative Examples.

〔第15圖〕係顯示實驗中發光部的側面的Rz與VR不良率之間的關係的示意圖。 [FIG. 15] A schematic diagram showing the relationship between R z on the side surface of the light-emitting part and the VR defect rate in the experiment.

以下,說明本發明的實施方式,但本發明並不限定於此。 Hereinafter, embodiments of the present invention will be described, but the present invention is not limited thereto.

如同前述,藉由粗化液對發光部的表面一樣的粗糙化之後,進行元件分離的狀況下,會有漏電不良或ESD不良發生的問題。 As described above, after roughening the surface of the light-emitting portion with the roughening liquid and then performing element separation, there may be a problem of poor electric leakage or defective ESD.

因此,本申請發明人們為了解決此類問題進行了深入研究。其結果發現,對發光部表面粗糙化時,透過不對在之後的元件分離中成為第一半導體層表面的外周部的領域進行粗糙化,能使發光部側面的Rz為未滿2μm,如此一來,能抑制漏電不良或ESD不良。並且對為了實施此些內容的最佳的型態進行了詳細的調查,從而完成本發明。 Therefore, the inventors of the present application conducted in-depth research in order to solve such problems. As a result, it was found that when roughening the surface of the light emitting portion, by not roughening the area that becomes the outer peripheral portion of the surface of the first semiconductor layer in the subsequent element separation, the R z of the side surface of the light emitting portion can be less than 2 μm. In this way, it is possible to suppress poor leakage or poor ESD. In addition, a detailed investigation was conducted on the best type for implementing these contents, thereby completing the present invention.

首先參考第1圖說明本發明的發光元件。 First, the light-emitting element of the present invention will be described with reference to FIG.

如第1圖所示,本發明的發光元件1,具有一窗層兼支持基板107及設置於該窗層兼支持基板107上的一發光部108,該發光部108依序包含有係為第二導電型的一第二半導體層105、一活性層104、係為第一導電型的一第一半導體層103。 As shown in FIG. 1, the light-emitting element 1 of the present invention has a window layer and support substrate 107 and a light-emitting portion 108 provided on the window layer and support substrate 107. The light-emitting portion 108 includes A second semiconductor layer 105 of two conductivity types and an active layer 104 are a first semiconductor layer 103 of the first conductivity type.

能使窗層兼支持基板107由GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC等所構成,能使第一半導體層103、活性層104、第二半導體層105由AlGaInP或AlGaAs所構成。 The window layer and support substrate 107 can be composed of GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), SiC, etc., and can make the first semiconductor layer 103, the active layer 104, the second semiconductor layer 105 is composed of AlGaInP or AlGaAs.

發光元件1具有經除去發光部108的至少第一半導體層103與活性層104的一除去部170、該除去部170以外的一非除去部180、設置於該非除去部 180的第一半導體層103上的一第一歐姆電極121、及設置於該除去部170的該窗層兼支持基板107上的一第二歐姆電極122。 The light-emitting element 1 has at least a first semiconductor layer 103 and a removed portion 170 of the active layer 104 from which the light-emitting portion 108 is removed, a non-removed portion 180 other than the removed portion 170, and is provided on the non-removed portion A first ohmic electrode 121 on the first semiconductor layer 103 of 180, and a second ohmic electrode 122 on the supporting layer 107 of the window layer provided in the removed portion 170.

該第一半導體層103之表面以及該發光部108之側面的至少一部份係以一絕緣保護膜150所覆蓋,該第一半導體層103的外周部(第二領域131)除外的表面以及該窗層兼支持基板107的表面係為經粗糙化,且發光部108側面的Rz為未滿2μm。 At least a part of the surface of the first semiconductor layer 103 and the side surface of the light emitting portion 108 is covered with an insulating protective film 150, except for the surface except the outer peripheral portion (second area 131) of the first semiconductor layer 103 and the The surface of the window layer and support substrate 107 is roughened, and the R z of the side surface of the light emitting portion 108 is less than 2 μm.

再者,本申請中的Rz係以表示表面的10點平均高度(JIS B0601-1994)者來界定。 In addition, R z in this application is defined by the average height of 10 points (JIS B0601-1994) which shows the surface.

藉由此種本發明的發光元件1,在透過粗糙化來提升發光效率的同時,由於發光部108側面的Rz為未滿2μm,因此能成為依存於凹凸形狀的漏電不良以及ESD不良的發生獲得抑制的發光元件。 According to the light-emitting element 1 of the present invention, while the luminous efficiency is improved by roughening, and the R z of the side surface of the light-emitting portion 108 is less than 2 μm, it is possible to cause the occurrence of electrical leakage defects and ESD defects depending on the uneven shape A suppressed light-emitting element is obtained.

接下來,參考第2圖~第8圖說明本發明的發光元件的製造方法。 Next, the method of manufacturing the light-emitting element of the present invention will be described with reference to FIGS. 2 to 8.

首先,作為顯示於第3圖的起始基板,準備基板101(第2圖的SP1)。 First, as the starting substrate shown in FIG. 3, a substrate 101 (SP1 in FIG. 2) is prepared.

作為基板101能夠適合使用GaAs或Ge。 As the substrate 101, GaAs or Ge can be suitably used.

以這種方式,由於能以晶格匹配系將後述的活性層104的材料進行磊晶成長,可輕易使活性層104的品質提升,而得到亮度上升或壽命特性的提升。 In this way, since the material of the active layer 104 described later can be epitaxially grown in a lattice matching system, the quality of the active layer 104 can be easily improved, and the brightness or life characteristics can be improved.

接下來,於基板101上,藉由磊晶成長而依序成長晶格常數與基板101為不同的係為第一導電型的第一半導體層103、活性層104、及係為第二導電型的第二半導體層105而形成發光部108(第2圖的SP2)。 Next, on the substrate 101, the first semiconductor layer 103 of the first conductivity type, the active layer 104, and the second conductivity type that have different lattice constants from the substrate 101 are sequentially grown by epitaxial growth The second semiconductor layer 105 to form a light emitting portion 108 (SP2 in FIG. 2).

再者,雖未圖示,較佳地,為了後述除去基板101的步驟,係於基板101與第一半導體層103之間插入基板除去選擇蝕刻層。 In addition, although not shown, it is preferable to insert a substrate to remove the selective etching layer between the substrate 101 and the first semiconductor layer 103 for the step of removing the substrate 101 described later.

接下來,發光部108之上以對基板101為非晶格匹配系的材料藉由磊晶成長而形成窗層兼支持基板107,而製作出磊晶基板109(第2圖的SP3)。 Next, an epitaxial substrate 109 (SP3 in FIG. 2) is produced by forming a window layer and supporting substrate 107 by epitaxial growth on the light-emitting portion 108 using an epitaxial growth material for the substrate 101.

上述SP2、3中,具體來說,如第3圖所示,例如能於基板101上藉由MOVPE法(有機金屬氣相磊晶法)或MBE(分子束磊晶法)、CBE(化學束磊晶法)而於由係為第一導電型的第一半導體層103、活性層104、係為第二導電型的第二半導體層105所構成的發光部108之上,製作出依緩衝層106、窗層兼支持基板107的順序磊晶成長的磊晶基板109。 In SP2 and 3 above, specifically, as shown in FIG. 3, for example, MOVPE (organometal vapor phase epitaxy), MBE (molecular beam epitaxy), CBE (chemical beam) Epitaxial method) and a buffer layer is formed on the light-emitting portion 108 composed of the first semiconductor layer 103 of the first conductivity type, the active layer 104, and the second semiconductor layer 105 of the second conductivity type 106. An epitaxial substrate 109 in which the window layer also supports the epitaxial growth of the substrate 107 in sequence.

再者,窗層兼支持基板107亦可藉由HVPE法(氫化物氣相成長法)而形成。 In addition, the window layer and support substrate 107 may also be formed by the HVPE method (hydride vapor phase growth method).

活性層104係因應發光波長並以(AlxGa1-x)yIn1-yP(0<x≦1、0.4≦y≦0.6)或AlzGa1-zAs(0≦z≦0.45)而被形成。應用於可見光照明的狀況下,適合選擇AlGaInP,應用於紅外照明的狀況下,適合選擇AlGaAs。但是,關於活性層104的設計,由於藉由利用超晶格等可將波長調整至因材料成分所致的波長以外,因此不限於上述的材料。 The active layer 104 is based on (Al x Ga 1-x ) y In 1-y P (0 <x ≦ 1, 0.4 ≦ y ≦ 0.6) or Al z Ga 1-z As (0 ≦ z ≦ 0.45) ) To be formed. It is suitable for the selection of AlGaInP in the case of visible light illumination and AlGaAs in the case of infrared illumination. However, the design of the active layer 104 can be adjusted beyond the wavelength due to the material composition by using a superlattice or the like, so it is not limited to the above-mentioned materials.

第一半導體層103、第二半導體層105可自AlGaInP或AlGaAs中選擇,此選擇不一定要與活性層104為相同的材料。 The first semiconductor layer 103 and the second semiconductor layer 105 can be selected from AlGaInP or AlGaAs, and this selection does not necessarily need to be the same material as the active layer 104.

本實施例中,是以係為最單純的結構的第一半導體層103、活性層104、第二半導體層105皆為同樣的材料的AlGaInP的狀況來作為例子,為了提升第一半導體層103或第二半導體層105的特性,各層內一般含有複數層,第一半導體層103或第二半導體層105並不限定於為單一層。 In this embodiment, the case where the first semiconductor layer 103, the active layer 104, and the second semiconductor layer 105 of the simplest structure are all made of the same material AlGaInP is taken as an example. In order to enhance the first semiconductor layer 103 or For the characteristics of the second semiconductor layer 105, each layer generally includes a plurality of layers. The first semiconductor layer 103 or the second semiconductor layer 105 is not limited to a single layer.

作為窗層兼支持基板107,能夠適合使用GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC等。以GaAsP或GaP形成窗層兼支持基板107的狀況下,以InGaP來形成緩衝層106為最適合。 As the window layer and support substrate 107, GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), SiC, or the like can be suitably used. In the case where the window layer and support substrate 107 are formed with GaAsP or GaP, it is most suitable to form the buffer layer 106 with InGaP.

另外,也能以係為晶格匹配系的材料的AlGaAs來形成窗層兼支持基板107。另外,作為窗層兼支持基板107,若選擇GaAsP,則耐候性良好。 In addition, the window layer and support substrate 107 can also be formed of AlGaAs which is a lattice-matching material. In addition, as the window layer and support substrate 107, if GaAsP is selected, the weather resistance is good.

然而,由於GaAsP與AlGaInP系材料或AlGaAs系材料之間存在有大的晶格不匹配,因此GaAsP裡會滲入高密度的應變或貫穿式差排。其結果導致磊晶基板109有大的翹曲。 However, due to the large lattice mismatch between GaAsP and AlGaInP-based materials or AlGaAs-based materials, GaAsP will infiltrate high-density strain or penetrating differentials. As a result, the epitaxial substrate 109 has large warpage.

在此,較佳地,為了防止因自然超晶格的形成所導致的波長漂移,發光部108係相對於成長面以結晶學理上為12度以上的傾斜來進行成長。此傾斜方向雖能選擇任何的方向,於以切劃線裂片步驟來採用分離元件步驟的狀況下,如果切劃線的一方選擇結晶軸不傾斜而垂直相交的方向,而切劃線的另一方選擇結晶軸傾斜的方向,即能減少元件側面相對於元件表面以及內面傾斜的面。因此,一般切劃線的一方雖選擇不傾斜的方向,20度左右的元件側面的傾斜在組裝上不會有太大的問題。因此,上述垂直相交方向並不需嚴密的一致,較垂直相交方向±20度左右的角度範圍包含於概念上的垂直相交方向。 Here, preferably, in order to prevent the wavelength drift caused by the formation of the natural superlattice, the light emitting portion 108 is grown with a crystallographic tilt of 12 degrees or more relative to the growth surface. Although any direction can be selected for this oblique direction, in the case where the separation element step is adopted as the scribe line splitting step, if one side of the scribe line selects the direction where the crystal axis intersects perpendicularly without being inclined, and the other side of the scribe line Choosing the direction in which the crystal axis is inclined can reduce the inclination of the side surface of the device relative to the surface and inner surface of the device. Therefore, although the side of the scribe line generally chooses a direction that does not incline, the inclination of the side surface of the component around 20 degrees will not cause too much problem in assembly. Therefore, the above vertical intersection direction does not need to be closely aligned, and an angle range of about ± 20 degrees from the vertical intersection direction is included in the conceptual vertical intersection direction.

接下來,自磊晶基板109除去基板101,製作出如第4圖所示的發光元件基板110(第2圖的SP4)。 Next, the substrate 101 is removed from the epitaxial substrate 109 to fabricate the light-emitting element substrate 110 shown in FIG. 4 (SP4 in FIG. 2).

具體來說,能藉由濕式蝕刻法自磊晶基板109除去基板101,成為發光元件基板110。 Specifically, the substrate 101 can be removed from the epitaxial substrate 109 by a wet etching method to become a light-emitting element substrate 110.

接下來,如第5圖所示,於發光元件基板110的第一半導體層103的基板除去面120上,形成供給電位至發光元件的第一歐姆電極121(第2圖的SP5)。 Next, as shown in FIG. 5, on the substrate-removed surface 120 of the first semiconductor layer 103 of the light-emitting element substrate 110, a first ohmic electrode 121 (SP5 in FIG. 2) that supplies a potential to the light-emitting element is formed.

接下來,於第6圖所示進行於第一半導體層103的表面進行粗糙面處理的第一粗糙面處理步驟(第2圖的SP6)。第一粗糙面處理步驟中,對於第一歐姆電極121周邊的第三區域130以及第一半導體層103的表面的一部分的第二區域131不進行粗糙化。 Next, the first rough surface treatment step (SP6 in FIG. 2) of performing rough surface treatment on the surface of the first semiconductor layer 103 as shown in FIG. 6 is performed. In the first rough surface processing step, the third region 130 around the first ohmic electrode 121 and the second region 131 which is a part of the surface of the first semiconductor layer 103 are not roughened.

第一粗糙面處理步驟,係使用有機酸與無機酸的混合液而進行,作為該有機酸的能包含羧酸,特別是檸檬酸、丙二酸、甲酸、乙酸及酒石酸中 的任一種以上,該無機酸則能使用包含鹽酸、硫酸、硝酸及氫氟酸中的任一種以上。 The first rough surface treatment step is carried out using a mixture of organic and inorganic acids. The organic acid can contain carboxylic acids, especially citric acid, malonic acid, formic acid, acetic acid and tartaric acid. Any one or more of these inorganic acids can be used including any one or more of hydrochloric acid, sulfuric acid, nitric acid, and hydrofluoric acid.

以這種方式,能確實地將表面粗糙化。 In this way, the surface can be reliably roughened.

第三區域130於第一粗糙面處理步驟中有抑止過蝕刻以及抑制第一歐姆電極121的電極剝離的效果。另一方面,為了不因為粗糙化的效果而致使反射防止效果減少,第三區域130的寬度必須要設定為不至於過寬的適當地寬度。作為反射防止效果的減少較少以及可得到電極剝離的抑制的效果的寬度,以具有藉由第一粗糙面處理而被粗糙化的深度的0.5~15倍左右的寬度為較適合。較佳地,粗糙面的凹凸高度為發光波長的1/2的整數倍數。 The third region 130 has the effects of suppressing over-etching and electrode peeling of the first ohmic electrode 121 in the first rough surface processing step. On the other hand, in order not to reduce the reflection prevention effect due to the roughening effect, the width of the third region 130 must be set to an appropriate width that is not too wide. As the width of the anti-reflection effect that is less reduced and the effect of suppressing the peeling of the electrode can be obtained, a width of about 0.5 to 15 times the depth roughened by the first rough surface treatment is more suitable. Preferably, the roughness of the rough surface is an integral multiple of 1/2 of the emission wavelength.

第二區域131的寬度,以具有藉由第一粗糙面處理而被粗糙化的深度的0.5~15倍左右的寬度為較適合。 The width of the second region 131 is preferably about 0.5 to 15 times the depth roughened by the first rough surface treatment.

在此,將前述的基板除去選擇蝕刻層設置於第一半導體層103之上的狀況下,於該基板除去選擇蝕刻層與第一半導體層103之間設置有第一粗糙面處理選擇蝕刻層(未圖示)為較佳,如此在除去基板後第一粗糙面處理選擇蝕刻層殘留於第二區域131,即可進行第一粗糙面處理。以這種方式,於第一粗糙面處理步驟中能減低對光阻圖案下的過蝕刻。 Here, in a state where the aforementioned substrate removal selective etching layer is provided on the first semiconductor layer 103, a first rough surface treatment selective etching layer is provided between the substrate removal selective etching layer and the first semiconductor layer 103 ( (Not shown) is preferred. In this way, after the substrate is removed, the first rough surface treatment selective etching layer remains in the second region 131 to perform the first rough surface treatment. In this way, overetching under the photoresist pattern can be reduced in the first rough surface processing step.

由於第一粗化液對於由非Al含有材料所組成的層具有選擇蝕刻性,第一粗糙面處理選擇蝕刻層以GaAs、InGaP、InGaAs、Ge來構成為較佳。以這種方式,將第一粗糙面處理選擇蝕刻層端部作為起點形成刻面,能抑止圖案下的過蝕刻。但是,使用第一粗糙面處理選擇蝕刻層的狀況下,由於非Al含有材料對於發光波長會吸收光,故第一粗糙面處理後,最好加入以SPM等的過氧化氫溶液含有液體來選擇性除去第一粗糙面處理選擇蝕刻層的步驟。 Since the first roughening liquid has selective etching properties for a layer composed of a non-Al-containing material, it is preferable that the first rough surface treatment selective etching layer is composed of GaAs, InGaP, InGaAs, and Ge. In this way, using the first rough surface treatment selective etching layer end as a starting point to form a facet can suppress over-etching under the pattern. However, in the case where the etching layer is selected using the first rough surface treatment, since the non-Al-containing material absorbs light at the emission wavelength, it is best to add a liquid containing hydrogen peroxide solution such as SPM after the first rough surface treatment The step of selectively removing the first rough surface and processing the selective etching layer.

第二區域131的寬度不只有受第一粗糙面處理所進行的粗糙化深度的制約,亦有受微影的對位精度的制約。使用對位精度高的定位儀或步進器 能使對於對位精度所預測的追加寬度少許即可,另一方面,使用對位精度低的定位儀的狀況下,則最好預測精度而準備較多的追加寬度為較佳。 The width of the second region 131 is not only limited by the depth of roughening performed by the first rough surface processing, but also by the positioning accuracy of lithography. Use locator or stepper with high alignment accuracy It is sufficient to make the additional width predicted for the alignment accuracy a little. On the other hand, in the case of using a locator with a low alignment accuracy, it is better to predict the accuracy and prepare more additional width.

藉由進行以上的步驟,能於第一半導體層103表面得到未粗糙化的平坦的第二區域131。如此一來,能於後述的元件分離步驟中抑制經元件分離的發光部108的側面的凹凸發生。 By performing the above steps, an unroughened flat second region 131 can be obtained on the surface of the first semiconductor layer 103. In this way, it is possible to suppress the occurrence of unevenness on the side surface of the light-emitting portion 108 separated by the element in the element separation step described later.

接下來,如第7圖所示,進行形成除去該發光部108的一部分的除去部170以及其以外的非除去部180的元件分離步驟(第2圖的SP7)。 Next, as shown in FIG. 7, an element separation step (SP7 in FIG. 2) of forming the removed portion 170 that removes a part of the light-emitting portion 108 and the other non-removed portion 180 is performed.

元件分離步驟,能藉由例如微影法,以光阻劑對第一半導體層103上預定的區域(第6圖中第二歐姆電極形成區域140、切劃線區域141)予以開口而形成圖案,能將此光阻劑作為蝕刻遮罩使用來進行蝕刻。 In the device isolation step, a predetermined area (the second ohmic electrode formation area 140 and the scribe line area 141 in FIG. 6) of the first semiconductor layer 103 can be patterned by photolithography, for example, by a photolithography method , This photoresist can be used as an etching mask for etching.

上述蝕刻係藉由包含鹽酸的濕式蝕刻液的濕式蝕刻法而能形成:第二半導體層105、使緩衝層106或窗層兼支持基板107露出的除去部170以及除去部170以外的非除去部180。 The above etching can be formed by a wet etching method including a wet etching solution of hydrochloric acid: the second semiconductor layer 105, the removal portion 170 that exposes the buffer layer 106 or the window layer and support substrate 107, and the non-removable portion 170 Apart from the 180.

此時,上述的第一粗糙面處理步驟中,能使非Al含有層(未圖示)殘留於未粗糙化的第二區域131而予以作為蝕刻遮罩使用。 At this time, in the first rough surface treatment step described above, a non-Al-containing layer (not shown) can be left in the unroughened second region 131 to be used as an etching mask.

非Al含有層可包含GaAs、InGaP、InGaAs、Ge之中的任一層以上。非Al含有層由於以含有鹽酸的蝕刻液無法蝕刻,而會以非Al含有層端部作為起點而形成刻面,故能於經進行元件分離的發光部108的側面得到清楚的平台形狀。但是,於使用非Al含有層的狀況下,在元件分離步驟後,最好進行以SPM(硫酸/過氧化氫水)等的過氧化氫溶液含有液體來選擇性除去非Al含有層的步驟。 The non-Al-containing layer may include any one or more of GaAs, InGaP, InGaAs, and Ge. Since the non-Al-containing layer cannot be etched with an etchant containing hydrochloric acid, a facet is formed using the end of the non-Al-containing layer as a starting point, so that a clear platform shape can be obtained on the side surface of the light-emitting portion 108 subjected to element separation. However, in the case where a non-Al-containing layer is used, after the element separation step, it is preferable to perform a step of selectively removing the non-Al-containing layer with a liquid containing hydrogen peroxide solution such as SPM (sulfuric acid / hydrogen peroxide water).

另外,元件分離步驟中,除了上述的濕式蝕刻法之外,也能藉由使用含有鹵素氣體或較佳為含有氯化氫的氣體的方法來進行乾式蝕刻法。 In addition, in the element isolation step, in addition to the above-mentioned wet etching method, a dry etching method can also be performed by a method using a gas containing halogen gas or preferably containing hydrogen chloride.

以這種方式,能於進行元件分離的發光部的側面得到無收縮(過蝕刻)的形狀。 In this way, a shape without shrinkage (over-etching) can be obtained on the side surface of the light-emitting portion where the elements are separated.

接下來,如第8圖所示,在經除去發光部108的窗層兼支持基板107上的除去部170上形成第二歐姆電極122(第2圖的SP8)。 Next, as shown in FIG. 8, a second ohmic electrode 122 (SP8 in FIG. 2) is formed on the removed portion 170 on the window layer and support substrate 107 from which the light emitting portion 108 has been removed.

接下來,如第8圖所示,以絕緣保護膜150覆蓋第一半導體層103表面以及發光部108的側面的至少一部分(第2圖的SP9)。 Next, as shown in FIG. 8, at least a part of the surface of the first semiconductor layer 103 and the side surface of the light emitting portion 108 is covered with the insulating protective film 150 (SP9 in FIG. 2).

絕緣保護膜150只要是透明且具有絕緣性的材料,任何一種材料皆可。作為絕緣保護膜150能夠適合使用例如石英或氮化矽。藉由此種之物,能容易藉由微影法與含有氫氟酸的蝕刻液,來對第一歐姆電極121以及第二歐姆電極122的上部進行開口加工。 The insulating protective film 150 may be any material as long as it is a transparent and insulating material. As the insulating protective film 150, for example, quartz or silicon nitride can be suitably used. With such a material, the upper portions of the first ohmic electrode 121 and the second ohmic electrode 122 can be easily processed by the lithography method and the etching solution containing hydrofluoric acid.

接下來,如第1圖所示,進行第二粗糙面處理步驟來對窗層兼支持基板107的表面以及側面進行粗糙化(第2圖的SP10)。 Next, as shown in FIG. 1, a second rough surface treatment step is performed to roughen the surface and side surfaces of the window layer and support substrate 107 (SP10 in FIG. 2).

在進行第二粗糙面處理前,較佳的,首先沿著除去部170劃切劃線,並藉由進行裂片來分離發光元件而形成發光元件晶粒。發光元件晶粒形成後,較佳地,使發光元件晶粒轉移至承載膠帶而位於窗層兼支持基板107的上面後,進行下面所述的第二粗糙面處理。 Before performing the second rough surface treatment, it is preferable to first scribe a scribe line along the removal portion 170, and separate the light emitting element by splitting to form a light emitting element crystal grain. After the light-emitting element die is formed, preferably, the light-emitting element die is transferred to a carrier tape and is located on the upper surface of the window layer and support substrate 107, and then subjected to the second rough surface treatment described below.

在第二粗糙面處理步驟能使用包含檸檬酸、丙二酸、甲酸、乙酸及酒石酸的有機酸中的任一種以上,且包含:鹽酸、硫酸、硝酸及氫氟酸的無機酸中的任一種以上,且包含碘的溶液而進行。 In the second rough surface treatment step, any one or more of organic acids including citric acid, malonic acid, formic acid, acetic acid, and tartaric acid, and any of inorganic acids including hydrochloric acid, sulfuric acid, nitric acid, and hydrofluoric acid can be used This is done with a solution containing iodine.

在上述提到的第一粗糙面處理步驟中所使用的施加於第一半導體層103的第一粗化液,以及在第二粗糙面處理步驟中施加於窗層兼支持基板107的第二粗化液,二者的液體成分係為相異。因此,由於蝕刻特性相異的緣故,而必然的會使第一半導體層103與窗層兼支持基板107所具有的粗糙面的形狀以及Ra(算術平均粗糙度)為相異之物。 The first roughening liquid applied to the first semiconductor layer 103 used in the first rough surface processing step mentioned above, and the second roughening liquid applied to the window layer and support substrate 107 in the second rough surface processing step The chemical composition of the two liquids is different. Accordingly, since the etching characteristics different reasons, necessarily causes the first semiconductor layer 103 and the window layer and the support substrate has a shape and a rough surface 107 R a (arithmetic mean roughness) of different things.

藉由上述所說明的本發明的發光元件的製造方法,透過於第一半導體層103表面設置未粗糙化的第二區域131,於元件分離步驟中,由於能抑制 於發光部108產生的過蝕刻,因此經元件分離的發光部108的側面的形狀與第二區域131的形狀大致相同。因此,由於能使經元件分離的發光部108的側面的Rz為未滿2μm,因此能使經元件分離的發光部108的側面的形狀中發生電場集中於凸部之情況獲得抑制。如此一來,能透過粗糙化來提升發光效率的同時,亦可製造依存於發光部側面的凹凸形狀的漏電不良或ESD不良的發生受到抑制的發光元件。 According to the method for manufacturing a light-emitting element of the present invention described above, by providing an unroughened second region 131 on the surface of the first semiconductor layer 103, the over-etching generated in the light-emitting portion 108 can be suppressed during the element separation step Therefore, the shape of the side surface of the light-emitting part 108 separated by the element is substantially the same as the shape of the second region 131. Therefore, since the R z of the side surface of the light-emitting portion 108 separated by the element can be less than 2 μm, the shape of the side surface of the light-emitting portion 108 separated by the element can be prevented from being concentrated in the convex portion. In this way, it is possible to improve the luminous efficiency through roughening, and at the same time, it is possible to manufacture a light-emitting element in which the occurrence of poor leakage or ESD defects depending on the uneven shape of the side surface of the light-emitting portion is suppressed.

〔實施例〕 [Examples]

以下,顯示本發明的實施例及比較例而更為具體的說明本發明,但本發明並未被限定於此。 Hereinafter, Examples and Comparative Examples of the present invention will be shown to explain the present invention more specifically, but the present invention is not limited thereto.

<實施例1> <Example 1>

結晶軸自〔001〕方向朝〔110〕方向15°傾斜的厚度280μm的n型GaAs基板101上使n型GaAs緩衝層(未圖示)成長0.5μm,以及使n型AlInP基板除去選擇蝕刻層(未圖示)成長1μm後,以MOVPE法形成由AlGaInp所組成的n型披覆層(第一半導體層103)、活性層104、p型披覆層(第二半導體層105)所構成的6.5μm的發光部108,再形成由p型InGaP所組成的0.3μm的緩衝層106,以及形成作為GaP窗層兼支持基板107的一部分而由p型GaP所組成的1μm的層。接下來,移至HVPE爐使由p型GaP組成的窗層兼支持基板107成長120μm而得到磊晶基板109(參考第3圖)。 The n-type GaAs buffer layer (not shown) is grown by 0.5 μm on the n-type GaAs substrate 101 with a thickness of 280 μm and the crystal axis is inclined by 15 ° from the [001] direction to the [110] direction, and the selective etching layer is removed from the n-type AlInP substrate (Not shown) After growing 1 μm, an n-type cladding layer (first semiconductor layer 103) composed of AlGaInp, an active layer 104, and a p-type cladding layer (second semiconductor layer 105) are formed by the MOVPE method The light-emitting portion 108 of 6.5 μm is further formed with a buffer layer 106 of 0.3 μm composed of p-type InGaP and a layer of 1 μm composed of p-type GaP as a part of the GaP window layer and support substrate 107. Next, it moved to an HVPE furnace to grow a window layer and support substrate 107 composed of p-type GaP by 120 μm to obtain an epitaxial substrate 109 (refer to FIG. 3).

接下來,除去GaAs基板101、GaAs緩衝層及n型AlInP基板除去選擇蝕刻層而製作出發光元件基板110(參考第4圖)。 Next, the GaAs substrate 101, the GaAs buffer layer, and the n-type AlInP substrate are removed, and the selective etching layer is removed to produce a light-emitting element substrate 110 (refer to FIG. 4).

接下來,將第一歐姆電極121形成到發光元件基板110的第一半導體層103的基板除去面120上(參考第5圖),藉由微影法而形成以光阻劑覆蓋第三區域130以及第二區域131的圖案。如第9圖所示,第三區域130沿著第一歐姆 電極,第二區域131沿著元件分離預定線160設置。第三區域130的寬度則設為蝕刻深度的4倍的2μm。另外,第二區域131的寬度則設為6μm。 Next, the first ohmic electrode 121 is formed on the substrate-removed surface 120 of the first semiconductor layer 103 of the light-emitting element substrate 110 (refer to FIG. 5), and is formed by photolithography to cover the third region 130 with a photoresist And the pattern of the second area 131. As shown in FIG. 9, the third region 130 is along the first ohm For the electrode, the second region 131 is provided along the line 160 for separating the elements. The width of the third region 130 is set to 2 μm which is four times the etching depth. In addition, the width of the second region 131 is set to 6 μm.

接下來於第一半導體層103表面實施第一粗糙面處理步驟(參考第6圖)。第一粗化液是由乙酸和鹽酸的混合液所製作出,在常溫下1分鐘蝕刻而實現粗糙面處理。 Next, a first rough surface treatment step is performed on the surface of the first semiconductor layer 103 (refer to FIG. 6). The first roughening solution is made of a mixed solution of acetic acid and hydrochloric acid, and is etched at room temperature for 1 minute to achieve rough surface treatment.

接下來,藉由微影法,以光阻劑覆蓋第二歐姆電極形成區域140以及裂片區域141(參考第6圖)以外的區域,藉由含有鹽酸的濕式蝕刻液之濕式蝕刻法實施元件分離步驟,而形成除去發光部108並使窗層兼支持基板107露出的除去部170、以及其以外的非除去部180(參考第7圖)。 Next, the area other than the second ohmic electrode formation region 140 and the split region 141 (refer to FIG. 6) is covered with a photoresist by a photolithography method, and implemented by a wet etching method including a wet etching solution containing hydrochloric acid In the element isolation step, the removed portion 170 that removes the light-emitting portion 108 to expose the window layer and support substrate 107 and the other non-removed portion 180 (see FIG. 7) are formed.

進行以上步驟的結果,經進行元件分離的發光部的側面的Rz係因應光阻圖案精度而顯示於0.5μm左右。 As a result of performing the above steps, the R z of the side surface of the light-emitting part subjected to element separation is displayed at about 0.5 μm according to the accuracy of the photoresist pattern.

接下來,於除去部170形成第二歐姆電極122(參考第8圖)。接下來,層疊由石英所構成的絕緣保護膜150,以絕緣保護膜150覆蓋第一半導體層103表面以及發光部108的側面。並且,第一歐姆電極121以及第二歐姆電極122部分係藉由微影法與氫氟酸蝕刻而於絕緣保護膜150形成開口部。 Next, the second ohmic electrode 122 is formed in the removed portion 170 (refer to FIG. 8). Next, an insulating protective film 150 made of quartz is laminated, and the surface of the first semiconductor layer 103 and the side surface of the light emitting portion 108 are covered with the insulating protective film 150. In addition, the first ohmic electrode 121 and the second ohmic electrode 122 are formed with an opening in the insulating protective film 150 by lithography and hydrofluoric acid etching.

接下來,沿著露出的除去部170劃切劃線,沿著切劃線延伸裂痕線,之後,藉由進行切裂而分離元件,而形成發光元件晶粒。 Next, a scribe line is scribed along the exposed removal portion 170, a crack line is extended along the scribe line, and then the device is separated by dicing to form a light-emitting element crystal grain.

發光元件晶粒形成後,使元件晶粒轉移至承載膠帶而使設置有第一歐姆電極的面位於貼近膠帶面側,之後,實施第二粗糙面處理步驟。在第二粗糙面處理步驟中進行窗層兼支持基板的粗糙化時所使用的粗化液,是由乙酸與氫氟酸、碘的混合液所製作出。並且,在常溫下1分鐘蝕刻來進行第二粗糙面處理。 After the light-emitting element die is formed, the element die is transferred to the carrier tape so that the surface on which the first ohmic electrode is provided is located on the side close to the tape surface, and then the second rough surface treatment step is performed. The roughening liquid used for roughening the window layer and supporting substrate in the second rough surface treatment step is prepared from a mixed liquid of acetic acid, hydrofluoric acid, and iodine. Then, the second rough surface treatment is performed by etching at room temperature for 1 minute.

藉由上述的方法而製作出第9圖所顯示的發光元件。 The light-emitting element shown in FIG. 9 was produced by the method described above.

第11圖係顯示實施例1中元件分離部的端部的照片。自第11圖可得知,係顯示以直線予以形成第二區域131的端部的狀態。 FIG. 11 is a photograph showing the end of the element separation portion in Example 1. FIG. It can be seen from FIG. 11 that it shows a state where the end of the second region 131 is formed in a straight line.

以上述所製作出的發光元件製作燈泡,並進行了測定與評價。 A light bulb was produced using the light-emitting element prepared above, and the measurement and evaluation were performed.

以實施例1所製造出的發光元件所製作出的燈泡於反向施加電流值10μA時將反向電壓(VR)的結果顯示於第13圖。再者,第13圖也合併顯示後述的實施例2以及比較例的結果。 The light bulb fabricated with the light-emitting element manufactured in Example 1 shows the reverse voltage (VR) result when the current value is 10 μA in the reverse direction, as shown in FIG. 13. In addition, FIG. 13 also shows the results of Example 2 and Comparative Examples described later.

其結果,如第13圖所示,以實施例1以及後述的實施例2所製作出的燈泡,在反向施加電流值在10μA的狀況下,VR必須要在30V以上,VR值顯示於未滿30V的燈泡並未發生。另一方面,以後述的比較例所製作出的燈泡的約半數的VR值係顯示為未滿30V。如此得知本發明的發光元件在藉由第二區域的存在其反向電壓的特性為成為優良之物。 As a result, as shown in FIG. 13, in the case of the bulb manufactured in Example 1 and Example 2 described later, under the condition that the reverse applied current value is 10 μA, VR must be at least 30 V, and the VR value is displayed in A bulb full of 30V did not happen. On the other hand, about half of the VR values of the bulbs produced in the comparative examples described below are shown to be less than 30V. In this way, it is known that the light-emitting device of the present invention has excellent reverse voltage characteristics due to the presence of the second region.

接下來,使用以實施例1所製造出的發光元件而製作出的燈泡,將進行ESD檢驗的結果顯示於第14圖。ESD實施條件是以HBM(HumanBody Model)來進行。再者,於第14圖合併顯示後述的實施例2以及比較例的結果。 Next, the light bulb manufactured using the light-emitting element manufactured in Example 1 was used, and the result of ESD inspection is shown in FIG. 14. ESD implementation conditions are based on HBM (Human Body Model). In addition, the results of Example 2 and Comparative Examples described later are collectively shown in FIG. 14.

其結果,如第14圖所示,以實施例1以及後述的實施例2所製作出的燈泡,於至2000V為止的ESD檢驗中並未發生ESD破壞。另一方面後面所述的比較例中係於100V左右的ESD電壓下發生ESD破壞,至600V之前投入檢驗中的全部的元件皆已被ESD破壞。 As a result, as shown in FIG. 14, the bulbs produced in Example 1 and Example 2 described below did not undergo ESD damage during ESD inspection up to 2000V. On the other hand, in the comparative example described later, ESD destruction occurs at an ESD voltage of about 100V, and all components put into inspection before 600V have been destroyed by ESD.

<實施例2> <Example 2>

首先,與實施例1相同,進行至第一粗糙面處理步驟。 First, as in Example 1, proceed to the first rough surface treatment step.

接下來,為了進行乾式蝕刻法,以石英膜覆蓋第一半導體層、第一歐姆電極至300nm,藉由微影法予以形成元件分離預定形狀的光阻圖案。接下來,藉由氫氟酸對圖案開口部進行蝕刻。 Next, in order to perform a dry etching method, the first semiconductor layer and the first ohmic electrode are covered with a quartz film to 300 nm, and a photoresist pattern with a predetermined shape for device separation is formed by a lithography method. Next, the opening of the pattern is etched by hydrofluoric acid.

並且,將具有開口圖案的石英膜作為蝕刻遮罩來實施乾式蝕刻法。進行乾式蝕刻時藉由導入含有氯的氣體的RIE法或是ICP法來實施元件分離,除去發光部,而形成露出窗層兼支持基板的除去部。 In addition, a dry etching method is performed using a quartz film having an opening pattern as an etching mask. During dry etching, element separation is performed by the RIE method or the ICP method in which a gas containing chlorine is introduced, and the light-emitting portion is removed to form a removal portion that exposes the window layer and supports the substrate.

進行以上步驟的結果,已進行元件分離的發光部的側面的Rz係因應石英罩的圖案精度而顯示於0.5μm左右。 As a result of performing the above steps, the R z system on the side surface of the light-emitting part that has undergone element separation is displayed at about 0.5 μm in accordance with the pattern accuracy of the quartz cover.

之後,與實施例1相同,進行自第二歐姆電極的形成至第二粗糙面處理步驟,而製造出如第10圖所顯示的發光元件。 Thereafter, in the same way as in Example 1, the steps from the formation of the second ohmic electrode to the second rough surface were performed to manufacture the light-emitting element shown in FIG. 10.

以上述步驟所製作出的發光元件進行燈泡的製作,並進行了測定與評價。 The light-emitting element produced in the above steps was used to produce a light bulb, and measurement and evaluation were performed.

以實施例2中所製造出的發光元件所製作出的燈泡在反向施加電流值10μA時的反向電壓(VR)的結果顯示於第13圖。 The result of the reverse voltage (VR) of the light bulb fabricated with the light-emitting element manufactured in Example 2 when the current value is 10 μA in the reverse direction is shown in FIG. 13.

其結果,如第13圖所示,以實施例2所製作出的燈泡,反向施加電流值為10μA的狀況下,VR必須在30V以上,VR值未滿30V的燈泡並未發生。由此得知本發明的發光元件在藉由第二區域的存在其反向電壓的特性為成為優良之物。 As a result, as shown in FIG. 13, in the case of the bulb manufactured in Example 2, when the reverse applied current value is 10 μA, VR must be 30 V or more, and a bulb with a VR value less than 30 V does not occur. From this, it is known that the light-emitting device of the present invention has excellent reverse voltage characteristics due to the presence of the second region.

接下來,使用以實施例2所製造出的發光元件而製作出的燈泡,將進行ESD檢驗的結果顯示於第14圖。ESD實施條件是以HBM(HumanBody Model)來進行。 Next, using the light-emitting device manufactured in Example 2, the light bulb produced and the results of ESD inspection are shown in FIG. 14. ESD implementation conditions are based on HBM (Human Body Model).

其結果,如第14圖所示,以實施例2所製作出的燈泡,於至2000V為止的ESD檢驗中並未發生ESD破壞。 As a result, as shown in FIG. 14, the bulb manufactured in Example 2 did not undergo ESD damage in the ESD inspection up to 2000V.

<比較例> <Comparative example>

於第一粗糙面處理步驟中,除了未設置第二區域以外,進行與實施例1相同的發光元件的製造。 In the first rough surface treatment step, except that the second region was not provided, the same light-emitting element as in Example 1 was manufactured.

其結果,在比較例中藉由第一粗糙面處理而產生的凹凸(第一半導體層表面的Rz=0.6μm前後)藉由元件分離步驟而增大,而使經進行元件分離的發光部的側面的Rz達到3~4μm。 As a result, the unevenness (before and after R z = 0.6 μm on the surface of the first semiconductor layer) generated by the first rough surface treatment in the comparative example is increased by the element separation step, so that the light-emitting portion subjected to element separation The R z on the side reaches 3 ~ 4μm.

第12圖中係顯示比較例中的元件分離部端部的照片。 FIG. 12 is a photograph showing the end of the element separation portion in the comparative example.

以上述所製作出的發光元件進行燈泡的製作,並進行了測定與評價。 The light-emitting element produced above was used to produce a light bulb, and measurement and evaluation were performed.

以比較例所製造出的發光元件所製作出的燈泡在反向施加電流值10μA時的反向電壓(VR)的結果顯示於第13圖。 The results of the reverse voltage (VR) when the current value of the light bulb produced by the light-emitting element manufactured in the comparative example was 10 μA in the reverse direction were shown in FIG. 13.

其結果,如第13圖所示,顯示出以比較例所製作出的燈泡的大約半數的VR值未滿30V。 As a result, as shown in FIG. 13, it was shown that about half of the VR values of the bulbs produced in the comparative example were less than 30V.

接下來,使用以比較例所製造出的發光元件而製作出的燈泡,將進行ESD檢驗的結果顯示於第14圖。ESD實施條件是以HBM(HumanBody Model)來進行。 Next, using the light-emitting element manufactured in the comparative example, the bulb was produced, and the results of ESD inspection are shown in FIG. 14. ESD implementation conditions are based on HBM (Human Body Model).

其結果,如第14圖所示,以比較例所製作出的燈泡,在100V左右的ESD電壓下發生ESD破壞,至600V之前投入檢驗中的全部的元件皆已被ESD破壞。 As a result, as shown in FIG. 14, the bulb manufactured in the comparative example caused ESD destruction at an ESD voltage of about 100V, and all the devices under inspection before 600V were destroyed by ESD.

<實驗> <Experiment>

除了變化元件分離步驟形成時的遮罩圖案,以及變化發光部的側面的Rz以外,以實施例1的方法所製造出的發光元件製作出複數個燈泡(實驗1)。 A plurality of light bulbs were produced in the light-emitting element manufactured by the method of Example 1, except for the mask pattern during the formation of the variable element separation step and the variation of R z on the side surface of the light-emitting portion (Experiment 1).

除了變化元件分離步驟形成時的遮罩圖案,以及變化發光部的側面的Rz以外,以實施例2的方法所製造出的發光元件製作出複數個燈泡(實驗2)。 A plurality of light bulbs were produced by the light-emitting element manufactured by the method of Example 2 except for the mask pattern during the formation of the variable element separation step and the variation of R z on the side surface of the light-emitting portion (Experiment 2).

並且,以上述的實驗1、2的燈泡在反向施加電流值10μA時的進行VR不良率的測定的結果顯示於第15圖。再者,反向施加電流10μA時的VR值為未滿30V者作為VR不良進行測定。 In addition, the results of the measurement of the VR defect rate when the current value of the lamp of Experiments 1 and 2 was reversely applied at 10 μA are shown in FIG. 15. In addition, when the VR value when the current is applied in the reverse direction of 10 μA is less than 30V, it is measured as a VR defect.

其結果,如第15圖所示,實驗1、2共同在未滿2μm之前,VR不良雖然幾乎沒有發生,於Rz在2μm以上的狀況下,得知VR不良同時於實驗1、2開始增加。 As a result, as shown in Fig. 15, experiments 1 and 2 together had almost no VR defects before less than 2 μm. Under the condition that R z was 2 μm or more, it was learned that VR defects started increasing at the same time in experiments 1 and 2 .

經進行元件分離的發光部側面的形狀,由於幾乎是承繼元件分離步驟中第一半導體層的外周部的形狀,故於第15圖顯示出元件分離步驟時的第一半導體層的外周部的凹凸越大,則越容易發生VR不良。 The shape of the side surface of the light-emitting portion after element separation is almost the shape of the outer periphery of the first semiconductor layer in the element separation step, so FIG. 15 shows the unevenness of the outer periphery of the first semiconductor layer during the element separation step The larger it is, the more likely VR defects will occur.

因此,發光部側面的Rz必須要為未滿2μm。第15圖雖只有顯示VR不良,但關於顯示施加反偏壓時的洩漏電流值的IR特性也有相同的傾向。 Therefore, the R z on the side of the light-emitting part must be less than 2 μm. Although Fig. 15 shows only the VR failure, the IR characteristics showing the leakage current value when the reverse bias voltage is applied also have the same tendency.

另外,雖然準備發光部側面的凹凸在發光部側面上並非均勻,而是發光元件側面的一部分的凹凸量為一半的圖案來進行測定,但VR不良發生的傾向與以同一凹凸量所構成的圖案的狀況是同樣的。因此,得知發光部側面的凹凸與VR不良率發生的關係為:發光部側面的Rz只要在2μm以上即會顯示增加VR不良率。因此,為了抑制洩漏不良或ESD不良,發光部側面的Rz必須要未滿2μm。 In addition, although the unevenness on the side surface of the light-emitting portion is not uniform on the side surface of the light-emitting portion, but a part of the side surface of the light-emitting element is measured with a pattern of half the amount of unevenness, the tendency of VR defects to occur is the same as the pattern composed of the same amount of unevenness The situation is the same. Therefore, it is known that the relationship between the unevenness on the side surface of the light emitting portion and the occurrence rate of the VR defect is that as long as the R z on the side surface of the light emitting portion is 2 μm or more, the VR defect rate increases. Therefore, in order to suppress defective leakage or defective ESD, the R z on the side of the light-emitting part must be less than 2 μm.

此外,本發明並未被限定於上述實施例,上述實施例為例示,凡具有與本發明的申請專利範圍所記載的技術思想實質上相同的構成,能得到同樣的作用效果者,皆被包含在本發明的技術範圍內。 In addition, the present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are examples, and those who have substantially the same structure as the technical idea described in the patent application scope of the present invention and can obtain the same effect are included. Within the technical scope of the present invention.

Claims (8)

一種發光元件,具有一窗層兼支持基板及設置於該窗層兼支持基板上的一發光部,該發光部依序包含有係為第二導電型的一第二半導體層、一活性層及係為第一導電型的一第一半導體層,其中該發光元件具有經除去該發光部的一除去部、該除去部以外的一非除去部、設置於該非除去部的該第一半導體層上的一第一歐姆電極、及設置於該除去部的該窗層兼支持基板上的一第二歐姆電極,以及該第一半導體層之表面以及該發光部之側面的至少一部份係以一絕緣保護膜所覆蓋,該第一半導體層的外周部除外的表面以及該窗層兼支持基板的表面係為經粗糙化,該第一半導體層的外周部係為未經粗糙化的平坦的表面,且該發光部側面的Rz為未滿2μm。A light-emitting element has a window layer and supporting substrate and a light-emitting portion provided on the window layer and supporting substrate, the light-emitting portion includes a second semiconductor layer, an active layer and a second conductive type in sequence It is a first semiconductor layer of the first conductivity type, wherein the light-emitting element has a removed portion from which the light-emitting portion is removed, a non-removed portion other than the removed portion, and is disposed on the first semiconductor layer of the non-removed portion A first ohmic electrode, and a second ohmic electrode on the support layer and the window layer provided in the removed portion, and at least a part of the surface of the first semiconductor layer and the side surface of the light emitting portion are Covered by an insulating protective film, the surface except the outer peripheral portion of the first semiconductor layer and the surface of the window layer and supporting substrate are roughened, and the outer peripheral portion of the first semiconductor layer is a flat surface without roughening , And R z on the side surface of the light-emitting part is less than 2 μm. 如請求項1所述之發光元件,其中該窗層兼支持基板係由GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC之中的任一個所組成,該第一半導體層、該活性層、該第二半導體層係由AlGaInP或AlGaAs所組成。The light-emitting element according to claim 1, wherein the window layer and supporting substrate is composed of any one of GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), and SiC. A semiconductor layer, the active layer, and the second semiconductor layer are composed of AlGaInP or AlGaAs. 一種發光元件的製造方法,包含:發光部形成步驟,係於基板上,以與該基板為晶格匹配系的材料藉由磊晶成長而依序成長一第一半導體層、一活性層、一第二半導體層而形成一發光部;窗層兼支持基板形成步驟,係於該發光部之上以對該基板為非晶格匹配系的材料藉由磊晶成長而形成一窗層兼支持基板;除去步驟,係除去該基板;第一歐姆電極形成步驟,係於該第一半導體層的表面形成一第一歐姆電極;第一粗糙面處理步驟,係於該第一半導體層的表面進行粗糙面處理;元件分離步驟,係形成除去該發光部的一部分的一除去部以及其以外的一非除去部;第二歐姆電極形成步驟,係於經除去該發光部的窗層兼支持基板上形成一第二歐姆電極;覆蓋步驟,係以絕緣保護膜覆蓋該第一半導體層表面以及該發光部的側面的至少一部分;以及第二粗糙面處理步驟,係粗糙化該窗層兼支持基板的表面以及側面,其中於該第一粗糙面處理步驟中,不粗糙化該第一歐姆電極周邊以及在其之後的該元件分離步驟中成為該非除去部的該第一半導體層表面的外周部的區域。A method for manufacturing a light-emitting device, comprising: a step of forming a light-emitting part on a substrate, a material of lattice matching system with the substrate is sequentially grown by epitaxial growth, a first semiconductor layer, an active layer, a The second semiconductor layer forms a light-emitting portion; the window layer and supporting substrate forming step is formed on the light-emitting portion to form an amorphous-matching material for the substrate by epitaxial growth to form a window layer and supporting substrate ; The removal step is to remove the substrate; The first ohmic electrode forming step is to form a first ohmic electrode on the surface of the first semiconductor layer; The first rough surface treatment step is to roughen the surface of the first semiconductor layer Surface treatment; the element separation step is to form a removed portion and a non-removed portion other than a part of the light-emitting portion; the second ohmic electrode forming step is formed on the window layer and supporting substrate after removing the light-emitting portion A second ohmic electrode; a covering step to cover the surface of the first semiconductor layer and at least a part of the side surface of the light-emitting portion with an insulating protective film; and a second roughness processing step to roughen the surface of the window layer and supporting substrate And a side surface, in which the periphery of the first ohmic electrode is not roughened in the first rough surface processing step and the area of the outer peripheral portion of the surface of the first semiconductor layer that becomes the non-removed portion in the element separation step thereafter. 如請求項3所述之發光元件的製造方法,其中該基板為GaAs或Ge,該窗層兼支持基板為GaP、GaAsP、AlGaAs、藍寶石(Al2O3)、石英(SiO2)、SiC之中的任一個,以及該第一半導體層、該活性層、該第二半導體層為AlGaInP或AlGaAs。The method for manufacturing a light-emitting element according to claim 3, wherein the substrate is GaAs or Ge, and the window layer and supporting substrate are GaP, GaAsP, AlGaAs, sapphire (Al 2 O 3 ), quartz (SiO 2 ), SiC Any one of them, and the first semiconductor layer, the active layer, and the second semiconductor layer are AlGaInP or AlGaAs. 如請求項4所述之發光元件的製造方法,其中在該第一粗糙面處理步驟中,係使用有機酸與無機酸的混合液而進行,該有機酸包含:檸檬酸、丙二酸、甲酸、乙酸及酒石酸中的任一種以上,該無機酸包含:鹽酸、硫酸、硝酸和氫氟酸中的任一種以上;以及在該第二粗糙面處理步驟中,係使用包含檸檬酸、丙二酸、甲酸、乙酸及酒石酸的有機酸中的任一種以上,且包含:鹽酸、硫酸、硝酸及氫氟酸的無機酸中的任一種以上,且包含碘的溶液而進行。The method for manufacturing a light-emitting element according to claim 4, wherein the first rough surface treatment step is performed using a mixture of an organic acid and an inorganic acid, the organic acid including: citric acid, malonic acid, formic acid , Acetic acid and tartaric acid, the inorganic acid contains: any one of hydrochloric acid, sulfuric acid, nitric acid and hydrofluoric acid; and in the second rough surface treatment step, the system contains citric acid, malonic acid , Formic acid, acetic acid, and tartaric acid, any one or more of organic acids, and includes hydrochloric acid, sulfuric acid, nitric acid, and hydrofluoric acid, any one or more of inorganic acids, and iodine solution. 如請求項3至5中任一項所述的發光元件的製造方法,其中在該元件分離步驟中,係藉由包含鹽酸的濕式蝕刻液的濕式蝕刻法來進行,並於該第一粗糙面處理步驟中使非Al含有層殘留於未粗糙化區域,而作為蝕刻遮罩使用。The method for manufacturing a light-emitting element according to any one of claims 3 to 5, wherein the element separation step is performed by a wet etching method including a wet etching solution containing hydrochloric acid, and In the rough surface treatment step, the non-Al-containing layer is left in the non-roughened area and used as an etching mask. 如請求項6所述之發光元件的製造方法,其中該非Al含有層包含GaAs、InGaP、InGaAs、Ge之中的任一層以上,並於該濕式蝕刻後進行除去該非Al含有層的步驟。The method for manufacturing a light-emitting element according to claim 6, wherein the non-Al-containing layer includes any one or more of GaAs, InGaP, InGaAs, and Ge, and a step of removing the non-Al-containing layer is performed after the wet etching. 如請求項3至5中任一項所述的發光元件的製造方法,其中在該元件分離步驟中,係藉由包含氯化氫的氣體的乾式蝕刻法來進行。The method of manufacturing a light-emitting element according to any one of claims 3 to 5, wherein the element separation step is performed by a dry etching method of a gas containing hydrogen chloride.
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