TWI615930B - Heat sink and chip package having the same - Google Patents

Heat sink and chip package having the same Download PDF

Info

Publication number
TWI615930B
TWI615930B TW106108924A TW106108924A TWI615930B TW I615930 B TWI615930 B TW I615930B TW 106108924 A TW106108924 A TW 106108924A TW 106108924 A TW106108924 A TW 106108924A TW I615930 B TWI615930 B TW I615930B
Authority
TW
Taiwan
Prior art keywords
groove
heat sink
heat
chip
carrier board
Prior art date
Application number
TW106108924A
Other languages
Chinese (zh)
Other versions
TW201836095A (en
Inventor
徐宏欣
藍源富
張連家
Original Assignee
力成科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 力成科技股份有限公司 filed Critical 力成科技股份有限公司
Priority to TW106108924A priority Critical patent/TWI615930B/en
Priority to CN201720505829.6U priority patent/CN207124188U/en
Priority to CN201710320362.2A priority patent/CN108630637A/en
Application granted granted Critical
Publication of TWI615930B publication Critical patent/TWI615930B/en
Publication of TW201836095A publication Critical patent/TW201836095A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

一種散熱件,其包括一散熱主體以及多個延伸部。散熱主體具有一散熱面、位於散熱面上的至少一第一凹槽、一位於散熱面上的環形凸起以及位於散熱面上的至少一第二凹槽。環形凸起位於第一凹槽與第二凹槽之間。環形凸起環繞至少一凹槽。多個延伸部分別從散熱主體之邊緣向外延伸。各延伸部分別具有一開口。此外,一種包含此散熱件的晶片封裝件亦被提出。A heat sink includes a heat sink body and a plurality of extensions. The heat dissipation body has a heat dissipation surface, at least one first groove on the heat dissipation surface, an annular protrusion on the heat dissipation surface, and at least one second groove on the heat dissipation surface. The annular protrusion is located between the first groove and the second groove. The annular protrusion surrounds at least one groove. The plurality of extending portions respectively extend outward from an edge of the heat dissipation body. Each extension has an opening. In addition, a chip package including the heat sink is also proposed.

Description

散熱件及具有散熱件之晶片封裝件Radiator and chip package with radiator

本發明是有關於一種散熱件,且特別是有關於一種適於使用於晶片封裝件中之散熱件。The present invention relates to a heat sink, and more particularly, to a heat sink suitable for use in a chip package.

一般而言,當晶片運作時,會產生大量的熱能。倘若熱能無法逸散而不斷地堆積在晶片內,晶片的溫度會持續地上升。如此一來,晶片可能會因為過熱而導致效能衰減或使用壽命縮短,嚴重者甚至造成永久性的損壞。為了預防晶片過熱導致暫時性或永久性的失效,通常須配置散熱件來降低晶片之工作溫度,進而讓晶片可正常運作。Generally speaking, when the chip is operating, a large amount of thermal energy is generated. If thermal energy cannot be dissipated and is continuously accumulated in the wafer, the temperature of the wafer will continue to rise. As a result, the chip may suffer from performance degradation or shortened service life due to overheating. In severe cases, it may even cause permanent damage. In order to prevent the wafer from overheating causing temporary or permanent failure, a heat sink is usually required to reduce the operating temperature of the wafer, so that the wafer can operate normally.

在具有散熱件的晶片封裝件製造過程中,通常是將散熱件配置於線路載板上,並使晶片位於散熱件與線路載板之間,接著一起置入模具中,然後將熔融的封裝膠體例如環氧模壓樹脂(Epoxy Molding Compound, EMC)注入模具,以使封裝膠體覆蓋線路載板、晶片以及部分的散熱件。接著,使封裝膠體冷卻並固化,以形成封裝層。In the manufacturing process of a chip package with a heat sink, the heat sink is usually arranged on the circuit carrier board, and the chip is located between the heat sink and the circuit carrier board, then placed together in a mold, and then the molten packaging gel is placed. For example, Epoxy Molding Compound (EMC) is injected into the mold, so that the encapsulation gel covers the circuit carrier board, the chip and part of the heat sink. Next, the encapsulant is cooled and solidified to form an encapsulation layer.

然而,因為模流的流速或流量不易控制,或是因為注入過程中所引起的擾動,所以封裝膠體有可能會局部地包覆散熱件的散熱面,進而導致晶片封裝件的外觀出現瑕疵並且導致晶片封裝件的散熱效率無法有效被提升。因此,如何進一步提升晶片封裝件的散熱效率,實已成目前亟欲解決的課題。However, because the flow rate or flow rate of the mold flow is not easy to control, or because of the disturbance caused during the injection process, the packaging gel may partially cover the heat dissipation surface of the heat sink, thereby causing defects in the appearance of the chip package and causing The heat dissipation efficiency of the chip package cannot be effectively improved. Therefore, how to further improve the heat dissipation efficiency of the chip package has become an urgent problem to be solved.

本發明提供一種散熱件及具散熱件之晶片封裝件,其具有良好的製造良率且可以提升晶片封裝件的散熱效率。The invention provides a heat dissipating member and a chip package with a heat dissipating member, which have good manufacturing yield and can improve the heat dissipation efficiency of the chip package.

本發明的一實施例提供一種散熱件,其包括一散熱主體以及多個延伸部。散熱主體具有一散熱面、位於散熱面上的至少一第一凹槽、一位於散熱面上的環形凸起以及位於散熱面上的至少一第二凹槽,其中環形凸起位於第一凹槽與第二凹槽之間,且環形凸起環繞該至少一第一凹槽。多個延伸部分別從散熱主體之邊緣向外延伸,且各延伸部分別具有一開口。An embodiment of the present invention provides a heat dissipating member, which includes a heat dissipating body and a plurality of extending portions. The heat-dissipating body has a heat-dissipating surface, at least one first groove on the heat-dissipating surface, an annular protrusion on the heat-dissipating surface, and at least one second groove on the heat-dissipating surface, wherein the annular protrusion is located in the first groove And the second groove, and the annular protrusion surrounds the at least one first groove. The plurality of extension portions respectively extend outward from an edge of the heat dissipation body, and each extension portion has an opening.

本發明的另一實施例提供一種晶片封裝件,其包括一線路載板、一晶片、一散熱件以及一封裝層。晶片配置於線路載板上並且與線路載板電性連接。散熱件配置於線路載板上以使晶片位於散熱主體與線路載板之間。封裝層覆蓋線路載板、晶片以及散熱件。Another embodiment of the present invention provides a chip package, which includes a circuit carrier board, a chip, a heat sink, and a packaging layer. The chip is disposed on the circuit carrier board and is electrically connected to the circuit carrier board. The heat sink is arranged on the circuit carrier board so that the chip is located between the heat dissipation body and the circuit carrier board. The encapsulation layer covers the circuit carrier board, the chip, and the heat sink.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.

圖1A是依照本發明的第一實施例的散熱件的上視示意圖。圖1B是圖1A中R1區域的放大圖。圖1C是沿圖1B中剖線A-A’的剖面示意圖。請先參照圖1A至圖1C,本實施例的散熱件100包括一散熱主體110以及多個延伸部130。散熱主體110具有一散熱面110a、位於散熱面110a上的一第一凹槽114、一位於散熱面110a上的環形凸起112以及位於散熱面110a上的一第二凹槽116。環形凸起112位於第一凹槽114與第二凹槽116之間,且環形凸起112環繞第一凹槽114。多個延伸部130分別從散熱主體110之邊緣向外延伸,且各延伸部130分別具有一開口130a。FIG. 1A is a schematic top view of a heat sink according to a first embodiment of the present invention. FIG. 1B is an enlarged view of the R1 region in FIG. 1A. Fig. 1C is a schematic cross-sectional view taken along the line A-A 'in Fig. 1B. Please refer to FIG. 1A to FIG. 1C first. The heat sink 100 of this embodiment includes a heat sink body 110 and a plurality of extension portions 130. The heat dissipation body 110 has a heat dissipation surface 110a, a first groove 114 on the heat dissipation surface 110a, an annular protrusion 112 on the heat dissipation surface 110a, and a second groove 116 on the heat dissipation surface 110a. The annular protrusion 112 is located between the first groove 114 and the second groove 116, and the annular protrusion 112 surrounds the first groove 114. The plurality of extension portions 130 respectively extend outward from an edge of the heat dissipation body 110, and each of the extension portions 130 has an opening 130 a.

散熱件100例如是藉由沖壓製程(stamping process)對金屬薄板進行沖壓所製成。在一些實施例中,可在沖壓製程進行之前,可以將金屬薄板預先切割成適於形成散熱件100的輪廓與尺寸,接著,再透過沖壓製程將具有特定輪廓與尺寸的金屬薄板對應地擠壓或彎曲,以形成散熱件100。在一些實施例中,可以透過水刀切割(water jet cutter)技術或雷射切割(laser cutting)技術將金屬薄板切割成適於形成散熱件100的輪廓與尺寸。在其他實施例中,金屬薄板的切割可在沖壓製程中一併進行。在本實施例中,散熱件100的散熱主體110與延伸部130為一體成形,且例如同為金屬材質,但本發明不限於此。The heat sink 100 is made by, for example, stamping a thin metal plate by a stamping process. In some embodiments, before the stamping process is performed, the metal sheet may be pre-cut into a contour and size suitable for forming the heat sink 100, and then the metal sheet having a specific contour and size is correspondingly extruded through the stamping process. Or bent to form the heat sink 100. In some embodiments, the metal sheet can be cut into a contour and a size suitable for forming the heat sink 100 through a water jet cutter technology or a laser cutting technology. In other embodiments, the cutting of the metal sheet may be performed in a stamping process. In this embodiment, the heat dissipating body 110 and the extending portion 130 of the heat dissipating member 100 are integrally formed, and are, for example, the same metal material, but the present invention is not limited thereto.

在本實施例中,散熱件100的散熱主體110為一圓形板狀體,第一凹槽114為一環形凹槽,第二凹槽116為一環形凹槽。環形凸起112位於散熱主體110的周緣,且環繞環形的第一凹槽114。第一凹槽114緊鄰環形凸起112,以使環形凸起112的第一側壁112a1與第一凹槽114的凹槽側壁114a對齊。第二凹槽116緊鄰環形凸起112,以使環形凸起112的第二側壁112a2與第二凹槽116的凹槽側壁116a對齊。被第一凹槽114所包圍的散熱面110a例如為一平面。詳細而言,由於本實施例的散熱件100是以沖壓製程所製成,所以需要額外的擠壓部分的金屬薄板,以形成第一凹槽114及第二凹槽116。因此,在散熱面110a上受到額外擠壓的金屬材料可以對應地形成第一凹槽114及第二凹槽116之間的環形凸起112,以減少散熱面110a於沖壓製程中所形成的缺陷(如毛刺、波浪紋或撕裂紋)。如此一來,散熱件100具有良好的製造良率,且第一凹槽114所包圍的散熱面110a及/或位於散熱面110a相對側的底面可以為平面,而使散熱件100具有良好的散熱效率。In this embodiment, the heat dissipation body 110 of the heat sink 100 is a circular plate-shaped body, the first groove 114 is an annular groove, and the second groove 116 is an annular groove. The annular protrusion 112 is located on the periphery of the heat dissipation body 110 and surrounds the annular first groove 114. The first groove 114 is adjacent to the annular protrusion 112, so that the first sidewall 112 a 1 of the annular protrusion 112 is aligned with the groove sidewall 114 a of the first groove 114. The second groove 116 is adjacent to the annular protrusion 112, so that the second sidewall 112 a 2 of the annular protrusion 112 is aligned with the groove sidewall 116 a of the second groove 116. The heat dissipation surface 110 a surrounded by the first groove 114 is, for example, a flat surface. In detail, since the heat sink 100 of this embodiment is made by a stamping process, an additional thin metal plate is needed to form the first groove 114 and the second groove 116. Therefore, the metal material subjected to the additional pressing on the heat dissipation surface 110a can correspondingly form the annular protrusion 112 between the first groove 114 and the second groove 116, so as to reduce defects formed by the heat dissipation surface 110a during the stamping process. (Such as burrs, wavy patterns, or tears). In this way, the heat dissipation member 100 has a good manufacturing yield, and the heat dissipation surface 110a surrounded by the first groove 114 and / or the bottom surface on the opposite side of the heat dissipation surface 110a may be flat, so that the heat dissipation member 100 has good heat dissipation. effectiveness.

在本實施例中,散熱件100包含四個延伸部130,且四個延伸部130分別位於散熱主體110的邊緣,且由散熱主體110之邊緣向外延伸並彎曲,以於散熱件100下方形成一容置空間。如此一來,所形成的容置空間可使晶片封裝件20(繪示於圖2A)中的晶片26(繪示於圖2A)容置於其中。各個延伸部130分別具有一開口130a,且散熱件100中的至少一開口130a允許模流通過。如此一來,在進行後續的注模製程(molding process)中,可以使熔融的封裝膠體(例如:環氧模壓樹脂)透過至少其中一個開口130a而填入容置空間中,進而覆蓋線路載板22(繪示於圖2A)、晶片26(繪示於圖2A)以及部分的散熱件100。接著,使封裝膠體冷卻並且固化,以形成封裝層24(繪示於圖2A)。In this embodiment, the heat sink 100 includes four extensions 130, and the four extensions 130 are respectively located at the edges of the heat sink 110, and are extended and bent outwardly from the edges of the heat sink 110 to be formed under the heat sink 100. An accommodation space. In this way, the accommodating space formed can accommodate the chip 26 (shown in FIG. 2A) in the chip package 20 (shown in FIG. 2A). Each extension 130 has an opening 130a, and at least one opening 130a in the heat sink 100 allows a mold flow to pass through. In this way, in the subsequent injection molding process, a molten encapsulating gel (for example, epoxy molding resin) can be filled into the accommodation space through at least one of the openings 130a, thereby covering the circuit carrier board. 22 (shown in FIG. 2A), wafer 26 (shown in FIG. 2A), and a part of the heat sink 100. Next, the encapsulant is cooled and solidified to form an encapsulation layer 24 (shown in FIG. 2A).

延伸部130具有第一傾斜部132、第一連接部134、第二傾斜部136與第二連接部138。值得注意的是,在圖1C的剖面示意圖中,延伸部130的第一傾斜部132、第一連接部134、第二傾斜部136與部分的第二連接部138並不會出現在圖1B中的剖線A-A’上。但在圖1C中,仍然將延伸部130的第一傾斜部132、第一連接部134、第二傾斜部136與部分的第二連接部138的投影位置以虛線繪示,以表示其位置的對應關係。The extension portion 130 includes a first inclined portion 132, a first connecting portion 134, a second inclined portion 136, and a second connecting portion 138. It is worth noting that, in the schematic cross-sectional view of FIG. 1C, the first inclined portion 132, the first connecting portion 134, the second inclined portion 136, and a portion of the second connecting portion 138 of the extension portion 130 do not appear in FIG. 1B On the section line AA '. However, in FIG. 1C, the projection positions of the first inclined portion 132, the first connection portion 134, the second inclined portion 136, and a portion of the second connection portion 138 of the extension portion 130 are still shown in dotted lines to indicate the position of the projection portion. Correspondence.

在本實施例中,散熱件100藉由延伸部130的第二連接部138與線路載板22(繪示於圖2A)連接。具體而言,在一實施例中,散熱件100與線路載板22(繪示於圖2A)之間例如可包含一黏著層(未繪示),以使第二連接部138與線路載板22(繪示於圖2A)藉由黏著層相互連接。在另一可行的實施例中,第二連接部138例如可具有一卡榫,且線路載板22(繪示於圖2A)可具有一對應於該卡榫的卡槽,以使第二連接部138與線路載板22(繪示於圖2A)可以互相卡合。在又一可行的實施例中,線路載板22(繪示於圖2A)的表面可具有一對應於第二連接部138的凹陷,以使第二連接部138可直接置於線路載板22(繪示於圖2A)上。In this embodiment, the heat sink 100 is connected to the circuit substrate 22 (shown in FIG. 2A) through the second connection portion 138 of the extension portion 130. Specifically, in an embodiment, the heat sink 100 and the circuit substrate 22 (shown in FIG. 2A) may include, for example, an adhesive layer (not shown), so that the second connection portion 138 and the circuit substrate 22 (shown in FIG. 2A) are connected to each other by an adhesive layer. In another feasible embodiment, the second connection portion 138 may have a tenon, for example, and the circuit carrier board 22 (shown in FIG. 2A) may have a card slot corresponding to the tenon, so that the second connection The portion 138 and the circuit board 22 (shown in FIG. 2A) can be engaged with each other. In another feasible embodiment, the surface of the circuit carrier board 22 (shown in FIG. 2A) may have a recess corresponding to the second connection portion 138 so that the second connection portion 138 can be directly placed on the circuit carrier board 22. (Shown in Figure 2A).

在本實施例中,第二傾斜部136與第二連接部138連接,第一連接部134與第二傾斜部136連接,且第二傾斜部136位於第一連接部134與第二連接部138之間。如此一來,藉由散熱主體110、延伸部130的第一連接部134與延伸部130的第二傾斜部136可於散熱主體110下方形成用以容納晶片26(繪示於圖2A)的容置空間。一實施例中,第二傾斜部136使散熱主體110與晶片26(繪示於圖2A)之間具有一適當間距,以使連接於晶片26(繪示於圖2A)與線路載板22(繪示於圖2A)之間的多個導線26a(繪示於圖2A)不會與散熱主體110接觸。第一連接部134從散熱主體110之邊緣向外延伸,以與第二傾斜部136形成可容納晶片26(繪示於圖2A)的容置空間。在另一可行的實施例中,延伸部130可以具有多個第二傾斜部136及/或多個第一連接部134,以形成可容納晶片26(繪示於圖2A)的容置空間。In this embodiment, the second inclined portion 136 is connected to the second connecting portion 138, the first connecting portion 134 is connected to the second inclined portion 136, and the second inclined portion 136 is located at the first connecting portion 134 and the second connecting portion 138. between. In this way, the heat dissipation body 110, the first connection portion 134 of the extension portion 130, and the second inclined portion 136 of the extension portion 130 can form a container for accommodating the chip 26 (shown in FIG. 2A) below the heat dissipation body 110. Home space. In one embodiment, the second inclined portion 136 has a proper distance between the heat dissipation body 110 and the chip 26 (shown in FIG. 2A) so as to connect the chip 26 (shown in FIG. 2A) and the circuit board 22 ( The plurality of wires 26 a (shown in FIG. 2A) (shown in FIG. 2A) between them are not in contact with the heat dissipation body 110. The first connecting portion 134 extends outward from the edge of the heat dissipation body 110 to form an accommodating space that can receive the chip 26 (shown in FIG. 2A) with the second inclined portion 136. In another feasible embodiment, the extending portion 130 may have a plurality of second inclined portions 136 and / or a plurality of first connecting portions 134 to form a receiving space capable of receiving the wafer 26 (shown in FIG. 2A).

在其他可行的實施例中,晶片26與線路載板22之間可透過導電凸塊彼此電性連接。換言之,晶片26可透過覆晶技術(Flip-Chip)設置於線路載板22上,並且與線路載板22電性連接。In other feasible embodiments, the chip 26 and the circuit substrate 22 may be electrically connected to each other through conductive bumps. In other words, the chip 26 can be disposed on the circuit carrier board 22 through a flip-chip technology, and is electrically connected to the circuit carrier board 22.

在本實施例中,延伸部130的第一傾斜部132與散熱主體110連接,第一傾斜部132與第一連接部134連接,其中第一傾斜部132位於散熱主體110與第一連接部134之間,且散熱件100的四個延伸部130藉由各自的第一連接部134彼此連接,但本發明不限於此。在一可行的實施例中,散熱件100的四個延伸部130可以彼此分離,且各個延伸部130的第一傾斜部132與散熱主體110連接。In this embodiment, the first inclined portion 132 of the extension portion 130 is connected to the heat dissipation body 110, and the first inclined portion 132 is connected to the first connection portion 134, wherein the first inclined portion 132 is located on the heat dissipation body 110 and the first connection portion 134. And the four extending portions 130 of the heat sink 100 are connected to each other through the respective first connecting portions 134, but the present invention is not limited thereto. In a feasible embodiment, the four extending portions 130 of the heat sink 100 can be separated from each other, and the first inclined portion 132 of each extending portion 130 is connected to the heat dissipation body 110.

圖2A是依照本發明一實施例的晶片封裝件的剖面示意圖,圖2B是圖2A中R2區域的放大圖。請先參照圖2A至圖2B,本實施例的晶片封裝件20包括一線路載板22、一晶片26、一散熱件100以及一封裝層24。晶片26配置於線路載板22上且與線路載板22電性連接。散熱件100配置於線路載板22上以使該晶片26位於散熱主體110與線路載板22之間。封裝層24覆蓋線路載板22、晶片26以及散熱件100。FIG. 2A is a schematic cross-sectional view of a chip package according to an embodiment of the present invention, and FIG. 2B is an enlarged view of an R2 region in FIG. 2A. Please refer to FIGS. 2A to 2B first. The chip package 20 of this embodiment includes a circuit carrier board 22, a chip 26, a heat sink 100, and a packaging layer 24. The chip 26 is disposed on the circuit carrier board 22 and is electrically connected to the circuit carrier board 22. The heat sink 100 is disposed on the circuit carrier board 22 so that the chip 26 is located between the heat dissipation body 110 and the circuit carrier board 22. The packaging layer 24 covers the circuit substrate 22, the chip 26, and the heat sink 100.

在本實施例中,線路載板22例如是具有單層線路之印刷電路板(printed circuit board, PCB)、具有多層線路之印刷電路板或具有重佈線路層(redistribution layer)的基板。晶片26例如是以晶片貼附膜(未繪示)貼附於線路載板22上,且藉由打線技術(wire bonding)將晶片26藉由多條導線26a與線路載板22電性連接。在一些實施例中,晶片封裝件20可進一步包括多個導電端子28(conductive terminals),其中導電端子28配置於線路載板22上,且導電端子28與晶片26分別位於線路載板22的兩相對表面上。此外,導電端子28例如為陣列排列的焊球(solder balls)、凸塊(bumps)、導電柱(conductive pillars)或上述之組合等,以使晶片26藉由線路載板22以及導電端子28與其他元件電性連接。In this embodiment, the circuit carrier board 22 is, for example, a printed circuit board (PCB) with a single-layer circuit, a printed circuit board with a multi-layer circuit, or a substrate with a redistribution layer. The chip 26 is, for example, attached to the circuit carrier board 22 with a wafer attaching film (not shown), and the chip 26 is electrically connected to the circuit carrier board 22 by a plurality of wires 26 a by wire bonding. In some embodiments, the chip package 20 may further include a plurality of conductive terminals 28, wherein the conductive terminals 28 are disposed on the circuit carrier board 22, and the conductive terminals 28 and the chip 26 are located on two sides of the circuit carrier board 22, respectively. On the opposite surface. In addition, the conductive terminals 28 are, for example, arrayed solder balls, bumps, conductive pillars, or a combination thereof, so that the chip 26 passes the circuit carrier board 22 and the conductive terminals 28 and Other components are electrically connected.

在本實施例中,散熱件100配置於線路載板22上,且晶片26位於散熱主體110與延伸部130所形成的容置空間內,以使晶片26位於散熱主體110與線路載板22之間。散熱件100的散熱主體110覆蓋於晶片26上,且第一凹槽114所包圍的散熱面110a1的面積大於晶片26的主動面26b的面積。如此一來,散熱件100具有較大的熱散逸(heat dispersion)面積,因此當晶片26運作時所產生熱能可以自晶片26的主動面26b散逸至第一凹槽114所包圍的散熱面110a1,並藉由散熱件100將熱能導出,以使晶片封裝件20具有良好的散熱效率,但本發明不限於此。In this embodiment, the heat sink 100 is disposed on the circuit carrier board 22, and the chip 26 is located in an accommodation space formed by the heat sink body 110 and the extension 130, so that the chip 26 is positioned between the heat sink body 110 and the circuit carrier board 22. between. The heat dissipation body 110 of the heat sink 100 covers the wafer 26, and the area of the heat dissipation surface 110 a 1 surrounded by the first groove 114 is larger than the area of the active surface 26 b of the wafer 26. In this way, the heat sink 100 has a large heat dispersion area, so that the heat generated when the chip 26 operates can be dissipated from the active surface 26b of the chip 26 to the heat dissipation surface 110a1 surrounded by the first groove 114. The thermal energy is dissipated by the heat sink 100 so that the chip package 20 has good heat dissipation efficiency, but the present invention is not limited thereto.

封裝層24包括第一封裝部24a以及第二封裝部24b,其中第一封裝部24a位於線路載板22以包覆晶片26,且第一封裝部24a被散熱件100所覆蓋,而第二封裝部24b覆蓋散熱件100的延伸部130,且第二封裝部24b透過延伸部130的開口130a與第一封裝部24a連接。於晶片封裝件20的注模製程中,可以是將散熱件100配置於線路載板22上,且使晶片26位於散熱件100與線路載板22之間,並一起置入模具中。接著,將熔融的封裝膠體注入模具。在模具中,熔融的封裝膠體所形成的模流經散熱件100中的至少一開口130a和側向空間進入由散熱主體110、第二傾斜部136與第一連接部134所形成的容置空間內,以使封裝膠體覆蓋線路載板22、晶片26以及部分的散熱件100。並且,熔融的封裝膠體可經由其餘的開口130a流出容置空間,以使部分的封裝膠體覆蓋延伸部130。然後,使熔融的封裝膠體冷卻並且固化以形成封裝層24。如此一來,於上述容置空間內的封裝膠體在固化後會形成封裝層24的第一封裝部24a,而於上述容置空間外的封裝膠體在固化後會形成封裝層24的第二封裝部24b。第二封裝部24b可以透過延伸部130的開口130a與第一封裝部24a連接,且覆蓋散熱件100的延伸部130。The encapsulation layer 24 includes a first encapsulation portion 24 a and a second encapsulation portion 24 b. The first encapsulation portion 24 a is located on the circuit carrier board 22 to cover the wafer 26, the first encapsulation portion 24 a is covered by the heat sink 100, and the second package The portion 24 b covers the extension portion 130 of the heat sink 100, and the second package portion 24 b is connected to the first package portion 24 a through the opening 130 a of the extension portion 130. In the injection molding process of the chip package 20, the heat sink 100 may be disposed on the circuit carrier board 22, and the wafer 26 may be located between the heat sink 100 and the circuit carrier board 22 and placed together in a mold. Next, the molten encapsulant is injected into the mold. In the mold, the mold formed by the molten encapsulating gel flows through at least one opening 130a and the lateral space in the heat sink 100 and enters the accommodation space formed by the heat sink body 110, the second inclined portion 136, and the first connection portion 134. Inside, so that the packaging gel covers the circuit board 22, the chip 26, and a part of the heat sink 100. In addition, the molten encapsulating gel can flow out of the accommodating space through the remaining openings 130a, so that a part of the encapsulating gel covers the extension portion 130. Then, the molten encapsulating colloid is cooled and solidified to form an encapsulating layer 24. In this way, the packaging colloid in the accommodating space will form a first packaging portion 24a of the packaging layer 24 after curing, and the packaging gel outside the accommodating space will form a second package of the packaging layer 24 after curing.部 24b. 24b. The second package portion 24 b can be connected to the first package portion 24 a through the opening 130 a of the extension portion 130 and covers the extension portion 130 of the heat sink 100.

由於位於散熱面110a上的環形凸起112可以與模具貼合,因此環形凸起112可以在注模製程中阻檔熔融的封裝膠體。如此一來,熔融的封裝膠體不會覆蓋環形凸起112所環繞的部分散熱面110a1,以使固化後的封裝膠體所形成的封裝層24不會影響散熱件100的散熱功能。Since the annular protrusion 112 on the heat dissipation surface 110a can be attached to the mold, the annular protrusion 112 can block the molten encapsulant during the injection molding process. In this way, the molten encapsulation gel will not cover a part of the heat dissipation surface 110 a 1 surrounded by the annular protrusion 112, so that the encapsulation layer 24 formed by the cured encapsulation gel will not affect the heat dissipation function of the heat sink 100.

圖2C與2D依照本發明另一實施例的晶片封裝件的局部剖面示意圖,其中圖2C是是依照本發明另一實施例的晶片封裝件20’的局部剖面示意圖,且圖2C中對晶片封裝件20’所繪示的局部區域為對應於圖2B中對晶片封裝件20所繪示的R2區域,圖2D是圖2C中R3區域的放大圖,圖2C、2D中另一實施例的晶片封裝件20’與圖2A、2B的晶片封裝件20類似,其類似的構件以相同的標號表示,且具有類似的功能,並省略描述。而晶片封裝件20與晶片封裝件20’的主要差別在於,第二凹槽116可以侷限部分之熔融的封裝膠體,且縱使熔融的封裝膠體越過環形凸起112,但仍可藉由位於散熱主體110的第一凹槽114將熔融的封裝膠體侷限於第一凹槽114。如此一來,熔融的封裝膠體不會覆蓋環形凸起112所環繞的部分散熱面110a1區域,且固化後的封裝膠體所形成的封裝層24’(包括第一封裝部24a'、第二封裝部24b'以及多餘封裝部 24c')不會影響散熱件100的散熱功能。2C and 2D are schematic partial cross-sectional views of a chip package according to another embodiment of the present invention, wherein FIG. 2C is a partial cross-sectional schematic view of a chip package 20 'according to another embodiment of the present invention, and the chip package is shown in FIG. 2C The partial area shown in FIG. 20 ′ corresponds to the R2 area shown in FIG. 2B for the chip package 20, FIG. 2D is an enlarged view of the R3 area in FIG. 2C, and the wafer of another embodiment in FIGS. 2C and 2D The package 20 ′ is similar to the chip package 20 of FIGS. 2A and 2B, and similar components are denoted by the same reference numerals and have similar functions, and descriptions thereof are omitted. The main difference between the chip package 20 and the chip package 20 'is that the second groove 116 can limit a part of the molten packaging gel, and even if the molten packaging gel passes over the annular protrusion 112, it can still be located in the heat dissipation body. The first groove 114 of 110 limits the molten encapsulant to the first groove 114. In this way, the molten packaging gel will not cover the area of the heat dissipation surface 110a1 surrounded by the annular protrusion 112, and the packaging layer 24 '(including the first packaging portion 24a' and the second packaging portion) formed by the cured packaging gel 24b 'and the redundant package portion 24c') do not affect the heat dissipation function of the heat sink 100.

晶片封裝件20中所使用的散熱件100可以有其他的設計,以下將搭配圖3至圖5針對散熱件100的變化進行描述。The heat sink 100 used in the chip package 20 may have other designs. The changes of the heat sink 100 will be described below with reference to FIGS. 3 to 5.

圖3是依照本發明的第二實施例的散熱件的局部上視示意圖。請參考圖3,在本實施例中,散熱件300與散熱件100相似,其類似的構件以相同的標號表示,且具有類似的功能,並省略描述。而散熱件300與散熱件100的主要差別在於,散熱件300的散熱主體310具有一環形凸起312、多個第一凹槽314以及多個第二凹槽316。環形凸起312位於散熱主體310的周緣,且環繞多個第一凹槽314。多個第二凹槽316為多個彼此分離的弧形凹槽,其中第二凹槽316對應於延伸部130的開口130a分佈。多個第一凹槽314為多個彼此分離的弧形凹槽,其中第一凹槽314對應於延伸部130的開口130a分佈。如此一來,縱使越過環形凸起312後的封裝膠體具有不同方向的流向,仍可以被侷限於第一凹槽314。3 is a schematic partial top view of a heat sink according to a second embodiment of the present invention. Please refer to FIG. 3. In this embodiment, the heat dissipating member 300 is similar to the heat dissipating member 100, and similar components are denoted by the same reference numerals, and have similar functions, and descriptions thereof are omitted. The main difference between the heat dissipating member 300 and the heat dissipating member 100 is that the heat dissipating body 310 of the heat dissipating member 300 has an annular protrusion 312, a plurality of first grooves 314 and a plurality of second grooves 316. The annular protrusion 312 is located on the periphery of the heat dissipation body 310 and surrounds the plurality of first grooves 314. The plurality of second grooves 316 are a plurality of arc-shaped grooves separated from each other, wherein the second grooves 316 are distributed corresponding to the openings 130 a of the extension portion 130. The plurality of first grooves 314 are a plurality of arc-shaped grooves separated from each other, wherein the first grooves 314 are distributed corresponding to the openings 130 a of the extension portion 130. In this way, even if the encapsulating gel after passing the annular protrusion 312 has different directions of flow, it can still be limited to the first groove 314.

在一實施例中,多個第一凹槽314為多個彼此分離的弧形凹槽,其中第一凹槽314對應於延伸部130的開口130a分佈,且第一凹槽314的弧型長度W1大於對應的開口130a的最大寬度W2。如此一來,縱使越過環形凸起312後的封裝膠體具有不同方向的流向,仍可以被侷限於第一凹槽314。In an embodiment, the plurality of first grooves 314 are a plurality of arc-shaped grooves separated from each other, wherein the first grooves 314 are distributed corresponding to the openings 130 a of the extension 130, and the arc-shaped length of the first grooves 314 W1 is larger than the maximum width W2 of the corresponding opening 130a. In this way, even if the encapsulating gel after passing the annular protrusion 312 has different directions of flow, it can still be limited to the first groove 314.

圖4是依照本發明的第三實施例的散熱件的局部上視示意圖。請參考圖4,在本實施例中,散熱件400與散熱件100相似,其類似的構件以相同的標號表示,且具有類似的功能,並省略描述。而散熱件400與散熱件100的主要差別在於,散熱件400的散熱主體410具有一環形凸起412、一環形的第一凹槽414以及多個第二凹槽416,且環形凸起412位於第一凹槽414與第二凹槽416之間。多個第二凹槽416為多個彼此分離的弧形凹槽,其中第二凹槽416對應於延伸部130的開口130a分佈。環形凸起412位於散熱主體410的周緣,且環繞第一凹槽414。如此一來,縱使熔融的封裝膠體越過環形凸起412,但仍可藉由位於散熱主體410的第一凹槽將熔融的封裝膠體侷限於第一凹槽414。FIG. 4 is a schematic partial top view of a heat sink according to a third embodiment of the present invention. Please refer to FIG. 4. In this embodiment, the heat dissipating member 400 is similar to the heat dissipating member 100, and similar components are denoted by the same reference numerals, and have similar functions, and descriptions thereof are omitted. The main difference between the heat sink 400 and the heat sink 100 is that the heat dissipation body 410 of the heat sink 400 has an annular protrusion 412, an annular first groove 414, and a plurality of second grooves 416, and the annular protrusion 412 is located at Between the first groove 414 and the second groove 416. The plurality of second grooves 416 are a plurality of arc-shaped grooves separated from each other, wherein the second grooves 416 are distributed corresponding to the openings 130 a of the extension portion 130. The annular protrusion 412 is located on the periphery of the heat dissipation body 410 and surrounds the first groove 414. In this way, even if the molten encapsulating gel passes over the annular protrusion 412, the molten encapsulating gel can be limited to the first recess 414 by the first recess in the heat dissipation body 410.

圖5是依照本發明的第四實施例的散熱件的局部上視示意圖。請參考圖5,在本實施例中,散熱件500與散熱件300相似,其類似的構件以相同的標號表示,且具有類似的功能,並省略描述。而散熱件500與散熱件300的主要差別在於,散熱件500的散熱主體510具有一環形凸起512、多個第一凹槽514以及一環形的第二凹槽516,且環形凸起512位於第一凹槽514與第二凹槽516之間。多個第一凹槽514為多個彼此分離的弧形凹槽,其中第一凹槽514對應於延伸部130的開口130a分佈,且第一凹槽514的弧型長大於對應的開口130a的最大寬度。環形凸起512位於散熱主體510的周緣,且環繞第一凹槽514。如此一來,縱使越過環形凸起512後的封裝膠體具有不同方向的流向,仍可以被侷限於第一凹槽514。5 is a schematic partial top view of a heat sink according to a fourth embodiment of the present invention. Please refer to FIG. 5. In this embodiment, the heat dissipating member 500 is similar to the heat dissipating member 300, and similar components are denoted by the same reference numerals, and have similar functions, and descriptions thereof are omitted. The main difference between the heat dissipating member 500 and the heat dissipating member 300 is that the heat dissipating body 510 of the heat dissipating member 500 has an annular protrusion 512, a plurality of first grooves 514, and an annular second groove 516, and the annular protrusion 512 is located at Between the first groove 514 and the second groove 516. The plurality of first grooves 514 are a plurality of arc-shaped grooves separated from each other, wherein the first grooves 514 are distributed corresponding to the openings 130a of the extension 130, and the arc-shaped length of the first grooves 514 is larger than that of the corresponding openings 130a. The maximum width. The annular protrusion 512 is located on the periphery of the heat dissipation body 510 and surrounds the first groove 514. In this way, even if the encapsulating gel after passing the annular protrusion 512 has different directions of flow, it can still be limited to the first groove 514.

綜上所述,本發明的散熱件具有良好的製造良率以及良好的散熱效率。且具有本發明的散熱件的晶片封裝件具有良好的散熱效率。In summary, the heat sink of the present invention has good manufacturing yield and good heat dissipation efficiency. In addition, the chip package having the heat sink of the present invention has good heat dissipation efficiency.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.

100、300、400、500‧‧‧散熱件100, 300, 400, 500‧‧‧ heat sink

110、310、410、510‧‧‧散熱主體110, 310, 410, 510‧‧‧

110a、110a1、110a2、310a、410a、510a‧‧‧散熱面110a, 110a1, 110a2, 310a, 410a, 510a‧‧‧

112、312、412、512‧‧‧環形凸起112, 312, 412, 512‧‧‧ annular protrusion

112a1‧‧‧第一側壁112a1‧‧‧First sidewall

112a2‧‧‧第二側壁112a2‧‧‧Second sidewall

114、314、414、514‧‧‧第一凹槽114, 314, 414, 514‧‧‧ first groove

116、316、416、516‧‧‧第二凹槽116, 316, 416, 516‧‧‧ second groove

114a、116a‧‧‧凹槽側壁114a, 116a

130‧‧‧延伸部130‧‧‧ extension

130a‧‧‧開口130a‧‧‧ opening

132‧‧‧第一傾斜部132‧‧‧first slope

134‧‧‧第一連接部134‧‧‧First connection

136‧‧‧第二傾斜部136‧‧‧Second Inclined Section

138‧‧‧第二連接部138‧‧‧Second connection section

W1‧‧‧長度W1‧‧‧ length

W2‧‧‧寬度W2‧‧‧Width

20、20’‧‧‧晶片封裝件20, 20’‧‧‧ Chip Package

22‧‧‧線路載板22‧‧‧line carrier board

24、24'‧‧‧封裝層24, 24'‧‧‧ Encapsulation

24a、24a'‧‧‧第一封裝部24a, 24a'‧‧‧ first package department

24b、24b'‧‧‧第二封裝部24b, 24b'‧‧‧Second package department

24c'‧‧‧多餘封裝部24c'‧‧‧Excessive Packaging Department

26‧‧‧晶片26‧‧‧Chip

26a‧‧‧導線26a‧‧‧Wire

26b‧‧‧主動面26b‧‧‧ active face

28‧‧‧導電端子28‧‧‧Conductive terminal

R1、R2、R3‧‧‧區域R1, R2, R3 ‧‧‧ area

圖1A是依照本發明的第一實施例的散熱件的上視示意圖。 圖1B是圖1A中R1區域的放大圖。 圖1C是沿圖1B中剖線A-A’的剖面示意圖。 圖2A是依照本發明一實施例的晶片封裝件的剖面示意圖。 圖2B是圖2A中R2區域的放大圖。 圖2C是依照本發明另一實施例的晶片封裝件的局部剖面示意圖。 圖2D是圖2C中R3區域的放大圖。 圖3是依照本發明的第二實施例的散熱件的局部上視示意圖。 圖4是依照本發明的第三實施例的散熱件的局部上視示意圖。 圖5是依照本發明的第四實施例的散熱件的局部上視示意圖。FIG. 1A is a schematic top view of a heat sink according to a first embodiment of the present invention. FIG. 1B is an enlarged view of the R1 region in FIG. 1A. Fig. 1C is a schematic cross-sectional view taken along the line A-A 'in Fig. 1B. FIG. 2A is a schematic cross-sectional view of a chip package according to an embodiment of the present invention. FIG. 2B is an enlarged view of the R2 region in FIG. 2A. 2C is a schematic partial cross-sectional view of a chip package according to another embodiment of the present invention. FIG. 2D is an enlarged view of the R3 region in FIG. 2C. 3 is a schematic partial top view of a heat sink according to a second embodiment of the present invention. FIG. 4 is a schematic partial top view of a heat sink according to a third embodiment of the present invention. 5 is a schematic partial top view of a heat sink according to a fourth embodiment of the present invention.

100‧‧‧散熱件 100‧‧‧ heat sink

110‧‧‧散熱主體 110‧‧‧cooling body

112‧‧‧環形凸起 112‧‧‧ annular protrusion

114‧‧‧第一凹槽 114‧‧‧first groove

116‧‧‧第二凹槽 116‧‧‧Second groove

130‧‧‧延伸部 130‧‧‧ extension

130a‧‧‧開口 130a‧‧‧ opening

132‧‧‧第一傾斜部 132‧‧‧first slope

134‧‧‧第一連接部 134‧‧‧First connection

136‧‧‧第二傾斜部 136‧‧‧Second Inclined Section

138‧‧‧第二連接部 138‧‧‧Second connection section

R1‧‧‧區域 R1‧‧‧ area

Claims (10)

一種散熱件,包括:一散熱主體,具有一散熱面、位於該散熱面上的至少一第一凹槽、一位於該散熱面上的環形凸起以及位於該散熱面上的至少一第二凹槽,其中該環形凸起位於位於該至少一第一凹槽與該至少一第二凹槽之間,且該環形凸起環繞該至少一第一凹槽;以及多個延伸部,分別從該散熱主體之邊緣向外延伸,且各該延伸部分別具有一開口。 A heat-dissipating member includes a heat-dissipating body having a heat-dissipating surface, at least one first groove on the heat-dissipating surface, an annular protrusion on the heat-dissipating surface, and at least one second recess on the heat-dissipating surface. A groove, wherein the annular protrusion is located between the at least one first groove and the at least one second groove, and the annular protrusion surrounds the at least one first groove; and a plurality of extensions respectively from the An edge of the heat dissipation body extends outward, and each of the extension portions has an opening. 如申請專利範圍第1項所述的散熱件,其中該散熱主體包括一圓形板狀體。 The heat sink according to item 1 of the patent application scope, wherein the heat sink body comprises a circular plate-shaped body. 如申請專利範圍第1項所述的散熱件,其中該至少一第一凹槽包括多個彼此分離的第一弧形凹槽,且該些第一弧形凹槽對應於該些開口分佈。 According to the first aspect of the patent application, the at least one first groove includes a plurality of first arc-shaped grooves separated from each other, and the first arc-shaped grooves correspond to the openings. 如申請專利範圍第3項所述的散熱件,其中各該第一弧形凹槽的長度大於對應該開口的寬度。 According to the third aspect of the patent application scope, the length of each of the first arc-shaped grooves is greater than the width of the corresponding opening. 如申請專利範圍第1項所述的散熱件,其中該至少一第一凹槽包括至少一第一環形凹槽。 The heat sink according to item 1 of the patent application, wherein the at least one first groove includes at least one first annular groove. 如申請專利範圍第1項所述的散熱件,其中該至少一第二凹槽包括多個彼此分離的第二弧形凹槽,且該些第二弧形凹槽對應於該些開口分佈。 According to the first aspect of the patent application, the at least one second groove includes a plurality of second arc-shaped grooves separated from each other, and the second arc-shaped grooves correspond to the openings. 如申請專利範圍第6項所述的散熱件,其中各該第一弧形凹槽的長度大於對應該開口的寬度。 As described in item 6 of the patent application scope, the length of each of the first arc-shaped grooves is greater than the width of the corresponding opening. 如申請專利範圍第1項所述的散熱件,其中該至少一第二凹槽包括至少一第二環形凹槽。 The heat sink according to item 1 of the patent application, wherein the at least one second groove includes at least one second annular groove. 一種晶片封裝件,包括:一線路載板;一晶片,配置於該線路載板上並且與該線路載板電性連接;一如請求項1所述的散熱件,該散熱件配置於該線路載板上以使該晶片位於該散熱主體與該線路載板之間;以及一封裝層,覆蓋該線路載板、該晶片以及該散熱件。 A chip package includes: a circuit carrier board; a chip disposed on the circuit carrier board and electrically connected to the circuit carrier board; a heat sink according to claim 1, the heat sink being arranged on the circuit A carrier board so that the chip is located between the heat dissipating body and the circuit carrier board; and a packaging layer covering the circuit carrier board, the chip and the heat sink. 如申請專利範圍第9項所述的晶片封裝件,其中該封裝層包括:一第一封裝部,位於該線路載板以包覆該晶片,且該第一封裝部被該散熱件所覆蓋;以及一第二封裝部,覆蓋該些延伸部,且該第二封裝部透過該些開口與該第一封裝部連接。 The chip package according to item 9 of the scope of patent application, wherein the packaging layer includes: a first package portion located on the circuit carrier board to cover the chip, and the first package portion is covered by the heat sink; And a second packaging portion covering the extension portions, and the second packaging portion is connected to the first packaging portion through the openings.
TW106108924A 2017-03-17 2017-03-17 Heat sink and chip package having the same TWI615930B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW106108924A TWI615930B (en) 2017-03-17 2017-03-17 Heat sink and chip package having the same
CN201720505829.6U CN207124188U (en) 2017-03-17 2017-05-09 Heat dissipation member and chip package with same
CN201710320362.2A CN108630637A (en) 2017-03-17 2017-05-09 Heat dissipation member and chip package with same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW106108924A TWI615930B (en) 2017-03-17 2017-03-17 Heat sink and chip package having the same

Publications (2)

Publication Number Publication Date
TWI615930B true TWI615930B (en) 2018-02-21
TW201836095A TW201836095A (en) 2018-10-01

Family

ID=61614641

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106108924A TWI615930B (en) 2017-03-17 2017-03-17 Heat sink and chip package having the same

Country Status (2)

Country Link
CN (2) CN108630637A (en)
TW (1) TWI615930B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7414822B2 (en) 2019-01-22 2024-01-16 長江存儲科技有限責任公司 Integrated circuit packaging structure and manufacturing method thereof
CN112447630A (en) * 2020-11-09 2021-03-05 南昌航空大学 Heat dissipation body and chip package having the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040076028A (en) * 2003-02-24 2004-08-31 한국시그네틱스 주식회사 Tape Ball Grid Array Package improving heat spreader characteristics and manufacturing method thereof
TWM545360U (en) * 2017-03-17 2017-07-11 力成科技股份有限公司 Heat sink and chip package having the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW510158B (en) * 1999-05-14 2002-11-11 Siliconware Precision Industries Co Ltd Heat dissipation structure for semiconductor device
CN2596547Y (en) * 2002-12-25 2003-12-31 立卫科技股份有限公司 Semiconductor packaging structure with radiating fin
CN1549337A (en) * 2003-05-09 2004-11-24 华泰电子股份有限公司 Radiating fin device for preventing radiating fin glue spilling in semi conductor packaging parts

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040076028A (en) * 2003-02-24 2004-08-31 한국시그네틱스 주식회사 Tape Ball Grid Array Package improving heat spreader characteristics and manufacturing method thereof
TWM545360U (en) * 2017-03-17 2017-07-11 力成科技股份有限公司 Heat sink and chip package having the same

Also Published As

Publication number Publication date
CN108630637A (en) 2018-10-09
TW201836095A (en) 2018-10-01
CN207124188U (en) 2018-03-20

Similar Documents

Publication Publication Date Title
EP3373331A1 (en) Semiconductor package with stiffener ring
US6369455B1 (en) Externally-embedded heat-dissipating device for ball grid array integrated circuit package
US9570405B2 (en) Semiconductor device and method for manufacturing same
US7190067B2 (en) Semiconductor package with exposed heat sink and the heat sink thereof
TWI446495B (en) Package carrier and manufacturing method thereof
KR100781100B1 (en) Semiconductor device and manufacturing method therefor
TW201349412A (en) Semiconductor package
KR20150125814A (en) Semiconductor Package Device
TWI615930B (en) Heat sink and chip package having the same
TW201828424A (en) Heat sink and chip package having the same
KR102041644B1 (en) Power module package and method of fabricating the same
US20180159006A1 (en) Light emitting device and solder bond structure
CN110459525B (en) Power system with inverter and manufacturing method thereof
KR20150125988A (en) Semiconductor device
TWI613776B (en) Heat sink and chip package having the same
JP2018085495A (en) Substrate for light-emitting device, light-emitting device module, and light-emitting apparatus
TWM545360U (en) Heat sink and chip package having the same
JP2001358259A (en) Semiconductor package
KR102016019B1 (en) High thermal conductivity semiconductor package
JPH10256432A (en) Resin-sealing type semiconductor package
TWM544116U (en) Heat sink and chip package having the same
CN107123633B (en) Packaging structure
JPH1126658A (en) Package structure of bga semiconductor device
KR101562706B1 (en) semiconductor package and stacked semiconductor package
KR102365004B1 (en) Semiconductor package and a method of manufacturing the same