CN107123633B - Packaging structure - Google Patents

Packaging structure Download PDF

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Publication number
CN107123633B
CN107123633B CN201610260696.0A CN201610260696A CN107123633B CN 107123633 B CN107123633 B CN 107123633B CN 201610260696 A CN201610260696 A CN 201610260696A CN 107123633 B CN107123633 B CN 107123633B
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China
Prior art keywords
lead frame
package structure
thickness
chip
region
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Application number
CN201610260696.0A
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Chinese (zh)
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CN107123633A (en
Inventor
蔡欣昌
李芃昕
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Anchorage Semiconductor Co ltd
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Delta Electronics Inc
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Priority claimed from US15/052,899 external-priority patent/US9748165B2/en
Application filed by Delta Electronics Inc filed Critical Delta Electronics Inc
Publication of CN107123633A publication Critical patent/CN107123633A/en
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Publication of CN107123633B publication Critical patent/CN107123633B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip

Abstract

The invention discloses a packaging structure, which comprises a lead frame, a first chip and a packaging material. The lead frame is provided with a first surface and a second surface which are opposite, and a first concave area positioned on the second surface. The first chip has a first surface and a second surface opposite to each other, wherein the first surface of the first chip is fixed in the first recessed area of the lead frame. The packaging material encapsulates the lead frame and the first chip, wherein the second surface of the first chip and the first surface of the lead frame are exposed from the packaging material.

Description

Packaging structure
Technical Field
The invention relates to a packaging structure.
Background
Lead frames are typically used in encapsulant-encapsulated structures, also referred to as package structures. The leadframe may be made of a metal such as copper and typically includes a bonding pad located in the center of the leadframe and secured to a support. The lead frame also includes a plurality of leads fixed to the frame. In some bare package structures, the bottom of the bonding pad of the lead frame may be bare for bonding with the bonding pad of the printed circuit board.
In order to further improve various characteristics of the package structure, the related art is not diligent in developing. How to provide a package structure with better characteristics belongs to one of the important research and development issues, and becomes the object of the related art that needs to be improved.
Disclosure of Invention
One embodiment of the present invention provides a package structure with good heat dissipation capability.
According to an embodiment of the present invention, a package structure includes a leadframe, a first die, and a package material. The lead frame is provided with a first surface and a second surface which are opposite, and a first concave area positioned on the second surface. The first chip has a first surface and a second surface opposite to each other, wherein the first surface of the first chip is fixed in the first recessed area of the lead frame. The packaging material encapsulates the lead frame and the first chip, wherein the second surface of the first chip and the first surface of the lead frame are exposed from the packaging material.
In one or more embodiments of the present invention, the package structure further includes a second recess region and a second wafer. The second concave region is located on the second surface of the lead frame. The second chip has a first surface and a second surface opposite to each other, wherein the first surface of the second chip is fixed on the second recessed area of the lead frame, the packaging material further encapsulates the second chip, and the second surface of the second chip is exposed from the packaging material.
According to another embodiment of the present invention, a package structure includes a leadframe, a first die, a heat spreader, and a package material. The lead frame is provided with a first surface and a second surface which are opposite, and a first concave area positioned on the second surface. The first chip has a first surface and a second surface opposite to each other, wherein the first surface of the first chip is fixed on the first recessed area of the lead frame. The heat dissipation member has a first face and a second face opposite to each other, wherein the first face of the heat dissipation member is in thermal contact with the second face of the first wafer. The packaging material encapsulates the lead frame, the first chip and the heat sink, wherein the second surface of the heat sink and the first surface of the lead frame are exposed from the packaging material.
In one or more embodiments of the present invention, the first surface of the lead frame is not covered by the encapsulant.
In one or more embodiments of the present invention, the package structure further includes a second recess region and a second wafer. The second concave region is located on the second surface of the lead frame. The second chip has a first surface and a second surface opposite to each other, wherein the first surface of the second chip is fixed on the second recessed area of the lead frame, and the packaging material further encapsulates the second chip.
In one or more embodiments of the present invention, the thickness of the first recessed region of the leadframe is the same as the thickness of the second recessed region.
In one or more embodiments of the present invention, a thickness of the first recessed region of the leadframe is different from a thickness of the second recessed region.
In one or more embodiments of the present invention, the first recessed area of the leadframe is further divided into a first block and a second block, the first block and the second block are not in direct contact, and the first surface of the first chip is electrically contacted with the first block and the second block.
In one or more embodiments of the present invention, the leadframe has a flat region corresponding to the first recessed region, and the thickness of the flat region is greater than that of the first recessed region.
In one or more embodiments of the present invention, the thickness of the first chip is equal to the thickness of the flat region of the lead frame.
In one or more embodiments of the present invention, the thickness of the first chip is greater than the thickness of the first recess region of the leadframe.
In one or more embodiments of the present invention, the first surface of the lead frame is a plane.
In the above embodiments of the present invention, since the second surface of the first chip and the first surface of the lead frame are exposed from the package material, and the first chip is fixed on the first recessed region of the lead frame, the first chip can effectively dissipate heat via the first surface of the lead frame and the second surface of the first chip. Therefore, the heat dissipation capability of the packaging structure is effectively improved.
Drawings
Fig. 1 is a perspective view illustrating a package structure according to an embodiment of the invention.
Fig. 2 shows a cross-sectional view along the tangent line 2 of fig. 1.
Fig. 3 is a perspective view illustrating a package structure without a packaging material according to an embodiment of the invention.
Fig. 4 is a cross-sectional view of a package structure according to another embodiment of the invention.
Fig. 5 is a cross-sectional view of a package structure according to another embodiment of the invention.
Fig. 6 is a perspective view of a package structure according to another embodiment of the invention.
Fig. 7 shows a cross-sectional view along the cut line 7 of fig. 6.
Fig. 8 is a cross-sectional view of a package structure according to another embodiment of the invention.
Fig. 9 is a cross-sectional view of a package structure according to another embodiment of the invention.
Wherein the reference numerals are as follows:
100 package structure
110 lead frame
111 first side
113 second side
115 first recessed region
116 first block
116b third Block
117 second block
118 flat area
119 second recessed region
120 first wafer
121 first side
123 second side
130 packaging material
140 second wafer
141 first side
143 second side
150 heat sink
151 first side
153 second side
Detailed Description
In the following description, numerous implementation details are set forth in order to provide a thorough understanding of the present invention. It should be understood, however, that these implementation details are not to be interpreted as limiting the invention. That is, in some embodiments of the invention, such implementation details are not necessary. In addition, some conventional structures and elements are shown in simplified schematic form in the drawings.
Fig. 1 is a perspective view illustrating a package structure according to an embodiment of the invention. Fig. 2 shows a cross-sectional view along the tangent line 2 of fig. 1. As shown in fig. 1 and 2, one embodiment of the invention provides a package structure 100. The package structure 100 includes a lead frame 110, a first die 120, and a package material 130.
The lead frame 110 has a first surface 111 and a second surface 113 opposite to each other, and has a first recess region 115 located on the second surface 113. The first wafer 120 has a first surface 121 and a second surface 123 opposite to each other, wherein the first surface 121 of the first wafer 120 is fixed to the first recess region 115, and the first surface 121 of the first wafer 120 is electrically connected to at least a portion of the first recess region 115. The package material 130 encapsulates the lead frame 110 and the first chip 120, wherein the second surface 123 of the first chip 120 and the first surface 111 of the lead frame 110 are exposed from the package material 130. In other words, the encapsulant 130 does not encapsulate (cover) the first surface 111 of the leadframe 110.
Since the package material 130 does not cover the first surface 111 of the lead frame 110, the second surface 123 of the first chip 120 is exposed from the package material 130, and the first chip 120 is fixed on the first recess 115, the first chip 120 can effectively dissipate heat through the first surface 111 of the lead frame 110 and/or the second surface 123 of the first chip 120. Thus, the heat dissipation capability of the package structure 100 is effectively improved.
Specifically, the first surface 111 of the lead frame 110 is a plane. Because the first surface 111 of the lead frame 110 is planar, the package structure 100 can maintain integrity (i.e., the package structure 100 may have a rectangular parallelepiped shape) without the encapsulation material 130 covering the first surface 111 of the lead frame 110. It should be understood that the above embodiments of the leadframe 110 are merely exemplary and not intended to limit the present invention, and those skilled in the art can flexibly select the embodiments of the leadframe 110 according to the actual requirements.
Lead frame 110 has a planar region 118 opposite to first recessed region 115, and the thickness of planar region 118 is greater than the thickness of first recessed region 115. Specifically, in some embodiments, the first recess region 115 may be formed by etching the second surface 113 of the leadframe 110.
Specifically, the heat generated by the first die 120 is transferred to the first recess region 115 of the leadframe 110, and then transferred to the first surface 111 of the leadframe 110, so as to transfer the heat to the air. Because the thickness of the first recessed region 115 is less than the thickness of the flat region 118, the first recessed region 115 is easier to transfer heat to the air than the heat generated by the first die 120 transferred through the flat region 118 of the leadframe 110.
At the same time, because the thickness of the flat region 118 is greater than the thickness of the first recessed region 115, the package structure 100 will have sufficient overall structural strength. Specifically, the overall structure of the package structure 100 is mainly supported by the lead frame 110 and the first die 120. In the region near the first recessed region 115, the package structure 100 is mainly supported by the first die 120 and the first recessed region 115; in the region near the planar region 118, the package structure 100 is mainly supported by the structure of the planar region 118. Since the total thickness of the first die 120 and the first recess region 115 and the thickness of the flat region 118 are both large enough, the package structure 100 has sufficient structural strength in either the region near the first recess region 115 or the region near the flat region 118.
The thickness of the first die 120 may be substantially equal to the thickness of the flat region 118 of the leadframe 110. The thickness of the first die 120 may be greater than the thickness of the first recessed region 115 of the leadframe 110.
The thickness of the planar region 118 may be about 100 microns to about 250 microns. The thickness of the first recessed region 115 may be about 50 microns to about 100 microns. The thickness of the first wafer 120 may be about 100 microns to about 300 microns. The overall thickness of the package structure 100 may be about 400 to 1000 microns. It should be understood that the above embodiments of the package structure 100, the first recessed area 115, the flat area 118 and the first die 120 are only examples and are not intended to limit the present invention, and those skilled in the art can flexibly select the embodiments of the package structure 100, the first recessed area 115, the flat area 118 and the first die 120 according to the actual requirements.
The material of the substrate of the first wafer 120 may be a metal such as copper. The material of the encapsulant 130 may be encapsulant. It should be understood that the materials of the substrate of the first chip 120 and the encapsulant 130 are only examples, and are not intended to limit the present invention, and those skilled in the art can flexibly select the materials of the substrate of the first chip 120 and the encapsulant 130 according to the actual requirements.
Specifically, the first Chip 120 is suitable for Flip-Chip (Flip-Chip) manufacturing. In other words, the first surface 121 of the first chip 120 is flip-chip mounted in the first recess region 115, wherein the first surface 121 may have an active layer. The first side 121 of the first die 120 and the first recessed area 115 of the leadframe 110 may be electrically connected by using, for example, an array of small solder balls (not shown) disposed on the first side 121 of the first die 120.
Fig. 3 is a perspective view illustrating a package structure without a packaging material according to an embodiment of the invention. As shown in fig. 2 and 3, the first recessed area 115 of the leadframe 110 is further divided into a first block 116 and a second block 117, the first block 116 and the second block 117 are not in direct contact, and the first surface 121 of the first chip 120 electrically contacts the first block 116 and the second block 117. Thus, the first chip 120 can be electrically connected to different electronic devices by electrically connecting the first block 116 and the second block 117 to different electronic devices, respectively.
The first recessed area 115 can be divided into more blocks. For example, in the present embodiment, the first recess region 115 is further divided into a first block 116, a second block 117 and a third block 116 b. The third block 116b is not in direct contact with the first block 116 and the second block 117.
Fig. 4 is a cross-sectional view of a package structure according to another embodiment of the invention. As shown in fig. 4, the package structure 100 of the present embodiment is substantially the same as the package structure 100 of fig. 1, 2 and 3, and the differences thereof are mainly described below.
The package structure 100 of the present embodiment further includes a second recessed region 119 and a second wafer 140. The second recess region 119 is located on the second surface 113 of the leadframe 110, but does not overlap with the first recess region 115. The second chip 140 has a first surface 141 and a second surface 143 opposite to each other, wherein the first surface 141 of the second chip 140 is fixed on the second recess region 119 of the lead frame 110, and the first surface 141 of the second chip 140 is electrically connected to at least a portion of the second recess region 119. The packaging material 130 further encapsulates the second chip 140, and the second surface 143 of the second chip 140 is exposed from the packaging material 130.
Specifically, the thickness of the first recess region 115 of the lead frame 110 is substantially the same as the thickness of the second recess region 119 of the lead frame 110.
Fig. 5 is a cross-sectional view of a package structure according to another embodiment of the invention. As shown in fig. 5, the package structure 100 of the present embodiment is substantially the same as the package structure 100 of fig. 4, and mainly differs therefrom in that the thickness of the first recessed region 115 of the lead frame 110 is different from the thickness of the second recessed region 119 of the lead frame 110. In the present embodiment, the thickness of the first recess region 115 is smaller than the thickness of the second recess region 119. It should be understood that the thicknesses of the first recessed region 115 and the second recessed region 119 are only exemplary and are not intended to limit the present invention, and those skilled in the art can flexibly select the thicknesses of the first recessed region 115 and the second recessed region 119 according to the actual requirement.
Thus, as shown in fig. 4 and 5, the thicknesses of the first recessed region 115 and the second recessed region 119 may be adjusted according to the thicknesses of the first chip 120 and the second chip 140, respectively, so that the shape of the package structure 100 may maintain integrity and surface flatness. In addition, package structure 100 may further include more chips and lead frame 110 may further include more recessed areas according to actual conditions and requirements.
Fig. 6 is a perspective view of a package structure according to another embodiment of the invention. Fig. 7 shows a cross-sectional view along the cut line 7 of fig. 6. As shown in fig. 6 and 7, the package structure 100 of the present embodiment is substantially the same as the package structure 100 of fig. 1, 2 and 3, and the differences thereof are mainly described below.
The package structure 100 further includes a heat spreader 150. Heat spreader 150 has opposing first and second faces 151 and 153, wherein first face 151 of heat spreader 150 is in thermal contact with and overlies second face 123 of first wafer 120. The package material 130 encapsulates the lead frame 110, the first chip 120 and the heat sink 150, wherein the second surface 153 of the heat sink 150 is exposed from the package material 130.
Specifically, the heat sink 150 may have a thickness of 150 to 250 micrometers. It should be understood that the above-mentioned thickness of the heat dissipation member 150 is merely exemplary and not intended to limit the present invention, and those skilled in the art should flexibly select the thickness of the heat dissipation member 150 according to the actual requirement.
Fig. 8 is a cross-sectional view of a package structure according to another embodiment of the invention. As shown in fig. 8, the package structure 100 of the present embodiment is substantially the same as the package structure 100 of fig. 6 and 7, and the differences are mainly described below.
The package structure 100 further includes a second recess region 119 and a second wafer 140. The second recess region 119 is located on the second surface 113 of the leadframe 110, but does not overlap with the first recess region 115. The second chip 140 has a first surface 141 and a second surface 143 opposite to each other, wherein the first surface 141 of the second chip 140 is fixed on the second recess region 119 of the lead frame 110, and the first surface 141 of the second chip 140 is electrically connected to at least a portion of the second recess region 119. The encapsulant 130 also encapsulates the second die 140.
Specifically, the second surface 143 of the second wafer 140 is exposed from the packaging material 130, but is not limited thereto. In other embodiments, the encapsulant 130 may cover the second surface 143 of the second wafer 140.
Specifically, the thickness of the first recess region 115 of the lead frame 110 is substantially the same as the thickness of the second recess region 119 of the lead frame 110.
Fig. 9 is a cross-sectional view of a package structure according to another embodiment of the invention. As shown in fig. 9, the package structure 100 of the present embodiment is substantially the same as the package structure 100 of fig. 8, and the main difference is that the thicknesses of the first recessed region 115 and the second recessed region 119 are different. In the present embodiment, the thickness of the first recess region 115 is smaller than the thickness of the second recess region 119. It should be understood that the above-mentioned thicknesses of the first recessed region 115 and the second recessed region 119 are merely illustrative and are not intended to limit the present invention, and those skilled in the art can flexibly select the thicknesses of the first recessed region 115 and the second recessed region 119 according to the actual requirement.
Since the first surface 111 of the lead frame 110 is not covered by the encapsulant 130, the first chip 120 can effectively dissipate heat by first transferring heat to the lead frame 110 and then dissipating heat from the first surface 111 of the lead frame 110. Meanwhile, since the second surface 153 of the heat sink 150 is exposed from the package material 130, and the first surface 151 of the heat sink 150 is in thermal contact with and covers the second surface 123 of the first chip 120, the first chip 120 can first transmit heat energy to the heat sink 150 through the second surface 123 of the first chip 120, and then the heat sink 150 can effectively dissipate the heat. Thus, the heat dissipation capability of the package structure 100 is effectively improved.
While the present invention has been described with reference to the above embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (20)

1. A package structure, comprising:
the lead frame is provided with a first surface and a second surface which are opposite, and a first concave area positioned on the second surface;
a first chip having a first surface and a second surface opposite to the first surface, wherein the first surface of the first chip is fixed on the first recessed region of the lead frame, and the second surface of the first chip is farther away from the first surface of the lead frame than the second surface of the lead frame; and
and a packaging material for wrapping the lead frame and the first chip, wherein the second surface of the first chip and the first surface of the lead frame are exposed from the packaging material, and the packaging material, the lead frame and the first chip form a rectangular shape together.
2. The package structure according to claim 1, wherein the encapsulant does not encapsulate the first side of the leadframe.
3. The package structure of claim 1, further comprising:
a second concave region located on the second surface of the lead frame; and
and the second wafer is provided with a first surface and a second surface which are opposite, wherein the first surface of the second wafer is fixed on the second concave area of the lead frame, the packaging material also wraps the second wafer, and the second surface of the second wafer is exposed from the packaging material.
4. The package structure according to claim 3, wherein the thickness of the first recessed region of the leadframe is the same as the thickness of the second recessed region.
5. The package structure according to claim 3, wherein the thickness of the first recessed region of the leadframe is different from the thickness of the second recessed region.
6. The package structure according to claim 1, wherein the first recessed area of the leadframe is further divided into a first block and a second block, the first block and the second block are not in direct contact, and the first surface of the first die electrically contacts the first block and the second block.
7. The package structure according to claim 1, wherein the leadframe has a planar region opposite to the first recessed region, the planar region having a thickness greater than a thickness of the first recessed region.
8. The package structure of claim 7, wherein the thickness of the first die is equal to the thickness of the flat region.
9. The package structure of claim 1, wherein a thickness of the first die is greater than a thickness of the first recessed region of the leadframe.
10. The package structure of claim 1, wherein the first side of the leadframe is planar.
11. A package structure, comprising:
the lead frame is provided with a first surface and a second surface which are opposite, and a first concave area positioned on the second surface;
a first chip having a first surface and a second surface opposite to the first surface, wherein the first surface of the first chip is fixed on the first recess region of the lead frame;
a heat sink having a first surface and a second surface opposite to each other, wherein the first surface of the heat sink is in thermal contact with the second surface of the first chip, and the second surface of the heat sink is farther away from the first surface of the lead frame than the second surface of the lead frame; and
and the packaging material wraps the lead frame, the first wafer and the heat radiating piece, wherein the second surface of the heat radiating piece and the first surface of the lead frame are exposed from the packaging material, and the packaging material, the lead frame, the first wafer and the cross section of the heat radiating piece form a rectangular shape together.
12. The package structure according to claim 11, wherein the encapsulant does not encapsulate the first side of the lead frame.
13. The package structure of claim 11, further comprising:
a second concave region located on the second surface of the lead frame; and
and a second chip having a first surface and a second surface opposite to each other, wherein the first surface of the second chip is fixed on the second recess region of the lead frame, and the second chip is further encapsulated by the encapsulation material.
14. The package structure according to claim 13, wherein the thickness of the first recessed region of the leadframe is the same as the thickness of the second recessed region.
15. The package structure according to claim 13, wherein the thickness of the first recessed region of the leadframe is different from the thickness of the second recessed region.
16. The package structure according to claim 11, wherein the first recessed area of the leadframe is further divided into a first block and a second block, the first block and the second block are not in direct contact, and the first surface of the first die electrically contacts the first block and the second block.
17. The package structure according to claim 11, wherein the leadframe has a planar region opposite to the first recessed region, the planar region having a thickness greater than a thickness of the first recessed region.
18. The package structure of claim 17, wherein the thickness of the first die is equal to the thickness of the flat region.
19. The package structure of claim 11, wherein the thickness of the first die is greater than the thickness of the first recessed region of the leadframe.
20. The package structure of claim 11, wherein the first side of the lead frame is planar.
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US15/052,899 2016-02-25

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