TWI612621B - Electronic element and the manufacture thereof - Google Patents

Abstract

An electronic component manufacturing method is performed in a substrate including a plurality of electronic components and a partition provided between the electronic components, and the components are cut invisibly along the partition to form multiple lengths in the partition. The same invisible cutting path, and then a plurality of electronic components are separated along the partition. The invention further provides the electronic component.

Description

Electronic component and manufacturing method thereof

The invention relates to a method for manufacturing an electronic component, and more particularly to a method for cutting an electronic component.

In recent years, along with the miniaturization and weight reduction of mobile devices such as mobile phones or tablets, or information memory devices for accessing data through memory cards, the thickness of semiconductor wafers assembled in these devices has been accelerated.

In addition, in the conventional singulation process of semiconductor wafers, a semiconductor wafer is cut using a blade to obtain a plurality of semiconductor wafers. However, because the semiconductor wafer is thin, this cutting method is prone to generate debris and reduce the resistance of the semiconductor wafer strength.

Furthermore, from the viewpoint of increasing the operating speed of semiconductor devices, although there are products using a dielectric film having a lower dielectric constant than silicon oxide as an insulating film between wiring layers of a semiconductor wafer, a dielectric having a low dielectric constant is used. The electric film is fragile, so it is easy to peel off or there are some air bubbles inside, which makes it difficult for the blade to cut it during the cutting operation.

Therefore, the industry has developed Stealth Dicing to avoid the above problems.

As shown in FIG. 1A, the stealth cutting method is based on a semiconductor wafer 1 having a plurality of semiconductor wafers 10 irradiating laser light 7 along the partition S between the semiconductor wafers 10 with the same path length. A deteriorated layer is formed inside the semiconductor wafer 1 by destroying its internal structure, and the deteriorated layer is used as a dividing path to cut the semiconductor wafer 1 to separate the semiconductor wafers 10.

In general, in the singulation process, if the dimensions of each of the semiconductor wafers 10 of the conventional semiconductor wafer 1 are the same, there is no special problem in singulation by the stealth cutting method.

However, as shown in FIG. 1B, if the sizes of adjacent semiconductor wafers 10 and 11 are not the same, the laser light 7 will be scattered during the stealth dicing process, so it is close to each semiconductor wafer 10, At the junction of 11, the active surface 1a of the large-sized semiconductor wafer 11 will be affected by the scattering, thus causing the active surface 1a to be damaged, as shown in the damaged portion k in FIG. 1B.

Therefore, how to overcome the problems of the above-mentioned conventional technologies has become a difficult problem to be overcome in the industry.

In view of the lack of the above-mentioned conventional technology, the present invention provides a method for manufacturing an electronic component, which includes: providing a substrate having a first surface and a second surface opposite to each other, wherein the substrate includes a plurality of electronic components and is disposed on the substrate. A plurality of partitions between the electronic components; performing stealth cutting corresponding to the positions of the partitions, wherein the stealth cutting forms a plurality of stealth cutting paths in a single segment, and at least two of the lengths of the stealth cutting paths No The same; and separating the electronic components along the partitions.

In the foregoing manufacturing method, before performing invisible cutting, a groove is formed on the partition portion from the first surface of the substrate, wherein the groove does not penetrate the substrate.

In the aforementioned manufacturing method, at least two of the electronic components have different sizes.

In the aforementioned manufacturing method, the arrangement of the partitions is T-shaped.

In the foregoing manufacturing method, the length of the stealth cutting path corresponds to its position far from the first surface. For example, the length of the stealth cutting path near the first surface is shorter than the length of the stealth cutting path away from the first surface.

In the aforementioned manufacturing method, the electronic component has a corresponding active surface and a non-active surface, and a side surface adjacent to the active surface and the non-active surface, wherein the active surface corresponds to the first surface of the substrate, and the non-active surface corresponds to The second surface of the substrate, the side surface includes adjacent smooth regions and rough regions. For example, the rough area shows traces of the stealth cutting paths, and the smooth area does not form traces of the stealth cutting paths.

The present invention further provides an electronic component having opposite active and non-active surfaces and at least one side surface adjacent to the active and non-active surfaces, and at least one of the side surfaces defines a smooth region and a rough region adjacent to each other. Wherein, the rough region shows the trace of the stealth cutting path, and the smooth region does not form the trace of the stealth cutting path.

In the aforementioned electronic component, the range of the rough region is trapezoidal.

In the aforementioned electronic component, the range of the smooth region is a triangular wheel. Profile.

In the aforementioned electronic component, the smooth region is adjacent to the active surface and not adjacent to the non-active surface.

In the aforementioned electronic component, the rough region is adjacent to the active surface and the non-active surface.

Therefore, the electronic component and the manufacturing method thereof of the present invention mainly differ in the length of at least two invisible cutting paths formed in the partition, so compared with the conventional technology, the manufacturing method of the present invention can avoid the scattering of laser light. The active surface of the electronic component is damaged by the invisible cutting path of the adjacent partition.

1‧‧‧ semiconductor wafer

1a‧‧‧active surface

10,11‧‧‧Semiconductor wafer

20,21‧‧‧Electronic components

20a‧‧‧active surface

20b‧‧‧ Non-active surface

20c, 20d‧‧‧side

22‧‧‧Trench

23a-23e, 24‧‧‧ Stealth cutting path

7‧‧‧laser light

8‧‧‧ Bearing

9‧‧‧ substrate

9a‧‧‧first surface

9b‧‧‧Second surface

A‧‧‧ smooth area

B‧‧‧ Rough area

D, L, L1-L5‧‧‧length

H‧‧‧Horizontal

k‧‧‧ damage

S, S1, S2‧‧‧Division

X, Y‧‧‧Horizontal

Z‧‧‧ depth direction

Figure 1A is a perspective view of a conventional semiconductor wafer singulation process; Figure 1B is a partial perspective view of a conventional semiconductor wafer for invisible cutting; Figures 2A to 2D are electronic components of the present invention 3A is a partial top view of FIG. 2A; FIG. 3B is a partial three-dimensional view of FIG. 2C; and FIG. 3C is a side view of the electronic component of the present invention schematic diagram.

The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

It should be noted that the structures, proportions, sizes, etc. shown in the drawings in this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The limited conditions are not technically significant. Any modification of the structure, change of the proportional relationship, or adjustment of the size shall still fall within the scope of this invention without affecting the effects and goals that the invention can produce. The technical content disclosed by the invention can be covered. At the same time, the terms such as "up", "first", "second", "third", "fourth", "fifth", and "one" cited in this manual are for convenience only. The description is clear, rather than limiting the scope of the present invention, and changes or adjustments in the relative relationship shall be regarded as the scope of the present invention without substantial changes in the technical content.

2A to 2D are schematic cross-sectional views of a method for manufacturing the electronic component 20 according to the present invention.

As shown in FIG. 2A, a substrate 9 is provided. The substrate 9 includes a plurality of electronic components 20, 21 and a partition S arranged between the electronic components 20, and the substrate 9 has a first Surface 9a and second surface 9b.

In this embodiment, the first surface 9a corresponds to the active surface of the electronic component 20, 21 having a plurality of electrode pads (not shown in the figure), and the second surface 9b corresponds to the non-action of the electronic component 20, 21 surface.

In addition, the partition S is used as a cutting line, and it may optionally have a metal material on the first surface 9a (not shown).

In addition, a carrier 8 can be combined on the second surface 9b. For example, the carrier 8 is an adhesive film (such as an adhesive tape), which can optionally have a release material (not shown) to facilitate subsequent peeling of the carrier. 8 and each of the electronic components 20, 21.

In addition, the electronic components 20, 21 may be active components or passive components. The active components are, for example, semiconductor wafers, and the passive components are, for example, resistors, capacitors, and inductors. Specifically, the substrate 9 is a silicon wafer, and each of the electronic components 20, 21 is a wafer. As shown in FIG. 3A, the sizes of the electronic components 20, 21 are different (for example, the electronic component 20 is small Size wafer, the electronic component 21 is a large-size wafer), and the arrangement of the partitions S1, S2 may be T-shaped. It should be understood that the partitions S1 and S2 shown in FIG. 3A belong to a part of the partitions S shown in FIG. 2A.

As shown in FIG. 2B, a part of the material (including the metal material) on each of the partitions S is removed from the first surface 9 a of the substrate 9 to form a groove 22 on each of the partitions S, where None of the trenches 22 penetrates the substrate 9.

In this embodiment, the trench 22 can be formed by laser cauterization, diamond knife cutting, or other suitable methods, and there is no particular limitation.

As shown in FIG. 2C, stealth cutting is performed from the second surface 9b of the substrate 9 at each of the partitions S corresponding to the grooves 22. As shown in FIG. 3B, the stealth cutting is performed in a single unit. A plurality of invisible cutting paths 23a-23e and another group of invisible cutting paths 24 are formed in the partitions S1 and S2, respectively, and at least one of the partitions S1 has at least two lengths L1 of the invisible cutting paths 23a-23e. -L5 (the distance extending horizontally or the distance horizontally) is different.

In this embodiment, the stealth cutting is performed by laser light 7 focusing on the inside of the silicon wafer and moving laterally to destroy its structure to complete the stealth cutting of the wafer. Therefore, the stealth cutting paths 23a-23e, 24 are made by laser. Beam focused on the silicon The formation of the internal destruction structure of the wafer (as shown in FIG. 3B, the state after the focused destruction is represented by a plurality of dots).

Furthermore, in one of the partitions S1 shown in FIGS. 3A and 3B, the lengths L1-L5 of the invisible cutting paths 23a-23e correspond to the distance from the first surface 9a, for example, The length L1 of the invisible cutting path 23a near the first surface 9a is shorter than the length L5 of the invisible cutting path 23e away from the first surface 9a. Specifically, the lengths L1-L5 of the invisible cutting paths 23a-23e are determined by The direction of the first surface 9a of the electronic component 20 toward the second surface 9b (that is, the downward direction in the vertical direction or the downward direction in the depth direction Z shown in FIG. 3B) is sequentially increased.

In addition, the order of forming the invisible cutting paths 23a-23e is from the first surface 9a of the substrate 9 to the second surface 9b thereof, that is, based on the operation method shown in FIG. 2C, firstly, the second surface 9a is formed from the second surface 9b. The farthest invisible cutting path 23a of the surface 9b, and then gradually approaching the second surface 9b to sequentially form other invisible cutting paths 23b, 23c, 23d, 23e. Specifically, since the first invisible cutting path 23a is closer to the functional area of the active surface of the wafer (ie, the first surface 9a), the length L1 of the first invisible cutting path 23a is, for example, the partition where it is located. The length D of S1 is 50%, the length L2 of the second stealth cutting path 23b is, for example, 60% of the length D of the segment S1 where it is located, and the length L3 of the third stealth cutting path 23c is, for example, 70% of the length D of the segment S1 where it is located, and the length L4 of the fourth stealth cutting path 23d is, for example, 80% of the length D of the segment S1 where it is located, and the fifth stealth cut The length L5 of the path 23e is, for example, 90% of the length D of the segment S1 where it is located. Yu Shi In the embodiment, the length of the sixth invisible cutting path (not shown) is equal to the length D of the segment S1 where it is located.

In addition, in another partition S2 shown in FIGS. 3A and 3B, the length L of the invisible cutting paths 24 may be from the first surface 9a toward the second according to the invisible cutting paths 23a-23e. The direction of the surface 9b is sequentially changed or maintained equal. If the direction is maintained equal, the length L of the surface 9b is, for example, 100% of the length of the segment S2 where it is located.

As shown in FIG. 2D, along the partitions S in the direction of the invisible cutting paths 23a-23e (that is, the lateral movement direction of the laser light 7, the horizontal direction H, or the lateral X as shown in FIG. 3A, Y) Perform the expansion operation to separate each of the electronic components 20 and 21, and the separated single electronic components 20 and 21 are formed with side surfaces 20c and 20d adjacent to the active surface 20a and the non-active surface 20b, as described in the first section. Figure 3C.

In this embodiment, as shown in FIGS. 3A and 3C, at least one side surface 20c (for example, a side surface 20c adjacent to another small electronic component 20) of a small-sized electronic component 20 defines an adjacent smooth area. A and rough area B. Specifically, the rough area B shows the traces of the invisible cutting paths 23a-23e (the traces are shown by the wavy lines shown in FIG. 3C, but the wavy lines are not used to indicate the shape of the actual traces) No traces of the invisible cutting paths 23a-23e are formed in the smooth area A.

Furthermore, as shown in FIGS. 3A and 3C, the other side 20d of the small-sized electronic component 20 (for example, the side 20d adjacent to the large electronic component 21), if the length of the invisible cutting path remains the same, the rough area B is presented. Without the smooth region A; relatively, as the length of its stealth cutting path The degree is gradually increased from the first surface 9a toward the second surface 9b, and then the side surface 20d is formed with adjacent smooth regions A and rough regions B.

In addition, it should be understood that after the large-sized electronic component 21 shown in FIGS. 3A and 3B is separated, if the length of the stealth cutting path remains the same, the side surface presents the rough area B without the smooth area A; In contrast, if the length of the invisible cutting path is not uniform and changes, the side surface is formed with smooth areas A and rough areas B adjacent to each other.

The manufacturing method of the present invention mainly uses that the length L1-L5 of the stealth cutting path 23a-23e of at least one of the segment S1 is different, and the length L1 of the first stealth cutting path 23a is less than or approximately equal to the area 50% of the length D of the partition S, so compared with the conventional technology, the method of the present invention can avoid the scattering of the laser light 7 by the proximity because the stealth cutting path of the partition S1 near the active surface is shorter. The effect of the stealth cutting path 24 of the partition S2 can avoid damage to the active surface of the large-sized electronic component 21, and the stealth cutting path away from the active surface of the partition S1 is longer, so that the wafer (electronic component 20 , 21) can still be successfully separated.

Furthermore, the length L2 of the second stealth cutting path 23b is greater than the length L1 of the first stealth cutting path 23a, so that each of the electronic components 20 can be lifted without affecting the working surface of the large-sized electronic component 21, 21's separation operation.

The present invention further provides an electronic component 20 having opposite active surfaces 20a and non-active surfaces 20b and a plurality of side surfaces 20c adjacent to the active surface 20a and the non-active surfaces 20b, and at least one of the side surfaces 20c defines an adjacent connection. Light Sliding area A and rough area B.

In one embodiment, the rough region B has traces of invisible cutting paths 23a-23e (ie, laser burn marks), and the smooth region A has a lattice section without traces of the invisible cutting paths 23a-23e. .

In one embodiment, the range of the rough area B is substantially trapezoidal, as shown in FIG. 3C.

In an embodiment, the range of the smooth area A is substantially a triangular outline, as shown in FIG. 3C.

In one embodiment, the smooth area A is adjacent to the active surface 20a and not adjacent to the non-active surface 20b.

In one embodiment, the rough area B is adjacent to the active surface 20a and the non-active surface 20b.

To sum up, the electronic component of the present invention and the manufacturing method thereof have different lengths of at least two invisible cutting paths formed in the partition. Therefore, compared with the conventional technology, the manufacturing method of the present invention can avoid lightning. The scattering of the incident light is affected by the stealth cutting path of the adjacent partition, which causes the active surface of the electronic component to be damaged.

The above embodiments are used to exemplify the principle of the present invention and its effects, but not to limit the present invention. Anyone skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

20,21‧‧‧Electronic components

23a-23e, 24‧‧‧ Stealth cutting path

9a‧‧‧first surface

9b‧‧‧Second surface

D, L, L1-L5‧‧‧length

Z‧‧‧ depth direction

Claims (14)

An electronic component manufacturing method includes: providing a substrate having a first surface and a second surface opposite to each other, wherein the substrate includes a plurality of electronic components and a plurality of partitions arranged between the electronic components; Stealth cutting is performed at the positions of the segments, wherein the stealth cutting forms a plurality of stealth cutting paths in a single segment, and at least two of the stealth cutting paths have different lengths; and each of the segments is separated along the segments. The electronic component. According to the method for manufacturing an electronic component described in item 1 of the scope of patent application, before the invisible cutting, a groove is formed on the partition from the first surface of the substrate without penetrating the substrate. According to the method for manufacturing an electronic component described in item 1 of the scope of patent application, wherein at least two of the electronic components have different sizes. According to the manufacturing method of the electronic component described in item 1 of the scope of the patent application, the layout of the partitions is T-shaped. According to the manufacturing method of the electronic component described in item 1 of the scope of the patent application, wherein the length of the invisible cutting path corresponds to its position far from the first surface. According to the method for manufacturing an electronic component according to item 5 of the scope of the patent application, wherein the length of the stealth cutting path near the first surface is smaller than the length of the stealth cutting path away from the first surface. The method for manufacturing an electronic component according to item 1 of the scope of patent application, wherein the electronic component has a corresponding active surface and a non-active surface and is adjacent to the active surface. The sides of the active surface and the non-active surface, and the active surface corresponds to the first surface of the substrate, and the non-active surface corresponds to the second surface of the substrate. The method for manufacturing an electronic component according to item 7 of the scope of the patent application, wherein the side surface includes adjacent smooth regions and rough regions. According to the method for manufacturing an electronic component according to item 8 of the scope of the patent application, wherein the rough area shows traces of the stealth cutting paths, and the smooth area does not form traces of the stealth cutting paths. An electronic component has opposite active surfaces and non-active surfaces and at least one side surface adjacent to the active surface and non-active surface, and at least one of the side surfaces defines a smooth area and a rough area adjacent to each other, wherein the rough surface The area shows a trace of the stealth cutting path, and the smooth area has no trace of the stealth cutting path. The electronic component as described in claim 10, wherein the rough area has a trapezoidal outline. The electronic component according to item 10 of the application, wherein the smooth area has a triangular outline. The electronic component according to item 10 of the patent application scope, wherein the smooth area is adjacent to the active surface and not adjacent to the non-active surface. The electronic component according to item 10 of the application, wherein the rough area is adjacent to the active surface and the non-active surface.