TWI602226B - Etching apparatus and method for dividing a semiconductor wafer - Google Patents

Description

Etching device and semiconductor wafer dividing method

The present invention relates to the field of microelectronics, and more particularly to an etching method, an etching apparatus, and a semiconductor wafer dividing method.

On a semiconductor wafer, hundreds to thousands of die are usually fabricated. There is a gap between these cores, which needs to be separated by Dicing Saw. However, conventional dicing cuts are prone to stress cracking of the edges, resulting in chipping of the bare wafer, especially for devices formed on thin wafers, such as power devices and BSI-type CMOS image sensors. The wafer thickness of the device is typically as thin as 50 μm and is very susceptible to chipping during dicing.

Some current solutions use patterned photoresist combined with conventional dry etching for dicing. In addition, Japanese Patent Application No. JP2003257896A discloses a method for dividing a semiconductor wafer by using a polishing tape and a dry etching method to realize dicing of the wafer; by affixing a tape on the top surface of the wafer, and then cutting the tape to expose the scribe area The wafer is then divided by dry etching under the protection of the tape. US Patent Application No. US20110312157A1 discloses a method of cutting a semiconductor wafer by using femtosecond laser and plasma etching to achieve wafer dicing; by forming a mask on the surface of the wafer, and then using a femtosecond laser to cut the mask to expose the pattern The plasma is then etched by the plasma to separate the wafer under the protection of the mask.

However, the process steps of the conventional solution are complicated and the production efficiency is low. Therefore, it is necessary to find a more efficient and simple dicing technology for thin wafers.

In view of the above prior art, the present invention aims to provide an etching method, an etching apparatus, and a semiconductor wafer dividing method for solving the problem that the dicing and cutting of a thin wafer in the prior art is easily broken.

To achieve the above and other related objects, the present invention provides an etching method comprising the steps of: ejecting a plasma etching gas using a nozzle to etch a region of a target material to be etched.

Preferably, the plasma etching gas is a dry etching gas of the target material.

Preferably, the ultraviolet ray irradiated plasma etching gas is ejected by the nozzle.

Preferably, the plasma etching gas sprayed by the nozzle is a high pressure gas.

To achieve the above and other related objects, the present invention also provides an etching apparatus comprising: an air chamber, an air inlet, a nozzle, and a plasma starting unit; the air chamber including a top, a bottom opposite the top, and a connection a top side and a bottom side wall; the air inlet is located at a top of the air chamber; the nozzle is located at a bottom of the air chamber; and the plasma activation unit is located at a side wall of the air chamber to allow entry The gas in the air chamber is activated to a plasma state.

Preferably, the plasma starting unit is an ultraviolet irradiation device.

Preferably, the nozzle has a diameter of 100 nm to 100 μm.

To achieve the above and other related objects, the present invention further provides a semiconductor wafer dividing method, comprising the steps of: providing a semiconductor wafer, wherein the semiconductor wafer is formed with a plurality of integrated circuits, the plurality of integrated bodies a gap is provided between the circuits; and a gap between the plurality of integrated circuits is etched by spraying a plasma etching gas through the nozzle to make the plurality of integrated circuits One by one.

Preferably, the semiconductor wafer is a germanium wafer, and the plasma etching gas is a dry etching gas of germanium.

More preferably, the dry etching gas of the crucible includes one or more of etching reaction gases ClF ₃ , Cl ₂ , HCl, and one or more of carrying gases He, Ar, N ₂ .

Preferably, the plasma etching gas irradiated by ultraviolet rays is sprayed by the nozzle, and the ultraviolet light is irradiated with a wavelength of 380-550 nm (nm) and the irradiation power is 0.5-30 W/cm 3 (W/ Cm ² ), irradiation time is 0.1-10 minutes (min)

Preferably, the high-pressure plasma etching gas is ejected by the nozzle, and the high-pressure plasma etching gas is subjected to a gas pressure of 800 to 2000 Torr before being ejected.

To achieve the above and other related objects, the present invention further provides a semiconductor wafer dividing method, comprising the steps of: providing a semiconductor wafer, wherein the semiconductor wafer is formed with a plurality of integrated circuits, the plurality of integrated bodies a gap is formed between the circuits; a mask layer is formed on the semiconductor wafer, the mask layer covers and protects the integrated circuit; and the mask layer is patterned by spraying a plasma etching gas to expose a gap between the plurality of integrated circuits on the semiconductor wafer; the semiconductor wafer is divided by the exposed gap.

Preferably, the mask layer is a ruthenium oxide layer, and the plasma etching gas of the mask layer is patterned as a dry etching gas of yttrium oxide.

More preferably, the dry etching gas of the cerium oxide includes etching the reaction gas HF or H ₂ O, and carrying one or more of the gases He, Ar, and N ₂ .

Preferably, the plasma etching gas irradiated by ultraviolet rays is sprayed by the nozzle, and the ultraviolet light is irradiated with a wavelength of 380-550 nm, the irradiation power is 0.5-30 W/cm 2 , and the irradiation time is 0.1-10 min.

Preferably, the nozzle is used to eject a high-voltage plasma etching gas, the high-voltage electricity The gas pressure before the slurry etching gas is ejected is 800-2000 Torr.

Preferably, the semiconductor wafer is divided by the exposed gap, after the mask layer is patterned, the semiconductor wafer is placed in a dry etching apparatus to expose a gap exposed by the mask layer. The dry etching etches the plurality of integrated circuits one by one.

Preferably, the semiconductor wafer is divided by the exposed gap, and after the mask layer is patterned, a plasma etching gas is sprayed by the nozzle to etch a gap exposed by the mask layer, so that the The integrated circuits are separated one by one.

More preferably, the two masks are used to separately pattern the mask layer and etch the gap exposed by the mask layer.

As described above, the etching method, the etching apparatus, and the semiconductor wafer dividing method of the present invention have the following advantageous effects: the present invention proposes a method and apparatus for etching by using a nozzle to eject a plasma etching gas, thereby realizing the method and apparatus. Segmentation of semiconductor wafers. The semiconductor wafer dividing method of the invention avoids the stress caused by the dicing of the traditional cutting blade, effectively reduces the problem of chipping and chipping caused by the dicing, is suitable for dicing and dividing the thin wafer, and the method is simple and fast, Efficient. In addition, the present invention also provides a technical solution for spraying a plasma etching gas patterned mask layer by using a nozzle and then dicing under the protection of the mask layer, which can effectively protect the thin wafer and improve the production yield and efficiency.

S101~S102, S201~S204‧‧‧ steps

101‧‧‧ air cavity

102‧‧‧air inlet

103‧‧‧Nozzles

104‧‧‧Plastic starter unit

1‧‧‧ etching device

2‧‧‧Semiconductor wafer

3‧‧‧ Tape

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view showing an etching apparatus according to an embodiment of the present invention.

Figure 2 is a diagram showing the flow of a method of dividing a semiconductor wafer in accordance with an embodiment of the present invention.

Fig. 3 is a view showing a semiconductor wafer division by jetting a plasma etching gas by a nozzle according to an embodiment of the present invention.

Figure 4 is a diagram showing the flow of a method of dividing a semiconductor wafer in accordance with an embodiment of the present invention.

The invention is further described in detail below in conjunction with the drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the description and claims. It should be noted that the drawings are all in a very simplified form, and both use non-precise proportions, and are only for convenience and clarity to assist the purpose of the embodiments of the present invention.

Example

Embodiment 1

This embodiment provides an etching method comprising the steps of: ejecting a plasma etching gas by a nozzle to etch a region of a target material to be etched. Specifically, the plasma etching gas is a dry etching gas of the target material.

As a preferred embodiment of the present embodiment, the plasma etching gas which has been irradiated with ultraviolet rays is ejected by the nozzle. In the ultraviolet irradiation, the ultraviolet wavelength may be 380-550 nm, the irradiation power may be 0.5-30 W/cm ² , and the irradiation time may be 0.1-10 min. The specific UV irradiation parameters can be adjusted according to different etching gases and etching effects. As a preferred embodiment of the present embodiment, the plasma etching gas ejected by the nozzle is a high pressure gas. The gas pressure before the high-pressure plasma etching gas is ejected may be 800-2000 Torr. High-pressure plasma etching gas facilitates accelerated etching and improves etching efficiency.

The etching method can be etched by moving the nozzle to a region to be etched, suitable for etching of simple lines or patterns.

In order to achieve the above etching method, the present embodiment also provides an etching apparatus with a nozzle. Referring to FIG. 1 , the etching apparatus includes: an air chamber 101, an air inlet 102, and a nozzle. 103 and a plasma activation unit 104; the air chamber 101 includes a top portion, a bottom portion opposite the top portion, and a side wall connecting the top portion and the bottom portion; the air inlet port 102 is located at the top of the air chamber 101 The nozzle 103 is located at the bottom of the air chamber 101; the plasma starting unit 104 is located at the side wall of the air chamber 101, and the gas entering the air chamber 101 is activated to a plasma state.

As a preferred embodiment of the embodiment, the plasma activating unit 104 may be an ultraviolet irradiation device. The nozzle may have a diameter of 100 nm to 100 μm, and a sharp nozzle can etch a thin line.

When the etching device is in operation, the air inlet 102 located at the top of the air chamber 101 introduces gas into the air chamber 101 to allow gas to flow from the top to the bottom, and the gas entering the air chamber 101 is passed through the side wall of the air chamber 101. The upper plasma starting unit is activated to a plasma state, and the activated gas flows to the bottom of the air chamber 101 and is ejected through the nozzle 103. When etching is performed, the material to be etched can be placed on a stage with a vacuum or electrostatic chuck. The etching device may also be provided with a gas pressure monitoring device to regulate the gas pressure of the etching gas in the gas chamber 101.

Embodiment 2

Referring to FIG. 2, the embodiment provides a semiconductor wafer dividing method, including the following steps: S101 provides a semiconductor wafer, and a plurality of integrated circuits are formed on the semiconductor wafer, and the plurality of integrated circuits are A gap is provided therebetween; S102 etches a gap between the plurality of integrated circuits by discharging a plasma etching gas by a nozzle to separate the plurality of integrated circuits one by one.

In this embodiment, the semiconductor wafer is a germanium wafer, and the plasma etching gas is a dry etching gas of germanium, that is, a gas used for dry etching the germanium material. In this embodiment, the dry etching gas of the germanium includes one or more of etching reaction gases ClF ₃ , Cl ₂ , and HCl, and one or more of carrying gases He, Ar, and N ₂ .

As a preferred embodiment of the present embodiment, in step S102, the plasma etching gas sprayed by the nozzle is activated by ultraviolet irradiation, and when ultraviolet irradiation is performed, the ultraviolet wavelength is 380-550 nm, and the irradiation power is 0.5. -30 W/cm ² , irradiation time is 0.1-10 min.

As a preferred embodiment of the present embodiment, in step S102, a high-pressure plasma etching gas is ejected by a nozzle, and the gas pressure before the high-pressure plasma etching gas is ejected may be 800-2000 Torr. The high pressure gas facilitates the accelerated etching, thereby improving the efficiency of the division.

As a preferred embodiment of the present embodiment, in step S102, the nozzle used may have a diameter of 100 nm to 100 μm to form a thin dividing line.

As shown in FIG. 3, in the specific operation, the tape 3 can be attached to the semiconductor wafer 2 to fix the position of the semiconductor wafer 2, thereby avoiding the occurrence of displacement of the wafer after the division. The semiconductor wafer 2 to which the tape 3 is attached may be placed on a stage with a vacuum or electrostatic chuck, etched using an etching device 1 with a nozzle, and the etching device 1 is moved according to a desired cutting path, for example, along a semiconductor crystal The scribe lane is provided on the circle 2 to realize dicing of the wafer.

Embodiment 3

Referring to FIG. 4, the embodiment provides a semiconductor wafer segmentation method using a mask layer protection, comprising the steps of: S201 providing a semiconductor wafer, wherein the semiconductor wafer is formed with a plurality of integrated circuits, a gap is formed between the plurality of integrated circuits; S202 forms a mask layer on the semiconductor wafer, the mask layer covers and protects the integrated circuit; and S203 uses a nozzle to eject a plasma etching gas to pattern the a mask layer to expose a gap between the plurality of integrated circuits on the semiconductor wafer; S204 dividing the semiconductor wafer by the exposed gap.

In step S203, patterning the mask layer mainly etches lines on the mask layer according to the scribe lane position of the semiconductor wafer, so that the scribe lane on the semiconductor wafer can be exposed, that is, the A gap between a plurality of integrated circuits. In this embodiment, the mask layer is a ruthenium oxide layer, and the plasma etching gas of the mask layer is patterned as a dry etching gas of yttrium oxide. Here, the dry etching gas of cerium oxide refers to a gas used in dry etching of a cerium oxide material. Preferably, the dry etching gas of the cerium oxide of the embodiment includes etching the reaction gas HF or H ₂ O, and carrying one or more of the gases He, Ar, and N ₂ .

As a preferred embodiment of the present embodiment, in step S203, the plasma etching gas sprayed by the nozzle is activated by ultraviolet irradiation, and when ultraviolet irradiation is performed, the ultraviolet wavelength is 380-550 nm, and the irradiation power is 0.5. -30 W/cm ² , irradiation time is 0.1-10 min.

As a preferred embodiment of the present embodiment, in step S203, a high-pressure plasma etching gas can be ejected by using a nozzle. The gas pressure before the high-pressure plasma etching gas is ejected can be 800-2000 Torr, and the high-pressure gas is favorable for accelerating etching. Thereby, the division efficiency can be improved.

Step S204, the semiconductor wafer is divided by the exposed gap, and a general dry etching method may be used. For example, after the mask layer is patterned, the semiconductor wafer is placed in a dry etching apparatus. The gap in which the mask layer is exposed is dry etched to separate the plurality of integrated circuits one by one. The dry etching parameters are well known to those skilled in the art and will not be described herein.

As a preferred embodiment of the present embodiment, the semiconductor wafer is divided by the exposed gap in step S204, and the etching method of the present invention may be used. For example, the semiconductor wafer dividing method described in the second embodiment may be used. . Specifically, after the mask layer is patterned, a plasma etching gas is sprayed from the nozzle to etch the gap exposed by the mask layer, and the plurality of integrated circuits are separated one by one. In order to save operating time and increase production efficiency, two nozzles may be used to separately pattern the mask layer and etch the gap exposed by the mask layer. For example, two embodiments of the etching apparatus, one etching apparatus, may be separately employed. For patterning the mask layer, another etching device is used to divide the semiconductor wafer.

In summary, the present invention provides a method and apparatus for etching plasma etching gas using a nozzle, thereby enabling the semiconductor wafer to be divided by the method and apparatus. The semiconductor wafer dividing method of the invention avoids the stress caused by the dicing of the conventional cutting blade, effectively reduces the problem of chipping and chipping caused by the dicing, is suitable for dicing and dividing the thin wafer, and is thin relative to the existing one. The wafer dicing method makes the method of the invention simpler, faster and more efficient. In addition, the present invention also provides a technical solution for spraying a plasma etching gas patterned mask layer by using a nozzle and then dicing under the protection of the mask layer, which can effectively protect the thin wafer and improve the production yield and efficiency. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

The above description of the specific embodiments is intended to be illustrative of the invention, and is not intended to limit the invention. It will be understood by those skilled in the art that various changes or modifications may be made to the present invention without departing from the scope of the appended claims.

S101, S102‧‧‧ steps

Claims (8)

An etching apparatus, comprising: an air chamber, an air inlet, a nozzle, and a plasma starting unit; the air chamber including a top portion, a bottom portion opposite to the top portion, and a side wall connecting the top portion and the bottom portion The air inlet is located at the top of the air chamber; the nozzle is located at the bottom of the air chamber; the plasma starting unit is an ultraviolet irradiation device, and the plasma starting unit is located at the air chamber The side wall causes the gas entering the air chamber to be activated into a plasma state. An etching apparatus according to claim 1, wherein the nozzle has a diameter of from 100 nm to 100 μm. A semiconductor wafer dividing method, comprising the steps of: providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and a gap is disposed between the plurality of integrated circuits; Forming a mask layer on the semiconductor wafer, the mask layer covering and protecting the integrated circuit; patterning the mask layer by spraying a plasma etching gas with a nozzle to expose a plurality of products on the semiconductor wafer a gap between the body circuits; dividing the semiconductor wafer by the exposed gap, wherein the semiconductor wafer is divided by the exposed gap, and the plasma is etched by the nozzle after patterning the mask layer The gas etches the gap exposed by the mask layer to separate the plurality of integrated circuits one by one, and uses two nozzles to respectively pattern the mask layer and the gap exposed to the mask layer Etching is performed. The method of claim 3, wherein the mask layer is a ruthenium oxide layer, and the plasma etching gas of the mask layer is patterned as a dry etching gas of yttrium oxide. The method of claim 4, wherein the dry etching gas of the cerium oxide comprises an etching reaction gas and a carrier gas, the etching reaction gas is HF or H ₂ O, and the carrier gas is He, One or more of Ar, N ₂ . The method of claim 3, characterized in that: the plasma etching gas irradiated by ultraviolet rays is sprayed by the nozzle, and the ultraviolet light is irradiated with ultraviolet light having a wavelength of 380-550 nm (nm), and the irradiation power is 0.5-30 watts/cm 3 (W/cm ² ), and the irradiation time is 0.1-10 minutes (min). The method of claim 3, wherein the high-pressure plasma etching gas is ejected by the nozzle, and the high-pressure plasma etching gas is subjected to a gas pressure of 800 to 2000 Torr before being ejected. The method of claim 3, wherein the semiconductor wafer is divided by the exposed gap, and the semiconductor wafer is placed in a dry etching apparatus after the mask layer is patterned. The gap exposed by the mask layer is dry etched to separate the plurality of integrated circuits one by one.