CN107799467B - Etching method, etching device and semiconductor wafer segmentation method - Google Patents

Etching method, etching device and semiconductor wafer segmentation method Download PDF

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CN107799467B
CN107799467B CN201610778065.8A CN201610778065A CN107799467B CN 107799467 B CN107799467 B CN 107799467B CN 201610778065 A CN201610778065 A CN 201610778065A CN 107799467 B CN107799467 B CN 107799467B
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semiconductor wafer
etching
etching gas
nozzle
gas
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CN107799467A (en
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三重野文健
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Zing Semiconductor Corp
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Zing Semiconductor Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention provides an etching method, an etching device and a semiconductor wafer segmentation method. The semiconductor wafer dividing method comprises the following steps: providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits; and utilizing the nozzle to spray plasma etching gas to etch the gaps among the integrated circuits, so that the integrated circuits are separated one by one. The invention provides a method and a device for etching by using a plasma etching gas sprayed by a nozzle, so that the method and the device can be used for realizing the segmentation of a semiconductor wafer. The semiconductor wafer cutting method avoids stress caused by scribing by adopting a traditional cutter, effectively reduces the problems of edge breakage, fragment and the like caused by scribing, is suitable for scribing and cutting of thin wafers, and is simple, rapid and efficient.

Description

Etching method, etching device and semiconductor wafer segmentation method
Technical Field
The invention relates to the technical field of microelectronics, in particular to an etching method, an etching device and a semiconductor wafer segmentation method.
Background
On a semiconductor wafer, several hundreds to thousands of bare chips (Die) are usually fabricated, and a certain gap is left between the bare chips, which needs to be separated by Dicing (Dicing Saw). However, conventional dicing cuts are prone to stress and edge chipping, which can lead to chipping of the die, especially for devices formed on thin wafers, such as power devices and BSI type CMOS image sensors, which typically have wafer thicknesses as thin as 50 μm and are very prone to chipping during dicing cuts.
Some current solutions use patterned photoresist in combination with conventional dry etching for scribing. In addition, the patent document with publication number JP2003257896A discloses a method for dividing a semiconductor wafer, which uses a grinding tape and a dry etching process to realize dicing of the wafer. The wafer is divided by adhering an adhesive tape on the top surface of the wafer, then cutting the adhesive tape to expose the scribing region, and then adopting dry etching under the protection of the adhesive tape. Patent document US20110312157a1 also discloses a method for dicing a semiconductor wafer, which uses femtosecond laser and plasma etching to scribe the wafer. A mask is formed on the surface of a wafer, then the femtosecond laser is used for cutting the mask to expose a scribing way, and then the wafer is cut under the protection of the mask by plasma etching.
However, the above solutions have complicated process steps and low production efficiency. Therefore, there is a need for a more efficient and simple dicing technique for thin wafers.
Disclosure of Invention
In view of the above-mentioned prior art, an object of the present invention is to provide an etching method, an etching apparatus and a semiconductor wafer dividing method, which are used to solve the problem that the dicing and cutting of the thin wafer are easy to break in the prior art.
To achieve the above and other related objects, the present invention provides an etching method, comprising:
and (4) spraying plasma etching gas by using the nozzle to etch the area to be etched of the target material.
Preferably, the plasma etching gas is a dry etching gas of the target material.
Preferably, the plasma etching gas irradiated with ultraviolet rays is ejected by a nozzle.
Preferably, the plasma etching gas ejected by the nozzle is a high-pressure gas.
To achieve the above and other related objects, the present invention also provides an etching apparatus, comprising: the plasma activation device comprises an air cavity, an air inlet, a nozzle and a plasma activation unit;
the air cavity comprises a top, a bottom opposite to the top and a side wall connecting the top and the bottom;
the air inlet is positioned at the top of the air cavity;
the nozzle is positioned at the bottom of the air cavity;
the plasma activation unit is positioned on the side wall of the air cavity, so that the gas entering the air cavity is activated into a plasma state.
Preferably, the plasma activation unit is an ultraviolet irradiation device.
Preferably, the aperture of the nozzle is 100nm-100 μm.
To achieve the above and other related objects, the present invention further provides a semiconductor wafer dividing method, comprising:
providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
and utilizing the nozzle to spray plasma etching gas to etch the gaps among the integrated circuits, so that the integrated circuits are separated one by one.
Preferably, the semiconductor wafer is a silicon wafer, and the plasma etching gas is a dry etching gas of silicon.
Further preferably, the dry etching gas for silicon includes an etching reaction gas ClF3、Cl2One or more of HCl and carrying gases He, Ar and N2One or more of (a).
Preferably, the plasma etching gas irradiated by ultraviolet rays is sprayed by a nozzle, and the wavelength of the ultraviolet rays is 380-550nm and the irradiation power is 0.5-30W/cm during the ultraviolet ray irradiation2The irradiation time is 0.1-10 min.
Preferably, a nozzle is used to eject a high pressure plasma etching gas at a pressure of 800-.
To achieve the above and other related objects, the present invention further provides a semiconductor wafer dividing method, comprising:
providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
forming a mask layer on the semiconductor wafer, wherein the mask layer covers and protects the integrated circuit;
utilizing a nozzle to spray plasma etching gas to pattern the mask layer so as to expose gaps among a plurality of integrated circuits on the semiconductor wafer;
and cutting the semiconductor wafer through the exposed gap.
Preferably, the mask layer is a silicon oxide layer, and the plasma etching gas for patterning the mask layer is a dry etching gas of silicon oxide.
Further preferably, the dry etching gas for silicon oxide comprises an etching reaction gas HF or H2O, and carrying gases He, Ar, N2One or more of (a).
Preferably, the plasma etching gas irradiated by ultraviolet rays is sprayed by a nozzle, and the wavelength of the ultraviolet rays is 380-550nm, the irradiation power is 0.5-30W/cm2 and the irradiation time is 0.1-10min during the ultraviolet irradiation.
Preferably, a nozzle is used to eject a high pressure plasma etching gas at a pressure of 800-.
Preferably, the semiconductor wafer is divided by the exposed gap, and the semiconductor wafer is placed in a dry etching device to perform dry etching on the exposed gap of the mask layer after the mask layer is patterned, so that the integrated circuits are separated one by one.
Preferably, the semiconductor wafer is divided by the exposed gap, and the exposed gap of the mask layer is etched by ejecting plasma etching gas through a nozzle after the mask layer is patterned, so that the integrated circuits are separated one by one.
Further preferably, two nozzles are used for respectively patterning the mask layer and etching the gap exposed by the mask layer.
As described above, the etching method, the etching apparatus and the semiconductor wafer dividing method of the present invention have the following advantageous effects:
the invention provides a method and a device for etching by using a plasma etching gas sprayed by a nozzle, so that the method and the device can be used for realizing the segmentation of a semiconductor wafer. The semiconductor wafer cutting method avoids stress caused by scribing by adopting a traditional cutter, effectively reduces the problems of edge breakage, fragment and the like caused by scribing, is suitable for scribing and cutting of thin wafers, and is simple, rapid and efficient. In addition, the invention also provides a technical scheme that plasma etching gas is sprayed by the nozzle to pattern the mask layer and then the wafer is diced under the protection of the mask layer, so that the thin wafer can be effectively protected, and the production yield and efficiency are improved.
Drawings
Fig. 1 is a schematic diagram illustrating an etching apparatus according to an embodiment of the present invention.
Fig. 2 is a schematic view illustrating a semiconductor wafer dividing method according to a second embodiment of the present invention.
FIG. 3 is a schematic diagram of semiconductor wafer dicing performed by ejecting a plasma etching gas through a nozzle according to a second embodiment of the present invention.
Fig. 4 is a schematic view illustrating a semiconductor wafer dividing method according to a third embodiment of the present invention.
Description of the element reference numerals
S101 to S102
S201 to S204
101 air cavity
102 air inlet
103 nozzle
104 plasma activation unit
1 etching device
2 semiconductor wafer
3 adhesive tape
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The technical solution of the present invention is explained in detail by specific examples below.
Example one
The embodiment provides an etching method, which comprises the following steps: and (4) spraying plasma etching gas by using the nozzle to etch the area to be etched of the target material. Specifically, the plasma etching gas is a dry etching gas of the target material.
As a preferable aspect of the present embodiment, the plasma etching gas irradiated with ultraviolet rays is ejected by a nozzle. When ultraviolet radiation is carried out, the wavelength of the adopted ultraviolet can be 380-550nm, and the radiation power can be 0.5-30W/cm2The irradiation time can be 0.1-10 min. The specific ultraviolet irradiation parameters can be adjusted according to different etching gases and etching effects. In a preferred embodiment of the present invention, the plasma etching gas ejected from the nozzle is a high-pressure gas. The pressure of the high pressure plasma etching gas before being ejected may be 800-2000 Torr. The high-pressure plasma etching gas is beneficial to accelerating etching and improving the etching efficiency.
The etching method can etch the area to be etched by moving the nozzle, and is suitable for etching simple lines or patterns.
In order to implement the above etching method, this embodiment further provides an etching apparatus with a nozzle. Referring to fig. 1, the etching apparatus includes: an air cavity 101, an air inlet 102, a nozzle 103 and a plasma activation unit 104; the air cavity 101 comprises a top, a bottom opposite to the top, and a side wall connecting the top and the bottom; the air inlet 102 is positioned at the top of the air cavity 101; the nozzle 103 is positioned at the bottom of the air cavity 101; the plasma activation unit 104 is located on a sidewall of the gas cavity 101, and activates a gas entering the gas cavity 101 into a plasma state.
As a preferable solution of this embodiment, the plasma activating unit 104 may be an ultraviolet irradiation device. The caliber of the nozzle can be 100nm-100 mu m, and a sharp nozzle can etch a thinner line.
When the etching device works, gas is introduced into the gas cavity 101 through the gas inlet 102 positioned at the top of the gas cavity 101, the gas flows from top to bottom, the gas entering the gas cavity 101 is activated into a plasma state by the plasma activation unit on the side wall of the gas cavity 101, and the activated gas flows to the bottom of the gas cavity 101 and is sprayed out through the nozzle 103. In performing the etching, the material to be etched may be placed on a stage with a vacuum or electrostatic chuck. The etching device can also be provided with a gas pressure monitoring device to regulate and control the gas pressure of the etching gas in the gas cavity 101.
Example two
Referring to fig. 2, the present embodiment provides a method for dividing a semiconductor wafer, including the following steps:
s101, providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
s102, the plasma etching gas is sprayed out from the nozzle to etch the gaps among the integrated circuits, so that the integrated circuits are separated one by one.
In this embodiment, the semiconductor wafer is a silicon wafer, and the plasma etching gas is a dry etching gas of silicon, that is, a gas used in dry etching of a silicon material. Preferably, the dry etching gas for silicon includes an etching reaction gas ClF3、Cl2One or more of HCl and carrying gases He, Ar and N2One or more of (a).
As a preferable scheme of this embodiment, in step S102, the plasma etching gas sprayed from the nozzle is activated by ultraviolet irradiation, when the ultraviolet irradiation is performed, the wavelength of the ultraviolet is 380-550nm, and the irradiation power is 0.5-30W/cm2The irradiation time is 0.1-10 min.
As a preferable aspect of this embodiment, in step S102, a high-pressure plasma etching gas is ejected from the nozzle, and the pressure of the high-pressure plasma etching gas before being ejected may be 800-. The high pressure gas is beneficial to accelerating the etching, thereby improving the cutting efficiency.
In a preferred embodiment of the present invention, the nozzle used in step S102 may have an aperture of 100nm to 100 μm to form a fine dividing line.
As shown in fig. 3, in a specific operation, an adhesive tape 3 may be attached to the semiconductor wafer 2 to fix the position of the semiconductor wafer 2, so as to avoid the situation of displacement of the divided chips. The semiconductor wafer 2 with the adhesive tape 3 adhered thereto may be placed on an operating table with a vacuum or electrostatic chuck, etched using the etching apparatus 1 with a nozzle, and the etching apparatus 1 is moved according to a desired cutting path, for example, along a scribe lane provided on the semiconductor wafer 2, thereby achieving scribing of the wafer.
EXAMPLE III
Referring to fig. 4, the present embodiment provides a method for dividing a semiconductor wafer protected by a mask layer, including the following steps:
s201, providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
s202, forming a mask layer on the semiconductor wafer, wherein the mask layer covers and protects the integrated circuit;
s203, spraying plasma etching gas by using a nozzle to pattern the mask layer so as to expose gaps among a plurality of integrated circuits on the semiconductor wafer;
and S204, dividing the semiconductor wafer through the exposed gaps.
In step S203, the step of patterning the mask layer is mainly to etch lines on the mask layer according to scribe line positions of the semiconductor wafer, so that scribe lines on the semiconductor wafer, that is, gaps between the plurality of integrated circuits, can be exposed. In this embodiment, the mask layer is a silicon oxide layer, and the plasma etching gas for patterning the mask layer is a dry etching gas of silicon oxide. The dry etching gas for silicon oxide is a gas used in dry etching of a silicon oxide material. In this embodiment, the dry etching gas for silicon oxide preferably includes an etching reaction gas HF or H2O, and carrying gases He, Ar, N2One or more of (a).
As a preferable scheme of this embodiment, in step S203, the plasma etching gas sprayed from the nozzle is activated by ultraviolet irradiation, and when the ultraviolet irradiation is performed, the wavelength of the ultraviolet is 380-550nm, and the irradiation power is 0.5-30W/cm2The irradiation time is 0.1-10 min.
As a preferable scheme of this embodiment, in step S203, a nozzle may be used to eject a high-pressure plasma etching gas, where the pressure of the high-pressure plasma etching gas before being ejected may be 800-.
In step S204, the semiconductor wafer is divided by the exposed gap, and a conventional dry etching process may be used, for example, after the mask layer is patterned, the semiconductor wafer is placed in a dry etching device to perform dry etching on the exposed gap of the mask layer, so that the integrated circuits are separated one by one. The dry etching parameters are well known to those skilled in the art, and therefore, are not described herein.
As a preferred embodiment of this embodiment, the step S204 may be performed by dividing the semiconductor wafer through the exposed gap, or by using the etching method of the present invention, for example, the semiconductor wafer dividing method described in the second embodiment may be used. Specifically, after the mask layer is patterned, plasma etching gas is sprayed out by a nozzle to etch the exposed gap of the mask layer, so that the integrated circuits are separated one by one. In order to save the operation time and improve the production efficiency, two nozzles can be adopted for respectively patterning the mask layer and etching the exposed gap of the mask layer. For example, the etching apparatus described in one of the two embodiments may be respectively adopted, one etching apparatus is used for patterning the mask layer, and the other etching apparatus is used for dividing the semiconductor wafer.
In summary, the present invention provides a method and an apparatus for etching by using a nozzle to eject a plasma etching gas, so that the method and the apparatus can be used to realize the separation of a semiconductor wafer. The semiconductor wafer cutting method avoids stress caused by scribing by adopting a traditional cutter, effectively reduces the problems of edge breakage, chipping and the like caused by scribing, is suitable for scribing and cutting of the thin wafer, and is simpler, quicker and more efficient compared with the existing thin wafer scribing process. In addition, the invention also provides a technical scheme that plasma etching gas is sprayed by the nozzle to pattern the mask layer and then the wafer is diced under the protection of the mask layer, so that the thin wafer can be effectively protected, and the production yield and efficiency are improved. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (18)

1. An etching apparatus for dicing a semiconductor wafer, comprising: the plasma activation device comprises an air cavity, an air inlet, a nozzle and a plasma activation unit;
the air cavity comprises a top, a bottom opposite to the top and a side wall connecting the top and the bottom;
the air inlet is positioned at the top of the air cavity;
the nozzle is positioned at the bottom of the air cavity;
the plasma activation unit is positioned on the side wall of the air cavity, so that the gas entering the air cavity is activated into a plasma state;
wherein the caliber of the nozzle is 100nm-100 μm, and the plasma activating unit is an ultraviolet irradiation device.
2. An etching method is characterized by comprising the following steps:
etching a region of a target material to be etched by ejecting a plasma etching gas through a nozzle of an etching apparatus according to claim 1.
3. The etching method according to claim 2, characterized in that: the plasma etching gas is a dry etching gas of the target material.
4. The etching method according to claim 2, characterized in that: the plasma etching gas irradiated by ultraviolet rays is ejected by a nozzle.
5. The etching method according to claim 2, characterized in that: the plasma etching gas sprayed by the nozzle is high-pressure gas.
6. A semiconductor wafer dicing method, comprising:
providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
the method as claimed in claim 1, wherein the gaps between the plurality of integrated circuits are etched by ejecting plasma etching gas from the nozzle of the etching apparatus, so that the plurality of integrated circuits are separated one by one.
7. The semiconductor wafer dicing method according to claim 6, wherein: the semiconductor wafer is a silicon wafer, and the plasma etching gas is a dry etching gas of silicon.
8. The semiconductor wafer dicing method according to claim 7, wherein: the dry etching gas for silicon comprises etching reaction gas ClF3、Cl2One or more of HCl and carrying gases He, Ar and N2One or more of (a).
9. The semiconductor wafer dicing method according to claim 6, wherein: sprayed through the purple by a nozzlePlasma etching gas irradiated by external ray, wherein the wavelength of the adopted ultraviolet ray is 380-550nm, and the irradiation power is 0.5-30W/cm2The irradiation time is 0.1-10 min.
10. The semiconductor wafer dicing method according to claim 6, wherein: the nozzle is used for ejecting high-pressure plasma etching gas, and the pressure of the high-pressure plasma etching gas before ejection is 800-.
11. A semiconductor wafer dicing method, comprising:
providing a semiconductor wafer, wherein a plurality of integrated circuits are formed on the semiconductor wafer, and gaps are formed among the integrated circuits;
forming a mask layer on the semiconductor wafer, wherein the mask layer covers and protects the integrated circuit;
patterning the mask layer by using a plasma etching gas ejected from a nozzle of the etching device according to claim 1 to expose gaps between a plurality of integrated circuits on the semiconductor wafer;
and cutting the semiconductor wafer through the exposed gap.
12. The semiconductor wafer dicing method according to claim 11, wherein: the mask layer is a silicon oxide layer, and the plasma etching gas for patterning the mask layer is dry etching gas of silicon oxide.
13. The semiconductor wafer dicing method according to claim 12, wherein: the dry etching gas of the silicon oxide comprises etching reaction gas HF or H2O, and carrying gases He, Ar, N2One or more of (a).
14. The semiconductor wafer dicing method according to claim 11, wherein: plasma etching by ultraviolet irradiation using nozzleWhen gas is irradiated by ultraviolet rays, the wavelength of the adopted ultraviolet rays is 380-550nm, and the irradiation power is 0.5-30W/cm2The irradiation time is 0.1-10 min.
15. The semiconductor wafer dicing method according to claim 11, wherein: the nozzle is used for ejecting high-pressure plasma etching gas, and the pressure of the high-pressure plasma etching gas before ejection is 800-.
16. The semiconductor wafer dicing method according to claim 11, wherein: and dividing the semiconductor wafer through the exposed gaps, namely placing the semiconductor wafer in dry etching equipment to perform dry etching on the gaps exposed by the mask layer after patterning the mask layer, so that the integrated circuits are separated one by one.
17. The semiconductor wafer dicing method according to claim 11, wherein: and dividing the semiconductor wafer through the exposed gaps, and etching the exposed gaps of the mask layer by using a nozzle to spray plasma etching gas after the mask layer is patterned, so that the integrated circuits are separated one by one.
18. The semiconductor wafer dicing method according to claim 17, wherein: and respectively patterning the mask layer and etching the exposed gap of the mask layer by adopting two nozzles.
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