TWI597003B - Printed circuit board and method for manufacturing same - Google Patents

Printed circuit board and method for manufacturing same Download PDF

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Publication number
TWI597003B
TWI597003B TW104141407A TW104141407A TWI597003B TW I597003 B TWI597003 B TW I597003B TW 104141407 A TW104141407 A TW 104141407A TW 104141407 A TW104141407 A TW 104141407A TW I597003 B TWI597003 B TW I597003B
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Taiwan
Prior art keywords
photosensitive resin
lower side
upper side
mask layer
trench
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TW104141407A
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Chinese (zh)
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TW201724930A (en
Inventor
胡先欽
沈芾雲
何明展
莊毅強
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鵬鼎科技股份有限公司
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Publication of TW201724930A publication Critical patent/TW201724930A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0715Shielding provided by an outer layer of PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10371Shields or metal cases

Description

電路板及其製作方法Circuit board and manufacturing method thereof

本發明涉及一種電路板及一種電路板製作方法。The invention relates to a circuit board and a method of manufacturing the same.

隨著電子通訊產品向著高頻、高速及薄型化方向發展,業內對信號傳輸損耗的控制要求越來越高。目前,通常採用在信號線上下兩側設置電磁遮罩層,藉由成排的導電通孔將上下兩側的電磁遮罩層電導通以此來實現遮罩可能的電磁干擾。然而,由於導電通孔之間存在間隙,與所述信號線同層的導線與所述信號線之間存在相互的電磁干擾,使得所述信號線傳輸的信號失真。另外,信號傳輸電磁場向外輻射,致使信號傳送速率變慢。With the development of electronic communication products toward high frequency, high speed and thinness, the industry has higher and higher control requirements for signal transmission loss. At present, an electromagnetic shielding layer is generally disposed on the lower side of the signal line, and the electromagnetic shielding layers on the upper and lower sides are electrically conducted by the rows of conductive through holes to achieve possible electromagnetic interference of the mask. However, due to the gap between the conductive vias, mutual electromagnetic interference exists between the wires in the same layer as the signal lines and the signal lines, so that the signal transmitted by the signal lines is distorted. In addition, the signal transmission electromagnetic field radiates outward, causing the signal transmission rate to be slow.

有鑑於此,有必要提供一種能夠解決上述技術問題的電路板及電路板製作方法。In view of the above, it is necessary to provide a circuit board and a circuit board manufacturing method capable of solving the above technical problems.

一種電路板,包括導電圖形、上側感光樹脂、上側導電材料、上側遮罩層、下側感光樹脂、下側導電材料及下側遮罩層。導電圖形位於電路板厚度方向的中部。所述導電圖形形成在所述上側感光樹脂的一側表面。所述導電圖形包括兩條接地線及位於兩條接地線之間的一條信號線。所述上側感光樹脂對應所述兩條接地線開設有兩條上側溝槽。所述上側導電材料填滿所述上側溝槽。所述上側遮罩層覆蓋所述上側感光樹脂。所述下側感光樹脂覆蓋所述導電圖形。所述下側感光樹脂對應所述兩條接地線開設有兩條下側溝槽。所述下側導電材料填滿所述下側溝槽。所述下側遮罩層覆蓋所述下側感光材料。所述上側遮罩層、上側導電材料、接地線、下側導電材料及下側遮罩層圍成閉合的遮罩套筒。所述信號線位於所述遮罩套筒的中心軸上。A circuit board comprising a conductive pattern, an upper side photosensitive resin, an upper side conductive material, an upper side mask layer, a lower side photosensitive resin, a lower side conductive material, and a lower side mask layer. The conductive pattern is located in the middle of the thickness direction of the board. The conductive pattern is formed on one side surface of the upper side photosensitive resin. The conductive pattern includes two ground lines and one signal line between the two ground lines. The upper photosensitive resin is provided with two upper trenches corresponding to the two ground lines. The upper side conductive material fills the upper side trench. The upper side mask layer covers the upper side photosensitive resin. The lower photosensitive resin covers the conductive pattern. The lower side photosensitive resin is provided with two lower side grooves corresponding to the two ground lines. The lower side conductive material fills the lower side trench. The lower side mask layer covers the lower side photosensitive material. The upper side mask layer, the upper side conductive material, the ground line, the lower side conductive material and the lower side mask layer enclose a closed mask sleeve. The signal line is located on a central axis of the mask sleeve.

一種電路板製作方法,包括步驟:將上側感光樹脂形成在一銅箔的一側表面上;在所述上側感光樹脂內開設兩條上側溝槽;將所述銅箔製作形成包括一條信號線及兩條接地線的導電圖形,所述信號線位於所述兩條接地線之間,所述兩條接地線分別與所述兩條上側溝槽對應;在所述導電圖形上壓合下側感光樹脂;在所述下側感光樹脂內開設分別與所述兩條上側溝槽對應的兩條下側溝槽;及分別在所述上側溝槽內填入上側導電材料,在所述下側溝槽內填入下側導電材料,在所述上側感光樹脂上形成上側遮罩層,及在下側感光樹脂上形成下側遮罩層,所述導電圖形位於所述電路板厚度方向的中部,所述上側遮罩層、上側導電材料、接地線、下側導電材料及下側遮罩層圍成閉合的遮罩套筒,所述信號線位於所述遮罩套筒的中心軸上。A circuit board manufacturing method comprising the steps of: forming an upper photosensitive resin on one surface of a copper foil; opening two upper trenches in the upper photosensitive resin; forming the copper foil to form a signal line and a conductive pattern of two ground lines, the signal line being located between the two ground lines, the two ground lines respectively corresponding to the two upper side grooves; pressing the lower side photosensitive on the conductive pattern a resin; a plurality of lower trenches respectively corresponding to the two upper trenches are formed in the lower photosensitive resin; and an upper conductive material is filled in the upper trench, respectively, in the lower trench Filling a lower side conductive material, forming an upper side mask layer on the upper side photosensitive resin, and forming a lower side mask layer on the lower side photosensitive resin, the conductive pattern being located at a middle portion in a thickness direction of the circuit board, the upper side The mask layer, the upper conductive material, the ground line, the lower conductive material, and the lower mask layer enclose a closed mask sleeve, the signal line being located on a central axis of the mask sleeve.

相較于先前技術,本發明提供的電路板及電路板製作方法,由於所述下側遮罩層、所述下側導電材料、所述接地線、所述上側導電材料及所述上側遮罩層圍成一個閉合的遮罩套筒,且所述信號線位於所述遮罩套筒內,可以導電圖形的其他導線與所述信號線之間的電磁干擾,以及將信號傳輸電磁場集中在遮罩套筒內,從而提高信號傳送速率。Compared with the prior art, the circuit board and the circuit board manufacturing method provided by the present invention are due to the lower side mask layer, the lower side conductive material, the ground line, the upper side conductive material and the upper side mask Forming a closed mask sleeve, and the signal line is located in the mask sleeve, electromagnetic interference between other wires of the conductive pattern and the signal line, and electromagnetic field of the signal transmission are concentrated Inside the cover sleeve to increase the signal transfer rate.

圖1為本發明具體實施方式提供的銅箔的剖面示意圖。1 is a schematic cross-sectional view of a copper foil provided by an embodiment of the present invention.

圖2是圖1的銅箔的一表面上形成上側感光樹脂後的剖面示意圖。Fig. 2 is a schematic cross-sectional view showing the upper side photosensitive resin formed on one surface of the copper foil of Fig. 1.

圖3是在圖2的上側感光樹脂內開設上側溝槽後的剖面示意圖。Fig. 3 is a schematic cross-sectional view showing the upper side groove formed in the upper photosensitive resin of Fig. 2;

圖4是將圖3的銅箔製作形成導電圖形的剖面示意圖。Fig. 4 is a schematic cross-sectional view showing the formation of a conductive pattern by forming the copper foil of Fig. 3.

圖5是在圖4的導電圖形上壓合下側感光樹脂後的剖面示意圖。Fig. 5 is a schematic cross-sectional view showing the lower side photosensitive resin laminated on the conductive pattern of Fig. 4.

圖6是在圖5的下側感光樹脂內開設下側溝槽後的剖面示意圖。Fig. 6 is a schematic cross-sectional view showing the lower side groove formed in the lower photosensitive resin of Fig. 5;

圖7是分別在圖6的上側溝槽填入上側導電材料,在下側溝槽填入下側導電材料,並分別在上側感光樹脂上形成上側遮罩層及在下側感光樹脂上形成下側遮罩層後的剖面示意圖。7 is a top side conductive material filled in the upper side trench of FIG. 6, and a lower side conductive material in the lower side trench, respectively, and an upper side mask layer is formed on the upper side photosensitive resin and a lower side mask layer is formed on the lower side photosensitive resin, respectively. Schematic diagram of the profile behind the layer.

圖8是分別在圖7的上側遮罩層上形成上側保護層及在下側遮罩層上形成下側保護層後的剖面示意圖。8 is a schematic cross-sectional view showing an upper protective layer formed on the upper mask layer of FIG. 7 and a lower protective layer formed on the lower mask layer, respectively.

下面結合具體實施方式對本發明提供的電路板及電路板製作方法作進一步說明。The circuit board and the circuit board manufacturing method provided by the present invention are further described below in conjunction with specific embodiments.

本發明具體實施方式提供的的電路板的製作方法包括以下步驟。A method of fabricating a circuit board provided by a specific embodiment of the present invention includes the following steps.

第一步,請參閱圖1,提供銅箔10。In the first step, referring to Figure 1, a copper foil 10 is provided.

本實施方式中,所述銅箔10呈片狀。所述銅箔10可藉由對卷狀銅箔原材料依據具體需求進行裁切而成。In the present embodiment, the copper foil 10 has a sheet shape. The copper foil 10 can be cut by cutting the raw material of the rolled copper foil according to specific needs.

第二步,請參閱圖2,將上側感光樹脂20形成在所述銅箔10的一表面上。In the second step, referring to FIG. 2, the upper side photosensitive resin 20 is formed on one surface of the copper foil 10.

第三步,請參閱圖3,在所述上側感光樹脂20內開設上側溝槽21。In the third step, referring to FIG. 3, the upper side trench 21 is opened in the upper side photosensitive resin 20.

本實施方式中,在所述上側感光樹脂20開設兩條上側溝槽21。本實施方式中,所述上側溝槽21均自所述上側感光樹脂20背離所述銅箔10的表面向所述上側感光樹脂20內開設。所述兩條上側溝槽21延伸方向一致(均垂直於圖面向裡),且相互平行。每條所述上側溝槽21均貫穿所述上側感光樹脂20。部分所述銅箔10從每條所述上側溝槽21露出。本實施方式中,所述上側溝槽21垂直於其延伸方向的截面呈倒梯形。所述上側溝槽21的槽寬自所述上側感光樹脂20背離所述銅箔10的表面向所述銅箔10逐漸減小。所述上側溝槽21可藉由曝光顯影形成。In the present embodiment, two upper grooves 21 are formed in the upper photosensitive resin 20. In the present embodiment, the upper side grooves 21 are opened from the surface of the upper side photosensitive resin 20 facing away from the copper foil 10 toward the upper side photosensitive resin 20. The two upper side grooves 21 extend in the same direction (all perpendicular to the inside of the figure) and are parallel to each other. Each of the upper side grooves 21 penetrates the upper side photosensitive resin 20. A part of the copper foil 10 is exposed from each of the upper side grooves 21. In this embodiment, the upper side groove 21 has an inverted trapezoidal cross section perpendicular to the extending direction thereof. The groove width of the upper side groove 21 gradually decreases from the surface of the upper side photosensitive resin 20 facing away from the copper foil 10 toward the copper foil 10. The upper side trench 21 can be formed by exposure development.

第四步,請參閱圖4,將所述銅箔10製作形成導電圖形30。In the fourth step, referring to FIG. 4, the copper foil 10 is formed to form a conductive pattern 30.

本實施方式中,所述導電圖形30包括一條信號線31、兩條接地線32及多條導線33。所述信號線31位於所述兩條接地線32之間。所述兩條接地線32將所述多條導線33與所述信號線31間隔。所述導電圖形30的間隙露出部分所述上側感光樹脂20。In the embodiment, the conductive pattern 30 includes one signal line 31, two ground lines 32, and a plurality of wires 33. The signal line 31 is located between the two ground lines 32. The two ground lines 32 space the plurality of wires 33 from the signal line 31. The gap of the conductive pattern 30 exposes a portion of the upper side photosensitive resin 20.

本實施方式中,所述信號線31及所述接地線32的延伸方向與所述上側溝槽21的延伸方向一致。每條所述接地線32均與一條所述上側溝槽21對應。本實施方式中,所述信號線31與所述接地線32相互平行。所述信號線31分別與每條所述接地線32間隔相同距離。In the present embodiment, the extending direction of the signal line 31 and the ground line 32 coincides with the extending direction of the upper trench 21 . Each of the ground lines 32 corresponds to one of the upper trenches 21. In the present embodiment, the signal line 31 and the ground line 32 are parallel to each other. The signal lines 31 are spaced apart from each of the ground lines 32 by the same distance.

本實施方式中,所述導電圖形30可藉由蝕刻形成。In this embodiment, the conductive pattern 30 can be formed by etching.

第五步,請參閱圖5,在所述導電圖形30上壓合下側感光樹脂40。In the fifth step, referring to FIG. 5, the lower side photosensitive resin 40 is pressed on the conductive pattern 30.

所述下側感光樹脂40包覆所述導電圖形30。所述下側感光樹脂40填滿所述導電圖形30的間隙,並與所述上側感光樹脂20粘結形成介電層41。所述導電圖形30位於所述介電層41厚度方向的中心線上。所述導電圖形30在其厚度方向關於所述介電層41厚度方向的中心線對稱。The lower side photosensitive resin 40 covers the conductive pattern 30. The lower side photosensitive resin 40 fills the gap of the conductive pattern 30, and is bonded to the upper side photosensitive resin 20 to form a dielectric layer 41. The conductive pattern 30 is located on a center line in the thickness direction of the dielectric layer 41. The conductive pattern 30 is symmetrical in its thickness direction with respect to a center line of the thickness direction of the dielectric layer 41.

第六步,請參閱圖6,在所述下側感光樹脂40內開設下側溝槽42。In the sixth step, referring to FIG. 6, the lower side trench 42 is opened in the lower side photosensitive resin 40.

本實施方式中,在所述下側感光樹脂40開設兩條下側溝槽42。所述下側溝槽42的開設方向與所述上側溝槽21的開設方向相反。本實施方式中,所述下側溝槽42自所述下側感光樹脂40背離所述導電圖形30的表面向所述下側感光樹脂40內開設。每條所述下側溝槽42均貫穿所述下側感光樹脂40。所述兩條下側溝槽42的延伸方向與所述兩條接地線32的延伸方向一致。每條所述下側溝槽42對應一條接地線32。每條所述接地線32從對應的下側溝槽42露出。每條所述下側溝槽42還對應一條所述上側溝槽21。每條所述下側溝槽42與其對應的上側溝槽21之間的偏位公差小於或等於75微米。本實施方式中,所述下側溝槽42垂直於其延伸方向的截面呈梯形。所述下側溝槽42的槽寬自所述下側感光樹脂40背離所述導電圖形30的表面向所述導電圖形30逐漸減小。所述下側溝槽42的槽寬減小方向與所述上側溝槽21的槽寬減小方向相反。所述下側溝槽42可藉由曝光顯影形成。In the present embodiment, two lower grooves 42 are formed in the lower photosensitive resin 40. The opening direction of the lower side groove 42 is opposite to the opening direction of the upper side groove 21. In the present embodiment, the lower side groove 42 is opened from the surface of the lower side photosensitive resin 40 facing away from the conductive pattern 30 toward the lower side photosensitive resin 40. Each of the lower side grooves 42 penetrates the lower side photosensitive resin 40. The extending direction of the two lower side trenches 42 coincides with the extending direction of the two grounding lines 32. Each of the lower side trenches 42 corresponds to a ground line 32. Each of the ground lines 32 is exposed from a corresponding lower side trench 42. Each of the lower side grooves 42 also corresponds to one of the upper side grooves 21. The offset tolerance between each of the lower side trenches 42 and its corresponding upper side trench 21 is less than or equal to 75 microns. In this embodiment, the cross section of the lower side trench 42 perpendicular to the extending direction thereof is trapezoidal. The groove width of the lower side groove 42 gradually decreases from the surface of the lower side photosensitive resin 40 away from the conductive pattern 30 toward the conductive pattern 30. The groove width decreasing direction of the lower side groove 42 is opposite to the groove width decreasing direction of the upper side groove 21. The lower side trench 42 can be formed by exposure development.

第七步,請參閱圖7,在所述上側溝槽21填入上側導電材料51及在所述下側溝槽42內填入下側導電材料52;並在所述上側感光樹脂20上形成上側遮罩層61,及在所述下側感光樹脂40上形成下側遮罩層62。In the seventh step, referring to FIG. 7, the upper side trench 21 is filled with the upper side conductive material 51 and the lower side trench 42 is filled with the lower side conductive material 52; and the upper side photosensitive resin 20 is formed on the upper side. The mask layer 61 and the lower mask layer 62 are formed on the lower side photosensitive resin 40.

所述上側導電材料51填滿所述上側溝槽21。所述上側遮罩層61覆蓋所述上側感光樹脂20。所述上側遮罩層61與所述上側導電材料51電導通。本實施方式中,所述上側導電材料51與所述上側遮罩層61同時形成。本實施方式中,所述上側導電材料51包括晶種層511及電鍍層512。所述晶種層511形成在所述上側溝槽21的表面。所述電鍍層512形成在所述晶種層511的表面,並填滿所述上側溝槽21。所述上側遮罩層61包括晶種層611及電鍍層612。所述晶種層611形成在所述上側感光樹脂20表面。所述電鍍層612形成在所述晶種層611的表面。本實施方式中,所述晶種層511,611同時形成且為一體結構。所述電鍍層512,612同時形成且為一體結構。The upper conductive material 51 fills the upper trench 21 . The upper side mask layer 61 covers the upper side photosensitive resin 20. The upper side mask layer 61 is electrically connected to the upper side conductive material 51. In the present embodiment, the upper conductive material 51 is formed simultaneously with the upper mask layer 61. In the embodiment, the upper conductive material 51 includes a seed layer 511 and a plating layer 512. The seed layer 511 is formed on the surface of the upper side trench 21. The plating layer 512 is formed on the surface of the seed layer 511 and fills the upper trench 21 . The upper mask layer 61 includes a seed layer 611 and a plating layer 612. The seed layer 611 is formed on the surface of the upper side photosensitive resin 20. The plating layer 612 is formed on the surface of the seed layer 611. In the present embodiment, the seed layers 511, 611 are simultaneously formed and have an integral structure. The plating layers 512, 612 are simultaneously formed and are of unitary construction.

所述下側導電材料52填滿所述下側溝槽42。所述下側遮罩層62覆蓋所述下側感光樹脂40。所述下側遮罩層62與所述下側導電材料52電導通。本實施方式中,所述下側導電材料52與所述下側遮罩層62同時形成。本實施方式中,所述下側導電材料52包括晶種層521及電鍍層522。所述晶種層521形成在所述下側溝槽42的表面。所述電鍍層522形成在所述晶種層521的表面並填滿所述下側溝槽42。所述下側遮罩層62包括晶種層621及電鍍層622。所述晶種層621形成在所述下側感光樹脂40的表面。所述電鍍層622形成在所述晶種層621的表面。本實施方式中,所述晶種層521,621同時形成且為一體結構。所述電鍍層522,622同時形成且為一體結構。The lower side conductive material 52 fills the lower side trenches 42. The lower side mask layer 62 covers the lower side photosensitive resin 40. The lower side mask layer 62 is electrically connected to the lower side conductive material 52. In the present embodiment, the lower conductive material 52 is formed simultaneously with the lower mask layer 62. In the embodiment, the lower conductive material 52 includes a seed layer 521 and a plating layer 522. The seed layer 521 is formed on the surface of the lower side trench 42. The plating layer 522 is formed on the surface of the seed layer 521 and fills the lower trench 42. The lower mask layer 62 includes a seed layer 621 and a plating layer 622. The seed layer 621 is formed on the surface of the lower side photosensitive resin 40. The plating layer 622 is formed on the surface of the seed layer 621. In the present embodiment, the seed layers 521, 621 are simultaneously formed and have an integral structure. The plating layers 522, 622 are simultaneously formed and are of unitary construction.

本實施方式中,所述上側遮罩層61及下側遮罩層62的厚度相同。In the present embodiment, the upper mask layer 61 and the lower mask layer 62 have the same thickness.

所述下側遮罩層62、所述下側導電材料52、所述接地線32、所述上側導電材料51及所述上側遮罩層61圍成一個閉合的遮罩套筒70。所述信號線31位於所述遮罩套筒70內,以避免所述導線33與所述信號線31之間的電磁干擾,同時將信號傳輸電磁場集中在遮罩套筒內,從而提高信號傳送速率。本實施方式中,所述信號線31位於所述遮罩套筒70的中心軸上,以進一步提升電磁遮罩效果及提高信號傳送速率。The lower mask layer 62, the lower side conductive material 52, the ground line 32, the upper side conductive material 51 and the upper side mask layer 61 enclose a closed mask sleeve 70. The signal line 31 is located in the mask sleeve 70 to avoid electromagnetic interference between the wire 33 and the signal line 31, and at the same time, the signal transmission electromagnetic field is concentrated in the mask sleeve, thereby improving signal transmission. rate. In this embodiment, the signal line 31 is located on the central axis of the mask sleeve 70 to further enhance the electromagnetic mask effect and increase the signal transmission rate.

本實施方式中,所述上側導電材料51,上側遮罩層61,下側導電材料52及下側遮罩層62可藉由如下方式形成。In the present embodiment, the upper conductive material 51, the upper mask layer 61, the lower conductive material 52, and the lower mask layer 62 can be formed as follows.

首先,在所述上側溝槽21表面形成晶種層511。在所述上側感光樹脂20表面形成晶種層611。在所述下側溝槽42表面形成晶種層521。在所述下側感光樹脂40表面形成晶種層621。所述晶種層511,611,521,及621可藉由化學鍍、蒸鍍、濺鍍等無電解電鍍方式形成。First, a seed layer 511 is formed on the surface of the upper trench 21. A seed layer 611 is formed on the surface of the upper side photosensitive resin 20. A seed layer 521 is formed on the surface of the lower trench 42. A seed layer 621 is formed on the surface of the lower side photosensitive resin 40. The seed layers 511, 611, 521, and 621 can be formed by electroless plating such as electroless plating, vapor deposition, sputtering, or the like.

接著,在所述晶種層511表面電鍍形成電鍍層512。所述電鍍層512填滿所述上側溝槽21。在所述晶種層611表面電鍍形成電鍍層612。在所述晶種層521表面電鍍形成電鍍層522。所述電鍍層522填滿所述下側溝槽42。在所述晶種層621表面電鍍形成電鍍層622。Next, a plating layer 512 is formed on the surface of the seed layer 511. The plating layer 512 fills the upper trench 21 . A plating layer 612 is formed on the surface of the seed layer 611 by electroplating. A plating layer 522 is formed on the surface of the seed layer 521 by electroplating. The plating layer 522 fills the lower side trenches 42. A plating layer 622 is formed on the surface of the seed layer 621 by electroplating.

其他實施方式中,所述上側導電材料51及上側遮罩層61,所述下側遮罩層62及下側遮罩層62可不同時形成。此時,首先,在所述上側溝槽21及下側溝槽42中分別填入導電材料51,52;接著,分別在上側感光樹脂20表面及上側溝槽21中的導電材料表面,下側感光樹脂40表面及下側溝槽42中的導電材料表面形成晶種層;最後,在所述晶種層表面形成電鍍層,以形成上側遮罩層61及下側遮罩層62In other embodiments, the upper conductive material 51 and the upper mask layer 61, the lower mask layer 62 and the lower mask layer 62 may be formed at different times. At this time, first, the conductive material 51, 52 is filled in the upper trench 21 and the lower trench 42, respectively; then, the surface of the conductive material in the upper photosensitive resin 20 and the upper trench 21, respectively, is sensitized on the lower side. A surface layer is formed on the surface of the resin 40 and the surface of the conductive material in the lower trench 42. Finally, a plating layer is formed on the surface of the seed layer to form an upper mask layer 61 and a lower mask layer 62.

第八步,請參閱圖8,在所述上側遮罩層61表面形成上側保護層81;及在所述下側遮罩層62表面形成下側保護層82。In the eighth step, referring to FIG. 8, an upper side protective layer 81 is formed on the surface of the upper side mask layer 61; and a lower side protective layer 82 is formed on the surface of the lower side mask layer 62.

所述上側保護層81覆蓋所述上側遮罩層61。所述下側遮罩層62覆蓋所述下側遮罩層62。本實施方式中,所述上側保護層81的厚度與所述下側保護層82的厚度相同。The upper side protective layer 81 covers the upper side mask layer 61. The lower side mask layer 62 covers the lower side mask layer 62. In the present embodiment, the thickness of the upper protective layer 81 is the same as the thickness of the lower protective layer 82.

可以理解的是,其他實施方式中,也可不形成所述上側保護層81及下側保護層82。It can be understood that in other embodiments, the upper protective layer 81 and the lower protective layer 82 may not be formed.

本發明具體實施方式還提供一種電路板100。所述電路板100可藉由上述電路板製作方法制得。A specific embodiment of the present invention also provides a circuit board 100. The circuit board 100 can be fabricated by the above-described circuit board manufacturing method.

請再次參閱圖8,所述電路板100包括導電圖形30、上側感光樹脂20、上側導電材料51、上側遮罩層61、上側保護層81、下側感光樹脂40、下側導電材料52、下側遮罩層62及下側保護層82。Referring to FIG. 8 again, the circuit board 100 includes a conductive pattern 30, an upper side photosensitive resin 20, an upper side conductive material 51, an upper side mask layer 61, an upper side protective layer 81, a lower side photosensitive resin 40, a lower side conductive material 52, and a lower layer. Side mask layer 62 and lower side protective layer 82.

所述導電圖形30位於所述電路板100厚度方向的中部。本實施方式中,所述導電圖形30包括一條信號線31、兩條接地線32及多條導線33。所述信號線31位於所述兩條接地線32之間。所述導線33相對所述信號線31位於所述兩條接地線32之外。本實施方式中,所述信號線31及所述接地線32的延伸方向一致(均垂直於圖面向裡)。所述信號線31與所述接地線32相互平行。所述信號線31分別與每條所述接地線32間隔相同距離。The conductive pattern 30 is located in the middle of the thickness direction of the circuit board 100. In the embodiment, the conductive pattern 30 includes one signal line 31, two ground lines 32, and a plurality of wires 33. The signal line 31 is located between the two ground lines 32. The wire 33 is located outside the two ground wires 32 with respect to the signal line 31. In the present embodiment, the signal lines 31 and the ground lines 32 extend in the same direction (both perpendicular to the inside of the figure). The signal line 31 and the ground line 32 are parallel to each other. The signal lines 31 are spaced apart from each of the ground lines 32 by the same distance.

所述上側感光樹脂20形成在所述下側感光樹脂40上。所述上側感光樹脂20覆蓋所述導電圖形30。所述上側感光樹脂20內開設有上側溝槽21。本實施方式中,所述上側感光樹脂20開設有兩條上側溝槽21。所述兩條上側溝槽21延伸方向與所述接地線32的延伸方向一致。每條所述上側溝槽21均對應一條所述接地線32。每條所述上側溝槽21均貫穿所述上側感光樹脂20,其對應的接地線32從所述上側溝槽21露出。本實施方式中,所述上側溝槽21垂直於其延伸方向的截面呈倒梯形。所述上側溝槽21的槽寬自所述上側感光樹脂20背離所述導電圖形30的表面向所述導電圖形30逐漸減小。The upper side photosensitive resin 20 is formed on the lower side photosensitive resin 40. The upper photosensitive resin 20 covers the conductive pattern 30. An upper side groove 21 is opened in the upper photosensitive resin 20. In the present embodiment, the upper photosensitive resin 20 is provided with two upper grooves 21 . The two upper trenches 21 extend in a direction that coincides with the extending direction of the ground line 32. Each of the upper trenches 21 corresponds to one of the ground lines 32. Each of the upper side grooves 21 penetrates the upper side photosensitive resin 20, and a corresponding ground line 32 thereof is exposed from the upper side groove 21. In this embodiment, the upper side groove 21 has an inverted trapezoidal cross section perpendicular to the extending direction thereof. The groove width of the upper side groove 21 gradually decreases from the surface of the upper side photosensitive resin 20 facing away from the conductive pattern 30 toward the conductive pattern 30.

所述上側導電材料51填滿所述上側溝槽21。本實施方式中,所述上側導電材料51包括晶種層511及電鍍層512。所述晶種層511形成在所述上側溝槽21的表面。所述電鍍層512形成在所述晶種層511的表面,並填滿所述上側溝槽21。The upper conductive material 51 fills the upper trench 21 . In the embodiment, the upper conductive material 51 includes a seed layer 511 and a plating layer 512. The seed layer 511 is formed on the surface of the upper side trench 21. The plating layer 512 is formed on the surface of the seed layer 511 and fills the upper trench 21 .

所述上側遮罩層61覆蓋所述上側感光樹脂20,並與所述上側導電材料51電連接。所述上側遮罩層61包括晶種層611及電鍍層612。所述晶種層611形成在所述上側感光樹脂20表面。所述電鍍層612形成在所述晶種層611的表面。本實施方式中,所述晶種層611,511為一體結構。所述電鍍層612,512為一體結構。The upper side mask layer 61 covers the upper side photosensitive resin 20 and is electrically connected to the upper side conductive material 51. The upper mask layer 61 includes a seed layer 611 and a plating layer 612. The seed layer 611 is formed on the surface of the upper side photosensitive resin 20. The plating layer 612 is formed on the surface of the seed layer 611. In the present embodiment, the seed layers 611 and 511 have an integral structure. The plating layers 612, 512 are of unitary construction.

所述上側保護層81覆蓋所述上側遮罩層61。The upper side protective layer 81 covers the upper side mask layer 61.

所述下側感光樹脂40覆蓋所述導電圖形30,填滿所述導電圖形30的間隙,並與所述上側感光樹脂20粘結形成介電層41。所述導電圖形30位於所述介電層41厚度方向的中心線上。所述導電圖形30在其厚度方向關於所述介電層41厚度方向的中心線對稱。所述下側感光樹脂40對應所述接地線32開設有下側溝槽42。本實施方式中,所述下側感光樹脂40開設有兩條下側溝槽42。每條所述下側溝槽42均貫穿所述下側感光樹脂40。所述兩條下側溝槽42的延伸方向與所述兩條接地線32的延伸方向一致。每條所述下側溝槽42對應一條接地線32。每條所述下側溝槽42露出其對應的接地線32。每條所述下側溝槽42還對應一條所述上側溝槽21。每條所述下側溝槽42與其對應的上側溝槽21之間的偏位公差小於或等於75微米。本實施方式中,所述下側溝槽42垂直於其延伸方向的截面呈梯形。所述下側溝槽42的槽寬自所述下側感光樹脂40背離所述導電圖形30的表面向所述導電圖形30逐漸減小。所述下側溝槽42的槽寬減小方向與所述上側溝槽21的槽寬減小方向相反。The lower side photosensitive resin 40 covers the conductive pattern 30, fills a gap of the conductive pattern 30, and is bonded to the upper side photosensitive resin 20 to form a dielectric layer 41. The conductive pattern 30 is located on a center line in the thickness direction of the dielectric layer 41. The conductive pattern 30 is symmetrical in its thickness direction with respect to a center line of the thickness direction of the dielectric layer 41. The lower side photosensitive resin 40 is provided with a lower side groove 42 corresponding to the ground line 32. In the present embodiment, the lower side photosensitive resin 40 is provided with two lower side grooves 42. Each of the lower side grooves 42 penetrates the lower side photosensitive resin 40. The extending direction of the two lower side trenches 42 coincides with the extending direction of the two grounding lines 32. Each of the lower side trenches 42 corresponds to a ground line 32. Each of the lower side trenches 42 exposes its corresponding ground line 32. Each of the lower side grooves 42 also corresponds to one of the upper side grooves 21. The offset tolerance between each of the lower side trenches 42 and its corresponding upper side trench 21 is less than or equal to 75 microns. In this embodiment, the cross section of the lower side trench 42 perpendicular to the extending direction thereof is trapezoidal. The groove width of the lower side groove 42 gradually decreases from the surface of the lower side photosensitive resin 40 away from the conductive pattern 30 toward the conductive pattern 30. The groove width decreasing direction of the lower side groove 42 is opposite to the groove width decreasing direction of the upper side groove 21.

所述下側導電材料52填滿所述下側溝槽42。本實施方式中,所述下側導電材料52包括晶種層521及電鍍層522。所述晶種層521形成在所述下側溝槽42的表面。所述電鍍層522形成在所述晶種層521的表面並填滿所述下側溝槽42。The lower side conductive material 52 fills the lower side trenches 42. In the embodiment, the lower conductive material 52 includes a seed layer 521 and a plating layer 522. The seed layer 521 is formed on the surface of the lower side trench 42. The plating layer 522 is formed on the surface of the seed layer 521 and fills the lower trench 42.

所述下側遮罩層62覆蓋所述下側感光樹脂40,並與所述下側導電材料52電導通。本實施方式中,所述下側遮罩層62包括晶種層621及電鍍層622。所述晶種層621形成在所述下側感光樹脂40的表面。所述電鍍層622形成在所述晶種層621的表面。本實施方式中,所述晶種層521,621為一體結構。所述電鍍層522,622為一體結構。所述下側遮罩層62的厚度與所述上側遮罩層61的厚度相同。The lower side mask layer 62 covers the lower side photosensitive resin 40 and is electrically connected to the lower side conductive material 52. In the embodiment, the lower mask layer 62 includes a seed layer 621 and a plating layer 622. The seed layer 621 is formed on the surface of the lower side photosensitive resin 40. The plating layer 622 is formed on the surface of the seed layer 621. In the present embodiment, the seed layers 521 and 621 have an integral structure. The plating layers 522, 622 are of unitary construction. The thickness of the lower mask layer 62 is the same as the thickness of the upper mask layer 61.

所述下側保護層82覆蓋所述下側遮罩層62。所述下側保護層82的厚度與所述上側保護層81的厚度相同。The lower side protective layer 82 covers the lower side mask layer 62. The thickness of the lower side protective layer 82 is the same as the thickness of the upper side protective layer 81.

所述下側遮罩層62、所述下側導電材料52、所述接地線32、所述上側導電材料51及所述上側遮罩層61圍成一個閉合的遮罩套筒70。所述信號線31位於所述遮罩套筒70內,以避免所述導線33與所述信號線31之間的電磁干擾,同時將信號傳輸電磁場集中在遮罩套筒內,從而提高信號傳送速率。本實施方式中,所述信號線31位於所述遮罩套筒70的中心軸上,以進一步提升電磁遮罩效果及提高信號傳送速率。The lower mask layer 62, the lower side conductive material 52, the ground line 32, the upper side conductive material 51 and the upper side mask layer 61 enclose a closed mask sleeve 70. The signal line 31 is located in the mask sleeve 70 to avoid electromagnetic interference between the wire 33 and the signal line 31, and at the same time, the signal transmission electromagnetic field is concentrated in the mask sleeve, thereby improving signal transmission. rate. In this embodiment, the signal line 31 is located on the central axis of the mask sleeve 70 to further enhance the electromagnetic mask effect and increase the signal transmission rate.

可以理解的是,其他實施方式中,所述電路板100也可不包括上側保護層81及下側保護層82。It can be understood that, in other embodiments, the circuit board 100 may not include the upper protective layer 81 and the lower protective layer 82.

相較于先前技術,本發明提供的電路板及電路板製作方法,由於所述下側遮罩層、所述下側導電材料、所述接地線、所述上側導電材料及所述上側遮罩層圍成一個閉合的遮罩套筒,且所述信號線位於所述遮罩套筒內,可以導電圖形的其他導線與所述信號線之間的電磁干擾,以及將信號傳輸電磁場集中在遮罩套筒內,從而提高信號傳送速率。Compared with the prior art, the circuit board and the circuit board manufacturing method provided by the present invention are due to the lower side mask layer, the lower side conductive material, the ground line, the upper side conductive material and the upper side mask Forming a closed mask sleeve, and the signal line is located in the mask sleeve, electromagnetic interference between other wires of the conductive pattern and the signal line, and electromagnetic field of the signal transmission are concentrated Inside the cover sleeve to increase the signal transfer rate.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式及所列之數據為作試驗及參考之所用,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only for the preferred embodiment of the present invention and the data listed therein are used for testing and reference, and the scope of patent application in this case cannot be limited thereby. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

電路板:100Board: 100

銅箔:10Copper foil: 10

上側感光樹脂:20Upper side photosensitive resin: 20

上側溝槽:21Upper side groove: 21

導電圖形:30Conductive graphic: 30

信號線:31Signal line: 31

接地線:32Ground wire: 32

導線:33Wire: 33

下側感光樹脂:40Lower side photosensitive resin: 40

介電層:41Dielectric layer: 41

下側溝槽:42Lower groove: 42

上側導電材料:51Upper conductive material: 51

下側導電材料:52Lower conductive material: 52

上側遮罩層:61Upper mask layer: 61

下側遮罩層:62Lower mask layer: 62

晶種層:511、521、611、621Seed layer: 511, 521, 611, 621

電鍍層:512、522、612、622Plating layer: 512, 522, 612, 622

遮罩套筒:70Mask sleeve: 70

上側保護層:81Upper protective layer: 81

下側保護層:82Lower protective layer: 82

no

電路板:100Board: 100

上側感光樹脂:20Upper side photosensitive resin: 20

上側溝槽:21Upper side groove: 21

導電圖形:30Conductive graphic: 30

信號線:31Signal line: 31

接地線:32Ground wire: 32

導線:33Wire: 33

下側感光樹脂:40Lower side photosensitive resin: 40

介電層:41Dielectric layer: 41

下側溝槽:42Lower groove: 42

上側導電材料:51Upper conductive material: 51

下側導電材料:52Lower conductive material: 52

上側遮罩層:61Upper mask layer: 61

下側遮罩層:62Lower mask layer: 62

晶種層:511、521、611、621Seed layer: 511, 521, 611, 621

電鍍層:512、522、612、622Plating layer: 512, 522, 612, 622

遮罩套筒:70Mask sleeve: 70

上側保護層:81Upper protective layer: 81

下側保護層:82Lower protective layer: 82

Claims (9)

一種電路板製作方法,包括步驟:
將上側感光樹脂形成在一銅箔的一側表面上;
在所述上側感光樹脂內開設兩條上側溝槽;
將所述銅箔製作形成包括一條信號線及兩條接地線的導電圖形,所述信號線位於所述兩條接地線之間,所述兩條接地線分別與所述兩條上側溝槽對應;
在所述導電圖形背離所述上側感光樹脂側壓合下側感光樹脂;
在所述下側感光樹脂內開設分別與所述兩條上側溝槽對應的兩條下側溝槽;及
分別在所述上側溝槽內填入上側導電材料,在所述下側溝槽內填入下側導電材料,在所述上側感光樹脂上形成上側遮罩層,及在下側感光樹脂上形成下側遮罩層,以形成所述電路板;
其中,所述導電圖形位於所述電路板厚度方向的中部,所述上側遮罩層、上側導電材料、接地線、下側導電材料及下側遮罩層圍成閉合的遮罩套筒,所述信號線位於所述遮罩套筒的中心軸上。
A circuit board manufacturing method includes the steps of:
Forming the upper photosensitive resin on one side surface of a copper foil;
Opening two upper trenches in the upper photosensitive resin;
Forming the copper foil into a conductive pattern including a signal line and two ground lines, wherein the signal line is located between the two ground lines, and the two ground lines respectively correspond to the two upper side trenches ;
Pressing the lower side photosensitive resin on the side of the conductive pattern facing away from the upper side photosensitive resin;
Two lower trenches respectively corresponding to the two upper trenches are formed in the lower photosensitive resin; and an upper conductive material is filled in the upper trench, respectively, and the lower trench is filled in the lower trench a lower side conductive material, an upper side mask layer is formed on the upper side photosensitive resin, and a lower side mask layer is formed on the lower side photosensitive resin to form the circuit board;
Wherein the conductive pattern is located in a middle portion of the thickness direction of the circuit board, and the upper side mask layer, the upper side conductive material, the ground line, the lower side conductive material and the lower side mask layer enclose a closed mask sleeve. The signal line is located on the central axis of the mask sleeve.
如請求項1所述的電路板製作方法,其中,所述電路板製作方法還包括在所述上側遮罩層表面形成上側保護層及在所述下側遮罩層表面形成下側保護層的步驟。The method of fabricating a circuit board according to claim 1, wherein the method for fabricating the circuit board further comprises: forming an upper side protective layer on a surface of the upper side mask layer and a lower side protective layer on a surface of the lower side mask layer; step. 如請求項1所述的電路板製作方法,其中,分別在所述上側溝槽內填入上側導電材料,在所述下側溝槽內填入下側導電材料,在所述上側感光樹脂上形成上側遮罩層,及在下側感光樹脂上形成下側遮罩層的步驟包括:
在所述上側溝槽表面、上側感光樹脂表面、下側溝槽表面及下側感光樹脂表面形成晶種層;
在所述上側溝槽表面、上側感光樹脂表面、下側溝槽表面及下側感光樹脂表面的晶種層上電鍍形成電鍍層,所述電鍍層分別填滿所述上側溝槽及所述下側溝槽,並延伸覆蓋所述上側感光樹脂表面及所述下側感光樹脂表面的晶種層。
The method of fabricating a circuit board according to claim 1, wherein an upper conductive material is filled in the upper trench, a lower conductive material is filled in the lower trench, and a photoresist is formed on the upper photosensitive resin. The upper side mask layer and the lower side mask layer on the lower side photosensitive resin include:
Forming a seed layer on the upper trench surface, the upper photosensitive resin surface, the lower trench surface, and the lower photosensitive resin surface;
Forming a plating layer on the seed layer of the upper trench surface, the upper photosensitive resin surface, the lower trench surface, and the lower photosensitive resin surface, the plating layer filling the upper trench and the lower trench respectively a groove and extending a seed layer covering the upper photosensitive resin surface and the lower photosensitive resin surface.
如請求項1所述的電路板製作方法,其中,所述上側溝槽與所述下側溝槽的開設方向相反。The method of fabricating a circuit board according to claim 1, wherein the upper side trench is opposite to the opening direction of the lower side trench. 一種電路板,包括導電圖形、上側感光樹脂、上側導電材料、上側遮罩層、下側感光樹脂、下側導電材料及下側遮罩層,所述導電圖形位於所述電路板厚度方向的中部,所述導電圖形形成在所述上側感光樹脂的一側表面,所述導電圖形包括兩條接地線及位於兩條接地線之間的一條信號線,所述上側感光樹脂對應所述兩條接地線開設有兩條上側溝槽,所述上側導電材料填滿所述上側溝槽,所述上側遮罩層覆蓋所述上側感光樹脂,所述下側感光樹脂覆蓋所述導電圖形,所述下側感光樹脂對應所述兩條接地線開設有兩條下側溝槽,所述下側導電材料填滿所述下側溝槽,所述下側遮罩層覆蓋所述下側感光材料,所述上側遮罩層、上側導電材料、接地線、下側導電材料及下側遮罩層圍成閉合的遮罩套筒,所述信號線位於所述遮罩套筒的中心軸上。A circuit board comprising a conductive pattern, an upper side photosensitive resin, an upper side conductive material, an upper side mask layer, a lower side photosensitive resin, a lower side conductive material and a lower side mask layer, wherein the conductive pattern is located in the middle of the thickness direction of the circuit board The conductive pattern is formed on one side surface of the upper photosensitive resin, the conductive pattern includes two ground lines and one signal line between the two ground lines, and the upper side photosensitive resin corresponds to the two grounds The line is provided with two upper side trenches, the upper side conductive material fills the upper side trench, the upper side mask layer covers the upper side photosensitive resin, and the lower side photosensitive resin covers the conductive pattern, the lower side The side photosensitive resin is provided with two lower side grooves corresponding to the two ground lines, the lower side conductive material fills the lower side groove, and the lower side mask layer covers the lower side photosensitive material, the upper side The mask layer, the upper conductive material, the ground line, the lower conductive material, and the lower mask layer enclose a closed mask sleeve, the signal line being located on a central axis of the mask sleeve. 如請求項5所述的電路板,其中,所述電路板還包括上側保護層及下側保護層,所述上側保護層覆蓋所述上側遮罩層,所述下側保護層覆蓋所述下側遮罩層。The circuit board of claim 5, wherein the circuit board further comprises an upper side protective layer and a lower side protective layer, the upper side protective layer covering the upper side mask layer, and the lower side protective layer covering the lower layer Side mask layer. 如請求項5所述的電路板,其中,每條所述下側溝槽對應一條所述上側溝槽,所述下側溝槽與其對應的上側溝槽之間的偏位公差小於75微米。The circuit board of claim 5, wherein each of the lower side trenches corresponds to one of the upper side trenches, and a offset tolerance between the lower side trenches and its corresponding upper side trenches is less than 75 micrometers. 如請求項5所述的電路板,其中,所述上側溝槽的槽寬自所述上側感光樹脂背離所述導電圖形的表面向所述導電圖形逐漸減小,所述下側溝槽的槽寬自所述下側感光樹脂背離所述導電圖形的表面向所述導電圖形逐漸減小。The circuit board of claim 5, wherein a groove width of the upper side groove gradually decreases from the surface of the upper side photosensitive resin facing away from the conductive pattern toward the conductive pattern, and a groove width of the lower side groove The conductive pattern gradually decreases from a surface of the lower photosensitive resin facing away from the conductive pattern. 如請求項5所述的電路板,其中,所述導電圖形還包括多條導線,所述兩條接地線將所述多條導線與所述信號線間隔。
The circuit board of claim 5, wherein the conductive pattern further comprises a plurality of wires, the two ground wires spacing the plurality of wires from the signal line.
TW104141407A 2015-12-02 2015-12-10 Printed circuit board and method for manufacturing same TWI597003B (en)

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