TWI576021B - Printed wiring board and manufacturing method thereof - Google Patents

Description

Printed wiring board and method of manufacturing same

The present invention relates to a printed wiring board and a method of manufacturing the same.

Patent Document 1 discloses that a copper pattern of various shapes is formed in a dummy region around a package region (product region). That is, as shown in FIG. 7, a dummy wiring formed by the wiring 91 parallel to the product region 90 and the wiring 92 perpendicular to the product region 90 is formed.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2007-19496

However, even if the dummy wiring 91 is formed on one surface of the resin insulating layer, when the resin insulating layer is cut, an impact is applied to the entire thickness of the resin insulating layer. Therefore, there is a possibility that the crack is formed not only from the surface but also from the intermediate portion of the thickness of the resin insulating layer, and the crack extends in the horizontal direction and the vertical direction. Therefore, even if a dummy wiring layer is formed on the surface, cracks may reach the product region, and the product may be defective.

The multi-piece printed wiring board of the present invention has a product region including a plurality of printed wiring boards, and a dummy region formed around one or more of the product regions. Moreover, the multi-piece printed wiring board of the present invention has a resin insulating layer which is resin insulated The layer has a first surface and a second surface opposite to the first surface. Further, each of the printed wiring boards in the product region has a first conductor layer embedded in the first surface side of the resin insulating layer so as to be exposed on only one side, and a conductor post and the first conductor layer Connecting and penetrating through the resin insulating layer, the end portion is exposed on the second surface side; the dummy region has a dummy pattern formed on the first surface of the resin insulating layer, and a dummy terminal penetrating the resin insulating layer And connecting the dummy patterns so that the end portions are exposed to the second surface side independently of each other; and the thickness of the dummy terminal is smaller than the thickness of the conductor post.

The multi-piece printed wiring board manufacturing method of the present invention is a multi-piece printed wiring board having a product area including a plurality of printed wiring boards And a dummy area formed around one or more of the above-mentioned product areas. A method of manufacturing a multi-piece printed wiring board according to the present invention includes the steps of: preparing a metal film; forming a wiring pattern of the first conductor layer for a plurality of multi-chip printed wiring boards on the metal film; a dummy pattern; a conductor post and a dummy post are formed on each of the pattern of the first conductor layer and the dummy pattern; and the exposed surface of the first conductor layer, the conductor post and the dummy post are covered Forming a resin insulating layer on the side surface; and polishing the second surface side of the resin insulating layer to expose the end portions of the conductor post and the dummy post; and removing the support plate and the metal first The step of the film and the step of cutting and separating into a multi-piece printed wiring board including one or two or more product regions. Moreover, the dummy region has a dummy terminal which is thinner than the above-mentioned conductor terminal.

1‧‧‧Printed wiring board

1a, 1b, 1c‧‧‧ Printed wiring board

10‧‧‧Dummy area

10a‧‧‧ edge

11‧‧‧Dummy design

11b‧‧‧ individual patterns

11c‧‧‧Link pattern

11d‧‧‧ overall pattern

12‧‧‧Digital binding posts

12b‧‧‧End of the dummy terminal

20‧‧‧Product area

21‧‧‧1st conductor layer

21a‧‧‧1st pattern

21b‧‧‧2nd pattern

21c‧‧‧ connection pad

21d‧‧‧ wiring pattern

25‧‧‧Conductor binding posts

25a‧‧‧End of conductor post

27‧‧‧Material layer

28‧‧‧Surface protection film

30‧‧‧Resin insulation

80‧‧‧Support board

80a‧‧‧Dummy substrate

80b‧‧‧ carrier copper foil

81‧‧‧Metal film

90‧‧‧Product area

91‧‧‧Wiring

92‧‧‧Wiring

100‧‧‧Multi-chip printed wiring board

200‧‧‧ panel

The first side of SF1‧‧‧ resin insulation

The second side of SF2‧‧‧ resin insulation

SF3‧‧‧ exposed face

Fig. 1A is a plan explanatory view showing a panel of a multi-piece printed wiring board according to an embodiment of the present invention.

Fig. 1B is a cross-sectional explanatory view of 1B-1B in the manufacturing steps of the multi-piece printed wiring board of Fig. 1A.

Fig. 1C is a cross-sectional explanatory view showing a step of cutting from the panel of Fig. 1A to the multi-piece printed wiring board.

Fig. 1D is a cross-sectional explanatory view showing a step of cutting from the panel of Fig. 1A to the multi-piece printed wiring board.

Fig. 1E is an explanatory view showing an example of a conductor terminal and a dummy terminal of the multi-chip printed wiring board shown in Fig. 1A.

Fig. 2A is an enlarged explanatory view showing an example of a dummy pattern shown in Fig. 1A.

Fig. 2B is an enlarged explanatory view showing an example of an end face of a dummy terminal connected to the dummy pattern shown in Fig. 1A.

Fig. 2C is an explanatory view showing another example of a dummy pattern formed on the multi-piece printed wiring board of the embodiment.

2D is an explanatory view showing an example of a dummy terminal connected to the dummy pattern shown in FIG. 2C.

Fig. 2E is an explanatory view showing still another example of a dummy pattern formed on the multi-piece printed wiring board of the embodiment.

2F is an explanatory view showing an example of a dummy terminal connected to the dummy pattern shown in FIG. 2E.

Fig. 3A is an explanatory view showing an example of a pattern of the second surface of each of the printed wiring boards shown in Fig. 1A.

Fig. 3B is an explanatory view showing an example of a pattern of the first surface of each of the printed wiring boards shown in Fig. 1A.

Fig. 4A is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4B is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

4C is a diagram showing the steps of an example of a method of manufacturing the printed wiring board shown in FIG. 1A. Ming map.

Fig. 4D is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4E is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4F is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4G is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 5A is a cross-sectional view showing a first conductor layer and a conductor post on which a surface protective film is formed.

Fig. 5B is a cross-sectional view showing a portion where the end of the conductor post is coated with solder.

Figure 6 is a cross-sectional view showing a panel of a multi-piece printed wiring board according to another embodiment of the present invention.

Fig. 7 is a view showing an example in which a dummy pattern is formed in the dummy region.

Next, a multi-piece printed wiring board according to an embodiment of the present invention will be described with reference to the drawings. Fig. 1A is a plan explanatory view showing a panel having a plurality of multi-piece printed wiring boards, which is obtained by cutting and separating the cutting lines DD to obtain a plurality of strip-shaped printed wirings of one embodiment of a plurality of short strips. Board 100. 1B is a cross-sectional explanatory view of a step in the middle of manufacture. In addition, in FIG. 1B, an example of a printed wiring board having the same circuit pattern on both sides of the support board 80 of the multi-chip printed wiring board is described, but the example is not limited thereto. A wiring board having a different circuit pattern is formed on both sides of the support board 80, and a wiring board may be formed only on one side. 1B is an explanatory view in the middle of the manufacturing process of the section 1B-1B of FIG. 1A, and shows a state before the step of removing the support plate 80 and the metal film 81 as follows. Therefore, the multi-piece printed wiring board 100 is formed on both surfaces of the support board 80 via the metal film 81, and the first surface SF1 side of the multi-chip printed wiring board 100 is located in the middle. The side of the heart, that is, the side of the support plate 80.

As shown in FIG. 1A, the multi-piece printed wiring board 100 of the present embodiment is formed with a product region 20 including a plurality of printed wiring boards 1a, 1b, 1c, ..., and one or more product regions. A composite wiring board having a medium-sized area of a dummy region (strip region) 10 is formed around the periphery of 20, and has a resin insulating layer 30 having a first surface SF1 and a reverse side of the first surface as shown in FIG. 1B. The surface is the second surface SF2. In the product region 20, the first conductor layer 21 is formed so as to be exposed on the first surface SF1 side of the resin insulating layer 30, and the resin insulating layer 30 is penetrated and the end portion thereof is exposed on the second surface SF2. A conductor stud 25 connected to the first conductor layer 21 is formed on the side (see FIG. 4G). Further, in the dummy region 10, on the first surface SF1 side of the resin insulating layer 30, the dummy pattern 11 is formed so as to surround the product region 20, and the dummy terminal 12 is formed to be connected to the dummy pattern 11 to penetrate the resin insulating layer 30. The end portions are formed to be exposed to the second surface SF2 side independently of each other. Moreover, as shown in FIG. 1E, the dummy posts 12 are formed to be thinner than the conductor posts 25. FIG. 1E is an example in which the dummy terminals 12 are arranged in a dot pattern. Further, in FIG. 1A, the dummy pattern 11 is largely drawn for easy understanding, and the actual dummy pattern 11 is formed in a thin pattern of the same degree as the dummy terminal 12 illustrated in FIG. 1E.

Here, the product region refers to a region in which a plurality of printed wiring boards that are products are arranged, and the dummy region refers to one or two or more products in which a printed wiring board that is a product is not formed. The area around the area, also known as the strip-like area, forms part of the dummy pattern. Moreover, the thickness of the terminal of the conductor stud 25 or the dummy post 12 refers to the shape of the outer shape of the terminal. When the cross section of the terminal is circular, it refers to the diameter thereof, and the cross section is rectangular or In the case of a polygon, it refers to the largest dimension of its diagonal. When the profile is elliptical, it refers to the size of its long diameter.

In other words, in a printed wiring board used for a package of a semiconductor device or the like, each of them is about 1 cm square, and a plurality of printed wiring boards are collectively formed into a large-sized panel in a manufacturing stage, and a medium-sized size is used from the panel. Multi-chip printed wiring board formed into a short strip After the semiconductor element or the like, it is singulated into individual printed wiring boards. In the case where the multi-piece printed wiring board is cut into a short strip shape from the panel, it is cut by a router or a mold, but at the time of the cutting, there is a crack in the resin insulating layer, and a plurality of printing cloths are present. The board is also a bad situation.

An object of an embodiment of the present invention is to prevent cracks from being formed when a large-sized panel of a plurality of printed wiring boards is cut into a short-sized multi-piece printed wiring board of a medium-sized size. The cracks extend in the area of the product, making the product bad.

Further, another object is particularly that the resin insulating layer of the printed wiring board is formed of a resin which does not contain a core material such as glass fiber, and a wiring pattern is formed only on one surface of the resin insulating layer, and not on the other side. When the wiring pattern is formed, the defects accompanying the crack at the time of cutting are prevented. Still another object is to provide a structure in which the height of each of the terminals is substantially uniformly formed when a dummy terminal provided to prevent crack propagation in the dummy region is formed by a plating film together with a conductor post of the product region. A multi-piece printed wiring board that can be manufactured more easily and a method of manufacturing the same.

For example, as shown in FIG. 2A, the dummy pattern 11 is formed in a dot pattern independently of the first surface SF1 of the dummy region 10 of the resin insulating layer 30 (see FIG. 1B) without being connected by wiring or the like. However, the present invention is not limited thereto, and the dummy patterns 11 may be connected as described below. FIG. 2A shows a dummy pattern 11 having a hexagonal planar shape. However, the shape of the dummy pattern is not limited thereto, and may be a triangle, a rectangle or a diamond, or may be a polygon or the like. The cross shape can also be round or oval. Further, in Fig. 2A, an example in which all of the dummy patterns 11 are arranged in an intricate shape is shown. That is, as shown in FIG. 2A, it is preferable that the dummy patterns are arranged in a so-called zigzag shape in which the rows of the adjacent two patterns are shifted by 1/2 pitch, and the patterns are arranged so as to sink each other. The reason for this is that the straight line passing through the gap portion of the dummy pattern 11 does not contact any of the dummy patterns 11 or extends through the dummy region 10 in the product region. As a result, it is considered that the multi-chip printing is cut into a short strip shape of a medium size from a large-sized panel. In the case of the wiring board 100, even if cracks occur due to the cut portion, the crack formed on the edge 10a (see FIG. 1A) can be prevented from extending along the linear direction on the first surface SF1 and formed by the dummy region 10 The possibility of product area 20 (see Figure 1A). However, as described below, the dummy pattern 11 is not limited to such a configuration. For example, the dummy pattern 11 may be an irregular configuration or a matrix-like configuration.

In the case where the crack formed on the multi-piece printed wiring board 100 of the short-line medium-sized size is formed on the first surface SF1 side of the resin insulating layer 30, the crack is particularly large. Therefore, by providing such a dummy pattern 11, it is easy to prevent the crack from entering the product region 20 side by the dummy pattern, which is preferable. However, the crack formed on the intermediate portion or the second surface SF2 side in the thickness direction of the resin insulating layer 30 may not completely prevent the crack from entering the product region 20 . Therefore, in the present embodiment, the dummy pattern 11 is formed not only on the first surface SF1 of the resin insulating layer 30, but also the dummy terminal 12 formed to be connected to the dummy pattern 11 is formed to penetrate the resin insulating layer 30. It is considered that the dummy stud 12 is formed to penetrate the resin insulating layer 30, and even if a crack is formed in a part of the thickness direction of the resin insulating layer, it is easy to prevent the intrusion of cracks. Therefore, the effect of preventing the crack from entering the product region 20 side can be further enhanced.

According to this point of view, it is considered that the dummy terminal 12 of the resin insulating layer 30 penetrating the dummy region 10 is formed as much as possible in the same diameter (width) as the diameter (width) of the dummy pattern, whereby the multi-chip printed wiring board 100 is used. The mechanical strength is increased and the intrusion of cracks is prevented. On the other hand, conductor posts 25 are also formed in the product area, which may be formed by electroplating at the same time. If the number of dummy terminals 12 is increased, and the total cross-sectional area of all the dummy posts 12 becomes too large, the current density at the time of plating is lowered as compared with the portion of the conductor posts 25. It is considered that since the formation speed of the plating film becomes slow as the current density becomes low, the height of the dummy terminal 12 and the height of the conductor post 25 are uneven. Therefore, it is preferable that the ratio of the ratio of the cross-sectional area of the dummy terminal 12 to the area of the dummy region 10 (residual copper ratio) to the area of all the cross-sectional areas of all the conductor posts 25 with respect to the area of the product region 20 (residual The copper ratio is roughly equal. That is, the "residual copper ratio" is the ratio of the total area of the cross-sectional area of the guide post or the dummy post to the overall area of the part, and also the case where the material of the conductor post or the dummy post is not copper. .

Since both ends of the dummy terminal and the conductor post must be exposed on the second surface SF2 side of the resin insulating layer 30, if the height of the terminal is excessively different due to uneven plating thickness, it is necessary to be short with the terminal. The height of the connector is used to grind the conductor posts of the higher height of the terminal. In this case, the grinding step for uniformly aligning the end faces of all the conductor posts 25 and the dummy posts 12 with the second face SF2 of the resin insulating layer 30 is longer as the difference between the heights is greater. Thus, there is a possibility that the possibility of damage to the product during the grinding step is also increased. Therefore, the thickness of the plating, that is, the height of the conductor posts 25 and the dummy posts 12 must be fixed as much as possible. Therefore, it is preferable that the difference between the residual copper ratio on the second surface SF2 side of the product region 20 and the residual copper ratio on the second surface SF2 side of the dummy region 10 is 10% or less, and it is preferable to determine the dummy wiring based on the viewpoint. The thickness of the column 12. As described above, in order to prevent the linear expansion of the cracks, it is preferable that a plurality of arrangement patterns in which the dummy posts 12 are incorporated are formed. On the other hand, the conductor posts 25 are only provided in a required number in accordance with the circuits in the printed wiring board. Therefore, in the present embodiment, the majority of the dummy posts 12 are formed, and the difference in the residual copper ratio between the product region 20 and the dummy region 10 is reduced. Therefore, the dummy posts 12 are formed to have a smaller thickness than the conductor posts 25. Further, it is preferable that the residual copper ratio of the second surface side of the resin insulating layer of the dummy region 10 itself is 5 to 30%.

The printed wiring board of the present embodiment has a dummy terminal 12 which is formed by connecting the dummy pattern 11 so that the end portions are exposed to the second surface SF2 side of the resin insulating layer 30, and the thickness of the dummy terminal 12 is smaller than The thickness of the conductor studs 25 of the printed wiring board of the product area 20. An example of the arrangement of the conductor posts 25 and the dummy posts 12 in the second surface SF2 of the resin insulating layer 30 of the multi-chip printed wiring board 100 shown in Fig. 1A is partially shown in Fig. 1E. In the example shown in FIG. 1E, the substantially circular end portions of the dummy terminals 12 are exposed in a dot pattern to be exposed on the second surface SF2 of the resin insulating layer 30. Configuration of conductor posts 25 or The shape of the dummy terminal 12 and the like are of course not limited to these, and may be formed into various types as described below, but the thickness of the dummy terminal 12 is smaller than the thickness of the conductor post 25. Thereby, the residual copper ratio of the dummy region 10 is close to the residual copper ratio of the product region 20, and the multi-chip printed wiring board is used for preventing the crack from intruding into the product region 20 and enhancing the strength of the printed wiring board. Conductor posts 25 and dummy posts 12 of uniform height can be formed by electroplating. In other words, there is a case where the desired mechanical strength and the crack preventing effect of the multi-piece printed wiring board 100 are provided by the dummy terminal 12, and the polishing step of the resin insulating layer in the manufacturing step is performed in a short time. Further, in terms of making the residual copper ratio of the dummy region 10 not too high, it is preferable that the cross-sectional area of the conductor post 25 having one cross-sectional area of one dummy stud 12 is 30 ~85%. Preferably, the cross-sectional area of all the dummy posts 12 is within the range, but is not limited thereto. For example, a part of less than 30% or more than 85% may be included.

In the example shown in FIG. 1A, the dummy pattern 11 is formed as an independent dot shape as described above. Thus, if the dummy pattern 11 is not formed in a continuous pattern like a wiring and is formed in a separate pattern, the gas generated from the resin or the like at the time of heating in the manufacturing stage is easier than the case where the dummy pattern 11 is formed in a continuous pattern. Give way. Moreover, it is also easy to avoid the problem of warpage or deflection of the printed wiring board at the time of manufacture. The planar shape of the dummy pattern 11 can adopt various shapes as described above. In FIG. 2A, as an example, the dummy pattern 11 is a dot pattern of a hexagonal shape. In this case, the end side of the dummy terminal 12 can be a circular dot pattern as shown in an enlarged view in FIGS. 1E and 2B. Thus, the shape of the dummy terminal 12 is different from the shape of the dummy pattern 11 and can be formed into various shapes such as a circle, a rectangle, an angle (polygon), an ellipse, a rectangle, etc., but in any case, each is separately exposed to the resin insulation. The second surface SF2 of the layer 30 is formed, for example, in a dot pattern. Further, the dummy terminal 12 is formed so as to prevent the crack from entering the product region 20 side even if a crack is formed when the multi-piece printed wiring board 100 of the medium-sized panel 200 is cut from the large-sized panel 200, for example, two rows are formed. Above, and can be arranged to be placed at a position shifted by half pitch between two lines, so-called zigzag (Zigzag). Moreover, the ratio of the area of the cross section of all the dummy posts 12 to the total area of the dummy area 10, that is, the residual copper ratio and the residual copper ratio of the conductor posts 25 in the product region 20 are preferably within 10%. form. As a result, there is a case where even if both the conductor post 25 and the dummy post 12 are simultaneously formed by electroplating, the heights of the two are substantially the same, and the end portions 25a and 12b are exposed to the resin insulation. The amount of polishing the resin insulating layer in the second surface SF2 of the layer 30 is small.

The dummy pattern 11 may be a pattern in which independent patterns are connected, unlike the example shown in FIG. 2A, or may be a pattern continuous across a fixed range. 2C and 2E show another example of such a dummy pattern 11, and FIG. 2D and FIG. 2F respectively show an example of the dummy terminal 12 connected to the dummy pattern 11 illustrated in FIG. 2C or FIG. 2E. In the example shown in FIG. 2C, the dummy patterns 11 are formed in a matrix shape by the individual patterns 11b of the substantially square shapes, and the individual patterns 11b are connected by the connection pattern 11c to form the whole. If the dummy pattern 11 is formed as shown in FIG. 2C, even if a crack occurs in any portion of the dummy region 10, the expansion of the crack in either direction by the dummy pattern 11 can be prevented from being in the vicinity of the generated portion. Further, since the crack exists over the entire area of the dummy region 10 where the dummy pattern 11 is not formed, the multi-piece printed wiring board 100 is less likely to be warped. The dummy terminal 12 formed by being connected to the dummy pattern 11 is formed, for example, as shown in FIG. 2D, at a position corresponding to the individual pattern 11b, that is, connected to the individual pattern 11. Alternatively, instead of the dummy terminal 12 connected to the individual pattern 11b, or the dummy terminal 12 connected to the connection pattern 11c may be additionally formed.

Moreover, FIG. 2E shows an example in which the dummy pattern 11d is continuous so as to surround the product region 20. For example, when the multi-chip printed wiring board 100 has a problem such as warpage, if the dummy pattern 11d is formed continuously as described above, the room for the expansion of the crack is further reduced, which is preferable. The arrangement of the dummy posts 12 formed in connection with the dummy pattern 11 illustrated in FIG. 2E is not particularly limited as long as it is a position on the dummy pattern 11, and for example, as shown in FIG. 2F, it may be lined along the dummy pattern 11d. The ground forms 1 row or a plurality of rows. Yu Yi In the case where a plurality of rows are formed, as described above, a zigzag configuration can be formed. In the example shown in any of FIG. 2D and FIG. 2F, the dummy posts 12 are formed separately from the second surface of the resin insulating layer 30, and are formed to be smaller than the conductor wires in the product region 20. The thickness of the column 25. Further, FIGS. 2D and 2F are examples in which the end portion is a substantially circular dummy terminal 12, but as described above, the dummy terminal 12 may have any other shape.

As a configuration of a printed wiring board, it can be applied to various configurations. For example, the configuration shown in the drawings of FIG. 1A can be applied to the state of the panel in the middle of the manufacturing step of FIG. 1B. In this configuration, the dummy pattern 11 is formed simultaneously with the first conductor layer 21 on the first surface SF1 of the resin insulating layer 30 of the dummy region 10, and the first conductor layer 21 is formed on each of the printed wiring boards 1a of the product region 20. 1b and 1c include a second pattern 21b such as a semiconductor element (not shown) or a first pattern 21a on which the conductor post 25 is formed. Moreover, the outermost layer of the resin insulating layer which is the outermost layer of the second surface SF2 opposite to the first surface SF1 of the resin insulating layer 30 or the laminated resin insulating layer 31 (see FIG. 6) laminated on the second surface SF2 is exposed. The wiring pattern is not formed on the surface, and only the end portion 25a of the conductor post 25 (see FIG. 4G) connected to the conductor layer on the first conductor layer 21 side is exposed. Further, a dummy terminal 12 is formed in connection with the dummy pattern 11 of the dummy region 10. The relationship between the dummy pattern 11 and the dummy terminal 12 is as described above, and the end faces of the dummy posts 12 are independently exposed on the second surface SF2 side regardless of the shape of the dummy pattern 11. Ideally, the dummy terminal 12 is desirably formed by straight lines passing through the gap portion thereof without passing through the product region, but even if it is not the case, the product region can be avoided as long as most of the cracks generated are prevented. The defective printed circuit board has a large effect. If the number of the dummy terminals 12 is increased, the probability of blocking can be increased. However, if the residual copper ratio becomes excessively larger than the residual copper ratio of the product region 20, the height unevenness of the terminals tends to occur. Therefore, it is decided by taking the two into consideration.

That is, as described above, only the wiring pattern is formed on one surface of the resin insulating layer 30, and only the conductor stud 25 is exposed on the other side of the printed wiring board, and the crack formed on the end edge 10a easily extends to the product area. Since 20, this example is shown. Furthermore, this resin The second surface SF2 side of the insulating layer 30 is connected to the mother board or the like via the conductor post 25. However, as described above, the printed wiring board having the structure of the dummy terminal 12 to which the present embodiment is applied is not limited to such a printed wiring board in which the wiring pattern is formed only on one side. In addition, the manufacturing method of the printed wiring board 100 will be described in detail below, and there are two methods for the timing of cutting the multi-piece printed wiring board 100 into a short strip shape, and therefore, it will be described.

First, FIG. 1B is a state of the final stage of manufacture, and is an explanatory view of a section of FIG. 1A taken along the line 1B-1B. That is, it is not a complete cross-sectional view, but a part of only a main portion is omitted, and portions of the dummy pattern 11 and the dummy posts 12 are shown by only one row. As described above, the first conductor layer 21 and the resin insulating layer 30 are laminated on the support plate 80 via the metal film 81, and finally the support plate 80 is removed to form a printed wiring board. The support plate 80 is attached to the dummy substrate 80a, for example, on the dummy substrate 80a (see FIG. 4A), for example, the carrier copper foil 80b side of the metal film 81 with the carrier copper foil 80b. Further, the first conductor layer 21 including the second pattern 21b and the like is formed on the metal film 81 together with the dummy pattern, and a dummy terminal 12 is formed together with a conductor post (not shown) to form a resin insulating layer. 30 buried structure.

Then, when the support plate 80 is peeled off, a large-sized panel formed on both sides of the support plate 80 can be obtained. In the state of the large-sized panel 200, the above-described D-D line is used as the first method. Fig. 1C shows a state in which the support sheet 80 is peeled off and the metal film 81 is removed. If this is done, the cutting is easy, but since it is necessary to handle the thin and large-sized panel 200, it is necessary to perform the work while paying attention to it.

On the other hand, the state before the peeling of the support plate 80 from the state of FIG. 1B is the second method. Figure 1D shows the situation. That is, Fig. 1D shows a state in which the separation is cut off in the state of Fig. 1B. Then, the strip-shaped multi-piece printed wiring board 100 is peeled off from the support board 80 to form the multi-piece printed wiring board 100. Then, etching removal or the like of the metal film 81 described below is performed. In the case of this method, the processing at the time of the cutting operation is easy. However, since the operation of peeling off the multi-piece printed wiring board 100 from the support board 80 and the removal of the metal film 81 are necessary, the multi-chip printed wiring of the medium size must be used. The board 100 is carried out, so the number of steps is taken.

Further, the resin insulating layer 30 is not particularly limited, and as described above, cracks easily extend in those who do not include a core material such as glass fibers. The reason is considered to be that it is easy to prevent cracks if there is a core material, but if there is no core material, there is no place for cracking, and the crack spreads. Therefore, in the present embodiment, it is particularly effective when a resin containing no core material is used. The resin which does not contain a core material may be a resin film for interlayer insulation (a film formed only of an inorganic filler and a resin composition) or a resin for molding (a resin which is solidified in a mold and solidified), but may be used. For either of them. However, the present embodiment is not limited to the resin that does not include the core material, and the effect of the present embodiment can be exhibited even if it is a resin containing a core material. Further, the inorganic filler impregnated into the resin insulating layer 30 preferably contains 70 to 90% by weight. In the case of using a resin for molding, if a resin material for molding molding having a thermal expansion coefficient of 3 to 120 ppm/° C. and an elastic modulus of 0.01 to 30 GPa is used, the electronic component mounted on the printed wiring board 100 is used. It is preferable that the joint portion or the like is less likely to generate a large thermal stress.

As described above, in the present embodiment, it is considered that the dummy pattern 11 is formed in the dummy region 10, and further, the dummy terminal 12 is formed to have a smaller thickness than the conductor post 25 of the product region 20, thereby When the panel 200 is cut into the multi-piece printed wiring board 100, for example, even when a crack is formed on the edge 10a of the multi-piece printed wiring board 100, the crack can be suppressed from intruding into the product region 20 And the uniform height of the conductor posts 25 and the dummy posts 12 can be manufactured in fewer steps.

3A to 3B show an example of a pattern of each of the printed wiring boards 1 constituting the multi-piece printed wiring board 100. In other words, FIG. 3A shows an arrangement example of the second surface SF2 of the resin insulating layer 30 of the conductor post 25 of the printed wiring board 1, and FIG. 3B shows an arrangement example of the first surface SF1 of the resin insulating layer 30. As shown in FIG. 3A, a conductor terminal row 26 formed by arranging a plurality of conductor posts 25 in one direction may be formed by arranging two rows in parallel along each side of the printed wiring board 1. The conductor post rows 26 may be arranged in parallel in three or more rows. As shown in FIG. 3A, the conductor post rows 26 formed along the respective sides may be spaced apart from each other, and the conductors may be arranged in a lattice shape at the center portion. Terminal 25. Further, for example, it may be spread over the second of the resin insulating layer 30. The entire surface of the surface SF2 is formed in a lattice shape. Although not shown in FIG. 3A, the dummy posts 12 of the dummy region 10 described above are formed simultaneously with the conductor posts 25.

In the first conductor layer 21 on the first surface SF1 side of the resin insulating layer 30 of each of the printed wiring boards 1 shown in FIG. 3A, for example, as shown in FIG. 3B, the first and second patterns 21a and 21b can be formed. The wiring pattern 21d that connects the first pattern 21a and the second pattern 21b. In other words, the conductor post 25 shown in FIG. 3A is formed on the surface (the second surface SF2) opposite to the surface (first surface SF1) shown in FIG. 3B of each of the first patterns 21a. In the example shown in FIG. 3B, the second pattern 21b is connected to a connection pad 21c of a semiconductor element (not shown). For example, an electrode such as an IC (integrated circuit) wafer is bonded by solder bumps or bonding. Wires and the like are electrically connected. 3B is an example of a connection pad 21c in which semiconductor elements connected to electrodes are respectively arranged on four sides of a rectangular outer shape, and four connection pads arranged in a fixed interval by the connection pads 21c are integrally formed into a rectangular shape. Mode configuration. Further, the connection pad 21c (second pattern 21b) and the first pattern 21a formed around the connection pad 21c are connected by the wiring pattern 21d. Thereby, the electrode of the semiconductor element (not shown) can be electrically connected to another wiring board, such as a mother board (not shown) via the conductor terminal 25. Further, each pattern of the first conductor layer 21 shown in FIG. 3B is merely an example, and an arbitrary conductor pattern can be formed in accordance with a circuit formed in the printed wiring board 1.

Then, the first conductor layer 21 is formed on the first surface SF1 of the resin insulating layer 30, and only the conductor post 25 is exposed on the printed wiring board on the side of the second surface SF2, and is disposed outside the product region 20. The dummy region 10 of the portion forms an example of the dummy pattern 11 and the dummy terminal 12, and the manufacturing method will be described with reference to FIGS. 4A to 4G. Further, the both sides of FIGS. 4A to 4G are main portions, the center portion is omitted, and the first conductor layer 21 is also simplified. The dummy pattern 11 and the dummy terminal 12 are also shown on each side.

First, as shown in FIG. 4A, a metal film 81 is prepared. Specifically, as the starting material, the support plate 80 and the metal film 81 including the dummy substrate 80a and the carrier copper foil 80b are prepared, and the two-layer carrier copper foil 80b of the dummy substrate 80a is bonded by pressurization and heating. The support plate 80 is formed, and the metal film 81 is followed by the carrier copper foil 80b of the support plate 80. Can also The carrier copper foil 80b is previously attached to the metal film 81, and the carrier metal foil 80b side of the metal film 81 with the carrier copper foil 80b is attached to the dummy substrate 80a of the support board 80. The support plate 80 is preferably a semi-cured prepreg or the like which is obtained by impregnating a core material such as a glass cloth with an insulating resin such as an epoxy resin containing an inorganic filler, but is not limited thereto. Other materials can also be used. As the material of the metal film 81, a material which can form the first conductor layer 21 on the surface is used, and a copper foil having a thickness of about 1 to 3 μm is preferably used. Further, as the carrier copper foil 80b, for example, a copper foil having a thickness of about 15 to 30 μm, preferably about 18 μm, is used. However, the thickness of the carrier copper foil 80b is not limited thereto, and may be other thicknesses.

The bonding method of the carrier copper foil 80b and the metal film 81 is not particularly limited, and for example, it may be carried out by a thermoplastic adhesive which is easily peeled off (not shown) over substantially the entire surface of the bonding surface. The blank portion in the vicinity of the outer circumference of the conductor pattern of the first conductor layer 21 may not be provided, and bonding may be performed by an adhesive or ultrasonic connection. Further, for example, the support plate 80 is formed of a double-sided copper foil laminate, and the surface copper foil is used as the carrier copper foil 80b, and a single metal film 81 may be bonded thereto by the above-described method or the like.

4A to 4E show an example in which the metal film 81 is bonded to both surfaces of the support plate 80, and the first conductor layer 21, the conductor post 25, the dummy post 12, and the resin insulating layer 30 are formed on each surface. When it is manufactured by this method, it is preferable to form two at the same time as the first conductor layer 21, the conductor terminal 25, the dummy terminal 12, and the like. However, the first conductor layer 21 or the like may be formed only on one surface of the support plate 80, or a conductor layer or the like having a circuit pattern different from each other may be formed on both sides. In the following description, an example in which the same circuit pattern is formed on both sides will be described. Therefore, only one surface will be described, and the description of the other surface side will be omitted, and the other surface side of each drawing will be omitted.

Next, on the metal film 81, wiring patterns 21a and 21b and dummy patterns 11 of the first conductor layer 21 for a plurality of multi-piece printed wiring boards are formed. The method of forming each of the wiring patterns 21a and 21b and the dummy pattern 11 of the first conductor layer 21 is not particularly limited, and for example, an electroplating method can be used. In this case, first, a resist is applied or laminated on the entire surface of the metal film 81. A material (not shown) is formed by plating to form a plating resist film (not shown) in a specific region other than the portion where the first conductor layer 21 and the dummy pattern 11 are formed. Then, the metal film 81 is used as a seed layer (electroelectric layer) for plating on the exposed surface of the metal film 81 on which the resist film is not formed, and for example, a plating layer is formed by plating. Then, the plating resist film is removed. As a result, as shown in FIG. 4B, the first conductor layer 21 and the dummy pattern 11 such as the first pattern 21a (the pattern in which the conductor post 25 is formed) and the second pattern 21b (the pad on which the semiconductor element or the like is mounted) are formed. A specific circuit pattern is formed on the metal film 81. The first conductor layer 21 is preferably formed of the same material as the conductor post 25 or the dummy post 12 described below, and is preferably formed of copper. Further, the first conductor layer 21 and the dummy pattern 11 are preferably formed to have a thickness of about 5 to 30 μm, but are not limited thereto.

Next, as shown in FIG. 4C, the conductor posts 25 and the dummy posts 12 are formed on the pattern 21a and the dummy pattern 11 of one of the first conductor layers 21, respectively. Specifically, the conductor post 25 is formed on the first pattern 21a of the first conductor layer 21, and the dummy stud 12 having a smaller thickness than the conductor post 25 is formed on the dummy pattern 11. In other words, first, the surface (exposed surface) on the opposite side of the surface of the first conductor layer 21 and the dummy pattern 11 that is in contact with the metal film 81 is excluded from the portion where the conductor post 25 and the dummy post 12 are formed. A portion of the metal film 81 which is not covered by the first conductor layer 21 or the dummy pattern 11 and is exposed is formed with a plating resist film (not shown). In order to form a dummy post 12 having a smaller thickness than the conductor post 25, the opening portion of the plated resist film on the dummy pattern 11 for forming the dummy post 12 is used to form the first pattern. The opening of the conductor post 25 on 21a is formed smaller. The plating resist film is formed to have a thickness of at least about 10 to 150 μm. Then, in the opening portion of the plating resist film on the first pattern 21a and the dummy pattern 11, the metal film 81 is used as a seed layer (electrostatic layer) for plating, and a plating layer can be formed by plating. Then, the plating resist film is removed. As a result, as shown in FIG. 4C, the conductor post 25 including the plating layer is formed on the exposed surface of the first pattern 21a, and similarly, the exposed surface of the dummy pattern 11 is formed to have a smaller thickness than the conductor post 25. The dummy terminal 12 is provided. Conductor terminal 25 and dummy terminal Preferably, 12 is formed of the same material as that of the first conductor layer 21, and is preferably formed of copper. Further, the conductor post 25 and the dummy post 12 are preferably formed to have a thickness of 10 to 150 μm, but are not limited thereto. In the present embodiment, since the thickness of the dummy terminal 12 is formed smaller than the thickness of the conductor post 25, the residual copper ratio and the dummy region 10 on the second surface SF2 side of the product region 20 are as described above. The difference in the residual copper ratio on the second surface SF2 side is small, preferably 10% or less, and the heights of the conductor posts 25 and the dummy posts 12 which are simultaneously formed by plating are substantially the same. As a result, the time of the polishing step of the resin insulating layer 30 for exposing the ends of the conductor posts 25 and the dummy posts 12 described below can be shortened.

After the conductor posts 25 and the dummy posts 12 are formed, although not shown, it is preferable to improve the adhesion to the resin insulating layer 30 described below to the side faces of the conductor posts 25 and the dummy posts 12 and The side surface of the first conductor layer 21 and the exposed surface of the portion where the conductor post 25 and the dummy post 12 are not formed are roughened. The method of the roughening treatment is not particularly limited, and examples thereof include a soft etching treatment or a blackening (oxidation)-reduction treatment. Each of the roughened faces is preferably treated with an arithmetic mean roughness of 0.1 to 1 μm. Further, in the case of performing the roughening treatment, an annealing treatment for growing the crystal of the electroplated copper to stabilize the roughening may be performed between the removal and the roughening treatment of the plating resist film 85.

Next, as shown in FIG. 4D, the resin insulating layer 30 is formed so as to cover the exposed surface of the first conductor layer 21, the side surface of the conductor post 25, and the side surface of the dummy terminal 12. Specifically, in the conductor post 25 and the dummy post 12, a sheet-like or film-shaped insulating material (prepreg) is laminated and pressed toward the support plate 80 side and heated. The insulating material is softened by heating, and flows between the first pattern 21a and the second pattern 21b, between the second patterns 21b, and between the conductor posts 25 or the dummy posts 12, and becomes semi-hardened. . Then, the insulating material is completely cured by heating, and as shown in FIG. 4D, the resin insulating layer 30 is formed, and the first pattern 21a, the second pattern 21b, the conductor post 25, and the dummy post 12 are buried in the resin. Insulation layer 30. Thus, the method of forming the resin insulating layer 30 by laminating a sheet-like or film-shaped insulating material can form a resin by a manufacturing apparatus of a general printed wiring board. The aspect of the insulating layer 30 is preferred. After the resin insulating layer 30 is formed, it is preferable to perform polishing polishing to remove burrs which are generated when the resin insulating layer 30 is formed.

Next, as shown in FIG. 4E, the end portion of the conductor post 25 and the dummy post 12 is exposed by polishing the second surface SF2 side of the resin insulating layer 30. Specifically, on the side opposite to the metal film 81 side (exposed surface side) of the resin insulating layer 30, it is preferable to perform polishing by polishing or chemical mechanical polishing (CMP) until all conductor wiring The front end of the pillar 25 and the dummy terminal 12 is exposed on the second surface SF2 side of the resin insulating layer 30. More preferably, it is further polished to a specific height. At this time, it is considered that if the heights of the conductor studs 25 and the dummy studs 12 do not match, the end portions of the shortest conductor studs 25 are exposed, and the amount of polishing (grinding length) is increased until a certain height is increased, so that it takes a long time. Grinding time. On the other hand, as described above, in the present embodiment, since the residual copper ratio on the second surface SF2 side of the dummy region 10 is close to the residual copper ratio on the second surface SF2 side of the product region 20, the conductor posts having the same height are obtained. 25 and the dummy terminal 12 are formed by electroplating. Therefore, there are cases where the grinding step is short, the manufacturing cost is lowered, and the possibility of damage during grinding is reduced.

Next, the peeling support plate 80 is first removed to remove the metal film 81, and the printed circuit board 80 and the metal film 81 are cut and separated into a multi-piece printed wiring board including one or two or more product regions. It was removed, and the separation was cut off by the DD line of Fig. 1A. In other words, the period from when the panel 200 is cut to the multi-piece printed wiring board 100 is as described with reference to FIG. 1C and FIG. 1D described above, and is performed by either method. When the separation of the support plates 80 is performed first, for example, as shown in FIG. 4F, first, the support plate 80 is separated from the metal film 81. Specifically, for example, in a state in which the entire printed wiring board in the middle of the step is heated, and the thermoplastic adhesive (not shown) joined to the carrier copper foil 80b of the support sheet 80 and the metal film 81 is softened, the support sheet 80 is The carrier copper foil 80b applies a force in a direction along the interface with the metal film 81 to separate the carrier copper foil 80b from the metal film 81. Or, as described above, when the two are joined by a bonding agent or an ultrasonic connection in a blank portion near the outer periphery, The bonding portion is further on the inner peripheral side, and the support plate 80 and the metal film 81 are cut together with the resin insulating layer 30 and the like, and the joint portion of the adhesive or the like is cut off, whereby the carrier copper foil 80b can be separated from the metal film 81. . As a result, the panel 200 of the printed wiring board in the middle of the steps formed on both sides of the support plate 80 of the two center portions is obtained. Fig. 4F shows this state, and only shows the middle of the step of the panel 200 shown on the lower surface side of the support plate 80 in Fig. 4E.

Then, as shown in FIG. 4G, the metal film 81 is removed by, for example, etching or the like. As described above, when copper is used for all of the metal film 81, the first conductor layer 21, the conductor post 25, the dummy pattern 11, and the dummy post 12, the constituent materials of each can be dissolved in the same etching liquid. Therefore, when the metal film 81 is etched, the surface of the conductor post 25 and the dummy post 12 exposed on the second surface SF2 side of the resin insulating layer 30 is exposed to the etching liquid, and together with the metal film 81, The conductor posts 25 and the front ends of the dummy posts 12 are partially etched. Then, after the metal film 81 is completely removed, the exposed surface of the first conductor layer 21 and the dummy pattern 11 exposed on the first surface SF1 of the resin insulating layer 30 and the conductor post 25 are removed by the removal of the metal film 81. The front end portion 25a and the front end portion 12b of the dummy terminal 12 are exposed to the etching liquid and etched. As a result, as shown in FIG. 4G, the exposed surface of the first conductor layer 21 and the exposed surface of the dummy pattern 11 are further recessed than the first surface SF1 of the resin insulating layer 30, and the end portion 25a of the conductor post 25 and the dummy terminal 12 are formed. The end portion 12b is more recessed than the second surface SF2 of the resin insulating layer 30, and the recess of the end portion 25a of the conductor post 25 from the second surface SF2 of the resin insulating layer 30 is smaller than that of the first conductor layer 21 from the resin insulating layer. The depression of the first surface SF1 of 30 is larger. The cutting from the panel 200 to the multi-piece printed wiring board 100 can be performed in the state of the residual metal film 81 shown in FIG. 4F, or after the metal film 81 is removed after FIG. 4G. This method is the method shown in Figure 1C above. In FIG. 1C, the surface of the first conductor layer 21 of the first and second faces SF1, SF2 of the resin insulating layer 30, or the end face 25a of the conductor post 25 is recessed.

On the other hand, the method shown in FIG. 1D is performed after the step of FIG. 4E, and is cut by the D-D line of FIG. 1A, and then the removal of the support plate 80 and the etching removal of the metal film 81 are sequentially performed. Thereby, a multi-piece printed wiring board 100 is obtained.

After the removal of the metal film 81, the surface protective film 28 (see FIG. 5A) is preferably formed on the exposed surface of the first conductor layer 21 and the dummy pattern 11 and the end portion 25a of the conductor post 25 or the dummy terminal 12 End portion 12b. The formation of the surface protective film 28 can be carried out by forming a plurality of single or single metal films of Ni/Au, Ni/Pd/Au, or Sn by a plating method. Further, OSP (Organic Solderability Preservatives) may be formed by blowing into a liquid protective material or by blowing a protective material. The surface protective film 28 may be formed on both the exposed surface of the first conductor layer 21 and the end portion 25a of the conductor post 25, or may be formed only in either one. Further, the surface protective film 28 may not be formed on the surface of the dummy pattern 11 or the end portion 12b of the dummy terminal 12. Further, a surface protective film of a different material may be formed on the exposed surface of the first conductor layer 21 and the end portion 25a of the conductor post 25.

Further, in addition to the formation of the surface protective film, or the surface protective film may not be formed, a bonding material including a bonding material for bonding the conductor post 25 to the external mother board or the like is formed on the end portion 25a of the conductor post 25. Layer 27 (see Fig. 5B). The material of the bonding material layer 27 is preferably formed by using a solder, applying a paste-like solder or disposing a solder ball, temporarily melting the same, and hardening it, and forming it by a plating method. However, the material or formation method of the bonding material layer is not particularly limited, and other materials and methods can be used.

By the above steps, the multi-piece printed wiring board 100 cut by the D-D line of FIG. 1A is completed. That is, a multi-piece printed wiring board having a dummy pattern 11 and a dummy terminal 12 of a size of the dummy wiring 11 is formed in the dummy region 10, and the dummy pattern 11 is formed on the first surface SF1 of the resin insulating layer 30, and the dummy terminal 12 is formed. The resin insulating layer 30 is penetrated from the dummy pattern 11 so that the end portions 12b are independent of each other, for example, in a dot-like manner on the second surface SF2 side, and has a thickness smaller than the thickness of the conductor post 25.

The first conductor layer 21 is entirely embedded on the first surface SF1 side of the resin insulating layer 30 so as to be exposed on the first surface SF1 side of the resin insulating layer 30. In other words, the first conductor layer 21 and the resin insulating layer 30 are not only in contact with the other surface of the first conductor layer 21, but also in the first conductor layer 21 Specifically, the side surface is also in contact with the side surface of the first pattern 21a or the second pattern 21b formed on the first conductor layer 21. Therefore, even if the first pattern 21a or the second pattern 21b is formed at a fine pitch and the area of one surface of the first conductor layer 21 is small, the adhesion between the first conductor layer 21 and the resin insulating layer 30 can be maintained. Moreover, by embedding the first conductor layer 21 in the resin insulating layer 30, the printed wiring board 1 itself can be made thin.

As described above, the first pattern 21a and the second pattern 21b are formed on the first conductor layer 21. In the present embodiment, the first pattern 21a is electrically connected to the wiring of another printed wiring board (not shown) connected to the printed wiring board 1 on the second surface SF2 side of the resin insulating layer 30. pattern. Here, the other printed wiring board may be a mother board such as an electronic device using the printed wiring board 1, or may be formed together with the printed wiring board 1 as an insulating layer and a conductor layer of the multilayer wiring board. Laminated body. Further, the second pattern 21b may be, for example, a connection pad to which a semiconductor element (not shown) or the like is connected. Further, the dummy pattern 11 is formed in the above-described dummy region 10, and also serves as a base portion in the case where the dummy terminal 12 is formed. Further, a wiring pattern other than the first and second patterns 21a and 21b may be formed on the first conductor layer 21. For example, among the electrodes of the semiconductor element connected to the second pattern 21b, the external electrical connector is formed on the wiring pattern 21d of the first conductor layer 21 via the second pattern 21b and the first pattern 21a ( Referring to FIG. 3B), the first pattern 21a and the conductor post 25 are electrically connected.

4A to 4G are examples in which the first conductor layer 21 is formed on only one surface of the insulating layer, but the conductor layer is laminated on the second surface SF2 side of the resin insulating layer 30. In the case where the resin insulating layer is not formed on the lower end side of the resin insulating layer of the outermost layer (lowest layer), the crack is also easily formed in the resin insulating layer. Therefore, even in the case where the resin insulating layer is multi-layered, it is preferable to form a dummy terminal in the dummy region of the lowermost resin insulating layer. In this case, the resin insulating layer other than the lowermost layer may be formed by forming the conductor layer on only one side and forming the conductor layer on both sides. In short, it is preferable that the conductor layer is formed not on one surface of the resin insulating layer. In the resin insulating layer exposed only by the conductor posts, dummy studs are formed in the dummy regions on the outer periphery thereof. Of course, preferably, The resin insulating layer is provided with a conductor stud or a conductor pattern even in the case where the conductor layer is provided on both sides.

In the printed wiring board shown in FIG. 6, the second conductor layer 22 is formed on the second surface SF2 side of the resin insulating layer 30, and the second resin insulating layer 31 is formed on the surface thereof so as to penetrate the second resin insulating layer 31. The second conductor post 29 and the second dummy post 12a are formed so as to be connected to the second conductor layer 22. The conductor layer is two layers, and the conductor layer is formed on the exposed surface SF3 side of the second resin insulating layer 31 without the outermost layer. Only the second terminal 29 is exposed.

In order to manufacture such a printed wiring board, after the step of FIG. 4E described above, it can be formed by, for example, forming a metal film on the second surface SF2 of the resin insulating layer 30 by electroless plating. For example, the pattern of the second conductor layer 22 and the second conductor post 29 and the second dummy post 12a are formed by a plating method by an additive method, and formed thereon in the same manner as the method shown in FIGS. 4D and 4E. Similarly to FIG. 4F, the second resin insulating layer 31 removes the support plate 80, removes the metal film 81, and cuts it into a medium-sized size from the panel state before or after the removal of the support plate 80 and the metal film. Substrate.

Further, the manufacturing method is not limited to this method, and various methods can be employed. For example, when the resin insulating layer 30 is formed, a metal foil such as a copper foil may be formed by pressure-bonding a resin film, or an opening may be formed after the second resin insulating layer 31 is formed. The second conductor stud 29 or the second dummy stud 12a is formed such that the second conductor stud 29 or the second dummy stud 12a is buried in the opening. Further, in the case of forming a multilayer printed wiring board, by repeating these steps, a desired multilayer printed wiring board can be formed.

1a, 1b, 1c‧‧‧ Printed wiring board

10‧‧‧Dummy area

10a‧‧‧ edge

11‧‧‧Dummy design

20‧‧‧Product area

100‧‧‧Multi-chip printed wiring board

200‧‧‧ panel

Claims (19)

A multi-piece printed wiring board having: a product region including a plurality of printed wiring boards; and a dummy region formed around one or more of the product regions; and having a resin insulating layer The resin insulating layer has a first surface and a second surface opposite to the first surface, and each of the printed wiring boards of the product region has a first conductor layer exposed to the resin insulating layer on only one side. Embedding the first surface side; and the conductor post connected to the first conductor layer and extending through the resin insulating layer to expose the end portion to the second surface side; the dummy region having a dummy pattern; a first surface formed on the resin insulating layer; and a dummy terminal penetrating the resin insulating layer and connected to the dummy pattern so that the end portions are exposed to the second surface side independently; the dummy terminal is thick The degree is less than the thickness of the above conductor stud. According to the printed wiring board of claim 1, the cross-sectional area of one of the dummy studs of one of the ones is 30 to 85% of the cross-sectional area of the conductor post. The printed wiring board according to claim 1 or 2, wherein in the second surface, a difference between a residual copper ratio of the dummy region and a residual copper ratio of the product region is 10% or less. The printed wiring board according to claim 1 or 2, wherein the dummy pattern is circular, elliptical, rhombic, or polygonal, and are independently arranged. The printed wiring board according to claim 1 or 2, wherein the resin insulating layer is formed of a resin not containing a core material. The printed wiring board according to claim 1 or 2, wherein a laminated resin insulating layer is further formed on the second surface of the resin insulating layer, and the dummy post is exposed to the outermost resin insulating layer of the laminated resin insulating layer. The printed wiring board according to claim 1 or 2, wherein the conductor post and the dummy post are formed of a plating film. The printed wiring board according to claim 1 or 2, wherein the dummy region of the dummy region on the second surface side of the resin insulating layer has a residual copper ratio of 5 to 30%. The printed wiring board according to claim 1 or 2, wherein the height of the conductor post and the dummy post is 10 to 150 μm, and the thickness of the first conductor layer is 5 to 30 μm. The printed wiring board according to claim 1 or 2, wherein the resin insulating layer comprises a resin material for molding molding having a thermal expansion coefficient of 3 to 120 ppm/° C. and an elastic modulus of 0.01 to 30 GPa. The printed wiring board according to claim 1 or 2, wherein the resin insulating layer contains 70 to 90% by weight of an inorganic filler. The printed wiring board according to claim 1 or 2, wherein the side surface of the conductor post and/or the dummy post is roughened to have a rough surface roughness. A printed wiring board according to claim 1 or 2, wherein a surface protective film is formed on said end portion of said conductor post. The printed wiring board according to claim 13, wherein a surface protective film comprising a material different from a material of the surface protective film formed on the end portion of the conductor post is formed on the exposed surface of the first conductor layer. The printed wiring board according to claim 1 or 2, wherein the end portion of the conductor post is coated with solder. The printed wiring board according to claim 1 or 2, wherein the dummy terminals are formed in at least two rows, and each of the dummy posts is configured in a zigzag shape. A multi-piece printed wiring board having: a product region including a plurality of printed wiring boards; and a dummy region formed in one or more The periphery of the above product area; and the multi-chip print The method for manufacturing a brush wiring board includes the steps of: preparing a metal film; forming a wiring pattern of the first conductor layer for the plurality of multi-chip printed wiring boards and the dummy pattern on the metal film; a pattern of one of the conductor layers and the dummy pattern respectively forming a conductor post and a dummy post; forming a resin insulation so as to cover the exposed surface of the first conductor layer, the conductor post and the side of the dummy post a step of exposing the end portions of the conductor post and the dummy post by polishing the second surface side of the resin insulating layer; and performing the step of removing the support plate and the metal film and cutting off Any of the steps of forming a multi-piece printed wiring board comprising one or more product regions; the dummy region having a dummy terminal that is thinner than the conductor post. The method of manufacturing a multi-chip printed wiring board according to claim 17, wherein the conductor post and the dummy post are simultaneously formed by electroplating. The method of manufacturing a multi-piece printed wiring board according to claim 17 or 18, wherein the side faces of the conductor post and the dummy post are roughened before the formation of the resin insulating layer.