TWI576020B - Printed wiring board and manufacturing method thereof - Google Patents

Description

Printed wiring board and method of manufacturing same

The present invention relates to a printed wiring board and a method of manufacturing the same.

Patent Document 1 discloses that a copper pattern of various shapes is formed in a dummy region around a package region (product region). That is, as shown in FIG. 7, a dummy wiring formed by the wiring 91 parallel to the product region 90 and the wiring 92 perpendicular to the product region 90 is formed.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2007-19496

However, even if the dummy wiring 91 is formed on one surface of the resin insulating layer, when the resin insulating layer is cut, an impact is applied to the entire thickness of the resin insulating layer. Therefore, there is a possibility that the crack is formed not only from the surface but also from the intermediate portion of the thickness of the resin insulating layer. When the resin insulating layer is cracked by the impact of the intermediate portion of the resin insulating layer, there is a possibility that the crack extends in the horizontal direction and the vertical direction. Therefore, even if a dummy wiring layer is formed on the surface, the crack may not be prevented from entering.

The multi-piece printed wiring board of the present invention is a multi-piece printed wiring board having: a product region including a plurality of printed wiring boards; and a dummy region formed in one or more of the above-mentioned product regions Surrounded by; and has a resin insulating layer, the resin is absolutely The edge layer has a first surface and a second surface opposite to the first surface, and each of the printed wiring boards of the product region has a first conductor layer exposed on only one surface of the first surface of the resin insulating layer And a conductor stud connected to the first conductor layer and having an end portion exposed to the second surface side penetrating through the resin insulating layer; the dummy region having a dummy pattern formed on the resin The first surface of the insulating layer includes an individual pattern or an overall pattern connected by a connection pattern formed to surround the product region; and a dummy terminal penetrating through the resin insulating layer and exposing the ends to each other independently The second surface side is connected to the dummy pattern.

The manufacturing method of the multi-piece printed wiring board of the present invention is a method of manufacturing a multi-piece printed wiring board having: a product area including a plurality of printed wiring boards; and a dummy area, It is formed around one or more of the above-mentioned product regions. Further, the method for manufacturing a multi-piece printed wiring board includes the steps of: preparing a metal film; forming a wiring pattern and a dummy pattern of the first conductor layer for the plurality of multi-chip printed wiring boards on the metal film; a pattern of one of the first conductor layers and a portion of the dummy pattern respectively forming a conductor post and a dummy post; covering the exposed surface of the first conductor layer, the side of the conductor post, and the side of the dummy post Forming a resin insulating layer; exposing the second terminal side of the resin insulating layer to expose the end portions of the conductor post and the dummy post; and performing the step of removing the metal film and cutting a step of separating into a multi-piece printed wiring board including one or two or more product regions; the dummy region having a dummy pattern formed on the first surface of the resin insulating layer and including An individual pattern or an overall pattern connected by a connection pattern; and a dummy terminal penetrating through the resin insulating layer and being exposed to each other at an end portion The second surface side is connected to the dummy pattern.

1‧‧‧Printed wiring board

1a, 1b, 1c‧‧‧ Printed wiring board

10‧‧‧Dummy area

10a‧‧‧ edge

11‧‧‧Dummy design

11b‧‧‧ individual patterns

11c‧‧‧Link pattern

11d‧‧‧ overall pattern

12‧‧‧Digital binding posts

12b‧‧‧End of the dummy terminal

20‧‧‧Product area

21‧‧‧1st conductor layer

21a‧‧‧1st pattern

21b‧‧‧2nd pattern

21c‧‧‧ connection pad

21d‧‧‧ wiring pattern

25‧‧‧Conductor binding posts

25a‧‧‧End of conductor post

27‧‧‧Material layer

28‧‧‧Surface protection film

30‧‧‧Resin insulation

80‧‧‧Support board

80a‧‧‧Dummy substrate

80b‧‧‧ carrier copper foil

81‧‧‧Metal film

90‧‧‧Product area

91‧‧‧Wiring

92‧‧‧Wiring

100‧‧‧Multi-chip printed wiring board

200‧‧‧ panel

The first side of SF1‧‧‧ resin insulation

The second side of SF2‧‧‧ resin insulation

SF3‧‧‧ exposed face

Fig. 1A is a plan explanatory view showing a panel of a multi-piece printed wiring board according to an embodiment of the present invention.

Fig. 1B is a cross-sectional explanatory view of 1B-1B in the manufacturing steps of the multi-piece printed wiring board of Fig. 1A.

Fig. 1C is a cross-sectional explanatory view showing a step of cutting from the panel of Fig. 1A to the multi-piece printed wiring board.

Fig. 1D is a cross-sectional explanatory view showing a step of cutting from the panel of Fig. 1A to the multi-piece printed wiring board.

2A(a) and 2(b) are enlarged explanatory views showing an example of the shape of the dummy pattern and the end portion of the dummy terminal shown in Fig. 1A.

2B(a) and 2(b) are enlarged explanatory views showing another example of the shape of the dummy pattern and the end portion of the dummy terminal shown in Fig. 1A.

2C(a) and 2(b) are enlarged explanatory views showing still another example of the shape of the dummy pattern and the end portion of the dummy terminal shown in Fig. 1A.

2D(a) and (b) are enlarged explanatory views showing still another example of the shape of the dummy pattern and the end portion of the dummy terminal shown in FIG. 1A.

2E(a) and (b) are enlarged explanatory views showing still another example of the shape of the dummy pattern and the end portion of the dummy terminal shown in FIG. 1A.

Fig. 3A is an explanatory view showing an example of a pattern of the second surface of each of the printed wiring boards shown in Fig. 1A.

Fig. 3B is an explanatory view showing an example of a pattern of the first surface of each of the printed wiring boards shown in Fig. 1A.

Fig. 4A is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4B is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4C is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4D is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4E is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4F is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 4G is an explanatory view showing steps of an example of a method of manufacturing the printed wiring board shown in Fig. 1A.

Fig. 5A is a cross-sectional view showing a first conductor layer and a conductor post on which a surface protective film is formed.

Fig. 5B is a cross-sectional view showing a portion where the end of the conductor post is coated with solder.

Figure 6 is a cross-sectional view showing a panel of a multi-piece printed wiring board according to another embodiment of the present invention.

Fig. 7 is a view showing an example in which a dummy pattern is formed in the dummy region.

Next, a multi-piece printed wiring board according to an embodiment of the present invention will be described with reference to the drawings. A multi-piece printed wiring board according to an embodiment of the present invention is a plan view showing a panel in Fig. 1A, and a plurality of strip-shaped printed wiring boards are obtained by cutting and separating the cutting lines DD. 100. Further, in FIG. 1B, a diagram of a step in the middle of the manufacturing step is a step of manufacturing the printed wiring board 100 on both sides of the support board 80, and the same panel is formed on both sides. As shown in FIGS. 1A to 1B, the multi-piece printed wiring board 100 of the present embodiment has a product region 20 including a plurality of printed wiring boards 1a, 1b, 1c, ..., and one or more. A dummy area 10 is formed around the product area 20. Further, the resin insulating layer 30 has the first surface SF1 and the second surface SF2 opposite to the first surface SF1, and the first surface of the product region 20 is exposed to the resin insulating layer 30. The first conductor layer 21 is formed by embedding the surface of the surface SF1, and a conductor stud is formed so as to penetrate the resin insulating layer 30 and expose the end portion thereof to the second surface SF2 side. 25 (refer to Figure 4G). Further, in the dummy region 10, the dummy pattern 11 is formed on the first surface SF1 of the resin insulating layer 30 so as to surround the product region 20, and the dummy posts 12 penetrate the resin insulating layer 30 and the ends are exposed to the second surface SF2 independently of each other. The side is formed by connecting the dummy pattern 11. The dummy pattern 11 formed on the first surface SF1 includes an individual pattern connected by a connection pattern or an integrated pattern continuously formed, and the dummy terminal 12 is exposed to the second surface of the resin insulating layer 30 in a dot-like manner. Formed on the SF2 side.

Here, the product region refers to a region in which a plurality of printed wiring boards that are products are formed together, and the dummy region refers to one or two or more product regions in which a printed wiring board to be a product is not formed. The surrounding area.

In other words, each of the printed wiring boards used for packaging of semiconductor devices and the like is about 1 cm square, and a plurality of printed wiring boards are collectively formed into a large-sized panel in the manufacturing stage, and the panel is formed in a medium size. The short strip-shaped multi-chip printed wiring board is singulated into individual printed wiring boards after mounting a semiconductor element or the like. In the case of cutting a multi-piece printed wiring board having a short strip shape from the panel, it is cut by a router or a mold, but at the time of cutting, there is a crack in the resin insulating layer, and a plurality of printed wiring boards are present. It has become a bad situation at the same time.

An object of an embodiment of the present invention is to prevent the formation of cracks and cracks when a large-sized panel of a plurality of printed wiring boards is cut into a short-sized multi-piece printed wiring board of a medium-sized size. The product area extends to make the product defective, and warpage of the panel based on the difference in thermal expansion rate is prevented.

Further, another object is particularly that the resin insulating layer of the printed wiring board is formed of a resin which does not contain a core material such as glass fiber, and a wiring pattern is formed only on one surface of the resin insulating layer and no wiring pattern is formed on the other surface side. In the case of the case where the conductor posts and the dummy posts are formed of a plating film, the defects accompanying the cracks can be prevented, and the height of each of the terminals can be made substantially uniform.

Specifically, the dummy pattern 11 can be, for example, as shown in FIGS. 2A to 2D, and includes a dot pattern. The individual patterns 11b of the case and/or the linear pattern are connected to each other seamlessly or linearly through the gap portion of the individual pattern 11b without being connected through the dummy region 10. Alternatively, as shown in FIG. 2E, the overall pattern 11d may be used. Continuous formation.

In the case where the crack formed on the multi-piece printed wiring board 100 of the short-line medium-sized size is formed on the first surface SF1 side of the resin insulating layer 30, the crack is particularly large. Therefore, by providing such a dummy pattern 11, it is easy to prevent the crack from entering the product region 20 side by the dummy pattern, which is preferable. However, it is not always possible to completely prevent the crack from entering the product region 20 with respect to the crack formed on the intermediate portion in the thickness direction of the resin insulating layer 30 or the second surface SF2 side. Therefore, in the present embodiment, the dummy terminal 12 is formed. Since the dummy terminal 12 is formed to penetrate through the resin insulating layer 30, even if a crack is formed in a certain portion in the thickness direction of the resin insulating layer, the possibility of preventing the crack from entering by the dummy terminal 12 is also high.

The dummy terminal 12 has a shape and a thickness which are not affected by the shape of the dummy pattern 11, and are independently formed into an arbitrary shape. Here, the "thickness of the terminal" means the width of the largest portion of the diameter of the cross section of the terminal having the cross-sectional area of the dot. For example, if the cross section is circular, it means the diameter. If it is a diamond or a polygon, it means the length of the longest part of the diagonal line, and if it is an ellipse, it means the long diameter. On the other hand, even if it is a product region, the conductor post 25 is formed, and in view of the fact that it is formed by electroplating, the ratio of all the areas of the conductor studs 25 in the product region 20 (hereinafter, the conductor is not limited to copper) , the ratio of the ratio of all the areas of the conductor posts to the total area of a certain area to the residual copper ratio) and the residual copper ratio of the dummy area 10 are large, and the electroplating is caused by the uneven current density. The thickness is different. Finally, the ends of the terminals must be exposed on the second surface SF2 side of the resin insulating layer 30. Therefore, if the height of the terminals is excessively different due to uneven plating thickness, the height of the short terminals must be matched. The higher the height of the terminal is ground. Therefore, it is necessary to fix the thickness of the plating, that is, the height of the conductor post 25 and the dummy terminal 12 as much as possible. Therefore, the residual copper ratio on the second surface SF2 side of the product region 20 and the second surface of the dummy region 10 The difference in residual copper ratio on the SF2 side is preferably 10% or less. From this point of view, the number and thickness of the dummy posts 12 are determined.

The shape of the dummy pattern 11 will be described in detail with reference to FIGS. 2A to 2E. In FIGS. 2A to 2E, (a) is a plan explanatory view showing the first surface SF1 of the resin insulating layer 30, and (b) is a bottom surface explanatory view seen from the second surface SF2 side of the resin insulating layer 30. According to (b) of each of FIGS. 2A to 2E, it is clear that the shape of the end portion 12b of the dummy terminal 12 is formed into a circle, a rectangle, an angle (polygon), an ellipse, and a rectangle regardless of the shape of the dummy pattern 11. And so on.

In the example shown in FIG. 2A, as the individual pattern 11b, the dot pattern 11b having a quadrangular planar shape and the adjacent dot pattern 11b are connected by a connection pattern 11c. As a result, a closed loop is formed by the four dot patterns 11b and the four connection patterns 11c. In this manner, the connection pattern 11c is formed so as to form a pattern that is always closed, whereby the straight line in which the crack extends is blocked by any of the patterns 11b and 11c, and the dummy region 10 cannot be passed, so that it is easy to prevent the crack from being applied to the product. Intrusion on the side of the area 20. As described above, the dot pattern 11b is connected by the connection pattern 11c, and the dot pattern of the circular or polygonal shape shown in FIGS. 2B to 2C is the same. That is, the connection pattern 11c connecting the individual patterns 11b may extend in either direction. In either case, a closed loop is equally formed. Further, it is preferable that the connection patterns 11c are connected to all of the adjacent dot patterns 11b to form a complete closed loop, but a part of the unconnected portions may not exist as a complete closed loop.

The dummy patterns 11 of FIG. 2D are formed by juxtaposing the line patterns in the vertical and horizontal directions, and various explanations can be obtained according to the observation manner. For example, the independent linear patterns 11b which can be regarded as the longitudinal direction are formed in parallel at appropriate intervals and are laterally arranged. The connection pattern 11c is connected to each other, and may be regarded as a mesh-like pattern in which the independent linear patterns 11b in the vertical direction are formed in parallel and the independent patterns 11c in the lateral direction intersect the individual patterns 11b in the vertical direction. In any case, the same pattern is used in the case where the above-described independent patterns are connected by a connection pattern. A dummy terminal 12 is formed at the intersection portion. Even for this configuration, the same pattern A closed loop is formed, but as described above, a part of the missing portion may also be missing without becoming a closed loop.

The example shown in FIG. 2E is an example in which the entire pattern 11d is continuously formed around the product region 20. Even if the dummy pattern 11 is formed by such an overall pattern, the dummy terminal is formed as an independent dot shape as shown in FIG. 2E(b). The reason for this is that the above-described residual copper ratio of the dummy region 10 is almost the same as the residual copper ratio of the product region 20. Preferably, the overall pattern 11d is continuous and becomes a complete closed loop, but may also break in the middle without becoming a complete closed loop.

On the other hand, as described above, the dummy terminal 12 has a cross-sectional shape of an arbitrary shape and is formed in an independent dot shape. Moreover, for example, by making the thickness of the dummy terminal 12 thinner than the thickness of the conductor post 25 formed in the product region 20, the area of the cross section of all the dummy posts 12 is relative to all areas of the dummy region 10. The ratio, that is, the residual copper ratio, is formed so that the residual copper ratio of the conductor studs 25 in the product region 20 is within 10%. As a method of making the residual copper ratio in the product region 20 and the second surface SF2 side of the dummy region 10 close to each other, in addition to making the thickness of the dummy terminal 12 thin, it can be formed only by one portion of the dummy pattern 11 The terminal 12 is dummy and the number of roots is reduced. In this case, it is considered that the dummy posts 12 are formed in a zigzag shape by zigzag (for example, two rows or more) and are disposed at a position shifted by a half pitch between the two rows. When the panel 200 of the size is cut into the multi-piece printed wiring board 100 of the medium size, cracks are generated, and it is easy to prevent the crack from entering the product region 20 side.

By setting the residual copper ratio of the product region 20 and the second surface SF2 side of the dummy region 10 to 10% or less, the height of the conductor post 25 and the dummy post 12 is substantially formed by plating. The height of the resin insulating layer 30 is reduced so that the end portions 25a and 12a are exposed on the second surface SF2 of the resin insulating layer 30.

The structure of the printed wiring board can be applied to various structures. For example, as shown in the cross-sectional view of FIG. 1A to FIG. 1B of FIG. 1B, the dummy pattern 11 and the first conductor layer can be used. 21 is simultaneously formed on the first surface SF1 of the resin insulating layer 30 of the dummy region 10, and the first conductor layer 21 is formed on each of the printed wiring boards 1a of the product region 20, 1b and 1c include a second pattern 21b such as a semiconductor element (not shown) or a first pattern 21a on which the conductor post 25 is formed, and the second surface SF2 opposite to the first surface SF1 of the resin insulating layer 30. The exposed surface of the outermost resin insulating layer, which is the outermost layer of the laminated resin insulating layer (not shown) laminated on the second surface SF2, is not formed with a wiring pattern, and is formed only on the conductor layer on the side of the first conductor layer 21. The end portion 25a of the connected conductor post 25 (refer to FIG. 4C) is exposed. Further, a dummy terminal 12 is formed in connection with the dummy pattern 11 of the dummy region 10 (see FIG. 1B). The relationship between the dummy pattern 11 and the dummy terminal 12 is as described above, and is independent of the shape of the dummy pattern 11 and is formed on the second surface SF2 side in an independent dot shape. Ideally, the dummy terminal 12 is desirably formed by straight lines passing through the gap portion thereof without passing through the product region, but even if it is not the case, the product region can be avoided as long as most of the cracks generated are prevented. Defective product, so it has a greater effect. If the number of the dummy terminals 12 is increased, the probability of blocking can be increased. However, if the residual copper ratio becomes excessively larger than the residual copper ratio of the product region 20, the height unevenness of the terminals tends to occur. Therefore, it is decided by taking the two into consideration.

In other words, as described above, the wiring pattern is formed only on one surface of the resin insulating layer 30, and the printed wiring board having the structure in which only the conductor post 25 is exposed on the other surface side is likely to be warped, and the crack formed on the edge 10a is easy. This example is shown extending to the product region 20. Further, the second surface SF2 side of the resin insulating layer 30 is connected to a mother board or the like via the conductor post 25. However, as described above, it is not limited to such a printed wiring board in which a wiring pattern is formed only on one side. In addition, the manufacturing method of the printed wiring board 100 will be described in detail below, and there are two methods for the timing of cutting the multi-piece printed wiring board 100 into a short strip shape, and therefore, it will be described.

First, FIG. 1B is a state of the final stage of manufacture, and is an explanatory view of a section of FIG. 1A taken along the line 1B-1B. That is, it is not a complete cross-sectional view, but a part of only a main portion is omitted, and portions of the dummy pattern 11 and the dummy posts 12 are shown by only one row. As described above, the first conductor layer 21 and the resin are laminated on the support plate 80 via the metal film 81. The edge layer 30 finally removes the support plate 80 to form a printed wiring board. The support plate 80 is attached to the dummy substrate 80a, for example, on the dummy substrate 80a (see FIG. 4A), for example, the carrier copper foil 80b side of the metal film 81 with the carrier copper foil 80b. Further, the first conductor layer 21 including the second pattern 21b and the like is formed on the metal film 81 together with the dummy pattern, and a dummy terminal 12 is formed together with a conductor post (not shown) to form a resin insulating layer. 30 buried structure.

Then, when the support plate 80 is peeled off, a large-sized panel formed on both sides of the support plate 80 can be obtained. In the state of the large-sized panel 200, the above-described D-D line is used as the first method. Fig. 1C shows a state in which the support plate 80 is peeled off after being peeled off. If this is done, the cutting is easy, but since it is necessary to handle the thin and large-sized panel 200, it is necessary to perform the work while paying attention to it.

On the other hand, the state before the peeling of the support plate 80 from the state of FIG. 1B is the second method. Figure 1D shows the situation. That is, Fig. 1D shows a state in which the separation is cut off in the state of Fig. 1B. Then, the strip-shaped multi-piece printed wiring board 100 is peeled off from the support board 80 to form the multi-piece printed wiring board 100. Then, etching removal or the like of the metal film 81 described below is performed. In the case of this method, the processing at the time of the cutting operation is easy. However, since the operation of peeling off the multi-piece printed wiring board 100 from the support board 80 and the removal of the metal film 81 are necessary, the multi-chip printed wiring board 100 of the medium size is required. It takes place, so the number of steps is taken.

Further, the resin insulating layer 30 is not particularly limited, and as described above, cracks easily extend in those who do not include a core material such as glass fibers. The reason is considered to be that if a core material is used, it is easy to prevent cracks, but if there is no core material, there is no place for prevention, and the crack will expand. Therefore, in the present embodiment, it is particularly effective when a resin containing no core material is used. The resin which does not contain a core material may be a resin film for interlayer insulation (a film formed only of an inorganic filler and a resin composition) or a resin for molding (a resin which is solidified in a mold and solidified), but may be used. For either of them. However, the present embodiment is not limited to the resin that does not include the core material, and the effect of the present embodiment can be exhibited even if it is a resin containing a core material. Further, the inorganic filler impregnated into the resin insulating layer 30 preferably contains 70 to 90% by weight. Also, use the tree for molding In the case of a grease, when a resin material for molding molding having a thermal expansion coefficient of 3 to 120 ppm/° C. and an elastic modulus of 0.01 to 30 GPa is used, the joint portion of the electronic component or the like attached to the printed wiring board 100 is less likely to be large. The thermal stress is therefore preferred.

As described above, in the present embodiment, the dummy patterns 11 are formed in the dummy regions 10 in a continuous manner in each pattern, and further, the dummy posts 12 are formed, whereby the warpage of the multi-piece printed wiring board 100 can be prevented. Further, when the printed wiring board 100 is cut into the multi-piece type from the panel 200, for example, even when a crack is formed in the end portion 10a of the multi-piece printed wiring board 100, the crack can be prevented from intruding into the product region 20 .

3A to 3B show an example of a pattern of each of the printed wiring boards 1 constituting the multi-piece printed wiring board 100. In other words, FIG. 3A shows an arrangement example of the second surface SF2 of the resin insulating layer 30 of the conductor post 25 of the printed wiring board 1, and FIG. 3B shows an arrangement example of the first surface SF1 of the resin insulating layer 30. As shown in FIG. 3A, a conductor terminal row 26 formed by arranging a plurality of conductor posts 25 in one direction may be formed by arranging two rows in parallel along each side of the printed wiring board 1. The conductor post rows 26 may be arranged in parallel in three or more rows. As shown in FIG. 3A, the conductor post rows 26 formed along the respective sides may be spaced apart from each other, and the conductors may be arranged in a lattice shape at the center portion. Terminal 25. Further, for example, it may be formed in a lattice shape over the entire surface of the second surface SF2 of the resin insulating layer 30. The dummy patterns described above are not formed around the respective printed wiring boards 1. Therefore, although not shown in FIG. 3A, the dummy posts 12 of the above-described dummy regions 10 are formed simultaneously with the conductor posts 25.

In the first conductor layer 21 on the first surface SF1 side of the resin insulating layer 30 of each printed wiring board 1 shown in FIG. 3A, for example, as shown in FIG. 3B, the first and second patterns 21a and 21b and the first and second patterns 21a and 21b can be formed. The wiring pattern 21d to which the first pattern 21a and the second pattern 21b are connected. In other words, the conductor post 25 shown in FIG. 3A is formed on the surface (the second surface SF2) opposite to the surface (first surface SF1) shown in FIG. 3B of each of the first patterns 21a. In the example shown in FIG. 3B, the second pattern 21b is connected to a connection pad 21c of a semiconductor element (not shown). For example, an electrode such as an IC (integrated circuit) wafer is bonded by solder bumps or bonding. Line and other electrical connections Pick up. 3B is an example of a connection pad 21c in which semiconductor elements connected to electrodes are respectively arranged on four sides of a rectangular outer shape, and four connection pads arranged in a fixed interval by the connection pads 21c are integrally formed into a rectangular shape. Mode configuration. Further, the connection pad 21c (second pattern 21b) and the first pattern 21a formed around the connection pad 21c are connected by the wiring pattern 21d. Thereby, the electrode of the semiconductor element (not shown) can be electrically connected to another wiring board, such as a mother board (not shown) via the conductor terminal 25. Further, each pattern of the first conductor layer 21 shown in FIG. 3B is merely an example, and an arbitrary conductor pattern can be formed in accordance with a circuit formed in the printed wiring board 1.

Then, the first conductor layer 21 is formed on the first surface SF1 of the resin insulating layer 30, and only the conductor post 25 is exposed on the printed wiring board on the side of the second surface SF2, and is provided on the outer periphery of the product region 20. The dummy region 10 forms an example of the dummy pattern 11 and the dummy terminal 12, and the manufacturing method will be described with reference to FIGS. 4A to 4G. Further, the both sides of FIGS. 4A to 4G are main portions, the center portion is omitted, and the first conductor layer 21 is also simplified. The dummy pattern 11 and the dummy terminal 12 are also shown on each side.

First, as shown in FIG. 4A, a metal film 81 is prepared. Specifically, as the starting material, the support plate 80 and the metal film 81 including the dummy substrate 80a and the carrier copper foil 80b are prepared, and the two-layer carrier copper foil 80b of the dummy substrate 80a is bonded by pressurization and heating. The support plate 80 is formed, and the metal film 81 is followed by the carrier copper foil 80b of the support plate 80. Specifically, the carrier copper foil 80b may be previously attached to the metal film 81, and the carrier copper foil 80b side of the metal film 81 with the carrier copper foil 80b may be attached to the dummy substrate 80a of the support board 80. The support plate 80 is preferably a semi-cured prepreg or the like which is obtained by impregnating a core material such as a glass cloth with an insulating resin such as an epoxy resin containing an inorganic filler, but is not limited thereto. Other materials can also be used. As the material of the metal film 81, a material which can form the first conductor layer 21 on the surface is used, and a copper foil having a thickness of 1 to 3 μm is preferably used. Further, as the carrier copper foil 80b, for example, a copper foil having a thickness of 15 to 30 μm, preferably 18 μm, is used. However, the thickness of the carrier copper foil 80b is not limited thereto, and may be other thicknesses.

The bonding method of the carrier copper foil 80b and the metal film 81 is not particularly limited, and for example, The substantially entire surface of the attachment surface of the two is attached by a thermoplastic adhesive which is easily peeled off (not shown), or may be provided in a blank portion in the vicinity of the outer circumference of the conductor pattern of the first conductor layer 21. Bonding is performed by an adhesive or ultrasonic connection. Further, for example, the support plate 80 is formed of a double-sided copper foil laminate, and the surface copper foil is used as the carrier copper foil 80b, and a single metal film 81 may be bonded thereto by the above-described method or the like.

4A to 4E show an example in which the metal film 81 is bonded to both surfaces of the support plate 80, and the first conductor layer 21, the conductor post 25, the dummy post 12, and the resin insulating layer 30 are formed on each surface. According to this method, it is preferable to form the first conductor layer 21, the conductor post 25, the dummy terminal 12, and the like simultaneously on the two panels. However, the first conductor layer 21 or the like may be formed only on one surface of the support plate 80, or a conductor layer or the like having a circuit pattern different from each other may be formed on both sides. In the following description, an example in which the same circuit pattern is formed on both sides will be described. Therefore, only one surface will be described, and the description of the other surface side will be omitted, and the other surface side of each drawing will be omitted.

Next, on the metal film 81, wiring patterns 21a and 21b and dummy patterns 11 of the first conductor layer 21 for a plurality of multi-piece printed wiring boards are formed. Specifically, the method of forming the respective wiring patterns 21a and 21b and the dummy pattern 11 of the first conductor layer 21 is not particularly limited, and for example, an electroplating method can be used. In this case, first, a resist material (not shown) is applied or laminated on the entire surface of the metal film 81, and is formed by patterning other than the portions where the first conductor layer 21 and the dummy pattern 11 are formed. A plating resist film (not shown) is formed in the region. Then, the metal film 81 is used as a seed layer (electroelectric layer) for plating on the exposed surface of the metal film 81 on which the resist film is not formed, and for example, a plating layer is formed by plating. Then, the plating resist film is removed. As a result, as shown in FIG. 4B, the first conductor layer 21 and the dummy pattern 11 such as the first pattern 21a (the pattern in which the conductor post 25 is formed) and the second pattern 21b (the pad on which the semiconductor element or the like is mounted) are formed. A specific circuit pattern is formed on the metal film 81. The first conductor layer 21 is preferably formed of the same material as the conductor post 25 or the dummy post 12 described below, and is preferably formed of copper. Moreover, the first conductor layer 21 and the dummy pattern 11 are preferably formed to be 10 to 30. The thickness of μm is not limited to this.

Next, as shown in FIG. 4C, conductor posts 25 and dummy posts 12 are formed on portions of the pattern 21a and the dummy pattern 11 of one of the first conductor layers 21, respectively. Specifically, the conductor post 25 is formed on the first pattern 21a of the first conductor layer 21, and the dummy post 12 is formed on the dummy pattern 11. In other words, first, the surface (exposed surface) on the side opposite to the surface of the first conductor layer 21 and the dummy pattern 11 that is in contact with the metal film 81 is excluded from the portion where the conductor post 25 and the dummy post 12 are formed. A part of the metal film 81 which is not covered by the first conductor layer 21 or the dummy pattern 11 is formed with a plating resist film (not shown). The plating resist film is formed to have a thickness of at least about 50 to 150 μm. Then, on the first pattern 21a and the dummy pattern 11 in which the plating resist film is not formed, the metal film 81 is a seed layer (electrostatic layer) to be plated, and for example, a plating layer can be formed by plating. Then, the plating resist film is removed. As a result, as shown in FIG. 4C, the conductor post 25 including the plating layer is formed on the exposed surface of the first pattern 21a, and the dummy post 12 is formed on the exposed surface of the dummy pattern 11 in the same manner. The conductor post 25 and the dummy post 12 are preferably formed of the same material as the first conductor layer 21, and are preferably formed of copper. Further, the conductor post 25 and the dummy post 12 are preferably formed to have a thickness of 50 to 150 μm, but are not limited thereto.

After forming the conductor post 25 and the dummy post 12, it is preferable to improve the adhesion to the resin insulating layer 30 described below to the side of the conductor post 25 and the dummy post 12 and the first conductor layer 21. The side surface and the exposed surface of the portion where the conductor post 25 and the dummy post 12 are not formed are roughened. The method of the roughening treatment is not particularly limited, and examples thereof include a soft etching treatment or a blackening (oxidation)-reduction treatment. Each of the roughened faces is preferably treated with an arithmetic mean roughness of 0.1 to 1 μm. Further, in the case of performing the roughening treatment, an annealing treatment for growing the crystal of the electroplated copper to stabilize the roughening may be performed between the removal and the roughening treatment of the plating resist film 85.

Next, as shown in FIG. 4D, the resin insulating layer 30 is formed so as to cover the exposed surface of the first conductor layer 21, the side surface of the conductor post 25, and the side surface of the dummy terminal 12. Specifically In other words, although not shown, the insulating material (prepreg) in the form of a sheet or a film is laminated on the conductor post 25 and the dummy post 12, and is pressed toward the support plate 80 side and heated. The insulating material is softened by heating, and flows between the first pattern 21a and the second pattern 21b, between the second patterns 21b, and between the conductor posts 25 or the dummy posts 12 in a semi-hardened state. Cured. Then, the insulating material is completely cured by heating, and as shown in FIG. 4D, the resin insulating layer 30 is formed, and the first pattern 21a, the second pattern 21b, the conductor post 25, and the dummy post 12 are buried in the resin. Insulation layer 30. Thus, the method of forming the resin insulating layer 30 by laminating a sheet-like or film-shaped insulating material is preferable in that the resin insulating layer 30 can be formed by a general manufacturing apparatus of a printed wiring board. After the resin insulating layer 30 is formed, it is preferable to perform polishing polishing to remove burrs which are generated when the resin insulating layer 30 is formed.

Next, as shown in FIG. 4E, the end portion of the conductor post 25 and the dummy post 12 is exposed by polishing the second surface SF2 side of the resin insulating layer 30. Specifically, the surface of the resin insulating layer 30 on the side opposite to the metal film 81 side (exposed surface) is polished by polishing or chemical mechanical polishing (CMP) until the conductor post 25 is used. The front end of the dummy terminal 12 is exposed on the second surface SF2 side of the resin insulating layer 30.

Next, the metal film 81 is removed, and one of the multi-chip printed wiring boards including the one or two or more product regions is cut and separated, and the support plate 80 and the metal film 81 are removed, and The 1D DD line is cut off and separated. In other words, there are two types of the above-described FIG. 1C and FIG. 1D from the time when the panel 200 is cut into the multi-piece printed wiring board 100, and the method is performed by any method. Specifically, for example, as shown in FIG. 4F, first, the support plate 80 is separated from the metal film 81. In other words, the carrier copper foil 80b of the support plate 80 is heated in a state where the entire printed wiring board in the middle of the step is heated, and the thermoplastic adhesive (not shown) joined to the carrier copper foil 80b of the support sheet 80 and the metal film 81 is softened. The force of the direction along the interface with the metal film 81 is applied to separate the carrier copper foil 80b from the metal film 81. Or, as described above, when the two are joined by a bonding agent or an ultrasonic connection in a blank portion near the outer periphery, The bonding portion is further on the inner peripheral side, and the support plate 80 and the metal film 81 are cut together with the resin insulating layer 30 and the like, and the joint portion of the adhesive or the like is cut off, whereby the carrier copper foil 80b can be separated from the metal film 81. . As a result, the panel 200 of the printed wiring board in the middle of the steps formed on both sides of the support plate 80 at the center portion shown in FIG. 4F is obtained. Figure 4F shows only one of them. Furthermore, FIG. 4F only shows the middle of the step of the printed wiring board shown on the lower surface side of the support board 80 in FIG. 4E.

Then, as shown in FIG. 4G, the metal film 81 is removed by, for example, etching or the like. As described above, when copper is used for all of the metal film 81, the first conductor layer 21, the conductor post 25, the dummy pattern 11, and the dummy post 12, the constituent materials of each can be dissolved in the same etching liquid. Therefore, when the metal film 81 is etched, the surface of the conductor post 25 and the dummy post 12 exposed on the second surface SF2 side of the resin insulating layer 30 is exposed to the etching liquid, and together with the metal film 81, The conductor posts 25 and the front ends of the dummy posts 12 are partially etched. Then, after the metal film 81 is completely removed, the exposed surface of the first conductor layer 21 and the dummy pattern 11 exposed on the first surface SF1 of the resin insulating layer 30 and the conductor post 25 are removed by the removal of the metal film 81. The front end portion 25a and the front end portion of the dummy terminal 12 are exposed to the etching liquid to be etched. As a result, as shown in FIG. 4G, the exposed surface of the first conductor layer 21 and the exposed surface of the dummy pattern 11 are further recessed than the first surface SF1 of the resin insulating layer 30, and the end portion 25a of the conductor post 25 and the dummy terminal 12 are formed. The end portion 12b is more recessed than the second surface SF2 of the resin insulating layer 30, and the recess of the end portion 25a of the conductor post 25 from the second surface SF2 of the resin insulating layer 30 is insulated from the resin of the first conductor layer 21. The depression of the first surface SF1 of the layer 30 is larger. The cutting from the panel 200 to the multi-piece printed wiring board 100 can be performed in the state of the residual metal film 81 shown in FIG. 4F, or after the metal film 81 is removed after FIG. 4G. This method is the method shown in Figure 1C above.

On the other hand, the method shown in FIG. 1D is performed after the step of FIG. 4E, and is cut by the DD line of FIG. 1A, and then the removal of the support plate 80 and the etching removal of the metal film 81 are sequentially performed, thereby obtaining a plurality of pieces. A printed wiring board 100.

After the removal of the metal film 81, the surface protective film 28 (see FIG. 5A) is preferably formed on the exposed surface of the first conductor layer 21 and the dummy pattern 11 and the front end portion 25a or the dummy terminal 12 of the conductor post 25. End portion 12b. The formation of the surface protective film 28 can be carried out by forming a plurality of single or single metal films of Ni/Au, Ni/Pd/Au, or Sn by a plating method. Further, OSP (Organic Solderability Preservatives) may be formed by blowing into a liquid protective material or by blowing a protective material. The surface protective film 28 may be formed on both the exposed surface of the first conductor layer 21 and the end portion 25a of the conductor post 25, or may be formed only in either one. Further, the surface protective film 28 may not be formed on the surface of the dummy pattern 11 or the end portion 12b of the dummy terminal 12. Further, a surface protective film of a different material may be formed on the exposed surface of the first conductor layer 21 and the end portion 25a of the conductor post 25.

Further, in addition to the formation of the surface protective film, or the surface protective film may not be formed, a bonding material including a bonding material for bonding the conductor post 25 to the external mother board or the like is formed on the end portion 25a of the conductor post 25. Layer 27 (see Fig. 5B). The material of the bonding material layer 27 is preferably formed by using a solder, applying a paste-like solder or disposing a solder ball, temporarily melting the same, and hardening it, and forming it by a plating method. However, the material or formation method of the bonding material layer is not particularly limited, and other materials and methods can be used.

By the above steps, the printed wiring board 100 cut by the D-D line of FIG. 1A is completed. As a result, a multi-piece printed wiring board having a dummy pattern 11 and a dummy terminal 12 of a size is formed in the dummy region 10, and the dummy pattern 11 is formed on the first surface SF1 of the resin insulating layer 30 and includes the use of the connection pattern 11c. The dummy pattern 11b or the continuous pattern 11d is formed, and the dummy post 12 penetrates the resin insulating layer 30, and is connected to the dummy pattern 11 so that the end portions 12b are independent from each other and are exposed in a dot shape on the second surface SF2 side.

The first conductor layer 21 is entirely embedded on the first surface SF1 side of the resin insulating layer 30 so as to be exposed on the first surface SF1 side of the resin insulating layer 30. In other words, the first conductor layer 21 and the resin insulating layer 30 are not only in contact with the other surface of the first conductor layer 21, but also on the side surface of the first conductor layer 21, specifically, the first conductor layer 21; 1 pattern 21a or second pattern The side of 21b is also connected. Therefore, even if the first pattern 21a or the second pattern 21b is formed at a fine pitch and the area of one surface of the first conductor layer 21 is small, the adhesion between the first conductor layer 21 and the resin insulating layer 30 can be maintained. Moreover, by embedding the first conductor layer 21 in the resin insulating layer 30, the printed wiring board 1 itself can be made thin.

As described above, the first pattern 21a and the second pattern 21b are formed on the first conductor layer 21. In the present embodiment, the first pattern 21a is electrically connected to a wiring pattern such as another printed wiring board (not shown) connected to the printed wiring board 1 on the second surface SF2 side of the resin insulating layer 30. Here, the other printed wiring board may be a mother board such as an electronic device using the printed wiring board 1, or may be a laminated body of an insulating layer and a conductor layer of the multilayer wiring board together with the printed wiring board 1. Further, for example, a connection pad such as a semiconductor element (not shown) may be connected to the second pattern 21b. Further, the dummy pattern 11 is formed in the above-described dummy region 10, and also serves as a base portion in the case where the dummy terminal 12 is formed. Further, a wiring pattern other than the first and second patterns 21a and 21b may be formed on the first conductor layer 21. For example, the external electrical connector among the electrodes of the semiconductor element connected to the second pattern 21b is formed on the wiring pattern of the first conductor layer 21 so as to connect the second pattern 21b and the first pattern 21a (not shown). The first pattern 21a and the conductor post 25 are electrically connected to each other.

4A to 4G are examples in which the first conductor layer 21 is formed on only one surface of the insulating layer, but the conductor layer is laminated on the second surface SF2 side of the resin insulating layer 30. In the case where the resin insulating layer is not formed on the lower end side of the resin insulating layer of the outermost layer (lowest layer), the crack is also easily formed into the resin insulating layer. Therefore, even in the case where the resin insulating layer is multi-layered, it is preferable to form a dummy terminal in the dummy region of the lowermost resin insulating layer. In this case, the resin insulating layer other than the lowermost layer may be formed by forming the conductor layer on only one side and forming the conductor layer on both sides. In short, it is preferable that the conductor layer is formed not on one surface of the resin insulating layer. On the other hand, in the resin insulating layer exposed only by the conductor post, a dummy terminal is formed in the dummy region of the outer periphery. Of course, it is preferable that the resin insulating layer is provided even when the conductor layer is provided on both sides. Body stud or conductor pattern.

In the printed wiring board shown in FIG. 6, the second conductor layer 22 is formed on the second surface SF2 side of the resin insulating layer 30, and the second resin insulating layer 31 is formed on the surface thereof so as to penetrate the second resin insulating layer 31. When the second conductor layer 22 is connected, the second conductor post 29 and the second dummy post 12a are formed, and the conductor layer is two layers, and the conductor layer is formed not on the exposed surface SF3 side of the second resin insulating layer 31 which is the outermost layer. Only the second terminal 29 is exposed.

In order to manufacture such a printed wiring board, after the step of FIG. 4E described above, it can be formed by, for example, forming a metal film on the second surface SF2 of the resin insulating layer 30 by electroless plating. For example, the pattern of the second conductor layer 22 and the second conductor post 29 and the second dummy post 12a are formed by a plating method by an additive method, and the same is formed on the same as the method shown in FIGS. 4D and 4E. 2 Resin insulating layer 31, and then, as in FIG. 4F, support plate 80 is removed, and metal film 81 is removed.

Further, the manufacturing method is not limited to this method, and various methods can be employed. For example, when the resin insulating layer 30 is formed, a metal foil such as a copper foil may be formed by pressure-bonding a resin film, or an opening may be formed after the second resin insulating layer 31 is formed. The second conductor stud 29 or the second dummy stud 12a is formed such that the two conductor posts 29 or the second dummy studs 12a are buried in the openings. Further, in the case of forming a multilayer printed wiring board, by repeating these steps, a desired multilayer printed wiring board can be formed.

1a, 1b, 1c‧‧‧ Printed wiring board

10‧‧‧Dummy area

10a‧‧‧ edge

11‧‧‧Dummy design

20‧‧‧Product area

100‧‧‧Multi-chip printed wiring board

200‧‧‧ panel

Claims (21)

A multi-piece printed wiring board having: a product region including a plurality of printed wiring boards; and a dummy region formed around one or more of the product regions; and having a resin insulating layer, The resin insulating layer has a first surface and a second surface opposite to the first surface, and each of the printed wiring boards of the product region has a first conductor layer which is exposed to the first one of the resin insulating layers on only one side. And a conductor terminal connected to the first conductor layer and extending through the resin insulating layer to expose an end portion on the second surface side; the dummy region having a dummy pattern formed on the surface a first surface of the resin insulating layer, comprising an individual pattern or an overall pattern connected by a connection pattern formed to surround the product region; and a dummy terminal penetrating through the resin insulating layer and exposing the ends independently of each other The dummy pattern is connected to the second surface side. The printed wiring board according to claim 1, wherein the dummy pattern dot patterns and/or the line patterns are seamlessly coupled to each other. A printed wiring board according to claim 1, wherein said dummy pattern is continuously formed by a unitary pattern. The printed wiring board according to claim 1, wherein in the second surface, a difference between a residual copper ratio of the dummy region and a residual copper ratio of the product region is 10% or less. The printed wiring board according to any one of claims 1 to 4, wherein a thickness of one of the above conductor posts is greater than a thickness of one of the dummy posts. The printed wiring board according to any one of claims 1 to 4, wherein the resin insulating layer is formed of a resin not containing a core material. The printed wiring board according to any one of claims 1 to 4, wherein the dummy terminal has a cross-sectional shape of a circle, a rectangle, an angle, an ellipse, or a rectangle. The printed wiring board according to any one of claims 1 to 4, wherein the second surface of the resin insulating layer is further formed with a laminated resin insulating layer, and the dummy terminal is exposed to the outermost resin insulating layer of the laminated resin insulating layer. Floor. The printed wiring board according to any one of claims 1 to 4, wherein the conductor post and the dummy post are formed of a plating film. The printed wiring board according to any one of claims 1 to 4, wherein a residual copper ratio of the dummy region on the second surface side of the resin insulating layer is 5 to 30%. The printed wiring board according to any one of claims 1 to 4, wherein the height of the conductor post and the dummy post is 10 to 150 μm, and the thickness of the first conductor layer is 5 to 30 μm. The printed wiring board according to any one of claims 1 to 4, wherein the resin insulating layer comprises a resin material for molding molding having a thermal expansion coefficient of 3 to 120 ppm/° C. and an elastic modulus of 0.01 to 30 GPa. The printed wiring board according to any one of claims 1 to 4, wherein the resin insulating layer contains 70 to 90% by weight of an inorganic filler. The printed wiring board according to any one of claims 1 to 4, wherein the side surface of the conductor post and/or the dummy post is roughened to have a rough surface roughness. The printed wiring board according to any one of claims 1 to 4, wherein a surface protective film is formed on the end portion of the conductor post. The printed wiring board according to claim 15, wherein a surface protective film is formed on the exposed surface of the first conductor layer, the surface protective film comprising a material different from a material of the surface protective film formed on the end portion of the conductor post. . The printed wiring board according to any one of claims 1 to 4, wherein the end portion of the conductor post is coated with solder. The printed wiring board according to any one of claims 1 to 4, wherein the dummy studs are formed in at least two rows, and each of the dummy studs is configured in a zigzag shape. A multi-piece printed wiring board having: a product region including a plurality of printed wiring boards; and a dummy region formed in one or more of the above-mentioned product regions And a method of manufacturing the multi-piece printed wiring board comprising the steps of: preparing a metal film; forming a wiring pattern and a dummy pattern of the first conductor layer for the plurality of multi-chip printed wiring boards on the metal film; Forming a conductor post and a dummy post on each of the pattern of the first conductor layer and one of the dummy patterns; covering the exposed surface of the first conductor layer, the side surface of the conductor post, and the dummy terminal Forming a resin insulating layer on the side surface; exposing the second terminal side of the resin insulating layer to expose the end portions of the conductor post and the dummy post; and performing the step of removing the metal film Cutting off any one of the steps of separating into a multi-piece printed wiring board including one or more product regions; the dummy region has: virtual a pattern formed on the first surface of the resin insulating layer and including an individual pattern or an overall pattern connected by a connection pattern; and a dummy terminal penetrating the resin insulating layer and exposing the ends to each other independently The two-sided side is connected to the dummy pattern described above. A method of manufacturing a multi-chip printed wiring board according to claim 19, wherein said conductor post and said dummy post are simultaneously formed by electroplating. The method of manufacturing a multi-piece printed wiring board according to claim 19 or 20, wherein the side faces of the conductor post and the dummy post are roughened before the formation of the resin insulating layer.