TWI569464B - 化合物半導體薄膜結構 - Google Patents

化合物半導體薄膜結構 Download PDF

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TWI569464B
TWI569464B TW104134646A TW104134646A TWI569464B TW I569464 B TWI569464 B TW I569464B TW 104134646 A TW104134646 A TW 104134646A TW 104134646 A TW104134646 A TW 104134646A TW I569464 B TWI569464 B TW I569464B
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compound semiconductor
epitaxial layer
film structure
thin film
substrate
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TW201715748A (zh
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楊仲傑
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隆達電子股份有限公司
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Priority to CN201510800407.7A priority patent/CN106611810B/zh
Priority to US15/262,306 priority patent/US10229976B2/en
Priority to JP2016196308A priority patent/JP2017095343A/ja
Priority to EP16194832.8A priority patent/EP3159913A1/en
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Description

化合物半導體薄膜結構
本發明的實施例是有關於一種半導體薄膜結構。特別是有關於一種化合物半導體(compound semiconductor)薄膜結構。
含鋁(Al)、鎵(Ga)或銦(In)...等之3B族元素與含氮(N)之5B族元素的氮化物系Ⅲ-V族化合物半導體材料具有寬能隙的特性，可用來製作半導體鐳射(LD；laser diode)、發光二極體(LED；light emitting diode)、探測器、高頻高功率電晶體等電子元件。
由於目前氮化物系Ⅲ-V族化合物半導體層尚不能得到適於磊晶生長的基板。因此，與常用的藍寶石基板或矽基板之間會有較大的晶格失配度(lattice mismatch)，導致磊晶層產生錯位(dislocation)，進而造成元件性能劣化。為了改善半導體薄膜結構的磊晶品質，減少錯位密度，現已發展出多種提高磊晶成長品 質的方法，例如低溫緩衝層技術、插入層技術、側向成長技術(epitaxial lateral overgrowth,ELO)...等。
傳統的低溫緩衝層技術與插入層技術都是先低溫生長薄層緩衝層之後，進行高溫退火，使低溫緩衝層具有較低密度的晶核，再進行第二階段高溫磊晶生長。雖然能大幅降低磊晶層的成核密度，但是磊晶結構的錯位密度仍然很大。而側向成長技術須要先在磊晶成長面上以蝕刻等製程形成規則狀孔洞或凸出部，以阻擋磊晶製程中晶格缺陷往上延伸，製作過程相對複雜。再加上，側向成長技術的光罩特徵尺寸(critical dimension)和製程裕度(process window)皆屬於微米級別，製作時間長和成本相對較高，難以大面積應用。
因此，有需要提供一種先進的化合物半導體薄膜結構，以解決習知技術所面臨的問題。
根據本發明的實施例，提供一種化合物半導體薄膜結構，包括基材、第一化合物半導體磊晶層以及第二化合物半導體磊晶層。基材具有一個頂部平面。第一化合物半導體磊晶層形成於頂部平面上，且具有一個位於第一化合物半導體磊晶層面對頂部平面之相反一側的磊晶介面，以及至少一個位於第一化合物半導磊晶體層之中的凹室。第二化合物半導體磊晶層，形成於磊晶介面上。其中，頂部平面與凹室之底部之間的距離，實質介於 0.8微米(μm)至1.3微米之間。
根據上述，本發明的實施例係提出一種化合物半導體薄膜結構。其係以磊晶成長技術在基材頂部平面上形成一個厚度範圍實質介於1微米至1.5微米之間的第一化合物半導體薄層，使化合物半導體薄層具有由複數個凹室所隔離的複數個規則排列的島狀結構。接著繼續在島狀結構上形成第二化合物半導體薄層，並覆蓋於凹室開口之上。形成具有不規則排列之孔隙(凹室)的化合物半導體薄膜結構，使基材頂部平面與凹室之底部之間的距離，實質介於0.8微米(μm)至1.3微米之間。
由於，孔隙(凹室)的存在可以阻擋磊晶製程中晶格缺陷往上延伸。因此，可以減少第二化合物半導體磊晶層的錯位密度，提高化合物半導體薄膜結構的品質。加上，不需要額外在基材上進行蝕刻以形成規則狀孔洞或凸出部，即可藉由磊晶成長製程，在基板上形成自對準(self-assembled)的化合物半導體薄膜結構，可減化製程步驟達到降低製程成本的發明目的。
100‧‧‧化合物半導體薄膜結構
101‧‧‧基材
101a‧‧‧基板
101b‧‧‧前驅層
101c‧‧‧基材的頂部平面
102‧‧‧第一磊晶成長製程
103‧‧‧第一化合物半導體磊晶層
103a‧‧‧島狀結構
103b/103b’‧‧‧凹室
103c‧‧‧島狀結構的頂部
103d‧‧‧凹室之底部
104‧‧‧第二磊晶成長製程
105‧‧‧第二化合物半導體磊晶層
106‧‧‧磊晶介面
303‧‧‧第一化合物半導體磊晶層
303a‧‧‧島狀結構
303b‧‧‧凹室
303c‧‧‧島狀結構的頂部
H‧‧‧第一化合物半導體磊晶層的厚度
D‧‧‧頂部平面與凹室底部之間的距離
R‧‧‧島狀結構的直徑
W1‧‧‧凹室的開口寬度
為了對本發明之上述實施例及其他目的、特徵和優點能更明顯易懂，特舉數個較佳實施例，並配合所附圖式，作詳細說明如下：第1A圖至第1C圖係根據本發明的一實施例所繪示之形成 化合物半導體薄膜結構的製程結構剖面示意圖；第2圖係以掃描式電子顯微鏡(Scanning Electron Microscope，SEM)對第1B圖之第一化合物半導體磊晶層所攝取的電子顯微影像；以及第3A圖和第3B圖係以掃描式電子顯微鏡(Scanning Electron Microscope，SEM)分別對成長厚度實質小於1微米和大於1.5微米的第一化合物半導體磊晶層所攝取的電子顯微影像。
本發明是提供一種化合物半導體薄膜結構，可解決習知氮化物系Ⅲ-V族化合物半導體磊晶薄膜晶格錯位密度過大的問題，並且可同時簡化製程步驟，節省製造成本。為讓本發明之上述和其他目的、特徵和優點能更明顯易懂，下文特舉數種化合物半導體薄膜結構及其製作方法做為較佳實施例，並配合所附圖式，作詳細說明如下。
但必須注意的是，這些特定的實施案例與方法，並非用以限定本發明。本發明仍可採用其他特徵、元件、方法及參數來加以實施。較佳實施例的提出，僅係用以例示本發明的技術特徵，並非用以限定本發明的申請專利範圍。該技術領域中具有通常知識者，將可根據以下說明書的描述，在不脫離本發明的精神範圍內，作均等的修飾與變化。在不同實施例與圖式之中，相同的元件，將以相同的元件符號加以表示。
第1A圖至第1C圖係根據本發明的一實施例所繪示之形成化合物半導體薄膜結構100的製程結構剖面示意圖。製作化合物半導體薄膜結構100的方法包括下述步驟：首先提供一基材101(如第1A圖所繪示)。在本發明的一些實施例之中，基材101可以是一種藍寶石基板、半導體基板、陶瓷基板或塑化基板。在本發明的另一些實施例之中，基材101也可以是一種位於係位於基板101a，例如藍寶石基板、半導體基板、陶瓷基板或塑化基板，上的半導體前驅層101b。例如在本實施例中，基材101是位於藍寶石基板101a上的氮化鋁(AlN)前驅層101b。
接著，在基材101(氮化鋁前驅層101b)的頂部平面101c上進行第一磊晶成長製程102，形成第一化合物半導體磊晶層103(如第1B圖所繪示)。
在本發明的一些實施例中，第一化合物半導體磊晶層103包括含鋁半導體材料。含鋁半導體材料係選自於由氮化鋁(AlN)、氮化鋁鎵(AlGaN)、氮化鋁銦鎵(AlInGaN)及上述之任意組合所組成的一族群。在本實施例中，第一化合物半導體磊晶層103較佳可以是氮化鋁磊晶層。
請參照第2圖，第2圖係以電子顯微鏡對第1B圖之第一化合物半導體磊晶層103所攝取的顯微影像。其中，由第一磊晶成長製程102所形成的氮化鋁磊晶層(第一化合物半導體磊晶層103)具有複數個規則排列的六角形島狀結構103a。每一個島狀結構103a的直徑R實質介於2微米至4微米之間。且如第2 圖所示，第一化合物半導體磊晶層103的俯視外觀呈蜂巢狀。
詳言之，第一化合物半導體磊晶層103具有複數個凹室103b，用來將第一化合物半導體磊晶層103區隔成複數個規則排列的六角形島狀結構103a。其中，每一個凹室103b具有上寬下窄的剖面形狀，每一個凹室103b的開口寬度W1實質介於0.1微米至0.5微米之間，可將第一化合物半導體磊晶層103區隔成複數個規則排列的六角錐形島狀結構103a(如第1B圖所繪示)。
另外，第一化合物半導體磊晶層103的每一個島狀結構103a具有實質平坦的頂部103c。例如，在本實施例之中，每一個島狀結構103a的頂部103c係實質平行氮化鋁磊晶層之c-plane方向的平面。且值得注意的是，要使第一化合物半導體磊晶層103的每一個島狀結構103a具有實質平坦的頂部103c，第一化合物半導體磊晶層103的厚度H必須有所限制。例如，在本發明的一些實施例之中，第一化合物半導體磊晶層103的厚度H範圍必須控制在實質介於1微米至1.5微米之間。第一化合物半導體磊晶層103的厚度H過大或太小，皆無法使每一個島狀結構103a具有實質平坦的頂部103c。
請參照第3A圖和第3B圖，第3A圖和第3B圖係以掃描式電子顯微鏡分別對成長厚度實質小於1微米和大於1.5微米的第一化合物半導體磊晶層303所攝取的電子顯微影像。由第3A圖可觀察到，當第一化合物半導體磊晶層303的成長厚度實質小於1微米時，第一化合物半導體磊晶層303之中所形成的 凹室303b仍呈現不規則裂縫狀。因此，尚未無法將第一化合物半導體磊晶層303區隔成複數個規則排列的六角錐形島狀結構(如第2圖所示)。
而由第3B圖可觀察到，當第一化合物半導體磊晶層303的成長厚度實質大於1.5微米時，第一化合物半導體磊晶層303的六角錐形島狀結構303a的頂部303c出現不規則分佈的陰影，且經由量測六角錐形島狀結構303a頂部303c的X光反射率(X-ray reflectometry)，更顯示六角錐形島狀結構303a的頂部303c已非平行於氮化鋁磊晶層同一晶格方向的平坦表面。
之後，進行第二磊晶成長製程104，在第一化合物半導體磊晶層103上形成第二化合物半導體磊晶層105，形成如第1C圖所繪示的化合物半導體薄膜結構100。其中，第二磊晶成長製程104延續第一磊晶成長製程102，但磊晶成長溫度提高。第二磊晶成長製程104的厚度實質介於0.5微米至1微米之間；較佳係0.8微米。
第二磊晶成長製程104過程中，磊晶形成的化合物半導體並不會完全填滿凹室103b，僅係隨機部分地填充位於第一化合物半導體磊晶層103中的凹室103b，而逐漸形成不規則排列之凹室103b’(孔隙)。所形成的第二化合物半導體磊晶層105覆蓋於凹室103b’上，與第一化合物半導體磊晶層103之六角錐形島狀結構103a的頂部103c直接接觸；且在第二化合物半導體磊晶層105與第一化合物半導體磊晶層103之間形成一個磊晶介面 106。詳言之，磊晶介面106係位於第一化合物半導體磊晶層103面對基材101之頂部平面101c的相反一側。另外，基材101之頂部平面101c與凹室103b’的底部之間的距離D，實質介於0.8微米至1.3微米之間。
由於在本實施例中，第一化合物半導體磊晶層103的每一個島狀結構103a的頂部103c具有實質平行氮化鋁磊晶層之c-plane方向的平面，可提供第二磊晶成長製程104一個實質平坦的表面。加上，凹室103b’可以阻擋磊晶製程中晶格缺陷往上延伸。因此，可以減少第二化合物半導體磊晶層105的晶格錯位密度，提高化合物半導體薄膜結構100的磊晶品質。
另外，在本發明的一些實施例中，第一磊晶成長製程102和第二磊晶成長製程104可以在相同的反應槽中原位(in situ)進行，形成自對準的化合物半導體薄膜結構100。而不需要額外在基材上進行蝕刻以形成規則狀孔洞或突出部，可減化製程步驟達到降低製程成本的發明目的。
根據上述，本發明的實施例係提出一種化合物半導體薄膜結構。其係以磊晶成長技術在基材頂部平面上形成一個厚度範圍實質介於1微米至1.5微米之間的第一化合物半導體薄層，使化合物半導體薄層具有由複數個凹室所隔離的複數個規則排列的島狀結構。接著繼續在島狀結構上形成第二化合物半導體薄層，並覆蓋於凹室開口之上。形成具有不規則排列之孔隙(凹室)的化合物半導體薄膜結構，使基材頂部平面與凹室之底部之間的 距離，實質介於0.8微米至1.3微米之間。
由於，孔隙(凹室)的存在可以阻擋磊晶製程中晶格缺陷往上延伸。因此，可以減少第二化合物半導體磊晶層的晶格錯位密度，提高化合物半導體薄膜結構的品質。加上，不需要額外在基材上進行蝕刻以形成規則狀孔洞或凸出部，即可藉由磊晶成長製程，在基板上形成自對準的化合物半導體薄膜結構，可減化製程步驟達到降低製程成本的發明目的。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明。此處所述的製程步驟和結構並未涵蓋製作整體積體電路的完整製造過程。本發明可以和許多目前已知或未來被發展出來的不同積體電路製作技術合併實施。本發明所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾。因此，本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100‧‧‧化合物半導體薄膜結構
101‧‧‧基材
101a‧‧‧基板
101b‧‧‧前驅層
101c‧‧‧基材的頂部平面
103‧‧‧第一化合物半導體磊晶層
103a‧‧‧島狀結構
103b’‧‧‧凹室
103c‧‧‧島狀結構的頂部
103d‧‧‧凹室之底部
104‧‧‧第二磊晶成長製程
105‧‧‧第二化合物半導體磊晶層
106‧‧‧磊晶介面
H‧‧‧第一化合物半導體磊晶層的厚度
D‧‧‧頂部平面與凹室底部之間的距離

Claims (10)

  1. 一種化合物半導體薄膜結構，包括：一基材，具有一頂部平面；一第一化合物半導體磊晶層，形成於該頂部平面上，且具有一磊晶介面位於該第一化合物半導體磊晶層面對該頂部平面的相反一側，以及至少一凹室位於該第一化合物半導體磊晶層之中；以及一第二化合物半導體磊晶層，形成於該磊晶介面上；其中該頂部平面與該至少一凹室之一底部之間，具有實質介於0.8微米(μm)至1.3微米的一距離。
  2. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該至少一凹室具有上寬下窄的一剖面形狀。
  3. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該第一化合物半導體磊晶層更具有複數個不規則排列的凹室。
  4. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該第一化合物半導體磊晶層和該第二化合物半導體磊晶層皆包括一含鋁半導體材料。
  5. 如申請專利範圍4所述之化合物半導體薄膜結構，其中該含鋁半導體材料係選自於由氮化鋁(AlN)、氮化鋁鎵(AlGaN)、氮化鋁銦鎵(AlInGaN)及上述之任意組合所組成的一族群。
  6. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該基材係位於一基板上的一氮化鋁前驅層。
  7. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該第一化合物半導體磊晶層具有實質介於1微米至1.5微米的一厚度。
  8. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該第一化合物半導體磊晶層具有一蜂巢狀俯視外觀。
  9. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該第一化合物半導體磊晶層具有複數個島狀結構，且每一個島狀結構具有實質介於2微米至4微米之間的一直徑。
  10. 如申請專利範圍1所述之化合物半導體薄膜結構，其中該凹室具有實質介於0.1微米至0.5微米之間的一開口寬度。
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