TWI529876B - Package on package structure and manufacturing method thereof - Google Patents

Description

Package stack structure and its preparation method

The invention relates to a package stack structure, in particular to a package stack structure and a method for manufacturing the same.

With the evolution of semiconductor packaging technology, semiconductor devices have developed different package types, and in order to improve electrical functions and save packaging space, a plurality of package structures are stacked to form a package on package (Package on Package, POP), this package can take advantage of the heterogeneous integration of system package (SiP), which can achieve different functional electronic components, such as: memory, central processing unit, graphics processor, image application processor, etc. The system is integrated and suitable for use in a variety of thin and light electronic products.

1 is a schematic cross-sectional view of a conventional package stack structure 1. As shown in FIG. 1 , the package stack structure 1 includes a first package substrate 11 and a second package substrate 12 . The first package substrate 11 has opposite first and second surfaces 11a, 11b, and the first surface 11a is provided with a first semiconductor component 10 electrically connected to the first package substrate 11, and the second surface A ball pad 112 is provided on the 11b for bonding the solder balls 17. The second package substrate 12 has opposite third and fourth surfaces 12a, 12b, and the third surface 12a is provided with a plurality of electrical contact pads 120, and the third and fourth surfaces 12a, 12b have a solder resist layer 123, and a plurality of openings are formed to expose the electrical contact pads 120.

A solder pillar 13 is formed on the first surface 11a of the first package substrate 11 , and the fourth surface 12 b of the second package substrate 12 is stacked on the solder pillar 13 and electrically connected thereto. On the first package substrate 11. Next, an encapsulant 14 is formed between the first surface 11a of the first package substrate 11 and the fourth surface 12b of the second package substrate 12 to cover the first semiconductor device 10. Then, a plurality of second semiconductor elements 15 are disposed on the third surface 12a to electrically connect the electrical contact pads 120. The first and second semiconductor devices 10 and 15 are electrically connected to the package substrates by flip chip bonding, and may be filled in the first and second semiconductor devices 10, 15 and the first package by a primer 16. Between the substrate 11 and the second package substrate 12.

However, in the method of fabricating the package structure 1 , when the package body 14 is formed, the package body 14 ′ overflows on the electrical contact pads 120 of the second package substrate 12 and remains thereon. The encapsulant 14' is removed by laser or etching, so that the electrical contact pad 120 and the solder resist layer 123 around it are easily removed, resulting in poor reliability of the second package substrate 12.

Moreover, when the encapsulant 14' is removed by laser or etching, the encapsulant 14' cannot be completely removed, so that the second semiconductor component 15 cannot be effectively placed on the electrical contact pad 120 in a subsequent process. The electrical connection with the electrical contact pad 120 is prone to failure.

Therefore, how to overcome various problems in the prior art has become a problem that is currently being solved.

In view of the above-mentioned shortcomings of the prior art, the present invention provides a package stack structure. The first electronic component is disposed on the first package substrate and electrically connected to the first package substrate; the plurality of support members are disposed on the first package substrate; the second package The second package substrate is stacked on the first package substrate, and the second package substrate has a plurality of electrical contact pads and at least one recess, and the recess is opposite to the electric The contact pad is adjacent to the edge of the second package substrate; and the encapsulant is disposed between the first package substrate and the second package substrate and covers the first electronic component and the support members.

The present invention provides a method for fabricating a package stack structure, comprising: providing a first package substrate having a first electronic component, wherein the first electronic component is electrically connected to the first package substrate; and having a plurality of electrical contact pads The second package substrate and the at least one recess are coupled to the first package substrate by a plurality of support members, and the second package substrate is stacked on the first package substrate, and the recess is closer to the electrical contact pad. Adjacent to the edge of the second package substrate; and forming an encapsulant between the first package substrate and the second package substrate to encapsulate the first electronic component and the support members.

In the foregoing package stack structure and the manufacturing method thereof, the process of the second package substrate being stacked on the first package substrate comprises: forming a plurality of first metal pillars on the first package substrate, and forming a plurality of second metals The second metal substrate is bonded to the second metal substrate, and the second metal substrate is stacked on the first package substrate, and the first metal pillar and the second metal pillar are used as The support. Therefore, the support member has a first metal post and a second metal post combined, the first metal post is coupled to the first package substrate, and the second metal post is coupled to the second package substrate, and the support member has The solder material of the first metal pillar and the second metal pillar is combined.

In the foregoing package stack structure and method of manufacturing the same, the support member is electrically connected to the first And a second package substrate.

In the foregoing package stack structure and method of manufacturing the same, the encapsulant is formed between the first package substrate and the first electronic component.

In addition, in the foregoing package stack structure and the manufacturing method thereof, the second electronic component is disposed on the second package substrate, and the second electronic component is electrically connected to the electrical contact pad.

It can be seen that the package stack structure of the present invention and the manufacturing method thereof are designed such that the recess is adjacent to the edge of the second package substrate than the electrical contact pad, so when the package colloid is formed, the package adhesive The experience overflows in the recess and concentrates in the recess and does not flow onto the electrical contact pad. Therefore, when the residual encapsulant is removed, only the insulating protective layer of the recess and its surrounding area is damaged without damaging the electrical contact pad, thereby not affecting the reliability of the second package substrate.

Moreover, even if the encapsulant cannot be completely removed, the subsequent process will not be affected. For example, the second electronic component can still be effectively placed on the electrical contact pad, and the electrical connection with the electrical contact pad can be maintained.

1,2‧‧‧Package stack structure

10‧‧‧First semiconductor component

11, 21‧‧‧ First package substrate

11a, 21a‧‧‧ first surface

11b, 21b‧‧‧ second surface

112,212‧‧‧Ball mat

12,22‧‧‧Second package substrate

12a, 22a‧‧‧ third surface

12b, 22b‧‧‧ fourth surface

120,220‧‧‧Electrical contact pads

123‧‧‧ solder mask

13‧‧‧ Solder column

14,14’,24,24’‧‧‧Package colloid

15‧‧‧Second semiconductor component

16,26‧‧‧Bottom

17,27‧‧‧ solder balls

20‧‧‧First electronic components

200,250‧‧‧ solder bumps

210‧‧‧ solder pads

211‧‧‧First external mat

213,223‧‧‧Insulating protective layer

2130, 2230‧‧‧ openings

22c‧‧‧ edge

221‧‧‧Second external mat

222‧‧‧ Groove

23‧‧‧Support

230‧‧‧ solder materials

231‧‧‧First metal column

232‧‧‧Second metal column

25‧‧‧Second electronic components

1 is a schematic cross-sectional view of a conventional stacked package structure; wherein, FIG. 1A is a partial enlarged view of FIG. 1; and FIGS. 2A to 2D are schematic cross-sectional views showing a manufacturing method of the package stack structure of the present invention; Wherein the 2A' diagram is a partial top view of the 2A diagram.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "first", "second" and "one" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments in the relative relationship are considered to be within the scope of the present invention.

2A to 2D are schematic cross-sectional views showing the manufacturing method of the package stack structure 2 of the present invention.

As shown in FIG. 2A, a first package substrate 21 having a first surface 21a and a second surface 21b opposite to each other, and a second package substrate 22 having an opposite third surface 22a and a fourth surface 22b are provided.

The first package substrate 21 has a plurality of pads 210 and a first outer pad 211 on the first surface 21a, and a plurality of ball pads 212 on the second surface 21b, and the first and second surfaces 21a. An insulating protective layer 213 having a solder resist layer is formed on 21b, and the plurality of openings 2130 are formed to expose the solder pads 210, the first external pads 211, and the ball pad 212.

The second package substrate 22 has a plurality of electrical contact pads 220 on the third surface 22a, and a plurality of second external pads 221 on the fourth surface 22b, and the third and fourth surfaces 22a, 22b. An insulating protective layer 223 having a solder resist layer, and a plurality of openings 2230 are formed to expose the electrical contact pads 220 and the second external pads. 221, and the upper insulating protective layer 223 is further formed with a plurality of grooves 222 to expose the third surface 22a.

In this embodiment, the depth of the recess 222 can also be designed according to requirements, so the third surface 22a can be omitted, and as shown in FIG. 2A', the recess 222 is adjacent to the electrical contact pad 220. The edge 22c of the package substrate 22 is two.

Furthermore, a first metal pillar 231 is plated on the first external pad 211, and a second metal pillar 232 such as a copper pillar is electroplated on the second outer pad 221, and the first and second metal pillars are Solder material 230 may be formed on 231, 232 to facilitate subsequent stacking processes.

Moreover, the first electronic component 20 is disposed on the solder pad 210 by solder bumps 200, that is, the first electronic component 20 is electrically connected to the first package substrate 21 in a flip chip manner.

In addition, the first electronic component 20 is an active component or a passive component, a plurality of first electronic components 20 may be used, and may be selected from an active component, a passive component or a combination thereof, such as a wafer, and the passive component The components are, for example, resistors, capacitors and inductors.

As shown in FIG. 2B, the second package substrate 22 is bonded to the first surface 21a of the first package substrate 21 by a plurality of support members 23, and the second package substrate 22 is stacked on the first package substrate 22. The first package substrate 21 is on the first package substrate 21.

In this embodiment, the second metal pillar 232 is coupled to the first metal pillar 231 (or the solder material 230 thereon), and the second package substrate 22 is stacked on the first package substrate 21, and The first and second metal posts 231, 232 (and the solder material 230) are used as the support member 23.

As shown in FIG. 2C, an encapsulant 24 is formed between the first surface 21a of the first package substrate 21 and the fourth surface 22b of the second package substrate 22 to encapsulate the The first electronic component 20 and the support members 23.

In this embodiment, the encapsulant 24 is formed between the first surface 21 a of the first package substrate 21 and the first electronic component 20 . In other embodiments, a primer may be formed between the first surface 21a of the first package substrate 21 and the first electronic component 20.

As shown in FIG. 2D, the second electronic component 25 is disposed on the third surface 22a of the second package substrate 22, and the second electronic component 25 is electrically flipped (eg, by solder bumps 250). The electrical contact pad 220 is connected, and a primer 26 is formed between the second electronic component 25 and the third surface 22a of the second package substrate 22, and the ball is bonded to the second surface 21b. Pad 212.

In this embodiment, the second electronic component 25 is an active component or a passive component; or, a plurality of second electronic components 25 may be used, and may be selected from an active component, a passive component, or a combination thereof, for example, the active component is : A wafer, and the passive components are, for example, resistors, capacitors, and inductors.

The method of the present invention is such that the recess 222 is designed to be adjacent to the edge of the second package substrate 22 than the electrical contact pad 220. Therefore, when the encapsulant 24 is formed, the encapsulant 24' overflows. The recess 222 is concentrated in the recess 222. As shown in FIG. 2C, it does not flow to the electrical contact pad 220, and does not remain on the electrical contact pad 220. Therefore, when the residual encapsulant 24' is removed by laser or etching, only the recess 222 and the insulating protective layer 223 around it can be damaged without damaging the electrical contact pad 220, thereby not affecting The reliability of the second package substrate 22.

Further, when the remaining encapsulant 24' is removed by laser or etching, even if the encapsulant 24' cannot be completely removed, the subsequent process is not affected. E.g, The second electronic component 25 can still be effectively placed on the electrical contact pad 220, and the electrical connection between the solder bump 250 and the electrical contact pad 220 can be maintained well without being left by the encapsulant 24 . 'influences.

The present invention further provides a package stack structure 2 including a first package substrate 21, a first electronic component 20, a plurality of support members 23, a second package substrate 22, an encapsulant 24, and a second electronic component 25.

The first package substrate 21 has a first surface 21a and a second surface 21b opposite to each other.

The first electronic component 20 is disposed on the first surface 21 a of the first package substrate 21 and electrically connected to the first package substrate 21 .

The second package substrate 22 is coupled to the support member 23, and the second package substrate 22 is stacked on the first package substrate 21. The second package substrate 22 has a plurality of electrical contact pads 220 and at least A recess 222 is adjacent to the edge of the second package substrate 22 than the electrical contact pad 220.

The support member 23 is disposed on the first surface 21a of the first package substrate 21 and electrically connected to the first and second package substrates 21, 22. Specifically, the support member 23 has a first metal post 231 and a second metal post 232, the first metal post 231 is coupled to the first package substrate 21, and the second metal post 232 is coupled to the second package substrate. 22, the support member 23 has a solder material 230 that combines the first metal pillar 231 and the second metal pillar 232.

The encapsulant 24 is disposed between the first surface 21 a of the first package substrate 21 and the second package substrate 22 , and covers the first electronic component 20 and the support members 23 . Furthermore, the encapsulant 24 is disposed between the first surface 21 a of the first package substrate 21 and the first electronic component 20 .

The second electronic component 25 is disposed on the second package substrate 22 and electrically connected to the electrical contact pad 220.

In summary, the package stack structure of the present invention and the manufacturing method thereof are designed such that the recess is adjacent to the edge of the second package substrate than the electrical contact pad, so when the package colloid is formed, the package is formed. The gel will concentrate on the groove without flowing onto the electrical contact pad. Therefore, when the residual encapsulant is removed, the electrical contact pad is not damaged, so that the reliability of the second package substrate is not affected, and even if the residual encapsulant cannot be completely removed, the subsequent process is not affected.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

2‧‧‧Package stack structure

20‧‧‧First electronic components

21‧‧‧First package substrate

21a‧‧‧ first surface

21b‧‧‧ second surface

212‧‧‧Ball mat

22‧‧‧Second package substrate

22a‧‧‧ third surface

22b‧‧‧Fourth surface

220‧‧‧Electrical contact pads

222‧‧‧ Groove

23‧‧‧Support

230‧‧‧ solder materials

231‧‧‧First metal column

232‧‧‧Second metal column

24‧‧‧Package colloid

25‧‧‧Second electronic components

250‧‧‧ solder bumps

26‧‧‧Bottom glue

27‧‧‧ solder balls

Claims (12)

A package stack structure includes: a first package substrate; a first electronic component disposed on the first package substrate and electrically connected to the first package substrate; and a plurality of support members disposed on the first package substrate a second package substrate, wherein the second package substrate is stacked on the first package substrate, and the second package substrate has a plurality of electrical contact pads and at least one recess, and the recess The slot is adjacent to the edge of the second package substrate; and the encapsulant is disposed between the first package substrate and the second package substrate and covers the first electronic component and the support members. The package stack structure of claim 1, wherein the support member has a first metal post and a second metal post combined, the first metal post is coupled to the first package substrate, and the second metal The post is coupled to the second package substrate. The package stack structure of claim 2, wherein the support member has a solder material that combines the first metal post and the second metal post. The package stack structure of claim 1, wherein the support member is electrically connected to the first and second package substrates. The package stack structure of claim 1, wherein the encapsulant is formed between the first package substrate and the first electronic component. The package stack structure of claim 1, further comprising a second electronic component disposed on the second package substrate and electrically connected to the electrical contact pad. A method for manufacturing a package stack structure includes: Providing a first package substrate having a first electronic component, wherein the first electronic component is electrically connected to the first package substrate; and a second package substrate having a plurality of electrical contact pads and at least one recess The support member is coupled to the first package substrate, the second package substrate is stacked on the first package substrate, and the recess is adjacent to the edge of the second package substrate than the electrical contact pad; and forming an encapsulant The first package substrate and the second package substrate are wrapped to cover the first electronic component and the support members. The method of manufacturing a package stack structure according to the seventh aspect of the invention, wherein the process of the second package substrate being stacked on the first package substrate comprises: forming a plurality of first metal pillars on the first package substrate And forming a plurality of second metal pillars on the second package substrate; and bonding the first metal pillars to the second metal pillars, so that the second package substrate is stacked on the first package substrate, and the first A metal post and a second metal post serve as the support. The method for manufacturing a package stack structure according to claim 8, wherein the support member has a solder material combined with the first metal pillar and the second metal pillar. The method for manufacturing a package stack structure according to claim 7, wherein the support member is electrically connected to the first and second package substrates. The method for manufacturing a package stack structure according to claim 7, wherein the encapsulant is formed between the first package substrate and the first electronic component. The method for manufacturing a package stack structure according to claim 7, further comprising: providing a second electronic component on the second package substrate, wherein the second electronic component is electrically connected to the electrical contact pad.