TWI518747B - Multilayer substrate structure and method and system of manufacturing the same - Google Patents

Multilayer substrate structure and method and system of manufacturing the same Download PDF

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TWI518747B
TWI518747B TW102121007A TW102121007A TWI518747B TW I518747 B TWI518747 B TW I518747B TW 102121007 A TW102121007 A TW 102121007A TW 102121007 A TW102121007 A TW 102121007A TW I518747 B TWI518747 B TW I518747B
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substrate
chemical element
lattice
layer
deposited film
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TW201405636A (en
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印德拉尼爾 德
弗朗西斯科 馬卡丘
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帝弗拉股份有限公司
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B1/00Single-crystal growth directly from the solid state
    • C30B1/02Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/002Controlling or regulating
    • C30B23/005Controlling or regulating flux or flow of depositing species or vapour
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02Epitaxial-layer growth
    • C30B23/025Epitaxial-layer growth characterised by the substrate
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
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    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/183Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
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    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/186Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
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    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
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    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/52Alloys

Description

多層基板結構及其製造方法與系統 Multilayer substrate structure and manufacturing method and system thereof 【優先權申請】[Priority application]

本申請案主張於2012年6月22日提出申請之美國臨時申請案第61/662,918號、於2012年6月14日提出申請之美國臨時申請案第61/659,944號、於2013年3月11日提出申請之美國非臨時申請案第13/794,372號、於2013年3月11日提出申請之美國非臨時申請案第13/794,327號、於2013年3月11日提出申請之美國非臨時申請案第13/794,285號之優先權,該等申請案之內容係以引用方式全文併入本文中。 U.S. Provisional Application No. 61/662,918, filed on June 22, 2012, and U.S. Provisional Application No. 61/659,944, filed on Jun. 14, 2012, filed on Jun. US non-provisional application No. 13/794,372, filed on March 11, 2013, US non-provisional application No. 13/794,327, filed on March 11, 2013, and US non-provisional application filed on March 11, 2013 The priority of the application is hereby incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in

本發明之實例性實施例概言之係關於半導體材料、方法及裝置,且更具體而言,係關於一種用於III-V族化合物半導體之磊晶生長之多層基板結構以及一種用於製造該多層基板結構之系統。 Illustrative embodiments of the present invention generally relate to semiconductor materials, methods and apparatus, and more particularly to a multilayer substrate structure for epitaxial growth of a III-V compound semiconductor and a method for fabricating the same A system of multilayer substrate structures.

III-V族化合物半導體(例如氮化鎵(GaN)、砷化鎵(GaAs)、氮化銦(InN)、氮化鋁(AlN)及磷化鎵(GaP))廣泛用於電子裝置(例如微波頻率積體電路(microwave frequency integrated circuits)、發光二極體、雷射二極體、太陽能電池、大功率高頻電子元件、以及光電裝置)之製造中。期望增大基板之尺寸(例如直徑),以增加產能及降低成本。因為大尺寸III-V族化合物半導體之生長非常昂貴,故一般使用包含金屬、金屬 氧化物、金屬氮化物及半導體的眾多種外部材料(foreign materials)(例如碳化矽(SiC)、藍寶石、以及矽)作為用於磊晶生長III-V族化合物半導體的基板。 Group III-V compound semiconductors such as gallium nitride (GaN), gallium arsenide (GaAs), indium nitride (InN), aluminum nitride (AlN), and gallium phosphide (GaP) are widely used in electronic devices (eg, In the manufacture of microwave frequency integrated circuits, light-emitting diodes, laser diodes, solar cells, high-power high-frequency electronic components, and optoelectronic devices. It is desirable to increase the size (e.g., diameter) of the substrate to increase throughput and reduce cost. Because large-sized III-V compound semiconductors are very expensive to grow, they generally contain metals and metals. A wide variety of foreign materials of oxides, metal nitrides, and semiconductors (for example, niobium carbide (SiC), sapphire, and niobium) are used as substrates for epitaxial growth of III-V compound semiconductors.

然而,由於GaN層與底層基板(一外部材料)間之晶格失配且熱膨脹係數失配,因此III-V族化合物半導體(例如GaN)在基板(例如藍寶石)上之磊晶生長對磊晶層之晶體品質(例如晶粒邊界、錯位及其他延展缺陷(extended defects)、以及點缺陷(point defects))帶來諸多挑戰。在返回至室溫進行處理期間,或返回至室溫進行處理之後,GaN層與底層基板間之熱膨脹係數之差異導致在晶圓上出現大的彎曲,且晶格常數之嚴重失配導致出現高錯位密度、不必要的應變以及擴散至磊晶GaN層中之缺陷。為克服此等問題,利用了應力弛豫策略,例如在GaN層與藍寶石基板間生長緩衝層,或藉由交替設置各種適當材料層而抵消壓應變及張應變。然而,由於增加緩衝層或應力釋放層,且由於利用與在生長主動元件層(active device layer)時所涉及之沈積技術相同之沈積技術,故錯位密度仍高,且製造成本及複雜性顯著增加。 However, due to the lattice mismatch between the GaN layer and the underlying substrate (an external material) and the thermal expansion coefficient mismatch, the epitaxial growth of the III-V compound semiconductor (eg, GaN) on the substrate (eg, sapphire) is epitaxial. The crystal quality of the layers (such as grain boundaries, misalignment and other extended defects, and point defects) present challenges. After returning to room temperature for processing, or returning to room temperature for processing, the difference in thermal expansion coefficient between the GaN layer and the underlying substrate causes large bending on the wafer, and a serious mismatch in lattice constant causes high occurrence. Dislocation density, unnecessary strain, and defects that diffuse into the epitaxial GaN layer. To overcome these problems, a stress relaxation strategy is utilized, such as growing a buffer layer between the GaN layer and the sapphire substrate, or offsetting the compressive strain and the tensile strain by alternately providing various appropriate material layers. However, due to the addition of the buffer layer or the stress relief layer, and due to the same deposition technique as that used in the growth of the active device layer, the dislocation density is still high, and the manufacturing cost and complexity are significantly increased. .

當使用包含金屬、金屬氧化物、金屬氮化物及半導體的外部材料(例如碳化矽(SiC)、藍寶石、以及矽)作為用於半導體磊晶生長之基板時,可利用分子束磊晶(molecular beam epitaxy;MBE)技術或金屬有機化學氣相沈積(metal organic chemical vapor deposition;MOCVD)技術、以及在某些情形中利用原子層沈積(atomic layer deposition;ALD)或原子層磊晶(atomic layer epitaxy;ALE)將薄半導體膜沈積於該基板上。然而,並非所有原子、離子、或分子皆有機會進行規則排列,因此導致諸多原子 形成不理想之鍵合定向並顯著降低晶體品質,且對半導體材料之電子性質產生負面影響。通常以結晶徑(crystal size)、粒徑(grain size)、載子(carrier)壽命及擴散長度來說明晶體品質。 When an external material containing a metal, a metal oxide, a metal nitride, and a semiconductor such as tantalum carbide (SiC), sapphire, and hafnium is used as a substrate for epitaxial growth of a semiconductor, molecular beam epitaxy can be utilized. Epitaxy; MBE) technology or metal organic chemical vapor deposition (MOCVD) technology, and in some cases, atomic layer deposition (ALD) or atomic layer epitaxy; ALE) A thin semiconductor film is deposited on the substrate. However, not all atoms, ions, or molecules have the opportunity to be regularly arranged, resulting in many atoms. Undesirable bond orientation is formed and the crystal quality is significantly reduced and has a negative impact on the electronic properties of the semiconductor material. The crystal quality is usually described by a crystal size, a grain size, a carrier lifetime, and a diffusion length.

儘管某些技術(例如區熔再結晶(Zone melt recrystallization;ZMR))旨在提高晶體材料之品質,然而該等技術可具有以下缺點:所產生之用於熔化沈積膜之一部分的溫度可能高於底層基板所能夠承受之最高溫度。為防止底層基板被加熱至沈積膜之熔點,可縮短加熱時間。然而,縮短加熱時間意味著在固化之同時,晶體結構可沿垂直方向生長,而非同時沿垂直方向及橫向方向生長。因此,磊晶生長可主要沿垂直方向而非橫向方向進行,進而沿基板形成小晶粒區域。 While certain techniques, such as Zone melt recrystallization (ZMR), are intended to improve the quality of crystalline materials, such techniques may have the disadvantage that the temperature used to melt a portion of the deposited film may be higher than The highest temperature that the underlying substrate can withstand. In order to prevent the underlying substrate from being heated to the melting point of the deposited film, the heating time can be shortened. However, shortening the heating time means that the crystal structure can be grown in the vertical direction while being solidified, rather than growing in the vertical direction and the lateral direction at the same time. Therefore, epitaxial growth can be performed mainly in the vertical direction rather than in the lateral direction, thereby forming small grain regions along the substrate.

根據本發明一實例性實施例,一種多層基板結構包含:一基板;一熱匹配層,形成於該基板上;一晶格匹配層,位於該熱匹配層上方。該熱匹配層包含鉬、鉬-銅、莫來石(mullite)、藍寶石、石墨、氮氧化鋁、矽、碳化矽、氧化鋅、及稀土氧化物至少其中之一。該晶格匹配層包含一第一化學元素及一第二化學元素以形成一合金。該第一化學元素與該第二化學元素具有類似之晶體結構及化學性質。該熱匹配層之熱膨脹係數近似等於III-V族化合物半導體之一成員之熱膨脹係數。 In accordance with an exemplary embodiment of the present invention, a multilayer substrate structure includes: a substrate; a thermal matching layer formed on the substrate; and a lattice matching layer over the thermal matching layer. The thermal matching layer comprises at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum oxynitride, tantalum, niobium carbide, zinc oxide, and rare earth oxide. The lattice matching layer comprises a first chemical element and a second chemical element to form an alloy. The first chemical element has a similar crystal structure and chemical properties to the second chemical element. The thermal expansion coefficient of the thermal matching layer is approximately equal to the thermal expansion coefficient of one member of the III-V compound semiconductor.

根據本發明一實例性實施例,一種製造一多層基板結構之方法包含:提供一基板,以及在該基板上生長一熱匹配層。該熱匹配層包含鉬、鉬-銅、莫來石、藍寶石、石墨、氮氧化鋁、矽、碳化矽、氧化鋅、及稀土氧化物至少其中之一。該方法亦包含在該熱匹配層上方生長一晶格匹 配層。該晶格匹配層包含一第一化學元素及一第二化學元素以形成一合金。該第一化學元素與該第二化學元素具有類似之晶體結構及化學性質。該熱匹配層之熱膨脹係數近似等於III-V族化合物半導體之一成員之熱膨脹係數。 In accordance with an exemplary embodiment of the present invention, a method of fabricating a multilayer substrate structure includes providing a substrate and growing a thermal matching layer on the substrate. The thermal matching layer comprises at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum oxynitride, cerium, lanthanum carbide, zinc oxide, and rare earth oxide. The method also includes growing a lattice above the thermal matching layer Matching layer. The lattice matching layer comprises a first chemical element and a second chemical element to form an alloy. The first chemical element has a similar crystal structure and chemical properties to the second chemical element. The thermal expansion coefficient of the thermal matching layer is approximately equal to the thermal expansion coefficient of one member of the III-V compound semiconductor.

根據本發明一實例性實施例,一種於一基板上沈積一膜之方法包含:利用一視線沈積方法將源材料自一材料源引導至該基板之一表面;以設置於該基板與該源材料之間的一遮擋板遮擋該基板之一預定部分,以形成一被阻擋基板部分及一未被阻擋基板部分,藉此防止源材料被沈積至該基板之該初始被阻擋部分之上;以及使該遮擋板與該基板之間相對運動,以使得該被阻擋基板部分減小且該未被阻擋基板部分增大,藉此形成一移動之橫向生長邊界,進而在該基板上達成橫向磊晶生長。 According to an exemplary embodiment of the present invention, a method of depositing a film on a substrate includes: guiding a source material from a material source to a surface of the substrate by a line of sight deposition method; and disposing the substrate and the source material A shielding plate between the blocks blocks a predetermined portion of the substrate to form a blocked substrate portion and an unblocked substrate portion, thereby preventing source material from being deposited onto the initial blocked portion of the substrate; Relatively moving between the shielding plate and the substrate, so that the blocked substrate portion is reduced and the unblocked substrate portion is enlarged, thereby forming a moving lateral growth boundary, thereby achieving lateral epitaxial growth on the substrate. .

根據本發明一實例性實施例,一種於一基板上沈積一膜之系統包含一橫向控制遮擋板。該橫向控制遮擋板設置於該基板與一源材料之間,並配置以阻擋該基板之一部分,以防止沈積該源材料至該基板之該被阻擋部分上。該橫向控制遮擋板及/或該基板其中之一者相對於另一者移動以形成一移動之橫向生長邊界邊緣,進而在該基板上達成橫向磊晶沈積並在該基板之表面上形成具有大粒徑之一沈積膜。 In accordance with an exemplary embodiment of the present invention, a system for depositing a film on a substrate includes a lateral control shutter. The lateral control shutter is disposed between the substrate and a source material and is configured to block a portion of the substrate to prevent deposition of the source material onto the blocked portion of the substrate. The lateral control shutter and/or one of the substrates moves relative to the other to form a moving lateral growth boundary edge, thereby achieving lateral epitaxial deposition on the substrate and forming a large surface on the substrate One of the particle sizes is deposited on the film.

100‧‧‧多層基板結構 100‧‧‧Multilayer substrate structure

102‧‧‧基板 102‧‧‧Substrate

102a‧‧‧熱匹配層 102a‧‧‧Hot matching layer

104‧‧‧磊晶層 104‧‧‧ epitaxial layer

106‧‧‧晶格匹配層 106‧‧‧ lattice matching layer

108‧‧‧非晶層 108‧‧‧Amorphous layer

500‧‧‧系統 500‧‧‧ system

502‧‧‧薄膜 502‧‧‧film

504‧‧‧基板 504‧‧‧Substrate

506‧‧‧橫向控制遮擋板/橫向遮擋板 506‧‧‧Horizontal control baffle/transverse baffle

508‧‧‧材料源 508‧‧‧Material source

510‧‧‧熱源 510‧‧‧heat source

512‧‧‧拖曳式控制遮擋板 512‧‧‧Drop control shutter

602‧‧‧定向角度分佈 602‧‧‧Directional angular distribution

604‧‧‧餘弦角度分佈 604‧‧‧ cosine angle distribution

706‧‧‧橫向控制遮擋板 706‧‧‧Horizontal control shutter

712‧‧‧左端 712‧‧‧ left end

714‧‧‧區域 714‧‧‧Area

716‧‧‧自選種晶粒 716‧‧‧Separate grain

720‧‧‧表面浮凸結構 720‧‧‧ surface relief structure

722‧‧‧種晶 722‧‧‧ seed crystal

724‧‧‧區域 724‧‧‧Area

A‧‧‧橫向方向 A‧‧‧ transverse direction

L1‧‧‧材料源與基板間之距離 L1‧‧‧The distance between the material source and the substrate

L2‧‧‧橫向控制遮擋板與基板表面間之距離 L2‧‧‧ lateral control of the distance between the baffle and the surface of the substrate

上文已大體闡述了本發明之實例性實施例,以下將參照附圖,附圖未必係按比例繪製,附圖中:圖1A至圖1D例示根據實例性實施例之實例性多層基板結構之實例剖面圖; 圖2A例示一六方最密堆積結構之一示意圖;圖2B例示一單位晶格之一示意圖,其顯示晶格常數;圖3例示一週期表;圖4例示根據一實例性實施例,相變溫度與構成元素原子百分比間之關聯性之相圖;圖5例示根據一實例性實施例在一基板上沈積一膜之實例性系統;圖6A至圖6C例示在一濺鍍沈積製程中氣化材料之實例性角度分佈;以及圖7A至圖7D例示根據本發明實例性實施例在基板上生長大的延展晶體(extended crystal)之實例性方法。 The exemplary embodiments of the present invention have been generally described above, and the drawings are not necessarily drawn to scale, in which: FIGS. 1A-1D illustrate an exemplary multilayer substrate structure according to an exemplary embodiment. Example sectional view; 2A illustrates a schematic diagram of a hexagonal closest packed structure; FIG. 2B illustrates a schematic diagram of a unit lattice showing a lattice constant; FIG. 3 illustrates a periodic table; and FIG. 4 illustrates a phase transition according to an exemplary embodiment. Phase diagram of the relationship between temperature and atomic percentage of constituent elements; FIG. 5 illustrates an exemplary system for depositing a film on a substrate according to an exemplary embodiment; and FIGS. 6A to 6C illustrate gasification in a sputtering deposition process An exemplary angular distribution of materials; and Figures 7A-7D illustrate an exemplary method of growing large extended crystals on a substrate in accordance with an exemplary embodiment of the present invention.

以下,將參照附圖更全面地闡述各種實施例。提供此等實例性實施例是為了使本發明之揭露內容詳盡及完整,並將本發明之範圍全面傳達給具有所述技術領域知識之本說明書讀者。通篇中相同之編號表示相同之元件。 Hereinafter, various embodiments will be described more fully with reference to the accompanying drawings. The present invention is to be construed as being in the full part of the description of the invention. The same reference numerals throughout the drawings denote the same elements.

圖1A例示根據一實例性實施例,一實例性多層基板結構100之一實例剖面圖。多層基板結構100可包含一基板102以及磊晶生長於基板102上之一磊晶層104。根據各種應用而定,基板102可包含一半導體材料、一化合物半導體材料、或其他類型之材料(例如一金屬或一非金屬)。舉例而言,該材料可包含鉬、鉬-銅、莫來石、藍寶石、石墨、氮氧化鋁、矽、碳化矽、氧化鋅、及稀土氧化物、及/或其他適合材料。 FIG. 1A illustrates a cross-sectional view of one example of an exemplary multilayer substrate structure 100, in accordance with an exemplary embodiment. The multilayer substrate structure 100 can include a substrate 102 and an epitaxial layer 104 epitaxially grown on the substrate 102. Depending on the application, substrate 102 can comprise a semiconductor material, a compound semiconductor material, or other type of material (eg, a metal or a non-metal). For example, the material may comprise molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum oxynitride, tantalum, tantalum carbide, zinc oxide, and rare earth oxides, and/or other suitable materials.

磊晶層104可包含III-V族化合物半導體,例如氮化鋁 (AlN)、氮化鎵(GaN)、氮化銦鎵(InGaN)及氮化銦(InN)。如上所述,在基板102與磊晶層104之間可能存在晶格常數失配。為減少或消除由晶格常數失配所導致之缺陷,生長於基板102上之磊晶層104可使用厚度介於5奈米至100奈米之一範圍內的一晶格匹配層106,以適應於基板102與磊晶層104間之晶格常數失配。晶格匹配層106可包含二種或更多種構成元素(例如二種構成元素:一第一化學元素及一第二化學元素)以形成一合金。該第一化學元素可與該第二化學元素混溶於此合金中。構成該合金的各個構成元素在室溫下可具有類似之晶體結構,例如六方最密堆積結構,如圖2A所示。各該構成元素可具有各自之晶格常數,包括沿a軸、b軸及c軸之晶格參數以及軸間角α、β及γ之晶格參數,如第2B圖所示。除晶體結構之外,構成該合金的各個構成元素可具有類似之化學性質。在一個實施例中,該第一化學元素及該第二化學元素二者在圖3所示元素週期表中可皆屬於IV族元素(即,鈦(Ti)、鋯(Zr)、鉿(Hf)及鈩(Rf))。如此一來,該合金可由元素Ti及Zr、或元素Ti及Hf、或元素Zr及Hf製成,並在室溫下可具有與該合金構成元素類似之晶體結構,或由其中二者之任意組合製成。該合金可包含一第三化學元素或具有類似晶體結構及類似化學性質之更多元素。 The epitaxial layer 104 may include a III-V compound semiconductor such as aluminum nitride (AlN), gallium nitride (GaN), indium gallium nitride (InGaN), and indium nitride (InN). As noted above, there may be a lattice constant mismatch between the substrate 102 and the epitaxial layer 104. In order to reduce or eliminate defects caused by lattice constant mismatch, the epitaxial layer 104 grown on the substrate 102 may use a lattice matching layer 106 having a thickness ranging from 5 nm to 100 nm. Adapted to the lattice constant mismatch between the substrate 102 and the epitaxial layer 104. The lattice matching layer 106 may include two or more constituent elements (for example, two constituent elements: a first chemical element and a second chemical element) to form an alloy. The first chemical element can be miscible with the second chemical element in the alloy. The constituent elements constituting the alloy may have a similar crystal structure at room temperature, such as a hexagonal closest packed structure, as shown in Fig. 2A. Each of the constituent elements may have a respective lattice constant, including lattice parameters along the a- axis, b- axis, and c- axis, and lattice parameters of the inter-axis angles α, β, and γ, as shown in FIG. 2B. In addition to the crystal structure, the respective constituent elements constituting the alloy may have similar chemical properties. In one embodiment, both the first chemical element and the second chemical element may belong to the group IV element in the periodic table of elements shown in FIG. 3 (ie, titanium (Ti), zirconium (Zr), hafnium (Hf). ) and 鈩 (Rf)). In this way, the alloy may be made of the elements Ti and Zr, or the elements Ti and Hf, or the elements Zr and Hf, and may have a crystal structure similar to that of the alloy at room temperature, or may be any of them. Made in combination. The alloy may comprise a third chemical element or more elements having a similar crystal structure and similar chemical properties.

在該第一化學元素及該第二化學元素與其在常溫下各自關聯之晶格參數之間可存在一線性關係,以使晶格匹配層106之晶格常數近似等於磊晶層104之晶格常數。以原子百分比計,該第一化學元素對該第二化學元素之摩爾比例係為P1至(1-P1)。由於合金之成分將控制所得合金之晶格參數值,因此摩爾比例可根據應用不同而異。在一個實施例中,當磊晶層104包含GaN且合金包含與Zr混合之Ti時,Zr之原子百分比PZr可大於75% 且小於90%。舉例而言,PZr可為約86%。因此,Ti之原子百分比PTi為(1-PZr)。Zr之一第一晶格參數(例如a軸晶格參數a Zr )為3.23埃(Å)。Ti之一第二晶格參數(例如a軸晶格參數a Ti )為2.951Å。結果,沿合金之a軸之晶格常數PA為PZr×a Zr +(1-PZra Ti =86%×3.23+14%×2.951=3.19Å,近似等於當P GaN =3.189Å時六方最密堆積GaN之a軸晶格常數P GaN 。根據構成元素及其他因素而定,該第一化學元素至該第二化學元素之原子百分比可為約43%至57%或99%至1%。 There may be a linear relationship between the first chemical element and the second chemical element and their respective lattice parameters associated with each other at normal temperature, such that the lattice constant of the lattice matching layer 106 is approximately equal to the lattice of the epitaxial layer 104. constant. The molar ratio of the first chemical element to the second chemical element is, in atomic percent, from P 1 to (1-P 1 ). Since the composition of the alloy will control the lattice parameter values of the resulting alloy, the molar ratio may vary from application to application. In one embodiment, when the epitaxial layer 104 comprises GaN and the alloy comprises Ti mixed with Zr, the atomic percentage P Zr of Zr may be greater than 75% and less than 90%. For example, P Zr can be about 86%. Therefore, the atomic percentage P Ti of Ti is (1-P Zr ). One of the first lattice parameters of Zr (for example, the a- axis lattice parameter a Zr ) is 3.23 Å (Å). One of the second lattice parameters of Ti (for example, the a- axis lattice parameter a Ti ) is 2.951 Å. As a result, the lattice constant P A along the a- axis of the alloy is P Zr × a Zr + (1-P Zr ) × a Ti = 86% × 3.23 + 14% × 2.951 = 3.19 Å, which is approximately equal to when P GaN = 3.189 Å is the most densely packed GaN a- axis lattice constant P GaN . The atomic percentage of the first chemical element to the second chemical element may be about 43% to 57% or 99% to 1%, depending on the constituent elements and other factors.

當磊晶層104包含不同之化合物半導體(例如AlN、InGaN、InN及/或其他III-V族化合物半導體)時,可將晶格匹配層106之構成元素及/或該合金的各個構成元素之摩爾比例調整為使晶格匹配層106之晶格常數適應於磊晶層104之晶格常數。舉例而言,當磊晶層104包含AlN且晶格匹配層106之構成元素為Zr及Ti時,可將Zr之原子百分比調整為低於75%並高於50%。在使用相同構成元素之另一實施例中,當磊晶層104包含InGaN時,Zr之原子百分比可大於90%。除磊晶層104之材料外,磊晶層104之厚度可引起構成元素選擇之改變,並且引起該各個構成元素之摩爾比例之改變,以獲得100%晶格匹配。儘管磊晶層104之厚度會有所改變,磊晶層104之厚度介於5奈米至500奈米之範圍內。換言之,磊晶層104之厚度及材料可決定該各個構成元素之選擇以及該各個構成元素在形成晶格匹配層106時之摩爾比例。利用任意磊晶技術(例如真空蒸鍍、濺鍍、分子束磊晶及脈衝式雷射沈積、金屬有機化學氣相沈積、原子層沈積及/或任何其他適合之磊晶沈積方法),磊晶層104磊晶生長在晶格匹配層106上以將晶格匹配層106之結晶圖案轉移至磊晶層104。可利用以下沈積技術其中之一而於底層(例如基 板102)上形成晶格匹配層106:例如真空蒸鍍、濺鍍、分子束磊晶及脈衝式雷射沈積、常壓化學氣相沈積及原子層沈積。 When the epitaxial layer 104 includes different compound semiconductors (for example, AlN, InGaN, InN, and/or other III-V compound semiconductors), the constituent elements of the lattice matching layer 106 and/or the constituent elements of the alloy may be The molar ratio is adjusted such that the lattice constant of the lattice matching layer 106 is adapted to the lattice constant of the epitaxial layer 104. For example, when the epitaxial layer 104 contains AlN and the constituent elements of the lattice matching layer 106 are Zr and Ti, the atomic percentage of Zr can be adjusted to be less than 75% and higher than 50%. In another embodiment using the same constituent elements, when the epitaxial layer 104 contains InGaN, the atomic percentage of Zr may be greater than 90%. In addition to the material of the epitaxial layer 104, the thickness of the epitaxial layer 104 can cause a change in the choice of constituent elements and cause a change in the molar ratio of the respective constituent elements to obtain a 100% lattice match. Although the thickness of the epitaxial layer 104 may vary, the thickness of the epitaxial layer 104 ranges from 5 nanometers to 500 nanometers. In other words, the thickness and material of the epitaxial layer 104 may determine the selection of the respective constituent elements and the molar ratio of the respective constituent elements in forming the lattice matching layer 106. Using any epitaxial technique (eg vacuum evaporation, sputtering, molecular beam epitaxy and pulsed laser deposition, metal organic chemical vapor deposition, atomic layer deposition and/or any other suitable epitaxial deposition method), epitaxial Layer 104 is epitaxially grown on lattice matching layer 106 to transfer the crystalline pattern of lattice matching layer 106 to epitaxial layer 104. One of the following deposition techniques can be utilized at the bottom layer (eg, A lattice matching layer 106 is formed on the plate 102): for example, vacuum evaporation, sputtering, molecular beam epitaxy and pulsed laser deposition, atmospheric pressure chemical vapor deposition, and atomic layer deposition.

因為對某些光電裝置及功率半導體應用而言,六方最密堆積相(α相)具有優於體心立方相(β相)之潛在優勢,故可能期望以α相生長磊晶層104,以達成類似於晶格匹配層106之結晶圖案。第4圖顯示根據一實例性實施例,α-β相變溫度與Zr及Ti之原子百分比之間的相關度。舉例而言,當PZr為50%時,PTi=1-PZr=50%,α-β相變溫度為約攝氏605度。當PZr為84%時(此實例已於上文中例示),α-β相變溫度可為約攝氏780度。在磊晶層104上製造多量子阱(multi-quantum-well;MQW)裝置之一應用(例如超高亮度發光二極體)中,可在攝氏700度至攝氏850度之一溫度範圍中執行磊晶沈積方法(例如金屬有機化學氣相沈積及原子層沈積及/或任何其他用於磊晶生長之適合方法)。在本實施例中,α-β相變溫度介於攝氏700度與攝氏780度之間的範圍時,可藉由任何加熱方法/熱源來加熱多層基板結構,以將晶格匹配層106之結晶圖案以α相轉移至磊晶層104,而避免β相變發生。接著,由於已經形成了磊晶層104,且磊晶層104被永久設定成α相;因此,在隨後之多量子阱生長期間,用於加熱多層基板結構以及用於加熱任何附加元件層之溫度可升高至攝氏780度以上或降低至攝氏780度以下。可將溫度在初始時升高至高於α-β相變溫度並接著立即降至低於α-β相變溫度,以產生相變自由能以使得結晶形成於大的橫向區域,並藉此在該晶格匹配層中得到一單晶α相。 Because for some optoelectronic devices and power semiconductor applications, the hexagonal closest packed phase (alpha phase) has the potential advantage over the body centered cubic phase (β phase), it may be desirable to grow the epitaxial layer 104 with an alpha phase to A crystalline pattern similar to the lattice matching layer 106 is achieved. Figure 4 shows the correlation between the alpha-beta phase transition temperature and the atomic percentage of Zr and Ti, according to an exemplary embodiment. For example, when P Zr is 50%, P Ti =1-P Zr = 50%, and the α-β phase transition temperature is about 605 degrees Celsius. When P Zr is 84% (this example has been exemplified above), the α-β phase transition temperature may be about 780 degrees Celsius. In one of the applications of the multi-quantum-well (MQW) device on the epitaxial layer 104 (for example, an ultra-high brightness light-emitting diode), it can be performed in a temperature range of 700 degrees Celsius to 850 degrees Celsius. Epitaxial deposition methods (eg, metal organic chemical vapor deposition and atomic layer deposition and/or any other suitable method for epitaxial growth). In the present embodiment, when the α-β phase transition temperature is in the range between 700 degrees Celsius and 780 degrees Celsius, the multilayer substrate structure can be heated by any heating method/heat source to crystallize the lattice matching layer 106. The pattern is transferred to the epitaxial layer 104 in an alpha phase while avoiding the occurrence of a beta phase transition. Next, since the epitaxial layer 104 has been formed, and the epitaxial layer 104 is permanently set to the alpha phase; therefore, during subsequent quantum well growth, the temperature used to heat the multilayer substrate structure and to heat any additional component layers It can be raised above 780 degrees Celsius or below 780 degrees Celsius. The temperature can be raised initially to a temperature higher than the α-β phase transition temperature and then immediately lowered below the α-β phase transition temperature to generate a phase change free energy such that the crystal is formed in a large lateral region, and thereby A single crystal alpha phase is obtained in the lattice matching layer.

藉由採用晶格匹配層106,可降低應力並藉此有助於一高結晶品質之磊晶層104之生長,否則可能會由於基板102與磊晶層104間之晶格 常數差異而於在磊晶生長期間形成之磊晶層104中出現應力。若此應力不能藉由該晶格匹配層得以釋放,則該應力可在磊晶層104之晶體結構中造成缺陷。而磊晶層104之晶體結構之缺陷,其又使得高品質的晶體結構難以產生於磊晶過程之中,而用於任何後續元件之生長。標題為「用於一多層基板結構中之晶格匹配層」之美國專利申請案中亦揭露晶格匹配層106。 By employing the lattice matching layer 106, the stress can be reduced and thereby contribute to the growth of the epitaxial layer 104 of a high crystalline quality, which may otherwise be due to the lattice between the substrate 102 and the epitaxial layer 104. The difference in the constant occurs in the epitaxial layer 104 formed during epitaxial growth. If the stress cannot be released by the lattice matching layer, the stress can cause defects in the crystal structure of the epitaxial layer 104. The defects of the crystal structure of the epitaxial layer 104, in turn, make it difficult for the high quality crystal structure to be generated in the epitaxial process for the growth of any subsequent elements. The lattice matching layer 106 is also disclosed in U.S. Patent Application entitled "Crystal Matching Layer for Use in a Multi-Layer Substrate Structure".

如上所述,基板102可包含:一半導體材料、一化合物半導體材料、或另一類型之材料(例如一金屬或一非金屬)。在某些實施例中,基板102可為多晶固體形式。多晶基板中,以多晶體取代單晶體,則會對晶格匹配層106產生負面影響,並因此擴大晶格匹配層106與磊晶層104間(在多個晶粒及多個晶體定向中取一平均晶格常數)之晶格常數差異,並造成延展之缺陷(例如穿線錯位(threading dislocation)或晶粒邊界),進而導致磊晶層104之晶體品質變差。為減小或消除多晶基板之該負面影響,可在多晶基板102與晶格匹配層106之間採用一非晶層108,如第1B圖所示。藉由在多晶基板102與晶格匹配層106之間添加非晶層108,可降低多晶基板102對晶格匹配層106之影響。如此一來,僅有晶格匹配層106之結晶形態轉移至磊晶層104。非晶層108可包含但不限於二氧化矽、氮化矽、氮化鉭、氮化硼、氮化鎢、玻璃態非晶碳、矽酸鹽玻璃(例如硼磷矽酸鹽玻璃(borophosphosilicate glass)及磷矽酸鹽玻璃)及/或其他適合材料其中之一。非晶層108的厚度可為5奈米至100奈米。 As noted above, substrate 102 can comprise: a semiconductor material, a compound semiconductor material, or another type of material (eg, a metal or a non-metal). In certain embodiments, the substrate 102 can be in the form of a polycrystalline solid. In a polycrystalline substrate, replacing a single crystal with a polycrystal will adversely affect the lattice matching layer 106, and thus expand between the lattice matching layer 106 and the epitaxial layer 104 (in a plurality of crystal grains and a plurality of crystal orientations) The difference in lattice constant of an average lattice constant) and the resulting defects (such as threading dislocation or grain boundaries), which in turn leads to deterioration of the crystal quality of the epitaxial layer 104. To reduce or eliminate this negative effect of the polycrystalline substrate, an amorphous layer 108 can be employed between the polycrystalline substrate 102 and the lattice matching layer 106, as shown in FIG. 1B. By adding the amorphous layer 108 between the polycrystalline substrate 102 and the lattice matching layer 106, the influence of the polycrystalline substrate 102 on the lattice matching layer 106 can be reduced. As a result, only the crystal form of the lattice matching layer 106 is transferred to the epitaxial layer 104. The amorphous layer 108 may include, but is not limited to, hafnium oxide, tantalum nitride, tantalum nitride, boron nitride, tungsten nitride, glassy amorphous carbon, tantalate glass (eg, borophosphosilicate glass). And one of the other suitable materials. The amorphous layer 108 may have a thickness of 5 nm to 100 nm.

在某些實施例中,基板102之熱膨脹係數可不同於上述層之熱膨脹係數,進而造成大的基板彎曲。舉例而言,當基板102之熱膨脹係數大於上述層之熱膨脹係數時,會出現雙軸壓應變(例如當該基板包含藍寶 石時)。當該基板之熱膨脹係數小於上述層之熱膨脹係數時,則會出現拉應變(例如當該基板包含矽時)。為克服由熱膨脹係數失配所造成之缺點,可藉由使該基板包含某些化學元素而將該基板作為一熱匹配層102a(參見圖1C及圖1D),以適應於該基板(在本實施例中為熱匹配層102a)與圖1C所示晶格匹配層106之間的熱失配、或適應於該基板與圖1D所示非晶層108之間的熱失配。在一個實施例中,熱匹配層102a可包含鉬或其相關合金。鉬之熱膨脹係數係為約5.4×10-6/K,近似等於某些III-V族化合物半導體(例如GaN)之熱膨脹係數。可利用各種用於生長金屬、晶體及其合金之方法來製造基板。其實例可包含柴氏長晶法(Czochralski)、區熔法(float zone;FZ)、定向固化(directional solidification;DS)、區熔再結晶(zone melt recrystallization;ZMR)、燒結、等壓壓製(isostatic pressing)、電化學鍍覆、電漿炬沈積(plasma torch deposition)及/或其他適合方法。熱匹配層102a的厚度介於5奈米至1毫米之範圍。 In some embodiments, the coefficient of thermal expansion of the substrate 102 can be different than the coefficient of thermal expansion of the layers described above, thereby causing large substrate bending. For example, when the coefficient of thermal expansion of the substrate 102 is greater than the coefficient of thermal expansion of the layer, biaxial compressive strain may occur (eg, when the substrate contains sapphire). When the coefficient of thermal expansion of the substrate is less than the coefficient of thermal expansion of the layer, tensile strain occurs (e.g., when the substrate contains germanium). In order to overcome the disadvantages caused by the thermal expansion coefficient mismatch, the substrate can be used as a thermal matching layer 102a (see FIGS. 1C and 1D) by including certain chemical elements on the substrate to adapt to the substrate (in this case). In the embodiment, the thermal mismatch between the thermal matching layer 102a) and the lattice matching layer 106 shown in FIG. 1C, or the thermal mismatch between the substrate and the amorphous layer 108 shown in FIG. 1D. In one embodiment, the thermal matching layer 102a can comprise molybdenum or a related alloy thereof. The coefficient of thermal expansion of molybdenum is about 5.4 x 10 -6 /K, which is approximately equal to the coefficient of thermal expansion of certain III-V compound semiconductors (such as GaN). A variety of methods for growing metals, crystals, and alloys thereof can be utilized to fabricate substrates. Examples thereof may include Czochralski, float zone (FZ), directional solidification (DS), zone melt recrystallization (ZMR), sintering, isostatic pressing ( Isostatic pressing), electrochemical plating, plasma torch deposition, and/or other suitable methods. The thickness of the heat matching layer 102a is in the range of 5 nm to 1 mm.

藉由採用熱匹配層及晶格匹配層,可減小或完全消除由熱膨脹失配及晶格失配所造成之應變。因此,在所生成的磊晶層104中的錯位密度可小於102/平方釐米(<每平方釐米100個錯位)。在開發發光二極體(light emitting diode;LED)時,減小或消除應變可滿足克服所謂「綠色間隙(green gap)」之需求。「綠色間隙」係為一種工業術語,是指多量子阱發光二極體(在多量子阱發光二極體中,將銦與GaN形成合金可製成綠色發光二極體)所輸出之LED光的降低或減少。在1至5平方毫米元件面積中,當順向電流大於50毫安培時,由於因基板之應變過大、由應力誘發之延展缺陷及擴散至主動式多量子阱元件層中之點缺陷而造成之缺陷密度,所輸出之綠色光會發 生此種降低。 By using a thermal matching layer and a lattice matching layer, the strain caused by thermal expansion mismatch and lattice mismatch can be reduced or completely eliminated. Therefore, the dislocation density in the resulting epitaxial layer 104 can be less than 10 2 /cm 2 (<100 dislocations per square centimeter). In the development of light emitting diodes (LEDs), reducing or eliminating strain can meet the need to overcome the so-called "green gap.""Greengap" is an industrial term for LED light output from a multi-quantum well light-emitting diode (in a multi-quantum well light-emitting diode, in which indium is alloyed with GaN to form a green light-emitting diode). Reduce or decrease. In a component area of 1 to 5 square millimeters, when the forward current is greater than 50 milliamperes, due to excessive strain of the substrate, stress-induced extension defects, and point defects diffused into the active multiple quantum well device layer The defect density, such a decrease in the output of the green light.

因為人眼對綠色最敏感且綠色光強烈影響到人對白色光品質之感知,本實施例能夠在層104上生長高晶體品質元件。此外,本發明之實例性實施例能夠提供一種製造一綠色發光二極體晶體模板之具成本效益之方式。因此,「綠色間隙」之達成可增強以紅色、綠色及藍色之混合光為基礎之白色光發光二極體之高效能,此相較現今所用基於磷光體之降頻轉換(down conversion)發光二極體具有最高之理論效能。 Since the human eye is most sensitive to green and the green light strongly affects human perception of white light quality, this embodiment is capable of growing high crystal quality components on layer 104. Moreover, exemplary embodiments of the present invention can provide a cost effective way of fabricating a green light emitting diode crystal template. Therefore, the achievement of the "green gap" enhances the high-performance of the white light-emitting diode based on the mixed light of red, green and blue, which is compared with the phosphor-based down conversion luminescence used today. The diode has the highest theoretical efficiency.

第5圖例示根據一實例性實施例(在本文中所用之「實例」、「實例性」等用語係指「作為一實例、例子或例示」),用於在一基板上沈積一膜之一系統500。為有利於沿橫向方向A在一基板504上磊晶沈積一薄膜502,使用一橫向控制遮擋板506並將橫向控制遮擋板506設置於基板504與一材料源508之間。材料源508用以利用一適合之沈積方法將源材料沈積至基板表面上。根據所利用之沈積方法而定,該源材料可自一固態源或液態源氣化成原子或分子形式並作為一蒸氣經由一真空或低壓氣體或電漿環境輸送至基板。該氣化材料可為呈各種帶電狀態之一元素、一合金或一化合物。當該氣化材料具有大於一米之長平均自由程(mean free path),且可將該氣化材料之軌跡視為直接視線(direct line-of-sight)。因此,將所利用之沈積製程定義為視線沈積。視線沈積方法可為物理氣相沈積或化學氣相沈積,包括真空蒸鍍、濺鍍、脈衝式雷射沈積、分子束磊晶、原子層沈積、原子層磊晶、電漿炬沈積及/或任何其他適合方法。該化學氣相沈積可為常壓化學氣相沈積及/或任何其他適合之化學氣相沈積方法。根據源構造而定,真空蒸鍍包含熱蒸鍍、雷射光束或聚焦燈式蒸鍍、電弧放電蒸鍍及電 子束蒸鍍。類似地,根據源構造而定,濺鍍方法可包含直流濺鍍、磁控濺鍍、射頻濺鍍及脈衝式雷射濺鍍其中之一。 Figure 5 illustrates an example of "example," "example," as used herein, "as an example, instance, or illustration" for depositing a film on a substrate. System 500. To facilitate epitaxial deposition of a film 502 on a substrate 504 in a lateral direction A, a lateral control shutter 506 is used and a lateral control shutter 506 is disposed between the substrate 504 and a material source 508. Material source 508 is used to deposit the source material onto the surface of the substrate using a suitable deposition method. Depending on the deposition method utilized, the source material may be vaporized from a solid source or liquid source to an atomic or molecular form and delivered to the substrate as a vapor via a vacuum or low pressure gas or plasma environment. The gasification material can be an element, an alloy or a compound in various charged states. When the gasification material has a mean free path greater than one meter, the trajectory of the vaporized material can be considered a direct line-of-sight. Therefore, the deposition process utilized is defined as line of sight deposition. The line of sight deposition method may be physical vapor deposition or chemical vapor deposition, including vacuum evaporation, sputtering, pulsed laser deposition, molecular beam epitaxy, atomic layer deposition, atomic layer epitaxy, plasma torch deposition, and/or Any other suitable method. The chemical vapor deposition can be atmospheric pressure chemical vapor deposition and/or any other suitable chemical vapor deposition method. Depending on the source structure, vacuum evaporation includes thermal evaporation, laser beam or spot lamp evaporation, arc discharge evaporation and electricity. The beam is evaporated. Similarly, depending on the source configuration, the sputtering method can include one of DC sputtering, magnetron sputtering, RF sputtering, and pulsed laser sputtering.

在上述沈積方法之任意應用中,材料源508與基板504間之距離L1可小於氣體分子之平均自由程,因此容許氣體中的大部分分子以一準直方式到達。為在基板504之表面上均勻地形成薄膜502,橫向控制遮擋板506與基板表面間之距離L2可小於氣體分子之該平均自由程。在此種情形中,將平均自由程定義為一氣體分子在與另一氣體分子碰撞之前行進之平均距離。基板504可包含二氧化矽、氮化矽、非晶氮化硼、非晶氮化鎢、玻璃態非晶碳、非晶稀土氧化物、非晶氧化鋅及矽鹽酸玻璃。 In any of the above deposition methods, the distance L1 between the material source 508 and the substrate 504 can be less than the mean free path of the gas molecules, thus allowing most of the molecules in the gas to arrive in a collimated manner. To uniformly form the film 502 on the surface of the substrate 504, the distance L2 between the lateral control shutter 506 and the substrate surface may be less than the mean free path of the gas molecules. In this case, the mean free path is defined as the average distance traveled by one gas molecule before colliding with another gas molecule. The substrate 504 may include hafnium oxide, tantalum nitride, amorphous boron nitride, amorphous tungsten nitride, glassy amorphous carbon, amorphous rare earth oxide, amorphous zinc oxide, and bismuth hydrochloric acid glass.

不同之沈積製程可於基板處具有不同之通量角度分佈。在每一沈積製程中存在諸多有助於改良基板處之角度分佈之方式。以濺鍍沈積製程為例,在一一般濺鍍沈積製程中,常常是撞擊基板之大部分原子可能不以一法向入射角撞擊基板,乃因該等原子係自材料源(即濺鍍靶)以一餘弦角度分佈射出,如第6A圖所示。為了在基板處形成更接近法向之角度分佈,可使用一準直器並將該準直器置於基板與一磁控濺鍍系統中之濺鍍靶之間。使用該準直器以降低來自該濺鍍靶之非法向通量,進而增強沈積之定向性。準直入射之角度分佈顯示於圖6B中。在一離子輔助沈積製程中,所濺鍍原子之一部分被離子化。該等離子化之原子可集中於θ=0度附近以形成一定向角度分佈(例如定向角度分佈602),同時中性物質通常具有一餘弦角度分佈604。將總體角度分佈視為餘弦與定向角度分佈之疊加,如圖6C所示。 Different deposition processes can have different flux angular distributions at the substrate. There are a number of ways in each deposition process that help to improve the angular distribution at the substrate. Taking a sputtering deposition process as an example, in a typical sputtering deposition process, most of the atoms that strike the substrate may not strike the substrate at a normal incident angle, because the atoms are from the material source (ie, the sputtering target). ) is emitted at a cosine angle, as shown in Figure 6A. To form an angular distribution closer to the normal at the substrate, a collimator can be used and placed between the substrate and the sputter target in a magnetron sputtering system. The collimator is used to reduce the illogical flux from the sputter target, thereby enhancing the orientation of the deposit. The angular distribution of the collimated incidence is shown in Figure 6B. In an ion assisted deposition process, one of the sputtered atoms is partially ionized. The plasmad atoms can be concentrated near θ = 0 degrees to form a directed angular distribution (eg, orientation angle distribution 602) while the neutral species typically has a cosine angle distribution 604. The overall angular distribution is considered as a superposition of the cosine and the orientation angle distribution, as shown in Figure 6C.

在氣相沈積製程中,氣化至基板上之材料之入射角可影響膜 之品質、晶體定向及其他特性。根據由材料源產生之入射原子通量之角度分佈及該基板處之原子之所期望角度分佈而定,氣化材料可以法向入射角或非法向入射角沈積至基板表面上。再參照圖5,源材料可以-15度至+15度之入射角進行沈積。沈積原子通量之平均入射角可根據沈積幾何形狀、氣化源類型及基板與材料源間之相對運動而異。 In a vapor deposition process, the angle of incidence of the material vaporized onto the substrate can affect the film Quality, crystal orientation and other characteristics. Depending on the angular distribution of the incident atomic flux produced by the material source and the desired angular distribution of the atoms at the substrate, the vaporized material can be deposited onto the substrate surface at normal or incident angles. Referring again to Figure 5, the source material can be deposited at an angle of incidence of -15 degrees to +15 degrees. The average angle of incidence of the deposited atomic flux may vary depending on the deposition geometry, the type of gasification source, and the relative motion between the substrate and the source of the material.

如圖5所示,使用橫向控制遮擋板506來控制膜之生長。橫向控制遮擋板506可界定沈積薄膜502之一橫向邊界(未編號)並覆蓋基板504之某些預定部分,以防止源材料沈積至基板表面之某些部分上。在操作中,藉由移動橫向控制遮擋板506或基板504其中之一者或其中之另一者而移動並控制沈積薄膜502之橫向邊界,以推進膜之生長邊緣,進而促進在基板上之橫向磊晶沈積。在圖5所示之一個實例中,橫向控制遮擋板506相對於基板504沿方向A移動。在另一實例中,橫向控制遮擋板可保持靜止,基板則相對於該橫向控制遮擋板而移動。在再一實例中,橫向控制遮擋板與基板二者可以不同之速度移動,以達到二者之間的相對運動。系統500亦可包含一驅動系統(未圖示出)以控制橫向控制遮擋板與基板間之相對運動。系統500可包含一拖曳式控制遮擋板512,其用於幫助遮擋在薄膜502的推進之生長邊緣之後所留下的單晶體上之任何不必要的沈積。後者有助於在薄膜502上維持均勻之膜厚度。若使用一拖曳式控制遮擋板,則該拖曳式控制遮擋板512可配置以避免進一步磊晶沈積至基板504上之新結晶之薄膜502上。 As shown in Figure 5, the lateral control shutter 506 is used to control the growth of the film. The lateral control shutter 506 can define a lateral boundary (not numbered) of the deposited film 502 and cover certain predetermined portions of the substrate 504 to prevent deposition of source material onto portions of the substrate surface. In operation, the lateral boundary of the deposited film 502 is moved and controlled by moving one of or the other of the laterally controlled shutter 506 or substrate 504 to advance the growth edge of the film, thereby facilitating lateral orientation on the substrate. Epitaxial deposition. In one example shown in FIG. 5, the lateral control shutter 506 is moved relative to the substrate 504 in direction A. In another example, the lateral control shutter can remain stationary and the substrate moves relative to the lateral control shutter. In yet another example, the laterally controlled shutter and the substrate can be moved at different speeds to achieve relative motion therebetween. System 500 can also include a drive system (not shown) to control the relative movement of the lateral control shutter to the substrate. System 500 can include a drag control shutter 512 that is used to help obscure any unnecessary deposits on the single crystal left behind the growing edge of film 502. The latter helps maintain a uniform film thickness on film 502. If a drag control shutter is used, the drag control shutter 512 can be configured to avoid further epitaxy deposition onto the newly crystallized film 502 on the substrate 504.

由於諸多膜之性質(例如沈積於基板上之沈積材料之粒徑)受沈積溫度影響,因此期望進行溫度控制。根據所使用之沈積方法而定,系統500可包含不同類型之熱源(例如圖5中之熱源510)以控制基板溫度及 /或提供可用於沈積製程之提升後之溫度。舉例而言,在一真空沈積製程中,通常使用熱源對源材料進行加熱氣化、自靶源表面脫附所沈積之材料、出於清潔及後續處理之目的而加熱基板、熔化源材料及在基板表面上增加熱動能或增強參與沈積製程之吸附原子(adatom)或分子之表面遷移率。可在真空室中藉由若干不同之技術來產生熱量。在一濺鍍沈積製程之實例中,可藉由離子撞擊(ion bombardment)、電子、光輻射、感應加熱或其他加熱技術來加熱基板。熱源可嵌入系統中或位於系統外部。實例性熱源可包含一輻射加熱器(紅外線加熱、雷射等)、熱線式(hot wire)輻射加熱、聚焦燈式加熱、感應加熱、直接金屬基座加熱器、或陶瓷基座加熱器。 Since the properties of many films, such as the particle size of the deposited material deposited on the substrate, are affected by the deposition temperature, temperature control is desired. Depending on the deposition method used, system 500 can include different types of heat sources (eg, heat source 510 in FIG. 5) to control substrate temperature and / or provide elevated temperatures that can be used in the deposition process. For example, in a vacuum deposition process, a heat source is typically used to heat gasify the source material, desorb the deposited material from the target surface, heat the substrate for cleaning and subsequent processing, melt the source material, and The thermal kinetic energy is increased on the surface of the substrate or the surface mobility of the adatom or molecule participating in the deposition process is enhanced. Heat can be generated in a vacuum chamber by a number of different techniques. In an example of a sputter deposition process, the substrate can be heated by ion bombardment, electron, optical radiation, induction heating, or other heating techniques. The heat source can be embedded in the system or external to the system. Exemplary heat sources can include a radiant heater (infrared heating, laser, etc.), hot wire radiant heating, focus lamp heating, induction heating, direct metal pedestal heaters, or ceramic pedestal heaters.

當一單晶材料之膜沈積於一基板上時,會出現磊晶生長,進而當一單種晶(single seed)在基板表面上被隔離或當該基板為單晶體時,能夠以生長材料來複製該基板之結晶結構。因為晶體之橫向生長在決定材料性質(例如由所沈積材料與基板間之晶格失配引起之錯位密度及應變)方面具有重要作用,故可使用一橫向控制遮擋板來促進所沈積材料沿一橫向方向之磊晶生長。由於一橫向控制遮擋板與基板間之相對運動,在開始時,沿大致正交於基板表面之方向(例如,沿垂直方向)出現磊晶生長,接下來,並沿大致平行於該基板表面之方向(例如,沿平行方向)進行生長。一橫向晶體磊晶生長例示於圖7A中。在圖7A中,橫向控制遮擋板706自基板左端712朝該基板之另一端(圖未示出)移動,藉此使磊晶生長自左端712開始。在左端712上之諸多點處之複數個晶粒可生長並作為用於後續晶體生長之種晶。晶體在開始時沿垂直方向生長。隨著橫向控制遮擋板706與基板間之運動,晶體可同時沿橫向方向及垂直方向生長。 When a film of a single crystal material is deposited on a substrate, epitaxial growth occurs, and when a single seed is isolated on the surface of the substrate or when the substrate is a single crystal, it can be replicated as a growth material. The crystal structure of the substrate. Since the lateral growth of the crystal plays an important role in determining the material properties (eg, the dislocation density and strain caused by the lattice mismatch between the deposited material and the substrate), a lateral control shield can be used to promote the deposition of the material along the Epitaxial growth in the transverse direction. Due to a lateral control of the relative movement between the shutter and the substrate, at the beginning, epitaxial growth occurs in a direction substantially orthogonal to the surface of the substrate (eg, in a vertical direction), and then along substantially parallel to the surface of the substrate The direction (eg, in a parallel direction) is grown. A lateral crystal epitaxial growth is illustrated in Figure 7A. In FIG. 7A, the lateral control shutter 706 is moved from the left end 712 of the substrate toward the other end of the substrate (not shown), thereby causing epitaxial growth to begin from the left end 712. A plurality of grains at a plurality of points on the left end 712 can be grown and used as seed crystals for subsequent crystal growth. The crystal grows vertically in the beginning. As the lateral control shutter 706 moves relative to the substrate, the crystal can grow in both the lateral and vertical directions.

沈積膜之粒徑對其電子性質具有重要作用。隨著粒徑之增大,每單位面積之晶粒邊界數目及邊界介面數目減少。舉例而言,高密度的晶粒邊界(例如晶體結構中小的粒徑或延展之缺陷)使沈積膜之導電性及導熱性降低。因此,期望盡可能地增大粒徑。在基板上獲得最小晶粒邊界及最小晶粒數目之實例性實施例例示於圖7B至圖7D中。 The particle size of the deposited film plays an important role in its electronic properties. As the particle size increases, the number of grain boundaries per unit area and the number of boundary interfaces decrease. For example, high density grain boundaries (eg, small particle sizes or extended defects in the crystal structure) reduce the conductivity and thermal conductivity of the deposited film. Therefore, it is desirable to increase the particle size as much as possible. An exemplary embodiment of obtaining a minimum grain boundary and a minimum number of grains on a substrate is illustrated in Figures 7B-7D.

如圖7B所示,橫向控制遮擋板706置於基板(圖未示出)與材料源(圖未示出)之間並覆蓋基板之一部分,而留下一區域(例如區域714)暴露於該材料源。區域714可具有一尖銳之角或一邊緣。在本實施例中,該尖銳之角係為藉由調整該橫向控制遮擋板及該基板之放置而製成之基板之角。藉由此一排列方式,一自選(self-selected)種晶粒716可於該尖銳之角處生長。該種晶粒作為一種晶以初始結晶化並提供使沈積開始之一點。隨著橫向控制遮擋板706與基板之間沿橫向方向之相對運動,晶體在該基板之整個表面上同時沿垂直方向及橫向方向二者生長。在另一實例中,可有多於一個種晶粒在該尖銳之角處生長,且橫向推進有助於沿朝外方向驅動晶粒邊界,進而在整個基板上有效地形成具有非常大橫向尺寸之最少數目之晶粒。 As shown in FIG. 7B, the lateral control shutter 706 is disposed between the substrate (not shown) and the source of material (not shown) and covers a portion of the substrate leaving an area (eg, region 714) exposed thereto. Material source. Region 714 can have a sharp corner or an edge. In this embodiment, the sharp angle is the angle of the substrate formed by adjusting the lateral control shutter and the placement of the substrate. By this arrangement, a self-selected seed 716 can be grown at the sharp corner. This grain acts as a crystal to initially crystallize and provides a point at which deposition begins. As the lateral control shutter 706 and the substrate move relative to each other in the lateral direction, the crystal grows both in the vertical direction and the lateral direction on the entire surface of the substrate. In another example, more than one type of grain may be grown at the sharp corners, and lateral advancement helps drive the grain boundaries in an outward direction, thereby effectively forming a very large lateral dimension over the entire substrate. The minimum number of grains.

在圖7C所示之一實施例中,可利用製圖磊晶法(graphoepitaxy)在薄膜於該基板表面上沈積期間、或在熔融材料於該基板表面上再結晶期間,藉由使該基板表面之一部分具有圖案而形成長程階(long-range order),進而形成一表面浮凸結構(例如表面浮凸結構720)。表面浮凸結構720可作為一模板,以用於在該基板上生長一種晶粒並在新生長之薄膜中引起一所期望之結晶定向。接著使用該種晶粒來初始結晶化並 用以提供使該沈積膜開始沈積的一原點。類似於圖7B所示之實施例,隨著橫向遮擋板506與該基板之間沿橫向方向之相對運動,單晶粒在基板之整個表面上同時沿垂直方向及橫向方向二者生長。表面浮凸結構720可藉由各種微影技術製成,例如光微影術、電子束微影術、奈米壓印微影術、或聚焦離子束(focused-ion-beam;FIB)微影術及/或任何其他適合之微影技術。或者,也可藉由雷射加熱製程或燒蝕而將表面浮凸結構720轉移或添加至基板之角或基板之邊緣。在本實施例中,隨著生長邊緣遠離該角向前推進,種晶粒可在基板平面上向外突出。 In one embodiment shown in FIG. 7C, the substrate surface may be formed by patterning epitaxy during deposition of the film on the surface of the substrate or during recrystallization of the molten material on the surface of the substrate. A portion has a pattern to form a long-range order, thereby forming a surface relief structure (eg, surface relief structure 720). The surface relief structure 720 can serve as a template for growing a grain on the substrate and causing a desired crystal orientation in the newly grown film. Then using the grain to initiate crystallization and Used to provide an origin for the deposition of the deposited film. Similar to the embodiment shown in FIG. 7B, as the relative movement between the lateral shield 506 and the substrate in the lateral direction, the single crystal grains grow simultaneously in both the vertical and lateral directions on the entire surface of the substrate. The surface relief structure 720 can be fabricated by various lithography techniques such as photolithography, electron beam lithography, nanoimprint lithography, or focused-ion-beam (FIB) lithography. And/or any other suitable lithography technique. Alternatively, the surface relief structure 720 can also be transferred or added to the corners of the substrate or the edges of the substrate by a laser heating process or ablation. In this embodiment, the seed crystals may protrude outward in the plane of the substrate as the growing edge advances away from the corner.

除了採用表面浮凸結構720之外,可添加一種晶722至基板之一點,例如基板之一角。可使用該種晶來初始結晶化,並提供使沈積膜開始沈積之一原點。類似地,隨著生長邊緣遠離該角向前推進,所添加之種晶可在基板平面上向外突出。 In addition to the surface relief structure 720, a crystal 722 can be added to one of the substrates, such as a corner of the substrate. The seed crystal can be used for initial crystallization and provides an origin at which deposition of the deposited film begins. Similarly, as the growing edge advances away from the corner, the added seed crystal can protrude outwardly in the plane of the substrate.

類似於圖7B,圖7D例示一種晶粒在基板之一區域724之一尖銳角處開始朝外橫向生長,其中該區域暴露於材料源。與圖7B相比,在本實施例中該尖銳之角並非係藉由調整基板與橫向控制遮擋板之放置而製成。取而代之地,該尖銳之角係藉由具有此一形狀之一遮擋板而成形。一種晶粒可在該尖銳之角處生長,該種晶粒並作為一種晶來初始結晶化,並提供使沈積開始之一原點。使用所示之一三角形、或具有相同曲率之一新月形之附加優點在於,藉由晶粒競爭,晶粒邊界將垂直於遮擋板邊緣之形狀進行生長。隨著生長邊緣遠離種晶向前推進,此將必然使平行於基板平面之任何晶粒生長得更寬。 Similar to FIG. 7B, FIG. 7D illustrates that a die begins to grow laterally outward at a sharp corner of one of the regions 724 of the substrate, wherein the region is exposed to a source of material. Compared with FIG. 7B, in the present embodiment, the sharp angle is not made by adjusting the placement of the substrate and the lateral control shutter. Instead, the sharp corner is formed by shielding the baffle with one of the shapes. A grain can be grown at the sharp corners, and the grain is initially crystallized as a crystal and provides an origin for the deposition to begin. An additional advantage of using one of the illustrated triangles, or a crescent having the same curvature, is that the grain boundaries will grow perpendicular to the shape of the edge of the baffle by grain competition. As the growing edge moves forward away from the seed crystal, this will necessarily cause any grain parallel to the plane of the substrate to grow wider.

在上述各實施例中,遮擋板可根據不同之應用而具有各種形 狀。舉例而言,如圖7D所示,遮擋板可呈一多邊形形狀或一圓弧形狀。該多邊形之周邊之一部分界定具有一尖銳之角之形狀,在該尖銳之角處生長種晶粒。遮擋板可呈矩形、正方形、圓形、三角形、新月形或一「人字形符號」形狀及/或任何其他適合之形狀。遮擋板可用於任何磊晶薄膜生長,其中,晶體可容許在一基板上同時沿橫向方向及垂直方向生長。舉例而言,遮擋板可用於在一多層基板結構中生長一晶格匹配層。 In the above embodiments, the shielding plate can have various shapes according to different applications. shape. For example, as shown in FIG. 7D, the shielding plate may have a polygonal shape or a circular arc shape. A portion of the perimeter of the polygon defines a shape having a sharp corner at which the seed crystals are grown. The baffle can be rectangular, square, circular, triangular, crescent shaped or a "herringbone" shape and/or any other suitable shape. The mask can be used for any epitaxial film growth in which the crystal can be allowed to grow in both the lateral and vertical directions on a substrate. For example, a mask can be used to grow a lattice matching layer in a multilayer substrate structure.

本文所述之諸多修改方式及其他實例性實施例將使熟習此等實例性實施例所屬技術領域之讀者得知在上述說明及相關附圖中所呈現之教示內容之有益效果。因此,應理解,該等實施例並非僅限於所揭露之特定實施例,且在申請專利範圍之範圍中旨在包含修改方式及其他實施例。此外,儘管上述說明及相關附圖在元件及/或功能之某些實例性組合之上下文中闡述各實例實施例,然而應瞭解,可在不背離隨附申請專利範圍之範圍之條件下以替代實施例來提供各元素及/或功能之不同組合。就此而言,例如,除上文所明確說明者以外,亦涵蓋各元件及/或功能之不同組合,此可闡述於隨附申請專利範圍其中之某些項中。 The various modifications and other examples of the embodiments described herein will be apparent to those skilled in the <RTIgt; Therefore, it is to be understood that the embodiments are not limited to the particular embodiments disclosed, and are intended to include modifications and other embodiments. In addition, while the above description and the associated drawings are illustrative of various example embodiments in the context of some example combinations of elements and/or functions, it should be understood that they may be substituted without departing from the scope of the appended claims. The embodiments provide different combinations of elements and/or functions. In this regard, for example, various combinations of the various components and/or functions may be included in the various aspects of the accompanying claims.

100‧‧‧多層基板結構 100‧‧‧Multilayer substrate structure

102a‧‧‧熱匹配層 102a‧‧‧Hot matching layer

104‧‧‧磊晶層 104‧‧‧ epitaxial layer

106‧‧‧晶格匹配層 106‧‧‧ lattice matching layer

108‧‧‧非晶層 108‧‧‧Amorphous layer

Claims (36)

一種多層基板結構,包含:一基板,該基板之至少一部分具有一圖案,以形成一表面浮凸結構,進而在形成一沈積膜的過程中引起一期望之晶體定向,其中該表面浮凸結構作為一用於在該基板上生長一種晶粒之模板,且其中該種晶粒用以初始結晶化並提供使該沈積膜開始沈積的一原點;以及一晶格匹配層,形成於該基板上,該晶格匹配層包含:一第一化學元素,該第一化學元素在室溫下具有一六方最密堆積結構,該六方最密堆積結構在高於室溫之一α-β相變溫度下轉變至一體心立方結構,該第一化學元素之該六方最密堆積結構具有一第一晶格參數;以及一第二化學元素,該第二化學元素在室溫下具有一六方最密堆積結構,並具有類似於該第一化學元素之化學性質,該第二化學元素之該六方最密堆積結構具有一第二晶格參數,該第二化學元素可與該第一化學元素混溶以形成在室溫下具有一六方最密堆積結構之合金,其中該合金之一晶格常數近似等於III-V族化合物半導體之一成員之一晶格常數。 A multi-layer substrate structure comprising: a substrate having at least a portion of a pattern to form a surface relief structure, thereby causing a desired crystal orientation during formation of a deposited film, wherein the surface relief structure acts as a template for growing a grain on the substrate, wherein the grain is used for initial crystallization and provides an origin for depositing the deposited film; and a lattice matching layer is formed on the substrate The lattice matching layer comprises: a first chemical element having a hexagonal closest packed structure at room temperature, and the hexagonal closest packed structure is at an α-β phase transition higher than room temperature Transitioning to an integral core-cubic structure at a temperature, the hexagonal closest packed structure of the first chemical element having a first lattice parameter; and a second chemical element having a hexagonal maximum at room temperature a densely packed structure having a chemical property similar to the first chemical element, the hexagonal closest packed structure of the second chemical element having a second lattice parameter, the second chemical element being Miscible to form a chemical element having a hexagonal closest packed at room temperature for the alloy, wherein the alloy is one of the lattice constant approximately equal to the lattice constant of the compound semiconductor member of one of one of the Group III-V. 如請求項1之多層基板結構,其中在恆定溫度下,該第一化學元素及該第二化學元素與其各自關聯之晶格參數之間存在一線性關係,以容許該合金之晶格常數近似等於III-V族化合物半導體之該成員之晶格常數。 The multi-layer substrate structure of claim 1, wherein at a constant temperature, there is a linear relationship between the first chemical element and the second chemical element and their respective associated lattice parameters to allow the lattice constant of the alloy to be approximately equal to The lattice constant of this member of the III-V compound semiconductor. 如請求項1之多層基板結構,其中該第一化學元素與該第二化學元素至少 其中之一屬於元素週期表中之IV族元素。 The multi-layer substrate structure of claim 1, wherein the first chemical element and the second chemical element are at least One of them belongs to the group IV element in the periodic table. 如請求項1之多層基板結構,其中以原子百分比計,該第一化學元素對該第二化學元素之摩爾比例為約14%至86%。 The multi-layer substrate structure of claim 1, wherein the molar ratio of the first chemical element to the second chemical element is about 14% to 86% in atomic percent. 如請求項1之多層基板結構,其中以原子百分比計,該第一化學元素對該第二化學元素之摩爾比例為約43%至57%。 The multilayer substrate structure of claim 1, wherein the molar ratio of the first chemical element to the second chemical element is about 43% to 57% by atomic percent. 如請求項1之多層基板結構,其中以原子百分比計,該第一化學元素對該第二化學元素之摩爾比例為約99%至1%。 The multilayer substrate structure of claim 1, wherein the molar ratio of the first chemical element to the second chemical element is about 99% to 1% by atomic percent. 如請求項1之多層基板結構,其中該晶格匹配層更包含一第三化學元素,其中該第三化學元素具有與該第一化學元素及該第二化學元素類似之晶體結構及類似之化學性質,且其中該第三化學元素可與該第一化學元素及該第二化學元素混溶以形成合金,在恆定溫度下,在該第一化學元素、該第二化學元素及該第三化學元素與其各自關聯之晶格參數之間存在一線性關係,以容許該合金之晶格常數近似等於III-V族化合物半導體之該成員之晶格常數。 The multi-layer substrate structure of claim 1, wherein the lattice matching layer further comprises a third chemical element, wherein the third chemical element has a crystal structure similar to the first chemical element and the second chemical element and a similar chemistry a property, and wherein the third chemical element is miscible with the first chemical element and the second chemical element to form an alloy, at a constant temperature, at the first chemical element, the second chemical element, and the third chemical There is a linear relationship between the elements and their respective associated lattice parameters to allow the lattice constant of the alloy to be approximately equal to the lattice constant of the member of the III-V compound semiconductor. 如請求項1之多層基板結構,其中該III-V族化合物半導體包含氮化鋁(AlN)、氮化鎵(GaN)、氮化銦鎵(InGaN)及氮化銦(InN)其中之一。 The multilayer substrate structure of claim 1, wherein the III-V compound semiconductor comprises one of aluminum nitride (AlN), gallium nitride (GaN), indium gallium nitride (InGaN), and indium nitride (InN). 如請求項1之多層基板結構,更包含形成於該基板上之一熱匹配層,該熱匹配層包含鉬、鉬-銅、莫來石(mullite)、藍寶石、石墨、氮氧化鋁、矽、碳化矽、氧化鋅、及稀土氧化物至少其中之一,其中該熱匹配層之熱膨脹係數近似等於III-V族化合物半導體之一成員之熱膨脹係數。 The multi-layer substrate structure of claim 1, further comprising a thermal matching layer formed on the substrate, the thermal matching layer comprising molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum oxynitride, antimony, At least one of tantalum carbide, zinc oxide, and rare earth oxide, wherein the thermal expansion layer has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion of a member of the group III-V compound semiconductor. 如請求項1之多層基板結構,更包含位於該熱匹配層與該晶格匹配層間之一非晶層,其中該非晶層包含二氧化矽、氮化鉭、氮化硼、氮化鎢、氮 化矽、玻璃態非晶碳及矽酸鹽玻璃其中之一。 The multi-layer substrate structure of claim 1, further comprising an amorphous layer between the thermal matching layer and the lattice matching layer, wherein the amorphous layer comprises ceria, tantalum nitride, boron nitride, tungsten nitride, nitrogen One of bismuth, glassy amorphous carbon and silicate glass. 一種製造一多層基板結構之方法,該多層基板結構包含:一基板,該基板之至少一部分具有一圖案,以形成一表面浮凸結構,進而在形成一沈積膜的過程中引起一期望之晶體定向,其中該表面浮凸結構作為一用於在該基板上生長一種晶粒之模板,且其中該種晶粒用以初始結晶化並提供使該沈積膜開始沈積的一原點;以及一晶格匹配層,形成於該基板上,該晶格匹配層包含:一第一化學元素,該第一化學元素在室溫下具有一六方最密堆積結構,該六方最密堆積結構在高於室溫之一α-β相變溫度下轉變至一體心立方結構,該第一化學元素之該六方最密堆積結構具有一第一晶格參數;以及一第二化學元素,該第二化學元素在室溫下具有一六方最密堆積結構,並具有類似於該第一化學元素之化學性質,該第二化學元素之該六方最密堆積結構具有一第二晶格參數,該第二化學元素可與該第一化學元素混溶以形成在室溫下具有一六方最密堆積結構之合金,其中該合金之一晶格常數近似等於III-V族化合物半導體之一成員之一晶格常數。 A method of fabricating a multilayer substrate structure, the multilayer substrate structure comprising: a substrate having at least a portion of the substrate having a pattern to form a surface relief structure, thereby causing a desired crystal during formation of a deposited film Orientation, wherein the surface relief structure acts as a template for growing a grain on the substrate, and wherein the grain is used for initial crystallization and provides an origin for depositing the deposited film; and a crystal a lattice matching layer formed on the substrate, the lattice matching layer comprising: a first chemical element having a hexagonal closest packed structure at room temperature, the hexagonal closest packed structure being higher than Converting to an integral core-cubic structure at one of the room temperature α-β phase transition temperatures, the hexagonal closest packed structure of the first chemical element having a first lattice parameter; and a second chemical element, the second chemical element Having a hexagonal closest packing structure at room temperature and having a chemical property similar to the first chemical element, the hexagonal closest packing structure of the second chemical element having a second lattice The second chemical element may be miscible with the first chemical element to form an alloy having a hexagonal closest packing structure at room temperature, wherein one of the alloys has a lattice constant approximately equal to that of the III-V compound semiconductor One of the members has a lattice constant. 如請求項11之方法,更包含:形成一熱匹配層,該晶格匹配層係生長於該熱匹配層上,該熱匹配層包含鉬、鉬-銅、莫來石(mullite)、藍寶石、石墨、氮氧化鋁、矽、碳化矽、氧化鋅、及稀土氧化物至少其中之一。 The method of claim 11, further comprising: forming a thermal matching layer, the lattice matching layer is grown on the thermal matching layer, the thermal matching layer comprising molybdenum, molybdenum-copper, mullite, sapphire, At least one of graphite, aluminum oxynitride, cerium, lanthanum carbide, zinc oxide, and rare earth oxide. 如請求項11之方法,更包含對該第一化學元素沿一平面之熱膨脹係數與 該第二化學元素沿該平面之熱膨脹係數進行內插,以沿該同一平面得到該合金之熱膨脹係數之一一階估計值,其中該合金之該熱膨脹係數係約為III-V族化合物半導體之該成員沿該同一平面的熱膨脹係數。 The method of claim 11, further comprising a coefficient of thermal expansion of the first chemical element along a plane The second chemical element is interpolated along a thermal expansion coefficient of the plane to obtain a first-order estimate of the thermal expansion coefficient of the alloy along the same plane, wherein the thermal expansion coefficient of the alloy is about III-V compound semiconductor The coefficient of thermal expansion of the member along the same plane. 如請求項11之方法,更包含:加熱該多層基板結構至低於一α-β相變溫度,以容許以正確α相在該晶格匹配層上磊晶生長一磊晶層。 The method of claim 11, further comprising: heating the multilayer substrate structure to a temperature lower than an α-β phase transition to allow epitaxial growth of an epitaxial layer on the lattice matching layer with the correct α phase. 如請求項11之方法,更包含:加熱該多層基板結構至高於一α-β相變溫度並立即降至低於該α-β相變溫度,以使得產生相變自由能而使大的橫向區域結晶,藉此在該晶格匹配層中得到一單晶α相。 The method of claim 11, further comprising: heating the multilayer substrate structure to a temperature higher than an α-β phase transition temperature and immediately lowering the temperature lower than the α-β phase transition temperature, so that a phase change free energy is generated to make a large lateral direction The region is crystallized, whereby a single crystal α phase is obtained in the lattice matching layer. 一種在一基板上形成一沈積膜之方法,包含:利用一視線沈積方法將一源材料自一材料源引導至該基板之一表面;以設置於該基板與該源材料之間的一遮擋板遮擋該基板之一預定部分,以形成一被阻擋基板部分及一未被阻擋基板部分,藉此防止源材料被沈積至該基板之該初始被阻擋部分之上;以及使該遮擋板與該基板之間相對運動,以使得該被阻擋基板部分減小且該未被阻擋基板部分增大,藉此形成一移動之橫向生長邊界,進而在該基板上達成橫向磊晶生長形成該沈積膜,其中該基板之至少一部分具有一圖案,以形成一表面浮凸結構,進而在形成該沈積膜的過程中引起一期望之晶體定向,其中該表面浮凸結構作為一用於在該基板上生長一種晶粒之模板,且其中該種晶粒用以初始結晶化並提供使該沈積膜開始沈積的一原點。 A method of forming a deposited film on a substrate, comprising: directing a source material from a material source to a surface of the substrate by a line of sight deposition method; and forming a shielding plate between the substrate and the source material Blocking a predetermined portion of the substrate to form a barrier substrate portion and an unblocked substrate portion, thereby preventing source material from being deposited onto the initial blocked portion of the substrate; and locating the mask with the substrate Relative movement between the portions of the substrate to be reduced and the portion of the unblocked substrate being enlarged, thereby forming a moving lateral growth boundary, thereby achieving lateral epitaxial growth on the substrate to form the deposited film, wherein At least a portion of the substrate has a pattern to form a surface relief structure that in turn causes a desired crystal orientation during formation of the deposited film, wherein the surface relief structure acts as a crystal for growth on the substrate a template of particles, and wherein the grains are used for initial crystallization and provide an origin for the deposition of the deposited film. 如請求項16之方法,更包含:以一或多個晶粒作為該種晶粒而在該基板 上生長晶體。 The method of claim 16, further comprising: using one or more dies as the dies on the substrate Crystals are grown on. 如請求項16之方法,其中該基板之該未被阻擋基板部分具有一尖銳之角;且該方法更包含:圍繞該尖銳之角生長該種晶粒(seed grain)。 The method of claim 16, wherein the unblocked substrate portion of the substrate has a sharp corner; and the method further comprises: growing the seed grain around the sharp corner. 如請求項16之方法,更包含:藉由應用一微影製程、一雷射加熱製程、及燒蝕其中之一而使該基板之至少一部分具有該圖案。 The method of claim 16, further comprising: causing at least a portion of the substrate to have the pattern by applying a lithography process, a laser heating process, and ablating one of them. 如請求項16之方法,更包含在該基板上之一期望位置增加該種晶粒。 The method of claim 16, further comprising adding the seed crystal to a desired location on the substrate. 如請求項16之方法,更包含:以一拖曳式控制遮擋板來阻擋該基板之一第二部分,以控制或避免在該基板的被該拖曳式控制遮擋板阻擋之該部分上所形成之該沈積膜上進行磊晶沈積。 The method of claim 16, further comprising: blocking a second portion of the substrate by a drag control shutter to control or avoid forming on the portion of the substrate that is blocked by the drag control shutter Epitaxial deposition was performed on the deposited film. 一種用於在一基板上形成一沈積膜之系統,包含:一橫向控制遮擋板,其設置於該基板與一源材料之間,並配置以阻擋該基板之一部分,以防止沈積該源材料至該基板之該被阻擋部分上,其中該橫向控制遮擋板及/或該基板其中之一者相對於另一者移動以形成一移動之橫向生長邊界邊緣,進而在該基板上達成橫向磊晶沈積,並在該基板之表面上形成具有大粒徑之該沈積膜,其中該基板之至少一部分具有一圖案,以形成一表面浮凸結構,進而在形成該沈積膜的過程中引起一期望之晶體定向,其中該表面浮凸結構作為一用於在該基板上生長一種晶粒之模板,且其中該種晶粒用以初始結晶化並提供使該沈積膜開始沈積的一原點。 A system for forming a deposited film on a substrate, comprising: a lateral control shutter disposed between the substrate and a source material and configured to block a portion of the substrate to prevent deposition of the source material to The blocked portion of the substrate, wherein the lateral control shutter and/or one of the substrates moves relative to the other to form a moving lateral growth boundary edge, thereby achieving lateral epitaxial deposition on the substrate And forming a deposited film having a large particle diameter on a surface of the substrate, wherein at least a portion of the substrate has a pattern to form a surface relief structure, thereby causing a desired crystal in the process of forming the deposited film Orientation, wherein the surface relief structure acts as a template for growing a grain on the substrate, and wherein the grain is used for initial crystallization and provides an origin for the deposition film to begin to deposit. 如請求項22之系統,更包含一拖曳式控制遮擋板,其中對於該橫向控制遮擋板與該拖曳式控制遮擋板間之開口大小進行調整,以使得該沈積膜具有一期望之均勻厚度。 The system of claim 22, further comprising a towed control shutter, wherein the size of the opening between the lateral control shutter and the trailing control shutter is adjusted such that the deposited film has a desired uniform thickness. 如請求項22之系統,其中該橫向控制遮擋板具有一遮擋板邊緣,該遮擋板邊緣之形狀係為矩形、正方形、圓形、三角形、新月形、人字形、直邊、圓弧、及多邊形其中之一。 The system of claim 22, wherein the lateral control shutter has a baffle edge, and the shape of the baffle edge is rectangular, square, circular, triangular, crescent, chevron, straight edge, arc, and One of the polygons. 如請求項22之系統,其中將該源材料相對於該橫向控制遮擋板進行定位,以利用一視線沈積方法將該源材料沈積至該基板之該表面。 The system of claim 22, wherein the source material is positioned relative to the lateral control shutter to deposit the source material to the surface of the substrate using a line of sight deposition method. 如請求項22之系統,更包含一準直器,其中該凖直器設置於該源材料與該基板之間。 The system of claim 22, further comprising a collimator, wherein the straightener is disposed between the source material and the substrate. 如請求項22之系統,更包含一熱源,該熱源包含一紅外線加熱器、一熱線式輻射加熱器、一雷射、一聚焦燈式加熱器、一光柵帶電粒子束、一感應加熱器、一直接金屬基座加熱器、及一陶瓷基座加熱器其中之一。 The system of claim 22, further comprising a heat source comprising an infrared heater, a hot wire radiant heater, a laser, a focus lamp heater, a grating charged particle beam, an induction heater, and a One of a direct metal base heater and a ceramic base heater. 一種在一基板上形成一沈積膜之方法,包含:利用一視線沈積方法將一源材料自一材料源引導至該基板之一表面;以設置於該基板與該源材料之間的一遮擋板遮擋該基板之一預定部分,以形成一被阻擋基板部分及一未被阻擋基板部分,藉此防止源材料被沈積至該基板之該初始之被阻擋部分之上;以及使該遮擋板與該基板進行相對運動,使得該被阻擋基板部分減小且該未被阻擋基板部分增大,藉此形成一移動之橫向生長邊界,進而在該基板上達成橫向磊晶生長形成該沈積膜,其中該基板之至少一部分具有一圖案,以形成一表面浮凸結構,進而在形成該沈積膜中引起一期望之晶體定向,其中該表面浮凸結構作為一用於在該基板上生長一種晶粒之模板,且其中該種晶粒用以初始結晶 化並提供使該沈積膜開始沈積的一原點。 A method of forming a deposited film on a substrate, comprising: directing a source material from a material source to a surface of the substrate by a line of sight deposition method; and forming a shielding plate between the substrate and the source material Blocking a predetermined portion of the substrate to form a blocked substrate portion and an unblocked substrate portion, thereby preventing source material from being deposited onto the initial blocked portion of the substrate; and causing the mask to The substrate is relatively moved such that the blocked substrate portion is reduced and the unblocked substrate portion is enlarged, thereby forming a moving lateral growth boundary, and then lateral epitaxial growth is performed on the substrate to form the deposited film. At least a portion of the substrate has a pattern to form a surface relief structure, thereby causing a desired crystal orientation in forming the deposited film, wherein the surface relief structure acts as a template for growing a grain on the substrate And wherein the grain is used for initial crystallization And provide an origin for the deposition of the deposited film. 如請求項28之方法,更包含:以一或多個晶粒作為該種晶粒,而在該基板上生長晶體。 The method of claim 28, further comprising: growing crystals on the substrate by using one or more crystal grains as the crystal grains. 如請求項28之方法,其中該基板之該未被阻擋基板部分具有一尖銳之角;且該方法更包含:圍繞該尖銳之角生長該種晶粒。 The method of claim 28, wherein the unblocked substrate portion of the substrate has a sharp corner; and the method further comprises: growing the seed crystal around the sharp corner. 如請求項28之方法,更包含:藉由應用一微影製程、一雷射加熱製程、及燒蝕其中之一而使該基板之至少一部分具有該圖案。 The method of claim 28, further comprising: causing at least a portion of the substrate to have the pattern by applying a lithography process, a laser heating process, and ablating one of them. 如請求項28之方法,更包含在該基板上之一期望位置增加該種晶粒。 The method of claim 28, further comprising adding the seed crystal to a desired location on the substrate. 如請求項28之方法,更包含:以一拖曳式控制遮擋板來阻擋該基板之一第二部分,以控制或避免在該基板的被該拖曳式控制遮擋板阻擋之該部分上所形成之該沈積膜上進行磊晶沈積。 The method of claim 28, further comprising: blocking a second portion of the substrate by a drag control shutter to control or avoid forming on the portion of the substrate that is blocked by the drag control shutter Epitaxial deposition was performed on the deposited film. 如請求項28之方法,更包含:利用設置於該源材料與該基板間之一準直器以使該源材料凖直。 The method of claim 28, further comprising: utilizing a collimator disposed between the source material and the substrate to straighten the source material. 如請求項28之方法,其中該視線沈積方法包含物理氣相沈積與化學氣相沈積其中之一。 The method of claim 28, wherein the line of sight deposition method comprises one of physical vapor deposition and chemical vapor deposition. 如請求項28之方法,更包含:以紅外線加熱、熱線式輻射加熱、雷射、聚焦燈式加熱、感應加熱、直接金屬基座加熱器、及陶瓷基座加熱器其中之一加熱該基板。 The method of claim 28, further comprising: heating the substrate by one of infrared heating, hot wire radiant heating, laser, focus lamp heating, induction heating, direct metal pedestal heater, and ceramic pedestal heater.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11467294B2 (en) 2017-07-26 2022-10-11 Shenzhen Xpectvision Technology Co., Ltd. Radiation detector with built-in depolarization device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9879357B2 (en) 2013-03-11 2018-01-30 Tivra Corporation Methods and systems for thin film deposition processes
US9487885B2 (en) 2012-06-14 2016-11-08 Tivra Corporation Substrate structures and methods
EP2942803B1 (en) * 2014-05-08 2019-08-21 Flosfia Inc. Crystalline multilayer structure and semiconductor device
CN106057641A (en) * 2016-05-27 2016-10-26 清华大学 Semiconductor structure and method for preparing semiconductor structure
CN106057643A (en) * 2016-05-27 2016-10-26 清华大学 Semiconductor structure and method for preparing semiconductor structure
WO2019025082A1 (en) 2017-08-03 2019-02-07 Asml Netherlands B.V. Simultaneous double-side coating of multilayer graphene pellicle by local thermal processing
JP7159449B2 (en) * 2019-03-28 2022-10-24 日本碍子株式会社 Underlying substrate and manufacturing method thereof
JP7283273B2 (en) * 2019-07-01 2023-05-30 株式会社レゾナック MAGNETIC RECORDING MEDIUM, MANUFACTURING METHOD THEREOF, AND MAGNETIC RECORDING/PLAYBACK APPARATUS

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374407A (en) * 1964-06-01 1968-03-19 Rca Corp Field-effect transistor with gate-insulator variations to achieve remote cutoff characteristic
US4222345A (en) * 1978-11-30 1980-09-16 Optical Coating Laboratory, Inc. Vacuum coating apparatus with rotary motion assembly
FR2629637B1 (en) * 1988-04-05 1990-11-16 Thomson Csf METHOD FOR PRODUCING AN ALTERNATION OF LAYERS OF SINGLE-CRYSTAL SEMICONDUCTOR MATERIAL AND LAYERS OF INSULATING MATERIAL
US5597411A (en) * 1991-02-19 1997-01-28 Energy Conversion Devices, Inc. Method of forming a single crystal material
TW272319B (en) * 1993-12-20 1996-03-11 Sharp Kk
US5906857A (en) * 1997-05-13 1999-05-25 Ultratherm, Inc. Apparatus, system and method for controlling emission parameters attending vaporized in a HV environment
US6645833B2 (en) * 1997-06-30 2003-11-11 Max-Planck-Gesellschaft Zur Foerderung Der Wissenschaften E. V. Method for producing layered structures on a substrate, substrate and semiconductor components produced according to said method
US6392257B1 (en) * 2000-02-10 2002-05-21 Motorola Inc. Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same
WO2002042731A2 (en) * 2000-11-20 2002-05-30 Parallel Synthesis Technologies, Inc. Methods and devices for high throughput crystallization
US20030017626A1 (en) * 2001-07-23 2003-01-23 Motorola Inc. Method and apparatus for controlling propagation of dislocations in semiconductor structures and devices
US6898224B2 (en) * 2001-08-22 2005-05-24 The Furukawa Electric Co., Ltd. Semiconductor laser device
JP2003142781A (en) * 2001-08-22 2003-05-16 Furukawa Electric Co Ltd:The Semiconductor laser element
TW591202B (en) * 2001-10-26 2004-06-11 Hermosa Thin Film Co Ltd Dynamic film thickness control device/method and ITS coating method
JP4933130B2 (en) * 2006-02-16 2012-05-16 昭和電工株式会社 GaN-based semiconductor light-emitting device and manufacturing method thereof
JP5446059B2 (en) 2006-04-24 2014-03-19 豊田合成株式会社 GaN-based semiconductor light emitting device manufacturing method
CN101702900A (en) * 2007-01-04 2010-05-05 代表亚利桑那州立大学行事的亚利桑那董事会 zirconium and hafnium boride alloy templates on silicon for nitride integration applications

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11467294B2 (en) 2017-07-26 2022-10-11 Shenzhen Xpectvision Technology Co., Ltd. Radiation detector with built-in depolarization device
TWI793143B (en) * 2017-07-26 2023-02-21 中國大陸商深圳幀觀德芯科技有限公司 A radiation detector with a built-in depolarization device, a method of using the same and method of manufacturing a semiconductor device

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