JP2015526368A - Multilayer substrate structure and manufacturing method and system thereof - Google Patents
Multilayer substrate structure and manufacturing method and system thereof Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 213
- 238000004519 manufacturing process Methods 0.000 title description 6
- 239000013078 crystal Substances 0.000 claims abstract description 94
- 229910052729 chemical element Inorganic materials 0.000 claims abstract description 54
- 239000004065 semiconductor Substances 0.000 claims abstract description 31
- 239000000470 constituent Substances 0.000 claims abstract description 25
- 239000000956 alloy Substances 0.000 claims abstract description 24
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 24
- 150000001875 compounds Chemical class 0.000 claims abstract description 23
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 11
- 239000010980 sapphire Substances 0.000 claims abstract description 11
- 239000000126 substance Substances 0.000 claims abstract description 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 9
- 239000010703 silicon Substances 0.000 claims abstract description 9
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 8
- 239000011733 molybdenum Substances 0.000 claims abstract description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910001404 rare earth metal oxide Inorganic materials 0.000 claims abstract description 7
- 239000011787 zinc oxide Substances 0.000 claims abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 6
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910002804 graphite Inorganic materials 0.000 claims abstract description 6
- 239000010439 graphite Substances 0.000 claims abstract description 6
- 229910052863 mullite Inorganic materials 0.000 claims abstract description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 6
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 61
- 238000000151 deposition Methods 0.000 claims description 50
- 239000000463 material Substances 0.000 claims description 44
- 238000010438 heat treatment Methods 0.000 claims description 31
- 239000002994 raw material Substances 0.000 claims description 23
- 230000008021 deposition Effects 0.000 claims description 18
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 229910002601 GaN Inorganic materials 0.000 claims description 13
- 230000007704 transition Effects 0.000 claims description 13
- 230000001154 acute effect Effects 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 238000002425 crystallisation Methods 0.000 claims description 9
- 230000008025 crystallization Effects 0.000 claims description 9
- 230000033001 locomotion Effects 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 230000000977 initiatory effect Effects 0.000 claims description 6
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 6
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 claims description 4
- 230000000903 blocking effect Effects 0.000 claims description 4
- 230000006698 induction Effects 0.000 claims description 4
- 238000012545 processing Methods 0.000 claims description 4
- -1 tungsten nitride Chemical class 0.000 claims description 4
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052582 BN Inorganic materials 0.000 claims description 3
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 238000002679 ablation Methods 0.000 claims description 3
- 229910003481 amorphous carbon Inorganic materials 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 3
- 230000000737 periodic effect Effects 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 238000000407 epitaxy Methods 0.000 claims description 2
- 229910021480 group 4 element Inorganic materials 0.000 claims description 2
- 238000005240 physical vapour deposition Methods 0.000 claims description 2
- 230000005855 radiation Effects 0.000 claims description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims 1
- 239000011521 glass Substances 0.000 claims 1
- 239000002245 particle Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 17
- 238000009826 distribution Methods 0.000 description 15
- 238000004544 sputter deposition Methods 0.000 description 13
- 230000007547 defect Effects 0.000 description 11
- 239000010936 titanium Substances 0.000 description 11
- 239000010409 thin film Substances 0.000 description 10
- 238000000231 atomic layer deposition Methods 0.000 description 6
- 238000005137 deposition process Methods 0.000 description 5
- 150000002739 metals Chemical class 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000001704 evaporation Methods 0.000 description 4
- 230000004907 flux Effects 0.000 description 4
- 238000001451 molecular beam epitaxy Methods 0.000 description 4
- 238000001771 vacuum deposition Methods 0.000 description 4
- 229910052726 zirconium Inorganic materials 0.000 description 4
- 230000002411 adverse Effects 0.000 description 3
- 238000003877 atomic layer epitaxy Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 229910052735 hafnium Inorganic materials 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 238000004549 pulsed laser deposition Methods 0.000 description 3
- 238000001953 recrystallisation Methods 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 238000005477 sputtering target Methods 0.000 description 3
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052755 nonmetal Inorganic materials 0.000 description 2
- 150000002843 nonmetals Chemical class 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 239000005368 silicate glass Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000003610 charcoal Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010891 electric arc Methods 0.000 description 1
- 238000000609 electron-beam lithography Methods 0.000 description 1
- 238000000313 electron-beam-induced deposition Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 238000000869 ion-assisted deposition Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000012768 molten material Substances 0.000 description 1
- 238000001127 nanoimprint lithography Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 230000008447 perception Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 229910021481 rutherfordium Inorganic materials 0.000 description 1
- YGPLJIIQQIDVFJ-UHFFFAOYSA-N rutherfordium atom Chemical compound [Rf] YGPLJIIQQIDVFJ-UHFFFAOYSA-N 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 239000011364 vaporized material Substances 0.000 description 1
Classifications
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B1/00—Single-crystal growth directly from the solid state
- C30B1/02—Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/002—Controlling or regulating
- C30B23/005—Controlling or regulating flux or flow of depositing species or vapour
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
- C30B23/025—Epitaxial-layer growth characterised by the substrate
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/16—Controlling or regulating
- C30B25/165—Controlling or regulating the flow of the reactive gases
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/52—Alloys
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- Chemical & Material Sciences (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Thermal Sciences (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Vapour Deposition (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
多層基板構造が、基板と、前記基板上に形成された熱整合層と、前記熱整合層上の格子整合層とを含む。前記熱整合層は、モリブデン、モリブデン銅、ムライト、サファイア、グラファイト、酸窒化アルミニウム、ケイ素、炭化ケイ素、酸化亜鉛、および希土類酸化物のうちの少なくとも1つを含む。前記格子整合層は、合金を形成するための第1の化学元素と第2の化学元素とを含む。前記第1および第2の化学元素は、同様の結晶構造と化学的特性を有する。前記熱整合層の熱膨張係数と前記格子整合層の格子パラメータは、どちらもIII−V族化合物半導体の構成元素のそれぞれに等しい。前記格子整合層の格子定数は、III−V族化合物半導体の構成元素のそれに等しい。前記格子整合層および前記熱整合層は、格子制御シャッタを使用して基板上に堆積される。【選択図】図5A multilayer substrate structure includes a substrate, a thermal matching layer formed on the substrate, and a lattice matching layer on the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum copper, mullite, sapphire, graphite, aluminum oxynitride, silicon, silicon carbide, zinc oxide, and rare earth oxide. The lattice matching layer includes a first chemical element and a second chemical element for forming an alloy. The first and second chemical elements have similar crystal structures and chemical characteristics. The thermal expansion coefficient of the thermal matching layer and the lattice parameter of the lattice matching layer are both equal to the constituent elements of the III-V compound semiconductor. The lattice constant of the lattice matching layer is equal to that of the constituent element of the III-V compound semiconductor. The lattice matching layer and the thermal matching layer are deposited on a substrate using a lattice control shutter. [Selection] Figure 5
Description
本出願は、2012年6月22日出願の米国特許仮出願第61/662,918号、2012年6月14日出願の米国特許仮出願第61/659,944号、2013年3月11日出願の米国特許非仮出願第13/794,372号、2013年3月11日出願の米国特許非仮出願第13/794,327号、および2013年3月11日出願の米国特許非仮出願第13/794,285号の優先権の利益を主張し、各出願の開示は参照により本明細書に組み込まれる。 This application is based on US Provisional Application No. 61 / 662,918, filed June 22, 2012, US Provisional Application No. 61 / 659,944, filed June 14, 2012, March 11, 2013. US patent non-provisional application No. 13 / 794,372, US patent non-provisional application No. 13 / 794,327 filed on March 11, 2013, and US patent non-provisional application filed March 11, 2013 No. 13 / 794,285, which claims the benefit of priority, the disclosure of each application is incorporated herein by reference.
本発明の例示的な実施形態は、半導体材料、方法、および装置に関し、より具体的には、III−V族化合物半導体のエピタキシャル成長のための多層基板構造およびその製造システムに関する。 Exemplary embodiments of the present invention relate to semiconductor materials, methods, and apparatus, and more particularly, to a multilayer substrate structure for epitaxial growth of III-V compound semiconductors and a manufacturing system thereof.
窒化ガリウム(GaN)、ガリウム砒素(GaAs)、窒化インジウム(InN)、窒化アルミニウム(AlN)、およびリン化ガリウム(GaP)などのIII−V族化合物半導体は、マイクロ波周波数集積回路、発光ダイオード、レーザダイオード、太陽電池、高出力高周波電子機器、および光電子デバイスなどの電子機器の製造に広く使用される。処理能力を改善し、製造コストを削減するために、基板サイズ(例えば、直径)の拡大が望まれる。大型サイズのIII−V族化合物半導体の成長には高額な費用が掛かるため、III−V族化合物半導体のエピタキシャル成長のための基板として、炭化ケイ素(SiC)、サファイアおよびケイ素などの半導体だけでなく、金属、金属酸化物および金属窒化物を含む多くの異質材料が一般的に使用されている。 III-V compound semiconductors such as gallium nitride (GaN), gallium arsenide (GaAs), indium nitride (InN), aluminum nitride (AlN), and gallium phosphide (GaP) are used for microwave frequency integrated circuits, light emitting diodes, Widely used in the manufacture of electronic equipment such as laser diodes, solar cells, high power high frequency electronic equipment, and optoelectronic devices. In order to improve throughput and reduce manufacturing costs, it is desirable to increase the substrate size (eg, diameter). Since growth of large-sized III-V compound semiconductors is expensive, not only semiconductors such as silicon carbide (SiC), sapphire, and silicon are used as substrates for epitaxial growth of III-V compound semiconductors, Many foreign materials are commonly used, including metals, metal oxides and metal nitrides.
しかしながら、基板(例えば、サファイア)上でのIII−V族化合物半導体(例えば、GaN)のエピタキシャル成長は、GaN層と下地基板の異質材料との間の格子不整合および熱膨張係数不整合により、エピタキシャル層の結晶品質に多くの課題(例えば、結晶粒界、転位やその他の拡張欠陥、および点欠陥)をもたらす。GaN層と下地基板との間の熱膨張係数の相違は、ウエハ全体に大きい曲率を生じ、処理中および後処理時に室温に戻る結果となり、また、格子定数の著しい不整合は、高転位密度、望ましくない歪みおよびエピタキシャルGaN層内に伝搬される欠陥をもたらす。これらの問題に対処するために、GaN層とサファイア基板間にバッファ層を成長させる方法や、適切な材料の層を交互に重ねることで圧縮および張力歪を相殺する方法などの応力緩和戦略が用いられる。しかしながら、バッファ層または応力除去層を加えることにより、転位密度は高いままに維持され、また、能動素子層の成長に使用されるのと同様の堆積技術が使われるために製造コストおよび複雑性が大きく増加する。 However, epitaxial growth of III-V compound semiconductors (eg, GaN) on a substrate (eg, sapphire) is epitaxial due to lattice mismatch and thermal expansion coefficient mismatch between the GaN layer and the foreign material of the underlying substrate. There are many challenges to the crystal quality of the layer (eg, grain boundaries, dislocations and other extended defects, and point defects). The difference in coefficient of thermal expansion between the GaN layer and the underlying substrate results in a large curvature across the wafer and results in returning to room temperature during processing and post-processing, and a significant mismatch in lattice constant is due to high dislocation density, Undesirable strains and defects propagated in the epitaxial GaN layer result. To address these issues, stress relaxation strategies such as a method of growing a buffer layer between the GaN layer and the sapphire substrate, or a method of offsetting compression and tension strain by alternately layering appropriate materials are used. It is done. However, by adding a buffer layer or stress relief layer, the dislocation density remains high, and manufacturing costs and complexity are reduced due to the use of deposition techniques similar to those used to grow active device layers. Increase greatly.
炭化ケイ素(SiC)、サファイアおよびケイ素などの半導体と同様に、金属、金属酸化物、金属窒化物を含む異質材料が、半導体のエピタキシャル成長のための基板として使用される場合、分子線エピタキシー(MBE)または有機金属気相成長法(MOCVD)技術、および、場合によって原子層堆積(ALD)または原子層エピタキシー(ALE)技術を使用して、半導体薄膜が基板上に堆積される。しかしながら、これらの方法を用いても、すべての原子、イオン、または分子が規則的配列に構築されるわけではないため、多くの原子が望ましくない結合配向を形成し、半導体材料の電子特性に悪影響を及ぼすと共に結晶品質を著しく低下させる。結晶品質は、通常、結晶サイズ、結晶粒度、担体寿命、および拡散距離によって表される。 Molecular beam epitaxy (MBE) when heterogeneous materials including metals, metal oxides, metal nitrides, as well as semiconductors such as silicon carbide (SiC), sapphire and silicon are used as substrates for epitaxial growth of semiconductors Alternatively, a semiconductor thin film is deposited on a substrate using metal organic chemical vapor deposition (MOCVD) techniques and optionally atomic layer deposition (ALD) or atomic layer epitaxy (ALE) techniques. However, even with these methods, not all atoms, ions, or molecules are built in a regular array, so many atoms form undesirable bond orientations that adversely affect the electronic properties of semiconductor materials. As well as significantly reducing the crystal quality. Crystal quality is usually expressed by crystal size, crystal grain size, carrier lifetime, and diffusion distance.
帯域溶解再結晶(ZMR)などのいくつかの技術は、結晶材料品質を向上させるように設計されているが、堆積膜の一部を溶融するために生成された温度が、下地基板の処理可能な最大温度を超過する可能性があるという欠点がある。下地基板が堆積膜の溶融点まで加熱されるのを防ぐために、加熱時間を短縮することが可能である。しかしながら、加熱時間を短縮すると、結晶構造が凝固する際、縦と横の両方向に同時に成長せずに縦方向にだけ成長する。従って、エピタキシャル成長は横方向ではなく縦方向が大半を占め、その結果、基板に沿って小さい結晶粒のパッチができる。 Some techniques, such as zone melt recrystallization (ZMR), are designed to improve crystal material quality, but the temperature generated to melt a portion of the deposited film can be processed by the underlying substrate The disadvantage is that the maximum temperature may be exceeded. In order to prevent the base substrate from being heated to the melting point of the deposited film, the heating time can be shortened. However, when the heating time is shortened, when the crystal structure is solidified, it grows only in the vertical direction without growing simultaneously in both the vertical and horizontal directions. Therefore, epitaxial growth occupies most of the vertical direction, not the horizontal direction, and as a result, small crystal grain patches can be formed along the substrate.
本発明の一実施形態によれば、多層基板構造は、基板と、基板上に形成された熱整合層と、熱整合層上の格子整合層とを備える。熱整合層は、モリブデン、モリブデン銅、ムライト、サファイア、グラファイト、酸窒化アルミニウム、ケイ素、炭化ケイ素、酸化亜鉛、および希土類酸化物のうちの少なくとも1つを含む。格子整合層は、合金を形成するための第1の化学元素と第2の化学元素を含む。第1および第2の化学元素は、類似の結晶構造および化学的性質を有する。熱整合層の熱膨張係数は、III−V族化合物半導体の構成元素のそれとほぼ同一である。 According to one embodiment of the present invention, a multilayer substrate structure comprises a substrate, a thermal matching layer formed on the substrate, and a lattice matching layer on the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum copper, mullite, sapphire, graphite, aluminum oxynitride, silicon, silicon carbide, zinc oxide, and rare earth oxide. The lattice matching layer includes a first chemical element and a second chemical element for forming an alloy. The first and second chemical elements have similar crystal structures and chemical properties. The thermal expansion coefficient of the thermal matching layer is almost the same as that of the constituent elements of the III-V compound semiconductor.
本発明の一実施形態によれば、多層基板構造の生成方法は、基板を提供するステップと、基板上に熱整合層を成長させるステップとを含む。熱整合層は、モリブデン、モリブデン銅、ムライト、サファイア、グラファイト、酸窒化アルミニウム、ケイ素、炭化ケイ素、酸化亜鉛、および希土類酸化物のうちの少なくとも1つを含む。この方法はまた、熱整合層上に格子整合層を成長させるステップも含む。格子整合層は、合金を形成するための第1の化学元素と第2の化学元素とを含む。格子整合層は、合金を形成するための第1化学元素と第2化学元素を含む。第1および第2の化学元素は、類似の結晶構造および化学的性質を有する。熱整合層の熱膨張係数は、III−V族化合物半導体の構成元素のそれとほぼ同一である。 According to one embodiment of the present invention, a method for producing a multilayer substrate structure includes providing a substrate and growing a thermal matching layer on the substrate. The thermal matching layer includes at least one of molybdenum, molybdenum copper, mullite, sapphire, graphite, aluminum oxynitride, silicon, silicon carbide, zinc oxide, and rare earth oxide. The method also includes growing a lattice matching layer on the heat matching layer. The lattice matching layer includes a first chemical element and a second chemical element for forming an alloy. The lattice matching layer includes a first chemical element and a second chemical element for forming an alloy. The first and second chemical elements have similar crystal structures and chemical properties. The thermal expansion coefficient of the thermal matching layer is almost the same as that of the constituent elements of the III-V compound semiconductor.
本発明の一実施形態によれば、基板上に膜を堆積する方法は、視線堆積法を使用して材料源から原材料を基板の表面上に導くステップと、基板と原材料との間に配置されたシャッタで基板の所定部分を遮断し、遮断された基板部と遮断されていない基板部を作成して、基板の最初のブロックされた部分上に原材料が堆積されるのを防ぐステップと、遮断された基板部が減少し遮断されていない基板部が増加するようにシャッタと基板との間に相対運動を引き起こし、それにより、移動する横方向成長境界を作成して基板全体に横方向のエピタキシャル成長をもたらすステップと、を含む。 According to one embodiment of the present invention, a method for depositing a film on a substrate is disposed between the substrate and the raw material using a line-of-sight deposition method to direct the raw material from a material source onto the surface of the substrate. Blocking certain portions of the substrate with a shutter, creating blocked and unblocked substrate portions to prevent material from being deposited on the first blocked portion of the substrate, and blocking Cause relative movement between the shutter and the substrate so that the number of substrate portions reduced and the number of unblocked substrate portions increases, thereby creating a moving lateral growth boundary and lateral epitaxial growth across the substrate Providing a step.
本発明の一実施形態によれば、基板上に膜を堆積するシステムは、横方向制御シャッタを備える。横方向制御シャッタは、基板と原材料との間に配置され、基板の一部を遮断して遮断された基板部分上に原材料が堆積するのを防止するように構成される。移動する横方向成長境界を作成するために、横方向制御シャッタおよび/または基板の一方がもう一方に連動し、その結果、基板全体の横方向エピタキシャル堆積と、基板表面全体に大きい粒度を有する結晶膜の形成とをもたらす。 According to one embodiment of the present invention, a system for depositing a film on a substrate comprises a lateral control shutter. The lateral control shutter is disposed between the substrate and the raw material and is configured to block a portion of the substrate and prevent the raw material from depositing on the blocked substrate portion. To create a moving lateral growth boundary, one of the lateral control shutters and / or the substrate interacts with the other, resulting in lateral epitaxial deposition of the entire substrate and crystals having a large grain size across the substrate surface Resulting in film formation.
本発明の実施形態を一般的な用語で説明してきたが、次に添付の図面(必ずしも一定の縮尺で描かれていない)について説明する。 Having described embodiments of the present invention in general terms, reference will now be made to the accompanying drawings (not necessarily drawn to scale).
様々な実施形態が添付図面を参照してより詳細に説明される。これらの実施形態は、本開示が当該技術分野の知識を有する本明細書の読者に対して本発明の範囲を完全かつ完璧に伝える目的で提供される。本明細書を通じて類似の番号は同様の要素を指す。 Various embodiments are described in more detail with reference to the accompanying drawings. These embodiments are provided so that this disclosure will fully and completely convey the scope of the invention to those skilled in the art who have knowledge in the art. Like numbers refer to like elements throughout the specification.
図1Aは、一実施形態に従った多層基板構造100の断面図の一例を示す。多層基板構造100は、基板102と、基板102上にエピタキシャル成長したエピタキシャル層104とを含む。基板102は、様々な用途に応じて、半導体材料、化合物半導体材料、または金属、非金属など他の種類の材料を含んでもよい。例えば、材料は、モリブデン、モリブデン銅、ムライト、サファイア、グラファイト、酸窒化アルミニウム、ケイ素、炭化ケイ素、酸化亜鉛、および希土類酸化物、そして/またはその他の適した材料を含む。 FIG. 1A illustrates an example of a cross-sectional view of a multilayer substrate structure 100 according to one embodiment. The multilayer substrate structure 100 includes a substrate 102 and an epitaxial layer 104 epitaxially grown on the substrate 102. The substrate 102 may include other types of materials, such as semiconductor materials, compound semiconductor materials, or metals, non-metals, depending on various applications. For example, the materials include molybdenum, copper copper, mullite, sapphire, graphite, aluminum oxynitride, silicon, silicon carbide, zinc oxide, and rare earth oxides, and / or other suitable materials.
エピタキシャル層104は、窒化アルミニウム(AlN)、窒化ガリウム(GaN)、窒化インジウムガリウム(InGaN)、および窒化インジウム(InN)などのIII−V族化合物半導体を含む。上述したように、基板102とエピタキシャル層104との間に格子定数不整合が起こる可能性がある。格子定数不整合により生じる欠陥を減少または除去するために、基板102上のエピタキシャル層104の成長において、基板102とエピタキシャル層104間の格子不整合を調整するための、5nm〜100nmの厚さを有する格子整合層106を使用できる。格子整合層106は、合金を形成するための2つ以上の構成元素(例えば、第1の化学元素と第2の化学元素の2つの構成元素)を備えてもよい。第1の化学元素は、合金内で第2の化学元素に混和性を有する。2つの構成元素は、図2Aに示す六方最密構造のように、室温で類似した結晶構造を有してもよい。図2Bに示すように、各構成元素はa軸、b軸およびc軸に沿った格子パラメータと、軸間角度α、βおよびγの格子パラメータとを含む、それぞれ個別の格子定数を有してもよい。2つの構成元素は、結晶構造の類似に加えて、類似した化学的性質を有してもよい。一実施形態において、第1および第2の化学元素は両方とも、図3に示す周期表の第4族元素(すなわち、チタン(Ti)、ジルコニウム(Zr)、ハフニウム(Hf)およびラザホージウム(Rf))に属してもよい。このように、合金は、元素TiとZr、元素TiとHf、および元素ZrとHfから生成され、室温でこれらの構成元素と類似した結晶構造を有してもよいし、あるいは、2つの元素の任意の組み合わせから生成されてもよい。合金は、類似の結晶構造および類似の化学的性質を有する第3の化学元素またはさらに複数の元素を含んでもよい。 Epitaxial layer 104 includes a III-V compound semiconductor such as aluminum nitride (AlN), gallium nitride (GaN), indium gallium nitride (InGaN), and indium nitride (InN). As described above, a lattice constant mismatch may occur between the substrate 102 and the epitaxial layer 104. In order to reduce or eliminate defects caused by the lattice constant mismatch, in the growth of the epitaxial layer 104 on the substrate 102, a thickness of 5 nm to 100 nm for adjusting the lattice mismatch between the substrate 102 and the epitaxial layer 104 is set. It is possible to use a lattice matching layer 106 having the same. The lattice matching layer 106 may include two or more constituent elements (for example, two constituent elements of a first chemical element and a second chemical element) for forming an alloy. The first chemical element is miscible with the second chemical element in the alloy. The two constituent elements may have a similar crystal structure at room temperature, such as a hexagonal close-packed structure shown in FIG. 2A. As shown in FIG. 2B, each constituent element has an individual lattice constant including lattice parameters along the a-axis, b-axis, and c-axis, and lattice parameters with inter-axis angles α, β, and γ. Also good. The two constituent elements may have similar chemical properties in addition to similar crystal structures. In one embodiment, both the first and second chemical elements are Group 4 elements of the periodic table shown in FIG. 3 (ie, titanium (Ti), zirconium (Zr), hafnium (Hf), and rutherfordium (Rf). ). Thus, the alloy may be produced from the elements Ti and Zr, the elements Ti and Hf, and the elements Zr and Hf and have a crystal structure similar to these constituent elements at room temperature, or two elements May be generated from any combination. The alloy may include a third chemical element or even more elements having a similar crystal structure and similar chemical properties.
格子整合層106の格子定数をエピタキシャル層104のそれとほぼ等しくするために、 第1および第2の化学元素と一定温度におけるそれらの関連した格子パラメータとの間には線形関係が存在する。第1の化学元素の第2の化学元素に対する原子濃度のモル分率は、P1:(1−P1)である。組成要素により得られる合金の格子パラメータ値が制御されるため、モル分率は適用ごとに変化する。一実施形態において、エピタキシャル層104がGaNを含み、合金がZrと混合したTiを含むとき、Zrの原子濃度PZrは75%より大きく90%未満となる。例えば、PZrは約86%であってよい。さらに、Tiの原子濃度PTiは(1−PZr)となる。Zrの第1の格子パラメータ(例えば、a軸の格子パラメータaZr)は3.23Åである。Tiの第2の格子パラメータ(例えば、a軸の格子パラメータaTi)は2.951Åである。この結果、合金のa軸に沿った格子定数PAは、PZr×aZr+(1−PZr)×aTi=86%×3.23+14%×2.951=3.19Åとなり、これは、PGaN=3.189Åである六方最密GaNのa軸格子定数PGaNにほぼ等しい。構成元素およびその他の要因に応じて、第1の化学元素の第2の化学元素に対する原子濃度は、約43%:57%または99%:1%となる。 In order to make the lattice constant of the lattice matching layer 106 approximately equal to that of the epitaxial layer 104, a linear relationship exists between the first and second chemical elements and their associated lattice parameters at a constant temperature. The molar fraction of the atomic concentration of the first chemical element with respect to the second chemical element is P 1 : (1-P 1 ). Since the lattice parameter value of the alloy obtained by the composition factor is controlled, the molar fraction changes from application to application. In one embodiment, when the epitaxial layer 104 includes GaN and the alloy includes Ti mixed with Zr, the atomic concentration P Zr of Zr is greater than 75% and less than 90%. For example, P Zr may be about 86%. Further, the atomic concentration P Ti of Ti is (1-P Zr ). The first lattice parameter of Zr (for example, the a-axis lattice parameter a Zr ) is 3.23Å. The second lattice parameter of Ti (eg, the a-axis lattice parameter a Ti ) is 2.951 Å. As a result, the lattice constant P A along the a-axis of the alloy, P Zr × a Zr + ( 1-P Zr) × a Ti = 86% × 3.23 + 14% × 2.951 = 3.19Å , and the this Is approximately equal to the a-axis lattice constant P GaN of hexagonal close-packed GaN with P GaN = 3.18918. Depending on the constituent elements and other factors, the atomic concentration of the first chemical element relative to the second chemical element is about 43%: 57% or 99%: 1%.
エピタキシャル層104が異なる化合物半導体(例えば、AlN、InGaN、InNおよび/またはその他のIII−V族化合物半導体)を含むとき、格子整合層106の構成元素および/または構成元素のモル分率は、格子整合層106の格子定数をエピタキシャル層104のそれと適合させるように調整可能である。例えば、エピタキシャル層104がAlNを含み、格子整合層106の構成元素がZrとTiであるとき、Zrの原子濃度は75%未満かつ50%より大きくなるように調整できる。同じ構成元素を使用する別の実施形態において、エピタキシャル層104がInGaNを含むとき、Zrの原子濃度は90%より高くてもよい。100%の格子整合を達成するためには、エピタキシャル層104の材料だけでなく、エピタキシャル層104の厚さもまた、構成元素選択の変更および構成元素のモル分率変更の要因となる。エピタキシャル層104の厚さは、変更しても5nm〜500nmの範囲内である。換言すると、エピタキシャル層104の厚さと材料が、格子整合層106を形成する際の構成元素の選択およびモル分率を決定する。エピタキシャル層104は、(真空蒸着法、スパッタリング法、分子線エピタキシー法、パルスレーザ堆積法、有機金属気相成長法、原子層堆積法および/またはその他の適切なエピタキシャル堆積法などの)任意のエピタキシャル技術を使用して、格子整合層106の結晶パターンをエピタキシャル層104に転写するために格子整合層106上にエピタキシャル成長する。格子整合層106は、真空蒸着法、スパッタリング法、分子線エピタキシー法、パルスレーザ堆積法、有機金属気相成長法、および原子層堆積法などの堆積技術のいずれか1つを使用して、下地層(例えば、基板102)上に形成される。 When the epitaxial layer 104 includes different compound semiconductors (eg, AlN, InGaN, InN, and / or other group III-V compound semiconductors), the constituent elements of the lattice matching layer 106 and / or the molar fractions of the constituent elements are The lattice constant of the matching layer 106 can be adjusted to match that of the epitaxial layer 104. For example, when the epitaxial layer 104 contains AlN and the constituent elements of the lattice matching layer 106 are Zr and Ti, the atomic concentration of Zr can be adjusted to be less than 75% and greater than 50%. In another embodiment using the same constituent elements, the atomic concentration of Zr may be higher than 90% when the epitaxial layer 104 includes InGaN. In order to achieve 100% lattice matching, not only the material of the epitaxial layer 104 but also the thickness of the epitaxial layer 104 causes changes in the constituent element selection and the constituent element mole fraction. Even if the thickness of the epitaxial layer 104 is changed, it is in the range of 5 nm to 500 nm. In other words, the thickness and material of the epitaxial layer 104 determine the selection and mole fraction of the constituent elements in forming the lattice matching layer 106. Epitaxial layer 104 may be any epitaxial layer (such as vacuum deposition, sputtering, molecular beam epitaxy, pulsed laser deposition, metal organic vapor deposition, atomic layer deposition, and / or other suitable epitaxial deposition methods). Using techniques, the crystal pattern of the lattice matching layer 106 is epitaxially grown on the lattice matching layer 106 to transfer it to the epitaxial layer 104. The lattice matching layer 106 may be formed using any one of deposition techniques such as vacuum evaporation, sputtering, molecular beam epitaxy, pulsed laser deposition, metal organic chemical vapor deposition, and atomic layer deposition. Formed on a formation (eg, substrate 102).
六方最密相(α相)は、特定の光電子デバイスや電力半導体の用途において、体心立方相(β相)より潜在的な優位性を有することから、格子整合層106と同様の結晶パターンを獲得するためには、エピタキシャル層104をα相で成長させるのが望ましい。図4は、一実施形態に従い、α‐β相転移温度とZrおよびTiの原子濃度との相関関係を示す。例えば、PZrが50%であるとき、PTi=1−PZr=50%、α‐β相転移温度は約605℃である。PZrが(上述した実施形態の一例として)84%であるとき、α‐β相転移温度は約780℃である。エピタキシャル層104上に多重量子井戸(MQW)デバイスを形成する用途(例えば、超高輝度LED)において、有機金属気相成長法および原子層堆積法などのエピタキシャル堆積法および/またはその他の任意の適切なエピタキシャル成長法は、700℃〜850℃の温度範囲で行われる。本実施形態では、β相転位ではなくα相で格子整合層106の結晶パターンをエピタキシャル層104に転写する試みにおいて、多層基板構造は、任意の加熱法/熱源により、α‐β相転移温度の780℃未満であるが700℃よりは高い温度で加熱される。エピタキシャル層104の形成が終了すると恒久的にα相に設定されるため、この後に続くMQWおよび任意の追加デバイス層の成長においては、多層基板構造の加熱温度を780℃より上げるかまたは下げることができる。温度は、最初α‐β相転移温度より高く上げられ、その後直ちにα‐β相転移温度より下げられ、それにより相転移自由エネルギーを生成して、格子整合層に単結晶α相を生じる大きい横方向領域を結晶させる。 Since the hexagonal close-packed phase (α phase) has a potential advantage over the body-centered cubic phase (β phase) in certain optoelectronic devices and power semiconductor applications, it has a crystal pattern similar to that of the lattice matching layer 106. In order to achieve this, it is desirable to grow the epitaxial layer 104 in the α phase. FIG. 4 shows the correlation between the α-β phase transition temperature and the atomic concentration of Zr and Ti, according to one embodiment. For example, when P Zr is 50%, P Ti = 1−P Zr = 50% and the α-β phase transition temperature is about 605 ° C. When PZr is 84% (as an example of the embodiment described above), the α-β phase transition temperature is about 780 ° C. In applications that form multiple quantum well (MQW) devices on the epitaxial layer 104 (eg, ultra-bright LEDs), epitaxial deposition methods such as metal organic chemical vapor deposition and atomic layer deposition, and / or any other suitable The epitaxial growth method is performed in a temperature range of 700 ° C. to 850 ° C. In the present embodiment, in an attempt to transfer the crystal pattern of the lattice matching layer 106 to the epitaxial layer 104 in the α phase instead of the β phase dislocation, the multilayer substrate structure has an α-β phase transition temperature of any heating method / heat source. It is heated at a temperature lower than 780 ° C. but higher than 700 ° C. Since the formation of the epitaxial layer 104 is permanently set to the α phase, the subsequent growth of the MQW and any additional device layers may raise or lower the heating temperature of the multilayer substrate structure above 780 ° C. it can. The temperature is first raised above the α-β phase transition temperature and then immediately lowered below the α-β phase transition temperature, thereby generating a phase transition free energy and a large transverse phase that produces a single crystal α phase in the lattice matching layer. Crystallize the direction region.
格子整合層106の導入により、基板102とエピタキシャル層104との間の格子定数の相違の結果として、エピタキシー成長中に発達しエピタキシャル層104内に生じる可能性のある応力が低下し、それにより、高結晶品質のエピタキシャル層104の成長が助長される。このような応力が格子整合層によって除去されない場合、応力がエピタキシャル層104の結晶構造に欠陥を引き起こす可能性がある。エピタキシャル層104の結晶構造の欠陥は、その後に続く任意のデバイス成長においてもエピタキシーでの高品質結晶構造の達成を困難にする。格子整合層106は、「A Lattice Matching Layer For Use In A Multilayer Substrate Structure(仮称:多層基板構造で使用するための格子整合層)」という名称の米国特許出願明細書においても開示されている。 The introduction of the lattice matching layer 106 reduces the stress that may develop during the epitaxial growth and occur in the epitaxial layer 104 as a result of the difference in lattice constant between the substrate 102 and the epitaxial layer 104, thereby Growth of high crystal quality epitaxial layer 104 is facilitated. If such stress is not removed by the lattice matching layer, the stress can cause defects in the crystal structure of the epitaxial layer 104. The defects in the crystal structure of the epitaxial layer 104 make it difficult to achieve a high quality crystal structure with epitaxy in any subsequent device growth. The lattice matching layer 106 is also disclosed in a US patent application specification entitled “A Lattice Matching Layer For Use In A Multilayer Substrate Structure” (tentative name: a lattice matching layer for use in a multilayer substrate structure).
上述したように、基板102は、半導体材料、化合物半導体材料、または金属や非金属などのその他の種類の材料を含むことができる。いくつかの実施形態において、基板102は、多結晶固体の形状であってもよい。多結晶基板は、単結晶ではなく多結晶であることから格子整合層106に悪影響を及ぼし、それにより、格子整合層106とエピタキシャル層104間の格子定数(複数の結晶粒と複数の結晶配向の平均格子定数)の相違が拡大し、貫通転位または結晶粒界などの拡張欠陥を引き起こし、エピタキシャル層104の結晶が低品質となる。多結晶基板の悪影響を減少または除去するために、図1Bに示すように、多結晶基板102と格子整合層106との間に非晶質層108を導入してもよい。多結晶基板102と格子整合層106との間に非晶質層108を追加することにより、格子整合層106に対する多結晶基板102の影響を減少できる。これにより、格子整合層106の結晶だけがエピタキシャル層104に転送される。非晶質層108は、二酸化ケイ素、窒化ケイ素、窒化タンタル、窒化ホウ素、窒化タングステン、ガラス状非晶質炭素、ケイ酸塩ガラス(例えば、ホウリンケイ酸ガラスやリンケイ酸ガラスなど)および/またはその他の適切な材料を含むことができるが、これに限定されない。非晶質層108は5nm〜100nmの厚さを有することができる。 As described above, the substrate 102 can include a semiconductor material, a compound semiconductor material, or other types of materials such as metals and non-metals. In some embodiments, the substrate 102 may be in the form of a polycrystalline solid. Since the polycrystalline substrate is not a single crystal but a polycrystal, it adversely affects the lattice matching layer 106, thereby causing a lattice constant between the lattice matching layer 106 and the epitaxial layer 104 (a plurality of crystal grains and a plurality of crystal orientations). The difference in (average lattice constant) increases, causing extended defects such as threading dislocations or crystal grain boundaries, resulting in low quality crystals of the epitaxial layer 104. In order to reduce or eliminate the adverse effects of the polycrystalline substrate, an amorphous layer 108 may be introduced between the polycrystalline substrate 102 and the lattice matching layer 106, as shown in FIG. 1B. By adding the amorphous layer 108 between the polycrystalline substrate 102 and the lattice matching layer 106, the influence of the polycrystalline substrate 102 on the lattice matching layer 106 can be reduced. Thereby, only the crystals of the lattice matching layer 106 are transferred to the epitaxial layer 104. The amorphous layer 108 may be silicon dioxide, silicon nitride, tantalum nitride, boron nitride, tungsten nitride, glassy amorphous carbon, silicate glass (eg, borophosphosilicate glass, phosphosilicate glass, etc.) and / or other Suitable materials can be included, but are not limited to this. The amorphous layer 108 can have a thickness of 5 nm to 100 nm.
いくつかの実施形態においては、基板102の熱膨張率が上層のそれと異なり、その結果、基板曲折が大きくなる。例えば、基板102の熱膨張率が上層のそれよりも大きいとき(例えば、基板がサファイアを含むとき)、二軸圧縮歪みが生じる。基板の熱膨張率が上層のそれよりも小さいとき(例えば、基板がケイ素を含むとき)、引張歪みが生じる。熱膨張率の不整合に起因する障害を克服するために、(図1Cおよび図1Dに示すように)基板がいくつかの化学元素を含むことにより熱整合層102aとして使用され、図1Cに示すように、基板(すなわち、本実施形態における熱整合層102a)と格子整合層106との間の、あるいは、図1Dに示すように、基板と非晶質層108との間の熱不整合を調整する。一実施形態において、熱整合層102aはモリブデンまたはその関連合金を含む。モリブデンの熱膨張率は約5.4×10−6/Kであり、これは、GaNなどのいくつかのIII−V族化合物半導体のそれにほぼ等しい。基板は、金属、結晶、およびそれらの合金の成長のための様々な方法を使用して生成できる。成長方法の例としては、チョクラルスキー、フロートゾーン(FZ)、方向性凝固(DS)、帯域溶融再結晶(ZMR)、焼結、静水圧プレス成形、電気化学めっき、プラズマトーチ堆積、および/またはその他の適切な方法がある。熱整合層102aは5nm〜1mmの範囲の厚さを有する。 In some embodiments, the coefficient of thermal expansion of the substrate 102 is different from that of the upper layer, resulting in increased substrate bending. For example, when the coefficient of thermal expansion of the substrate 102 is larger than that of the upper layer (for example, when the substrate includes sapphire), biaxial compression strain occurs. When the coefficient of thermal expansion of the substrate is smaller than that of the upper layer (eg, when the substrate contains silicon), tensile strain occurs. In order to overcome obstacles due to thermal expansion mismatch, the substrate is used as a thermal matching layer 102a by including several chemical elements (as shown in FIGS. 1C and 1D), as shown in FIG. 1C. As described above, the thermal mismatch between the substrate (ie, the thermal matching layer 102a in the present embodiment) and the lattice matching layer 106, or between the substrate and the amorphous layer 108 as shown in FIG. 1D. adjust. In one embodiment, the thermal matching layer 102a comprises molybdenum or its related alloy. Molybdenum has a thermal expansion coefficient of about 5.4 × 10 −6 / K, which is approximately equal to that of some III-V compound semiconductors such as GaN. The substrate can be produced using various methods for the growth of metals, crystals, and alloys thereof. Examples of growth methods include Czochralski, float zone (FZ), directional solidification (DS), zone melt recrystallization (ZMR), sintering, isostatic pressing, electrochemical plating, plasma torch deposition, and / or Or there are other suitable methods. The thermal matching layer 102a has a thickness in the range of 5 nm to 1 mm.
熱整合層および格子整合層の導入により、熱膨張の不整合および格子の不整合による歪みが減少または完全に除去される。その結果、形成されるエピタキシャル層104の転位密度は102/cm2より小さく(1cm2あたり100転位未満に)なる。発光ダイオード(LED)の開発において、歪みの減少または除去は、いわゆる「グリーンギャップ」を克服する要件を満たす可能性がある。「グリーンギャップ」とは、緑色LEDを生成するためにインジウムをGaNと合金する多重量子井戸(MQW)LEDからのLED光の出力低下を意味する業界表現である。この出力される緑色光の減少は、基板の過度の歪み、応力誘起の拡張欠陥、および、能動MQWデバイス層に伝搬する点欠陥により生じる欠陥密度に起因して、1〜5mm2のデバイス領域内の50mAより大きい順電流に対して生じる。 The introduction of a thermal matching layer and a lattice matching layer reduces or completely eliminates thermal expansion mismatch and strain due to lattice mismatch. As a result, the dislocation density of the formed epitaxial layer 104 is smaller than 10 2 / cm 2 (less than 100 dislocations per 1 cm 2 ). In the development of light emitting diodes (LEDs), the reduction or elimination of distortion may meet the requirement to overcome the so-called “green gap”. “Green gap” is an industry expression that means a reduction in the output of LED light from a multiple quantum well (MQW) LED that alloys indium with GaN to produce a green LED. This reduction in output green light is due to excessive strain in the substrate, stress-induced extended defects, and defect density caused by point defects propagating to the active MQW device layer, within the 1-5 mm 2 device area. For forward currents greater than 50 mA.
人間の目は緑色に対して最も感受性があり、緑色光は白色光の品質に対する人間の知覚に強い影響を与えるため、本実施形態は、層104上に高品質結晶デバイスを成長させることを可能にする。さらに、本発明の例示的な実施形態は、緑色LEDの結晶テンプレート作成において費用効率の高い方法に適している。このように、「グリーンギャップ」を埋めることにより、今日使用されている下方変換LEDの蛍光体を超える最高の理論的有効性を有し、赤色、緑色および青色の混合光に基づく白色LEDの高い性能をさらに向上させることができる。 Since the human eye is most sensitive to green and green light has a strong impact on human perception of white light quality, this embodiment allows growth of high quality crystal devices on layer 104 To. Furthermore, the exemplary embodiments of the present invention are suitable for a cost-effective method in creating a green LED crystal template. Thus, by filling the “green gap”, it has the highest theoretical effectiveness over the down-converted LED phosphors used today, and the high white LED based on mixed red, green and blue light The performance can be further improved.
図5は、例示的な一実施形態に従い基板上に膜を堆積するシステム500を示す(本明細書で使用される「例」、「例示的」などの単語は「例または実例としての役割を果たす」ものとする)。基板504上の薄膜502の横方向Aのエピタキシャル堆積を促進するために、横方向制御シャッタ506が採用され、基板505と材料源508との間に配置される。材料源508は、適切な堆積法を使用して基板表面上に原材料を堆積するように構成される。使用する堆積法に応じて、原材料は固体または液体源から原子または分子の形態で蒸発し、真空ガスか低圧ガスまたはプラズマ環境を介して蒸気として基板に輸送される。蒸発材料は、様々な荷電状態にある元素、合金、または化合物であってよい。蒸発材料が1メートルを超える長い平均自由行程を有するとき、蒸発材料の軌道は一直線の視線と見なすことができる。従って、使用された堆積方法は視線堆積法であると定義される。視線堆積法は、真空蒸着法、スパッタリング法、パルスレーザ堆積法、分子線エピタキシー法、原子層堆積法、原子層エピタキシー法、プラズマトーチ堆積法、および/またはその他の適切な方法を含む、物理蒸着法または化学蒸着法である。化学蒸着法は、大気圧化学蒸着法および/またはその他の適切な化学蒸着法である。材料源の形態に応じて、真空蒸着法は、熱蒸着法、レーザビームまたは収束ランプ蒸着法、アーク放電蒸着法、および電子ビーム蒸着法を含む。同様に、材料源の形態に応じて、スパッタリング法は、直流スパッタリング法、マグネトロンスパッタリング法、高周波スパッタリング法、およびパルスレーザスパッタリング法のいずれか1つを含む。 FIG. 5 illustrates a system 500 for depositing a film on a substrate in accordance with an exemplary embodiment (words such as “example”, “exemplary” used herein serve as an example or illustration. To fulfill "). In order to facilitate lateral A epitaxial deposition of the thin film 502 on the substrate 504, a lateral control shutter 506 is employed and disposed between the substrate 505 and the material source 508. Material source 508 is configured to deposit the raw material on the substrate surface using a suitable deposition method. Depending on the deposition method used, the raw material evaporates in the form of atoms or molecules from a solid or liquid source and is transported to the substrate as a vapor via a vacuum or low pressure gas or plasma environment. The evaporating material may be an element, alloy or compound in various charged states. When the evaporating material has a long mean free path of more than 1 meter, the evaporating material trajectory can be considered as a straight line of sight. Therefore, the deposition method used is defined as the line-of-sight deposition method. Line-of-sight deposition methods include physical vapor deposition, including vacuum deposition, sputtering, pulsed laser deposition, molecular beam epitaxy, atomic layer deposition, atomic layer epitaxy, plasma torch deposition, and / or other suitable methods. Or chemical vapor deposition. Chemical vapor deposition is atmospheric pressure chemical vapor deposition and / or other suitable chemical vapor deposition. Depending on the form of the material source, vacuum deposition methods include thermal deposition methods, laser beam or convergent lamp deposition methods, arc discharge deposition methods, and electron beam deposition methods. Similarly, depending on the form of the material source, the sputtering method includes any one of a direct current sputtering method, a magnetron sputtering method, a high frequency sputtering method, and a pulse laser sputtering method.
上述した堆積法の任意の適用例において、材料源508と基板504との間の距離L1は、気体中の大部分の分子が一直線に到達できるように、気体分子の平均自由行程より小さくてよい。基板504の表面上に薄膜502を均一に形成するために、横方向制御シャッタ506と基板表面との間の距離L2は、気体分子の平均自由行程より小さくてよい。本実施形態の平均自由行程は、気体分子が他の気体分子と衝突する前に移動する平均距離として定義される。基板504は、二酸化ケイ素、窒化ケイ素、アモルファス窒化ホウ素、アモルファス窒化タングステン、ガラス状非晶質炭素、アモルファス希土類酸化物、アモルファス酸化亜鉛、およびケイ酸塩ガラスを含むことができる。 In any application of the deposition method described above, the distance L1 between the material source 508 and the substrate 504 may be less than the mean free path of the gas molecules so that most molecules in the gas can reach a straight line. . In order to uniformly form the thin film 502 on the surface of the substrate 504, the distance L2 between the lateral control shutter 506 and the substrate surface may be smaller than the mean free path of gas molecules. The mean free path of this embodiment is defined as the mean distance traveled before a gas molecule collides with another gas molecule. The substrate 504 can include silicon dioxide, silicon nitride, amorphous boron nitride, amorphous tungsten nitride, glassy amorphous carbon, amorphous rare earth oxide, amorphous zinc oxide, and silicate glass.
異なる堆積法は基板における異なる流束角度分布を有する。各堆積法には基板の角度分布の改善を補助するための多くの方法が存在する。スパッタリング堆積法を例に取ると、一般的なスパッタリング堆積法において、図6Aに示すように、原子が材料源(例えば、スパッタリングターゲット)からコサイン角度分布で放射されるため、基板上に衝突する原子の大部分が正常な入射角で基板に衝突しないのは珍しいことではない。基板におけるより正常な角度分布を形成するために、マグネトロンスパッタリングシステムにおいて、コリメータを採用して基板とスパッタリングターゲットとの間に配置してもよい。コリメータの使用は、スパッタリングターゲットから非正常な流束を減少させ、堆積物の指向性を向上させる。コリメート入射の角度分布を図6Bに示す。イオンアシスト堆積法では、スパッタ原子の一部がイオン化される。イオン化原子は、θ=0°付近に集中して指向性のある角度分布、例えば、指向性角度分布602を形成し、一方、中性種は一般的にコサイン角度分布604を有する。図6Cに示すように、全体の角度分布は、コサインおよび指向性角度分布の重ね合わせとして見られる。 Different deposition methods have different flux angle distributions on the substrate. There are many methods for each deposition method to help improve the angular distribution of the substrate. Taking the sputtering deposition method as an example, in a general sputtering deposition method, as shown in FIG. 6A, atoms are emitted from a material source (for example, a sputtering target) with a cosine angle distribution. It is not uncommon for most of them not to strike the substrate at normal incidence angles. In order to form a more normal angular distribution in the substrate, a collimator may be employed between the substrate and the sputtering target in a magnetron sputtering system. The use of a collimator reduces the abnormal flux from the sputtering target and improves the directivity of the deposit. The angular distribution of collimated incidence is shown in FIG. 6B. In the ion-assisted deposition method, some of the sputtered atoms are ionized. The ionized atoms are concentrated in the vicinity of θ = 0 ° to form a directional angular distribution, for example, a directional angular distribution 602, while neutral species generally have a cosine angular distribution 604. As shown in FIG. 6C, the overall angular distribution is seen as a superposition of cosine and directional angular distribution.
蒸着法では、基板上に蒸着した材料の入射角が、膜特性、結晶方位、およびその他の特性に影響を与える。材料源により生成された入射原子流束の角度分布および基板における所望の原子の角度分布に応じて、蒸発材料は正常の入射角または非正常の入射角で基板表面に堆積される。図5に戻ると、原材料は−15°〜+15°の入射角で堆積される。堆積する原子流束の平均入射角は、堆積形状、蒸発源の種類、および、基板と材料源との間の相対運動に応じて変化する。 In the vapor deposition method, the angle of incidence of the material deposited on the substrate affects the film properties, crystal orientation, and other properties. Depending on the angular distribution of the incident atomic flux produced by the material source and the desired angular distribution of the atoms in the substrate, the vaporized material is deposited on the substrate surface at normal or non-normal incident angles. Returning to FIG. 5, the raw material is deposited at an incident angle of −15 ° to + 15 °. The average angle of incidence of the deposited atomic flux varies with the deposition shape, the type of evaporation source, and the relative motion between the substrate and the material source.
図5に示すように、横方向制御シャッタ506は膜成長を制御するために使用される。横方向制御シャッタ506は、堆積する薄膜502の横境界(番号なし)を定義し、基板表面の部分上への原材料の堆積を防止するために基板504の所定部分を覆う。実施中、横方向制御シャッタ506または基板504の一方または他方を移動させることにより、堆積薄膜502の横境界は移動され、基板全体の横方向エピタキシャル堆積を促進するために膜の成長端を前進させるように制御される。図5に示す一実施例において、横方向制御シャッタ506は基板504に対して方向Aに移動する。別の実施例においては、横方向制御シャッタは静止したままで、基板が横方向制御シャッタに対して移動する。さらに別の実施例においては、横方向制御シャッタおよび基板の両方が、互いの相対運動を達成するために異なる速度で移動する。システム500は、横方向制御シャッタと基板との間の相対運動を制御する駆動システム(図示せず)をさらに含んでもよい。システム500は、薄膜502の前進する成長端の後に残される単結晶上への不要な堆積を遮蔽するために使われるトレーリング制御シャッタ512を含んでもよい。後者は薄膜502全体の膜の厚さを均一に維持するのを助ける。トレーリング制御シャッタが使用される場合、トレーリング制御シャッタ512は、基板504上に新たに結晶化した薄膜502上へのさらなるエピタキシャル堆積を回避するように構成される。 As shown in FIG. 5, a lateral control shutter 506 is used to control film growth. A lateral control shutter 506 defines a lateral boundary (unnumbered) of the deposited thin film 502 and covers a predetermined portion of the substrate 504 to prevent the deposition of raw materials on portions of the substrate surface. In operation, by moving one or the other of the lateral control shutter 506 or the substrate 504, the lateral boundary of the deposited thin film 502 is moved, and the growth edge of the film is advanced to facilitate lateral epitaxial deposition of the entire substrate. To be controlled. In one embodiment shown in FIG. 5, the lateral control shutter 506 moves in direction A relative to the substrate 504. In another embodiment, the lateral control shutter remains stationary and the substrate moves relative to the lateral control shutter. In yet another embodiment, both the lateral control shutter and the substrate move at different speeds to achieve relative movement with respect to each other. System 500 may further include a drive system (not shown) that controls the relative motion between the lateral control shutter and the substrate. The system 500 may include a trailing control shutter 512 that is used to shield unwanted deposition on the single crystal remaining after the advancing growth edge of the thin film 502. The latter helps to maintain a uniform film thickness throughout the thin film 502. If a trailing control shutter is used, trailing control shutter 512 is configured to avoid further epitaxial deposition on newly crystallized thin film 502 on substrate 504.
基板上の堆積物質の結晶粒度など多くの膜特性は堆積温度によって影響を受けるため、温度の制御が望ましい。システム500は、使用する堆積法に応じて、基板の温度を制御し、かつ/または堆積処理に使用される高温度を提供するための異なる種類の熱源(例えば、図5の熱源510)を備える。例えば、真空堆積処理において、一般的に熱源は、原材料を熱的に蒸発させ、目的の材料源表面から堆積物質を脱着させ、浄化および後続処理のために基板を熱し、原材料を溶解させ、かつ熱運動エネルギーを加えるために使用されるか、または、基板表面の堆積処理に関与する吸着原子または分子の表面移動度を高めるために使用される。熱は多くの異なる技術により真空容器内で生成される。スパッタリング堆積法の例では、基板は、イオン衝撃、電子、光放射、誘導加熱、またはその他の加熱技術により加熱される。熱源は、システム内またはシステム外に組み込まれる。典型的な熱源は、放射加熱(赤外線加熱、レーザ等)、熱線放射加熱、集束ランプ加熱、誘導加熱、直接金属台座加熱、または、セラミック台座加熱を含む。 Many film properties, such as the grain size of the deposited material on the substrate, are affected by the deposition temperature, so temperature control is desirable. The system 500 includes different types of heat sources (eg, heat source 510 in FIG. 5) to control the temperature of the substrate and / or provide the high temperature used for the deposition process, depending on the deposition method used. . For example, in a vacuum deposition process, typically a heat source thermally evaporates the raw material, desorbs the deposited material from the target source surface, heats the substrate for cleaning and subsequent processing, dissolves the raw material, and It is used to add thermal kinetic energy or to increase the surface mobility of adsorbed atoms or molecules involved in the substrate surface deposition process. Heat is generated in the vacuum vessel by many different techniques. In examples of sputtering deposition methods, the substrate is heated by ion bombardment, electrons, light radiation, induction heating, or other heating techniques. The heat source is built into the system or outside the system. Typical heat sources include radiant heating (infrared heating, laser, etc.), hot wire radiant heating, focused lamp heating, induction heating, direct metal pedestal heating, or ceramic pedestal heating.
単結晶材料の膜が基板に堆積されると、エピタキシャル成長が起こり、単一の種結晶が基板表面に分離されている場合か基板が単結晶である場合、基板の結晶構造が成長材料に再現される。転位密度および堆積物質と基板との間の格子不整合に起因する歪みなどの材料特性を決定する上で、結晶の横方向の成長が重要な役割を果たすことから、堆積物質の横方向のエピタキシャル成長を促進するために横方向制御シャッタを使用できる。横方向制御シャッタと基板との間の相対運動により、エピタキシャル成長は当初、基板の表面に対して実質的に垂直な方向(例えば、縦方向)に生じ、その後、基板の表面に対して実質的に一致する方向(例えば、平行方向)へと進んでいく。横方向の結晶エピタキシャル成長を図7Aに示す。図7Aにおいて、横方向制御シャッタ706は、基板の左端712から基板のもう一端(図示せず)に向かって移動し、これにより、エピタキシャル成長が左端712から開始される。左端712の多くのポイントで複数の結晶粒が成長し、後続の結晶成長のための種結晶としての役割を果たす。結晶は当初は縦方向に成長する。横方向制御シャッタ706と基板間の移動に伴い、結晶は横方向と縦方向に同時に成長することができる。 When a film of single crystal material is deposited on the substrate, epitaxial growth occurs, and if the single seed crystal is separated from the substrate surface or the substrate is a single crystal, the crystal structure of the substrate is reproduced as the growth material. The The lateral growth of the deposited material is important because lateral growth of the crystal plays an important role in determining material properties such as dislocation density and strain due to lattice mismatch between the deposited material and the substrate. A lateral control shutter can be used to facilitate this. Due to the relative movement between the lateral control shutter and the substrate, epitaxial growth initially occurs in a direction substantially perpendicular to the surface of the substrate (eg, longitudinal) and then substantially relative to the surface of the substrate. Proceeding in a matching direction (for example, parallel direction). The lateral crystal epitaxial growth is shown in FIG. 7A. In FIG. 7A, the lateral control shutter 706 moves from the left end 712 of the substrate toward the other end (not shown) of the substrate, thereby starting epitaxial growth from the left end 712. A plurality of crystal grains grow at many points on the left end 712 and serve as seed crystals for subsequent crystal growth. Crystals initially grow vertically. With the movement between the lateral control shutter 706 and the substrate, the crystal can grow simultaneously in the lateral and longitudinal directions.
堆積膜の結晶粒度は、電気特性において重要な役割を果たす。結晶粒度が増加するにつれて、単位領域当たりの結晶粒界の数および境界界面の数が減少する。例えば、結晶粒度が小さいなどの高密度の結晶粒界または結晶構造の拡張欠陥は、堆積膜の電気伝導性および熱伝導性を低下させる傾向がある。従って、可能な限り結晶粒度を大きくすることが望ましい。最小の結晶粒界および基板上の最小数の結晶粒を達成する例示的な実施形態を図7B〜図7Dに示す。 The crystal grain size of the deposited film plays an important role in electrical properties. As the grain size increases, the number of grain boundaries per unit region and the number of boundary interfaces decreases. For example, high density grain boundaries or extended defects in the crystal structure, such as small grain size, tend to reduce the electrical and thermal conductivity of the deposited film. Therefore, it is desirable to increase the crystal grain size as much as possible. Exemplary embodiments that achieve the minimum grain boundaries and the minimum number of grains on the substrate are shown in FIGS. 7B-7D.
図7Bに示すように、横方向制御シャッタ706が基板(図示せず)と材料源(図示せず)との間に配置され、材料源に露出される領域(例えば、領域714)を残して基板の一部を覆う。領域714は鋭い角または縁を有する。本実施形態において、鋭角は、横方向制御シャッタと基板の配置を調整することにより作成された基板の角である。このような配置により、自己選択した結晶母粒716が鋭角に成長する。結晶母粒は、結晶化を開始しかつ堆積の開始位置を提供する種結晶としての役割を果たす。横制御シャッタ706と基板との間の横方向の相対運動により、基板の表面全体に縦と横の両方向同時に結晶が成長する。別の実施形態では、鋭角に成長する結晶母粒が1つ以上存在し、横方向への前進が結晶粒界を外向きに駆動する補助となり、基板全体に非常に大きい横寸法を有する最小限数の結晶粒を効果的に形成する。 As shown in FIG. 7B, a lateral control shutter 706 is disposed between the substrate (not shown) and the material source (not shown), leaving an area exposed to the material source (eg, area 714). Cover part of the substrate. Region 714 has sharp corners or edges. In the present embodiment, the acute angle is a corner of the substrate created by adjusting the arrangement of the lateral control shutter and the substrate. With such an arrangement, the self-selected crystal mother grains 716 grow at an acute angle. The crystal grain serves as a seed crystal that initiates crystallization and provides a starting point for deposition. Due to the relative movement in the lateral direction between the lateral control shutter 706 and the substrate, a crystal grows on the entire surface of the substrate simultaneously in both the longitudinal and lateral directions. In another embodiment, there is at least one crystal grain that grows at an acute angle, and the lateral advance helps to drive the grain boundary outward, with a very large lateral dimension throughout the substrate. Effectively form a number of crystal grains.
図7Cに示す実施形態では、表面起伏構造(例えば、表面起伏構造720)を形成するために基板表面の一部をパターニングすることにより、基板表面上に薄膜を堆積する間、または基板表面上に溶融材料の再結晶化をする間の長距離秩序を作成するグラフォエピタキシーが使用される。表面起伏構造720は、基板上に結晶母粒を成長させるためのテンプレートとして機能し、新たに成長する薄膜に所望の結晶方位を誘導する。結晶母粒は、その後、結晶化を開始しかつ成膜を始める起点を提供するために使用される。図7Bに示す実施形態と同様に、横方向制御シャッタ506と基板との間の横方向の相互運動により、単一の結晶粒が縦と横の両方向同時に基板の表面全体に成長する。表面起伏構造720は、光リソグラフィ、電子ビームリソグラフィ、ナノインプリントリソグラフィ、または収束イオンビーム(FIB)リソグラフィ、および/またはその他の適切なリソグラフィ技術などの様々なリソグラフィ技術によって作成できる。別の方法として、表面起伏構造720は、レーザ加熱処理またはアブレーションにより基板の角または縁に移動または付け加えられてもよい。本実施形態では、成長する縁が角から離れて進むにつれて、結晶母粒は基板面上に突き出してもよい。 In the embodiment shown in FIG. 7C, a portion of the substrate surface is patterned to form a surface relief structure (eg, surface relief structure 720), thereby depositing a thin film on the substrate surface or on the substrate surface. Graphoepitaxy is used to create long range order during recrystallization of the molten material. The surface relief structure 720 functions as a template for growing crystal grains on the substrate, and induces a desired crystal orientation in the newly grown thin film. The crystal host is then used to provide a starting point for initiating crystallization and starting film formation. Similar to the embodiment shown in FIG. 7B, the lateral interaction between the lateral control shutter 506 and the substrate causes a single crystal grain to grow across the surface of the substrate simultaneously in both the longitudinal and lateral directions. The surface relief structure 720 can be created by various lithography techniques, such as optical lithography, electron beam lithography, nanoimprint lithography, or focused ion beam (FIB) lithography, and / or other suitable lithography techniques. Alternatively, the surface relief structure 720 may be moved or added to the corners or edges of the substrate by laser heat treatment or ablation. In the present embodiment, the crystal mother grains may protrude onto the substrate surface as the growing edge advances away from the corner.
表面起伏構造720の導入に加えて、結晶母粒722が基板の一点(例えば、基板の角)に追加されてもよい。結晶母粒は、結晶化を開始しかつ成膜を始める起点を提供するために使用される。同様に、追加された結晶母粒は、成長する縁が角から離れて進むにつれて、基板面上に突き出してもよい。 In addition to the introduction of the surface relief structure 720, the crystal mother grains 722 may be added to one point of the substrate (for example, a corner of the substrate). Crystal mother grains are used to provide a starting point for initiating crystallization and starting film formation. Similarly, the added crystal mother grain may protrude onto the substrate surface as the growing edge progresses away from the corner.
図7Bと同様に、図7Dは、材料源に露出した領域を有する基板の領域724の鋭角で成長を開始し、かつ横方向外向きに成長する結晶母粒を示す。図7Bとは対照的に、本実施形態の鋭角は、基板と横方向制御シャッタの配置の調整によって作成されたものではない。鋭角は、そうした形状を有するシャッタによって成形される。結晶母粒が鋭角で成長し、結晶化を開始し、かつ堆積を開始する起点を提供する種結晶として働く。図示した三角形または同一の曲率を有する三日月形を使用する更なる利点は、結晶粒競争を通して、結晶粒界がシャッタの縁の形に垂直に成長することである。後者は、成長する縁が種結晶から離れて進むにつれて、必然的に基板のより広い面に平行に任意の結晶粒を成長させる。 Similar to FIG. 7B, FIG. 7D shows a crystal grain that begins to grow at an acute angle in region 724 of the substrate having a region exposed to the material source and grows laterally outward. In contrast to FIG. 7B, the acute angle of this embodiment is not created by adjusting the placement of the substrate and the lateral control shutter. The acute angle is formed by a shutter having such a shape. The crystal grain grows at an acute angle, serves as a seed crystal that initiates crystallization and provides a starting point for starting deposition. A further advantage of using the illustrated triangle or crescent shape with the same curvature is that through grain competition, the grain boundaries grow perpendicular to the shape of the shutter edge. The latter necessarily grows arbitrary grains parallel to the wider surface of the substrate as the growing edge progresses away from the seed crystal.
上述の実施形態では、シャッタは異なる適用に従い様々な形を有する。例えば、図7Dに示すように、シャッタは多角形または弓形の形状であってよい。多角形の外周の部分により、結晶母粒が成長する鋭角を有する形状が画定される。シャッタは長方形、正方形、円形、三角形、三日月形、または「シェブロン(山形)記号」形、および/またはその他の任意の適切な形であってよい。例えば、シャッタは、多層基板構造内に格子整合層を成長させるために使用することができる。 In the embodiments described above, the shutter has various shapes according to different applications. For example, as shown in FIG. 7D, the shutter may have a polygonal or arcuate shape. A shape having an acute angle at which a crystal mother grain grows is defined by the outer peripheral portion of the polygon. The shutter may be rectangular, square, circular, triangular, crescent shaped, or “chevron symbol” shaped, and / or any other suitable shape. For example, a shutter can be used to grow a lattice matching layer in a multilayer substrate structure.
本明細書に記載された多くの変更およびその他の例示的な実施形態は、これらの例示的実施形態が関連する技術分野に精通する読者に、前述した説明および添付の図面に提示した教示の恩恵を有していることを思い起こさせるものである。従って、実施形態は開示された特定のものに限定されるべきではないこと、かつ、変更およびその他の実施形態は特許請求の範囲内に含まれるように意図されていることを理解されたい。さらに、上述の説明および関連する図面は、要素および/または機能のいくつかの例示的な組み合わせに関連して例示的な実施形態を説明しているが、添付の特許請求の範囲から逸脱することなく、要素および/または機能の異なる組み合わせが代替的な実施形態によって提供されてもよいことを理解されたい。 この点に関して、例えば、要素および/または機能の上記以外の異なる組み合わせもまた、添付の特許請求の範囲の一部に記載されているものとされる。 Many modifications and other exemplary embodiments described herein will benefit one skilled in the art to which these exemplary embodiments pertain to the teachings presented in the foregoing description and accompanying drawings. It reminds me of having Accordingly, it should be understood that the embodiments should not be limited to the particulars disclosed, and that modifications and other embodiments are intended to be included within the scope of the claims. Moreover, the foregoing description and associated drawings describe exemplary embodiments in connection with some exemplary combinations of elements and / or functionality, but depart from the scope of the appended claims. Rather, it should be understood that different combinations of elements and / or functions may be provided by alternative embodiments. In this regard, for example, different combinations of elements and / or functions are also intended to be described as part of the appended claims.
Claims (36)
第1の化学元素であって、室温より高いα‐β相転移温度で体心立方構造に変換する六方最密構造を室温で有し、前記第1の化学元素の前記六方最密構造が第1の格子パラメータを有する、第1の化学元素と、
第2の化学元素であって、前記第1の化学元素と同様の化学的性質を備える六方最密構造を室温で有し、前記第2の化学元素の前記六方最密構造が第2の格子パラメータを有し、かつ六方最密構造を有する合金を室温で形成するために前記第1の化学元素と混和性である、第2の化学元素と
を有し、
前記合金の格子定数が、III−V族化合物半導体の構成元素の格子定数に等しいことを特徴とする、多層基板構造。 A multilayer substrate structure,
A first chemical element having a hexagonal close-packed structure at room temperature that converts to a body-centered cubic structure at an α-β phase transition temperature higher than room temperature, wherein the hexagonal close-packed structure of the first chemical element is A first chemical element having a lattice parameter of 1;
A second chemical element having a hexagonal close-packed structure having a chemical property similar to that of the first chemical element at room temperature, wherein the hexagonal close-packed structure of the second chemical element is a second lattice. A second chemical element that is miscible with the first chemical element to form an alloy having parameters and a hexagonal close-packed structure at room temperature;
A multilayer substrate structure, wherein a lattice constant of the alloy is equal to a lattice constant of a constituent element of a group III-V compound semiconductor.
第1の化学元素であって、室温より高いα‐β相転移温度で体心立方構造に変換する六方最密構造を室温で有し、前記第1の化学元素の前記六方最密構造が第1の格子パラメータを有する、第1の化学元素と、
第2の化学元素であって、前記第1の化学元素と同様の化学的性質を備える六方最密構造を室温で有し、前記第2の化学元素の前記六方最密構造が第2の格子パラメータを有し、かつ六方最密構造を有する合金を室温で形成するために前記第1の化学元素と混和性である、第2の化学元素と
を有し、
前記合金の格子定数が、III−V族化合物半導体の構成元素の格子定数に等しいことを特徴とする、方法。 A method of forming a multilayer substrate structure, wherein the multilayer substrate structure includes a lattice matching layer, and the lattice matching layer comprises:
A first chemical element having a hexagonal close-packed structure at room temperature that converts to a body-centered cubic structure at an α-β phase transition temperature higher than room temperature, wherein the hexagonal close-packed structure of the first chemical element is A first chemical element having a lattice parameter of 1;
A second chemical element having a hexagonal close-packed structure having a chemical property similar to that of the first chemical element at room temperature, wherein the hexagonal close-packed structure of the second chemical element is a second lattice. A second chemical element that is miscible with the first chemical element to form an alloy having parameters and a hexagonal close-packed structure at room temperature;
A method wherein the lattice constant of the alloy is equal to the lattice constant of a constituent element of the III-V compound semiconductor.
視線堆積法を使用して材料源から前記基板表面上に原材料を導くステップと、
前記基板と前記原材料との間に配置されたシャッタで前記基板の所定部分を遮断して遮断された基板部分と遮断されていない基板部分とを形成し、前記基板の前記最初の遮断部分上への原材料の堆積を防ぐステップと、
前記遮断された基板部分が減少し、かつ前記遮断されていない基板部分が増加するように前記シャッタと前記基板との間に相対運動を引き起こし、それにより基板全体に横方向のエピタキシャル成長をもたらす移動する横方向成長境界を作成するステップと
を含むことを特徴とする、方法。 A method of depositing a film on a substrate, comprising:
Directing the raw material from a material source onto the substrate surface using a line-of-sight deposition method;
A predetermined portion of the substrate is blocked by a shutter disposed between the substrate and the raw material to form a blocked substrate portion and an unblocked substrate portion, and onto the first blocked portion of the substrate. Preventing the deposition of raw materials,
Causes relative movement between the shutter and the substrate such that the blocked substrate portion is reduced and the unblocked substrate portion is increased, thereby causing lateral epitaxial growth across the substrate. Creating a lateral growth boundary.
前記基板と原材料との間に配置され、かつ前記基板の一部分を遮断するように構成され、前記基板の前記遮断された部分上に原材料の堆積を防ぐ横方向制御シャッタを含み、前記横方向制御シャッタおよび/または前記基板のいずれか一方が他方と相互移動することにより動く横方向成長境界線を形成し、前記基板全体への横方向エピタキシャル堆積と、大きい結晶粒度で前記基板の表面全体への結晶膜の形成とをもたらすことを特徴とする、システム。 A system for depositing a film on a substrate,
The lateral control comprising a lateral control shutter disposed between the substrate and the raw material and configured to block a portion of the substrate and preventing deposition of raw material on the blocked portion of the substrate; A lateral growth boundary is formed by moving one of the shutter and / or the substrate relative to the other, lateral epitaxial deposition on the entire substrate, and a large grain size on the entire surface of the substrate. A system characterized by causing the formation of a crystalline film.
視線堆積法を使用して前記基板の表面上に材料源から原材料を導くステップと、
前記基板と前記原材料との間に配置されたシャッタで前記基板の所定部分を遮断して遮断された基板部分と遮断されていない基板部分とを形成し、前記基板の前記最初の遮断部分上への原材料の堆積を防ぐステップと、
前記遮断された基板部分が減少し、かつ前記遮断されていない基板部分が増加するように前記シャッタと前記基板との間の相互運動を引き起こし、それにより、移動する横方向成長境界を形成して前記基板全体に横方向のエピタキシャル成長をもたらすステップと
を含むことを特徴とする、方法。 A method of depositing a film on a substrate, comprising:
Directing a raw material from a material source onto the surface of the substrate using a line-of-sight deposition method;
A predetermined portion of the substrate is blocked by a shutter disposed between the substrate and the raw material to form a blocked substrate portion and an unblocked substrate portion, and onto the first blocked portion of the substrate. Preventing the deposition of raw materials,
Causing a mutual movement between the shutter and the substrate such that the blocked substrate portion is reduced and the unblocked substrate portion is increased, thereby forming a moving lateral growth boundary Providing lateral epitaxial growth over the entire substrate.
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US201261659944P | 2012-06-14 | 2012-06-14 | |
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US201261662918P | 2012-06-22 | 2012-06-22 | |
US61/662,918 | 2012-06-22 | ||
US13/794,327 | 2013-03-11 | ||
US13/794,372 | 2013-03-11 | ||
US13/794,285 US20130333611A1 (en) | 2012-06-14 | 2013-03-11 | Lattice matching layer for use in a multilayer substrate structure |
US13/794,285 | 2013-03-11 | ||
US13/794,327 US8956952B2 (en) | 2012-06-14 | 2013-03-11 | Multilayer substrate structure and method of manufacturing the same |
US13/794,372 US9879357B2 (en) | 2013-03-11 | 2013-03-11 | Methods and systems for thin film deposition processes |
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Publication number | Publication date |
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EP2862206A4 (en) | 2015-12-30 |
CN104781938B (en) | 2018-06-26 |
TW201405636A (en) | 2014-02-01 |
KR20150047474A (en) | 2015-05-04 |
TWI518747B (en) | 2016-01-21 |
CN104781938A (en) | 2015-07-15 |
EP2862206A2 (en) | 2015-04-22 |
WO2013188574A2 (en) | 2013-12-19 |
WO2013188574A3 (en) | 2014-05-08 |
JP6450675B2 (en) | 2019-01-09 |
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