TWI515903B - 半導體裝置 - Google Patents

半導體裝置 Download PDF

Info

Publication number
TWI515903B
TWI515903B TW102135485A TW102135485A TWI515903B TW I515903 B TWI515903 B TW I515903B TW 102135485 A TW102135485 A TW 102135485A TW 102135485 A TW102135485 A TW 102135485A TW I515903 B TWI515903 B TW I515903B
Authority
TW
Taiwan
Prior art keywords
electrode
opening
openings
semiconductor device
gate electrode
Prior art date
Application number
TW102135485A
Other languages
English (en)
Other versions
TW201513352A (zh
Inventor
林立凡
陳宣文
Original Assignee
台達電子工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 台達電子工業股份有限公司 filed Critical 台達電子工業股份有限公司
Priority to TW102135485A priority Critical patent/TWI515903B/zh
Priority to US14/165,988 priority patent/US9184251B2/en
Publication of TW201513352A publication Critical patent/TW201513352A/zh
Priority to US14/707,810 priority patent/US9236438B2/en
Application granted granted Critical
Publication of TWI515903B publication Critical patent/TWI515903B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41758Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41775Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

半導體裝置
本發明主要關於一種半導體裝置,尤指一種具有電晶體之半導體裝置。
為了能提高開關之切換速度,目前之電源供應器採用了場效型電晶體作為開關裝置。此外,場效型電晶體亦具有低電阻之優點,能提高電源供應器之供電效率。
如第1圖所示,習知之場效型電晶體A10排列於一基板A20上,場效型電晶體A10彼此並聯,藉以輸出較大之電流。場效型電晶體A10包括汲極電極A11、源極電極A12、以及閘極電極A13。汲極電極A11、源極電極A12、以及閘極電極A13均為線性結構,且彼此相互平行。
若場效型電晶體A10應用於輸出電壓高於300V之高壓電源供應器時,汲極電極A11以及源極電極A12之間的距離需大於7nm。然而,於此結構中,基板A20內所有閘極電極A13之閘極寬度Wg的總和較小,使得場效型電晶體A10所輸出之電流較小。
為了能增加閘極寬度Wg,於另一習知技術中,如第2圖所示,將場效型電晶體A20之源極電極A22以及汲極電極A21以彼此交錯的方式陣列排列。源極電極A22以及汲極電極A21均為正方形,且閘極電極A23為長條形,環繞於源極電極 A22之四周。由於電子會以最短之路徑流動,因此電子幾乎不會流經第2圖中之無效區域Z1,造成了基板A20上空間的浪費,進而需以較大面積之基板A20來排列相同數目之場效型電晶體A20,以輸出較多之電流,進而增加了製作成本。
為了解決之缺失,本發明之目的為提供一種半導體裝置,能於相同之基板面積下,增加閘極電極之閘極寬度,以提供較大之電流。
本發明提供了一種半導體裝置,包括一基板以及複數個電晶體。電晶體陣列排列於基板,其中每一電晶體包括一主動層、一第一電極、複數個第二電極、以及一閘極電極。主動層疊置於基板。第一電極設置於主動層。第二電極設置於主動層,且環繞第一電極排列。閘極電極為一環狀結構,設置於主動層,並位於第一電極與第二電極之間。另外,第一電極以及閘極電極為圓形或多邊形。上述多邊形為至少為五邊形。第二電極朝向閘極電極之一側邊,對應於閘極電極之形狀。
綜上所述,本發明之半導體裝置藉由環狀結構之閘極電極來增加閘極寬度,進而增加電晶體所輸出之電流。此外,閘極電極上之任一區段至第一電極的最短距離大致相同,且至第二電極的最短距離大致相同,因此能減少基板上之無效區域,進而漸少製作成本。
「習知技術」
A10、A20‧‧‧場效型電晶體
A11、A21‧‧‧汲極電極
A12、A22‧‧‧源極電極
A13、A23‧‧‧閘極電極
A20‧‧‧基板
Wg‧‧‧閘極寬度
Z1‧‧‧無效區域
「本發明」
1‧‧‧半導體裝置
10‧‧‧基板
20‧‧‧電晶體
21‧‧‧緩衝層
22‧‧‧主動層
23‧‧‧第一電極
24‧‧‧第二電極
241‧‧‧側邊
25‧‧‧閘極電極
251‧‧‧第一部分
252‧‧‧第二部分
253‧‧‧連接部份
26‧‧‧保護層
261‧‧‧第一保護層
262‧‧‧第二保護層
263‧‧‧第三保護層
27‧‧‧絕緣層
30‧‧‧第一導電層
40‧‧‧第二導電層
60‧‧‧第一墊片
70‧‧‧第二墊片
80‧‧‧閘極墊片
A1‧‧‧第一開口
A2‧‧‧第二開口
A3‧‧‧第三開口
C1‧‧‧圓心
T1‧‧‧圓形路徑
d1、d2‧‧‧距離
P1‧‧‧平面
第1圖以及第2圖為習知之場效型電晶體的示意圖。
第3圖為本發明之半導體裝置的剖視圖。
第4圖為第3圖之AA剖面的剖示圖。
第5圖為第3圖之BB剖面的剖示圖。
第6圖為第3圖之CC剖面的剖示圖。
第7圖為第3圖之DD剖面的剖示圖。
第8圖為本發明之半導體裝置的俯視圖。
第9圖至第12圖本發明之半導體裝置之另一實施例之剖視圖。
第3圖為本發明之半導體裝置1的剖視圖。第4圖為第3圖之AA剖面的剖示圖。半導體裝置1可為一開關裝置,並可應用於高功率(power)之電源供應器中。
半導體裝置1包括一基板10、多個電晶體20、一第一導電層30、以及一第二導電層40。基板10可為一晶圓,其材質可為矽。電晶體20可為場效型電晶體20(Field Effect Transistor,FET)形成於基板10上,並可陣列排列於基板10。
在本發明之一實施例中,電晶體20係為一常開型(normally-on)電晶體,其包括一緩衝層21、一主動層22、一第一電極23、一第二電極24、一閘極電極(gate electrode)25、一保護層26、以及一絕緣層27。緩衝層21疊置於基板10,且主動層22疊置於緩衝層21。於本實施例中,緩衝層21之材質可為GaN或AlN,且主動層22係由複數氮基(nitride-based)半導體層堆疊而成,且具有一高二維電子氣(2-dimensional electric gas,2DEG)濃度之導電通道。在本發明之一實施例中,主動層 22包含有一氮化鎵層與一氮化鋁鎵層位於氮化鎵層上,且在氮化鎵層與氮化鋁鎵層之間的介面附近形成高2DEG濃度之導電通道。
保護層26係設置於主動層22上,並具有複數個第一開口A1、複數個第二開口A2與複數個第三開口A3。在本發明之一實施例中,保護層26係為氮化矽層,藉由化學氣相沉積(Chemical Vapor Deposition,CVD)製程形成於主動層22上,並藉由蝕刻製程來形成第一開口A1、第二開口A2與第三開口A3。第一開口A1以及第二開口A2均陣列排列於保護層26。其中第一開口A1為圓形或多邊形,且多邊形至少為五邊形,各第二開口A2分別環繞一個第一開口A1,且第二開口A2朝向上述第一開口A1之一側邊,對應於第一開口A1之形狀,每一第二開口A2分別設置於第一開口A1中之一者與部份第三開口A3之間。每一第三開口A3設置於第二開口A2之間,且第三開口A3朝向第二開口A2之一側邊,對應於上述第二開口A2之形狀。
保護層26包括一第一保護層261、一第二保護層262。第一保護層261位於閘極電極25以及第一電極23之間。第二保護層262位於閘極電極25以及第二電極24之間。在本發明之一實施例中,更會在第二開口A2內形成具有高緻密性的第三保護層263,做為閘極絕緣層,以降低漏電流。
第一電極23、第二電極24、以及閘極電極25分別設置於第一開口A1、第三開口A3與第二開口A2內。閘極電極25包含有相互連接之一第一部分251與一第二部分252,其中第一部分251係設置於各第二開口A2內,而第二部分252係設置於上 述第一部分251與保護層26上。在本發明的一實施例中,閘極電極25的第二部分252之寬度大於第一部份251之寬度,且由第二開口A2朝向位於其中的第一開口A1的方向延伸,以分散電場,提高半導體裝置的崩潰電壓。於本實施例中,第一電極23為汲極電極(drain electrode),且第二電極24為源極電極(source electrode)。於另一實施例中,第一電極23可為源極電極,且第二電極24可為汲極電極。
絕緣層27疊置於保護層26、第一電極23、第二電極24、以及閘極電極25上。第一導電層30穿過絕緣層27,並與第一電極23連接,第二導電層40穿過絕緣層27,並與第二電極24連接。
第5圖為第3圖之BB剖面的剖示圖、第6圖為第3圖之CC剖面的剖示圖、第7圖為第3圖之DD剖面的剖示圖。如第3圖以及第5圖所示之BB剖面,閘極電極25更包括多個長條形之連接部份253,分別連接兩相鄰之第二部分252,以使分布於不同第二開口A2周圍的第一部分251與第二部分252相互電連接。
如第3圖以及第6圖所示之CC剖面,多個第一導電層30以及絕緣層27陣列排列。絕緣層27為一環狀,且位於第一導電層30以及第二導電層40之間。此外,第二導電層40形成一網狀結構,藉以電性連接每一第二電極24。
如第3圖以及第7圖所示之DD剖面,其中為了使圖式更為清楚,並未繪製DD剖面上之絕緣層27,第一導電層30形成一網狀結構,藉以電性連接每一第一電極23。
第8圖為本發明之半導體裝置1的俯視圖。半導體裝 置1更包括一第一墊片60、一第二墊片70、以及一閘極墊片(gate pad)80。第一墊片60、第二墊片70、以及閘極墊片80設置於基板10。第一墊片60連接於第一導電層30、第二墊片70連接於第二導電層40、以及閘極墊片80連接於閘極電極25。因此,於本實施例中,半導體裝置1中的複數個電晶體20為並聯,藉以提供較大之電流。半導體裝置1包括一基板10、多個電晶體20。
此外,第一導電層30、第二導電層40及閘極電極25為網狀結構,其具有較大之面積,可減小第一導電層30以及第二導電層40之電阻以及半導體裝置1之輸出電阻,進而可增加半導體裝置1之效能。
本實施例之半導體裝置1之場效型電晶體20可應用於高壓電源供應器,汲極電極以及源極電極之間的最短距離大於7um,或是於7um至30um之間。上述高壓電源供應器所供應之電壓可超過300V。
如第4圖所示,閘極電極25、第一保護層261、以及第二保護層262為一環狀結構。第二電極24環繞閘極電極25排列。第一電極23以及閘極電極25朝向第一電極23之一側邊均為圓形,且具有相同之圓心C1。第二電極24之側邊241朝向閘極電極25,且對應於閘極電極25之形狀,於本實施例中,第二電極24之側邊241為沿一圓形路徑T1延伸之圓弧,並呈一環狀排列,其中圓形路徑T1之圓心C1與第一電極23相同。第一電極23至閘極電極25之間的距離d1大於第二電極24至閘極電極25之間的距離d2只少三倍。
於上述結構下,閘極電極25上之任一區段至第一電 極23的最短距離大致相同,且至第二電極24的最短距離大致相同,因此電流會分散地流動於第一電極23和第二電極24的區域,能大量減少基板10上之無效區域,提高基板10之面積利用率,並能以較小面積的基板10製作半導體裝置1,進而降低製作成本。
於本實施例中,第一電極23、第二電極24以及閘極電極25陣列排列於基板10上。此外,閘極電極25為環狀結構,且閘極電極25環繞第一電極23,以及第二電極24環繞閘極電極25。因此於此結構之下,於相同面積之基板10下,閘極電極25之閘極寬度(gate width)較大。
第9圖至第12圖本發明之半導體裝置1之另一實施例之剖視圖,其中第9圖之剖面參考第3圖之AA剖面的位置、第10圖之剖面參考第3圖之BB剖面的位置面、第11圖之剖面參考第3圖之CC剖面的位置、以及第12圖之剖面參考第3圖之DD剖面的位置。於此實施例中,第一電極23以及閘極電極25中朝向第一電極23之一側邊均為正多邊形,且具有相同之中心。第一電極23、閘極電極25、第一保護層261、以及第二保護層262為多邊形或正多邊形,且具有相同之中心,於本實施例中多邊形可為正六邊形。第二電極24之側邊241朝向閘極電極25,且對應於閘極電極25之形狀,於本實施例中,第二電極24之側邊241為直線,並呈環狀排列。在本發明之一實施例中,第一電極23之形狀為凸多邊形,且最短邊與最長邊之比值大於0.7。
於另一實施例中,多邊形可為可為五邊形、六邊形、八邊形、十二邊行或是二十邊形以上,例如五邊形、六邊形、 八邊形、十二邊形或是二十邊形。於又一實施例中,正多邊形可為可為正五邊形、正六邊形、正八邊形、正十二邊行或是正二十邊形以上,例如正五邊形、正六邊形、正八邊形、正十二邊形或是正二十邊形。
如第3圖以及第10圖所示之BB剖面,閘極電極25形成一網狀結構,以使分布於不同第二開口A2內的第一部分251相互電連接。第一導電層30以及第二導電層40之間以絕緣層27相互間隔。
如第3圖以及第11圖所示之CC剖面,多個第一導電層30以及絕緣層27陣列排列。絕緣層27為一環狀,且位於第一導電層30以及第二導電層40之間。此外,第二導電層40形成一網狀結構,藉以電性連接每一第二電極24。
如第3圖以及第12圖所示之DD剖面,其中為了使圖式更為清楚,並未繪製DD剖面上之絕緣層27,第一導電層30形成一網狀結構,藉以電性連接每一第一電極23。
綜上所述,本發明之半導體裝置藉由環狀結構之閘極電極來增加閘極寬度,進而增加電晶體所輸出之電流。此外,閘極電極與第一電極和第二電極之間的距離大致相同,能減少基板上之無效區域,進而漸少製作之成本。
本發明雖以各種實施例揭露如上,然而其僅為範例參考而非用以限定本發明的範圍,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可做些許的更動與潤飾。因此實施例並非用以限定本發明之範圍,本發明之保護範圍當視後附之申請專利範圍所界定者為準。
20‧‧‧電晶體
23‧‧‧第一電極
24‧‧‧第二電極
241‧‧‧側邊
25‧‧‧閘極電極
261‧‧‧第一保護層
262‧‧‧第二保護層
27‧‧‧絕緣層
C1‧‧‧圓心
T1‧‧‧圓形路徑
d1、d2‧‧‧距離

Claims (5)

  1. 一種半導體裝置,包括:一基板;一主動層,設於上述基板上;一保護層,設於上述主動層上,並具有複數個第一開口、複數個第二開口與複數個第三開口,其中上述第一開口為圓形或多邊形,且上述多邊形至少為五邊形,每一上述第二開口分別環繞上述第一開口,上述第二開口朝向上述第一開口之一側邊,對應於上述第一開口之形狀,上述第三開口設置於上述第二開口之間;複數個汲極電極,分別設置於上述第一開口內;一閘極電極,包含有相互連接之一第一部分與一第二部分,其中上述第一部分係設置於上述第二開口內,而上述第二部分係設置於上述第一部分與上述保護層上;以及複數個源極電極,分別設置於上述第三開口內。
  2. 如申請專利範圍第1項所述之半導體裝置,其中上述第一開口以陣列排列,各上述第二開口分別設置於上述第一開口中之一者與部份上述第三開口之間。
  3. 如申請專利範圍第1項所述之半導體裝置,更包括一絕緣層設置於上述保護層、上述閘極電極、上述複數源極電極以及上述複數汲極電極上。
  4. 如申請專利範圍第1項所述之半導體裝置,更包括連接於上述複數汲極電極之一第一導電層,以及連接於上述複數源極電極之一第二導電層。
  5. 如申請專利範圍第1項所述之半導體裝置,其中各上述第三開口朝向上述第二開口之一側邊,對應於上述第二開口之形狀。
TW102135485A 2013-09-30 2013-09-30 半導體裝置 TWI515903B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW102135485A TWI515903B (zh) 2013-09-30 2013-09-30 半導體裝置
US14/165,988 US9184251B2 (en) 2013-09-30 2014-01-28 Semiconductor device
US14/707,810 US9236438B2 (en) 2013-09-30 2015-05-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW102135485A TWI515903B (zh) 2013-09-30 2013-09-30 半導體裝置

Publications (2)

Publication Number Publication Date
TW201513352A TW201513352A (zh) 2015-04-01
TWI515903B true TWI515903B (zh) 2016-01-01

Family

ID=52739268

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102135485A TWI515903B (zh) 2013-09-30 2013-09-30 半導體裝置

Country Status (2)

Country Link
US (2) US9184251B2 (zh)
TW (1) TWI515903B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102556023B1 (ko) * 2016-02-26 2023-07-17 삼성디스플레이 주식회사 감광성 박막 소자 및 이를 포함하는 생체 정보 감지 장치
TWM547757U (zh) * 2017-01-20 2017-08-21 杰力科技股份有限公司 功率晶片及其電晶體結構
CN108493233A (zh) * 2018-05-08 2018-09-04 大连芯冠科技有限公司 可降低导通电阻提高运行可靠性的GaN HEMT器件
CN116344530A (zh) * 2021-12-24 2023-06-27 长鑫存储技术有限公司 晶体管单元及其阵列、集成电路
CN117832255A (zh) * 2022-09-29 2024-04-05 华润微电子(重庆)有限公司 一种hemt器件及其制作方法
WO2024084652A1 (ja) * 2022-10-20 2024-04-25 日本電信電話株式会社 電界効果型トランジスタ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5847413A (en) * 1994-08-31 1998-12-08 Semiconductor Energy Laboratory Co., Ltd. Differential amplifier circuit and analog buffer
JP2009267358A (ja) * 2008-04-03 2009-11-12 Toshiba Corp 半導体装置
JPWO2010131571A1 (ja) * 2009-05-11 2012-11-01 住友電気工業株式会社 半導体装置
US8642446B2 (en) * 2010-09-27 2014-02-04 Stats Chippac, Ltd. Semiconductor device and method of forming protective structure around semiconductor die for localized planarization of insulating layer
US9112037B2 (en) * 2012-02-09 2015-08-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
US20150091095A1 (en) 2015-04-02
US9236438B2 (en) 2016-01-12
US9184251B2 (en) 2015-11-10
US20150243744A1 (en) 2015-08-27
TW201513352A (zh) 2015-04-01

Similar Documents

Publication Publication Date Title
TWI515903B (zh) 半導體裝置
US10950524B2 (en) Heterojunction semiconductor device for reducing parasitic capacitance
JP6791084B2 (ja) 半導体装置
JP5672756B2 (ja) 半導体装置
JP2019212718A (ja) 絶縁ゲート型半導体装置及び絶縁ゲート型半導体装置の製造方法
JP2022191421A (ja) 半導体装置
TWI643338B (zh) 半導體裝置
JP2019169551A (ja) 窒化物半導体装置
US20180151675A1 (en) Field-effect transistor
JP7161915B2 (ja) 半導体装置
JP6854598B2 (ja) 半導体装置
CN104517962A (zh) 半导体装置
US8987838B2 (en) Field-effect transistor
WO2021200565A1 (ja) 半導体素子および装置
WO2021200566A1 (ja) 半導体素子および装置
KR101756580B1 (ko) 반도체 장치
US20130168873A1 (en) Power semiconductor device and manufacturing method thereof
US9478653B2 (en) Field effect transistor and semiconductor device
JP2011009630A (ja) 保護ダイオード
WO2022168463A1 (ja) 半導体素子および装置
JP7510642B2 (ja) 半導体素子および装置
TWI653760B (zh) 半導體裝置
JP2016103610A (ja) 半導体装置
CN115579383A (zh) 半导体装置
JP2011129616A (ja) 半導体装置