TWI492401B - Solar cell, method of manufacturing the same and module comprising the same - Google Patents
Solar cell, method of manufacturing the same and module comprising the same Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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本發明是有關於一種太陽能電池、其製造方法與其模組,特別是指一種背接觸式太陽能電池、其製造方法及其模組。The invention relates to a solar cell, a manufacturing method thereof and a module thereof, in particular to a back contact solar cell, a manufacturing method thereof and a module thereof.
參閱圖1、2,為一種已知的指叉式背接觸(Interdigitated Back Contact,簡稱IBC)太陽能電池,包含:一n型的基板91、一鈍化層92、至少一p型電極93,以及至少一n型電極94。Referring to Figures 1 and 2, there is a known Interdigitated Back Contact (IBC) solar cell comprising: an n-type substrate 91, a passivation layer 92, at least one p-type electrode 93, and at least An n-type electrode 94.
該基板91包括彼此相對的一受光面911與一背面912、一位於該受光面911側且摻雜濃度大於該基板91的n型摻雜層913、一個位於該n型摻雜層913上的抗反射層914、位於該背面912側的至少一p型摻雜區915與至少一n型摻雜區916,以及至少一將該p型摻雜區915與該n型摻雜區916隔開的內凹結構917。該鈍化層92位於該基板91的背面912上並且覆蓋該p型摻雜區915、該n型摻雜區916與該內凹結構917。該p型電極93位於該鈍化層92上並穿過該鈍化層92而連接該p型摻雜區915,而該n型電極94位於該鈍化層92上並穿過該鈍化層92而連 接該n型摻雜區916。The substrate 91 includes a light receiving surface 911 and a back surface 912 opposite to each other, an n-type doping layer 913 on the side of the light receiving surface 911 and having a doping concentration greater than the substrate 91, and one on the n-type doping layer 913. An anti-reflective layer 914, at least one p-type doped region 915 on the back surface 912 side and at least one n-type doped region 916, and at least one separate the p-type doped region 915 from the n-type doped region 916 The concave structure 917. The passivation layer 92 is located on the back surface 912 of the substrate 91 and covers the p-type doping region 915, the n-type doping region 916 and the recess structure 917. The p-type electrode 93 is located on the passivation layer 92 and passes through the passivation layer 92 to connect the p-type doping region 915. The n-type electrode 94 is located on the passivation layer 92 and is connected through the passivation layer 92. The n-doped region 916 is connected.
進一步說明的是,該太陽能電池設置該內凹結構917是為了避免該p型摻雜區915與該n型摻雜區916接觸,以避免寄生分流(Parasitic Shunting)現象而產生漏電流(Leakage Current)。在製作上,該p型摻雜區915與該n型摻雜區916可藉由擴散製程分別形成於該基板91的背面912,此時該p型摻雜區915與該n型摻雜區916的邊界處彼此相連接,因此通常需要進行如圖2所示的步驟:首先透過雷射方式在該p型摻雜區915與該n型摻雜區916相連接的部位形成該內凹結構917,接著再使用氫氧化鉀(KOH)溶液蝕刻該內凹結構917內的表面,以清除因雷射對該基板91所生成的雷射損壞層。完成之後,在該背面912上形成該鈍化層92,並繼續前述太陽能電池後續的製造工序,例如設置該p型電極93與該n型電極94。It is further noted that the solar cell is provided with the recessed structure 917 in order to prevent the p-type doping region 915 from contacting the n-type doping region 916 to avoid parasitic shunting and generating leakage current (Leakage Current). ). In the fabrication, the p-doped region 915 and the n-doped region 916 can be respectively formed on the back surface 912 of the substrate 91 by a diffusion process, and the p-doped region 915 and the n-doped region are in this case. The boundaries of 916 are connected to each other, so it is usually necessary to perform the steps shown in FIG. 2: firstly, the concave structure is formed by laserly connecting the p-type doping region 915 and the n-type doping region 916. 917, the surface within the recessed structure 917 is then etched using a potassium hydroxide (KOH) solution to remove the laser damaged layer generated by the laser to the substrate 91. After completion, the passivation layer 92 is formed on the back surface 912, and the subsequent manufacturing process of the solar cell is continued, for example, the p-type electrode 93 and the n-type electrode 94 are provided.
然而前述製造方法,除了因為使用雷射方式開孔而導致製造成本較高之外,因雷射開孔之方式為單向乾蝕刻剝除之作法,再加上後續以氫氧化鉀溶液進行蝕刻清潔時,因其屬非等向性蝕刻作用,會使得該內凹結構917形成一連接該p型摻雜區915的第一直角結構918,以及一連接該n型摻雜區916的第二直角結構919。However, in the foregoing manufacturing method, in addition to the high manufacturing cost due to the use of the laser opening, the method of laser opening is a one-way dry etching stripping method, followed by etching with a potassium hydroxide solution. When cleaning, the recessed structure 917 forms a first right angle structure 918 connecting the p-type doping region 915, and a second connecting the n-type doping region 916 due to its anisotropic etching action. Right angle structure 919.
前述第一直角結構918與第二直角結構919之尖銳形貌會使該鈍化層92產生階梯覆蓋率(Step Coverage)不均勻之問題,亦即使該鈍化層92的厚度明顯產生不均勻之現象,進而影響鈍化效果。再加上該鈍化層92於該第一 直角結構918的尖銳形貌處的厚度較薄,甚或產生披覆量不足之情形,如此更會降低該鈍化層92對該基板91的背面摻雜區的鈍化品質,從而影響該太陽能電池之電性效果。The sharp topography of the first right angle structure 918 and the second right angle structure 919 causes the passivation layer 92 to have a problem of uneven step coverage, and even if the thickness of the passivation layer 92 is significantly uneven, In turn, it affects the passivation effect. Adding the passivation layer 92 to the first The thickness of the sharp-angled structure 918 is thinner, or even the amount of coating is insufficient. This further reduces the passivation quality of the passivation layer 92 on the back doped region of the substrate 91, thereby affecting the power of the solar cell. Sexual effect.
另外,當該太陽能電池在運作時,容易因前述第一直角結構918與第二直角結構919之尖銳形貌而產生電荷集中與電場集中的現象,如此將導致該太陽能電池因電荷累積量過高而損壞,進而降低該太陽能電池的使用壽命,使該太陽能電池的光電轉換效率降低,所以已知的太陽能電池的結構仍有待改良。In addition, when the solar cell is in operation, it is easy to cause charge concentration and electric field concentration due to the sharp topography of the first right angle structure 918 and the second right angle structure 919, which will cause the solar cell to have excessive charge accumulation. The damage, and thus the service life of the solar cell, reduces the photoelectric conversion efficiency of the solar cell, so the structure of the known solar cell still needs to be improved.
因此,本發明之目的,即在提供一種可提升光電轉換效率與使用壽命的太陽能電池、其製造方法及其模組。Accordingly, it is an object of the present invention to provide a solar cell, a method of manufacturing the same, and a module thereof that can improve photoelectric conversion efficiency and service life.
於是,本發明太陽能電池,包含:一第一導電型的基板、一第一導電型摻雜層、一第二導電型摻雜層、一內凹結構、一鈍化層、一第一電極,以及一第二電極。Therefore, the solar cell of the present invention comprises: a first conductivity type substrate, a first conductivity type doping layer, a second conductivity type doping layer, a recess structure, a passivation layer, a first electrode, and a second electrode.
該基板包括一受光的正面,以及一相對於該正面的背面。該第一導電型摻雜層位於該基板的背面,而該第二導電型摻雜層位於該基板的背面,並靠近該第一導電型摻雜層。該內凹結構位於該第一導電型摻雜層與該第二導電型摻雜層之間,該第一導電型摻雜層與該第二導電型摻雜層緊鄰該內凹結構且靠近該背面之處分別形成一突出弧角。該鈍化層配置於該背面,且接觸該第一導電型摻雜層與該第二導電型摻雜層。該第一電極位於該鈍化層上並 穿過該鈍化層而接觸該第一導電型摻雜層。該第二電極位於該鈍化層上並穿過該鈍化層而接觸該第二導電型摻雜層。The substrate includes a light-receiving front side and a back side opposite the front side. The first conductive type doped layer is located on the back surface of the substrate, and the second conductive type doped layer is located on the back surface of the substrate and adjacent to the first conductive type doped layer. The concave structure is located between the first conductive type doped layer and the second conductive type doped layer, and the first conductive type doped layer and the second conductive type doped layer are adjacent to the concave structure and close to the A protruding arc angle is formed on the back side. The passivation layer is disposed on the back surface and contacts the first conductive type doped layer and the second conductive type doped layer. The first electrode is on the passivation layer and The first conductive type doped layer is contacted through the passivation layer. The second electrode is located on the passivation layer and passes through the passivation layer to contact the second conductive type doped layer.
本發明太陽能電池模組,包含:一第一板材、一第二板材、至少一個設置於該第一板材與該第二板材間且如前述的太陽能電池,以及一位於該第一板材與該第二板材間且接觸該太陽能電池的封裝材。The solar cell module of the present invention comprises: a first plate, a second plate, at least one solar cell disposed between the first plate and the second plate and as described above, and a first plate and the first plate A package material between the two plates and contacting the solar cell.
本發明太陽能電池的製造方法,包含:提供一第一導電型的基板,該基板包括一受光的正面,以及一相對於該正面的背面;在該基板的背面形成一第二導電型摻雜層;在該第二導電型摻雜層上配置一遮罩層;在該遮罩層上形成一開口,並移除該第二導電型摻雜層的對應於該開口處的部位;透過該開口在該基板的背面形成一第一導電型摻雜層,該第一導電型摻雜層靠近該第二導電型摻雜層且彼此之間具有一交界處;移除該遮罩層;將一蝕刻材料覆蓋於該第一導電型摻雜層與該第二導電型摻雜層之間的該交界處,並透過該蝕刻材料蝕刻該交界處而形成一內凹結構,使該第一導電型摻雜層與該第二導電型摻雜層緊鄰該內凹結構且靠近該背面之處分別形成一突出弧角;在該基板的背面且位於該第一導電型摻雜層與該第二導電型摻雜層上形成一鈍化層;形成一配置於該鈍化層上且穿過該鈍化層而接觸該第一導電型摻雜層的第一電極;及形成一配置於該鈍化層上且穿過該鈍化層而接觸該第二導電型摻雜層的第二電極。The method for manufacturing a solar cell of the present invention comprises: providing a substrate of a first conductivity type, the substrate comprising a light-receiving front surface, and a back surface opposite to the front surface; and forming a second conductive type doping layer on the back surface of the substrate Configuring a mask layer on the second conductive type doped layer; forming an opening on the mask layer, and removing a portion of the second conductive type doped layer corresponding to the opening; Forming a first conductive type doped layer on the back surface of the substrate, the first conductive type doped layer is adjacent to the second conductive type doped layer and has an interface between each other; removing the mask layer; An etching material covers the interface between the first conductive type doped layer and the second conductive type doped layer, and etches the interface through the etching material to form a concave structure, so that the first conductive type The doped layer and the second conductive type doped layer are adjacent to the concave structure and form a protruding arc angle near the back surface; at the back of the substrate and at the first conductive type doped layer and the second conductive Forming a passivation layer on the doped layer; forming a first electrode disposed on the passivation layer and contacting the passivation layer to contact the first conductive type doped layer; and forming a layer disposed on the passivation layer and passing through the passivation layer to contact the second conductive type The second electrode of the hybrid layer.
本發明之功效在於:將該第一導電型摻雜層與該第二導電型摻雜層緊鄰該內凹結構且靠近該背面之處改良為突出弧角的創新設計,可避免該太陽能電池在運作時發生電荷集中與電場集中的現象,以克服以往的太陽能電池容易因電荷累積量過高而壞損的問題,進而提升該太陽能電池的使用壽命,同時還可使後續配置的該鈍化層在前述突出弧角的部位的厚度均勻,並提升該鈍化層的品質與鈍化效果,從而提升該太陽能電池的光電轉換效率。The invention has the advantages that the first conductive type doped layer and the second conductive type doped layer are improved in close proximity to the concave structure and close to the back surface, and the innovative design of the protruding arc angle can avoid the solar cell being The phenomenon of charge concentration and electric field concentration occurs during operation to overcome the problem that the solar cell is easily damaged due to excessive charge accumulation, thereby improving the service life of the solar cell, and also enabling the subsequent configuration of the passivation layer. The thickness of the portion protruding from the arc angle is uniform, and the quality and passivation effect of the passivation layer are improved, thereby improving the photoelectric conversion efficiency of the solar cell.
11‧‧‧第一板材11‧‧‧ first plate
12‧‧‧第二板材12‧‧‧Second plate
13‧‧‧太陽能電池13‧‧‧Solar battery
14‧‧‧封裝材14‧‧‧Package
2‧‧‧基板2‧‧‧Substrate
201‧‧‧正面201‧‧‧ positive
202‧‧‧背面202‧‧‧Back
203‧‧‧第一面部203‧‧‧ first face
204‧‧‧第二面部204‧‧‧ second face
21‧‧‧第一導電型摻雜層21‧‧‧First Conductive Doped Layer
211‧‧‧第一連接部211‧‧‧First connection
22‧‧‧第二導電型摻雜層22‧‧‧Second Conductive Doped Layer
22’‧‧‧第二導電型摻雜層22'‧‧‧Second Conductive Doped Layer
221‧‧‧第二連接部221‧‧‧Second connection
23‧‧‧內凹結構23‧‧‧ concave structure
231‧‧‧底部231‧‧‧ bottom
232‧‧‧底面部232‧‧‧ bottom part
24‧‧‧第三導電型摻雜層24‧‧‧ Third Conductive Doped Layer
25‧‧‧抗反射層25‧‧‧Anti-reflective layer
26‧‧‧交界處26‧‧‧ junction
3‧‧‧鈍化層3‧‧‧ Passivation layer
31‧‧‧第一開口31‧‧‧ first opening
32‧‧‧第二開口32‧‧‧second opening
41‧‧‧第一電極41‧‧‧First electrode
42‧‧‧第二電極42‧‧‧second electrode
6‧‧‧焊帶導線6‧‧‧welding wire
700‧‧‧蝕刻材料700‧‧‧ etching materials
800‧‧‧遮罩層800‧‧‧mask layer
801‧‧‧開口801‧‧‧ openings
S01~S12‧‧‧步驟S01~S12‧‧‧Steps
本發明之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:圖1是一種已知的指叉式背接觸太陽能電池的局部剖視示意圖;圖2是圖1的太陽能電池之一未完整的製造流程示意圖,說明將該太陽能電池之一p型摻雜區與一n型摻雜區間隔開來的製造過程;圖3是本發明太陽能電池模組之一較佳實施例之一局部剖視示意圖;圖4是該較佳實施例之一太陽能電池之一局部剖視示意圖;圖5是本發明太陽能電池的製造方法之一較佳實施例的步驟流程方塊圖;圖6是該製造方法的前段步驟進行時的示意圖;及圖7是該製造方法的後段步驟進行時的示意圖。Other features and effects of the present invention will be apparent from the following description of the drawings. FIG. 1 is a partial cross-sectional view of a known interdigitated back contact solar cell; FIG. 2 is a schematic view of FIG. A schematic diagram of an incomplete manufacturing process of a solar cell, illustrating a manufacturing process in which a p-type doped region of the solar cell is separated from an n-type doping region; FIG. 3 is a preferred embodiment of the solar cell module of the present invention. FIG. 4 is a partial cross-sectional view showing a solar cell of the preferred embodiment; FIG. 5 is a block diagram showing the steps of a preferred embodiment of the solar cell manufacturing method of the present invention; Fig. 6 is a schematic view showing the steps of the preceding step of the manufacturing method; and Fig. 7 is a schematic view showing the subsequent steps of the manufacturing method.
參閱圖3、4,本發明太陽能電池模組之一較佳實施例包含:上下相對設置的一第一板材11與一第二板材12、數個陣列式地排列設置於該第一板材11與該第二板材12間且彼此電連接的太陽能電池13,以及一位於該第一板材11與該第二板材12間且包覆地接觸該等太陽能電池13的封裝材14。當然在實施上,該太陽能電池模組可以僅包含一太陽能電池13。Referring to FIG. 3 and FIG. 4, a preferred embodiment of the solar cell module of the present invention comprises: a first plate 11 and a second plate 12 disposed opposite each other, and a plurality of arrays arranged on the first plate 11 and A solar cell 13 between the second plates 12 and electrically connected to each other, and a package 14 between the first plate 11 and the second plate 12 and coveringly contacting the solar cells 13. Of course, in practice, the solar cell module may include only one solar cell 13.
在本實施例中,該第一板材11又稱為背板(Back Sheet),該第二板材12位於光線入射的一側,其可由透光材料製成,例如玻璃或塑膠材質等板材,不需特別限制。該數個太陽能電池13彼此間可透過數個焊帶導線(Ribbon)6電連接。而該封裝材14的材料為乙烯-醋酸乙烯共聚物(EVA)或其他可用於太陽能電池模組封裝之相關材料,並不限於本實施例的舉例。In this embodiment, the first plate 11 is also referred to as a back sheet, and the second plate 12 is located on the side where the light is incident, and may be made of a light-transmitting material, such as a glass or plastic material. Special restrictions are required. The plurality of solar cells 13 are electrically connected to each other through a plurality of ribbon wires 6. The material of the package material 14 is ethylene-vinyl acetate copolymer (EVA) or other related materials that can be used for solar cell module packaging, and is not limited to the examples of the embodiment.
由於該太陽能電池模組的結構非本發明改良的重點,不再說明,於圖3中也僅為簡單示意。此外,由於該數個太陽能電池13的結構都相同,以下僅以其中一個為例進行說明。當然,在一模組中的該數個太陽能電池13的結構不以相同為絕對之必要。Since the structure of the solar cell module is not an improvement of the present invention, it will not be described again, and is also simply illustrated in FIG. In addition, since the structures of the several solar cells 13 are the same, only one of them will be described below as an example. Of course, the structure of the plurality of solar cells 13 in a module is not absolutely necessary.
本實施例的太陽能電池13為背接觸式太陽能電池,並包含:一第一導電型的基板2、一第一導電型摻雜層21、兩個第二導電型摻雜層22、兩個內凹結構23、一鈍化層3、一第一電極41,以及兩個第二電極42。本實施例 所述的第一導電型與第二導電型分別為n型半導體與p型半導體,但實施時也可以相反。本實施例的基板2為n型的晶矽基板,並且可為單晶矽基板或多晶矽基板。該基板2包括彼此上下相對的一正面201與一背面202。該正面201為受光面並朝向該第二板材12,且可如圖4所示地製作成粗糙面以提高入光量,但實施時不以此為限。而該背面202朝向該第一板材11,並具有一對應該第一導電型摻雜層21的第一面部203,以及兩個分別對應該兩個第二導電型摻雜層22的第二面部204。該第一面部203與該兩個第二面部204之間通常會具有一高低差以避免後續擴散製程時的汙染,但實施上不以前述結構為必要,也就是該背面202也可為平坦的平面,亦即該第一面部203與該兩個第二面部204位處同一平面之高度。The solar cell 13 of the present embodiment is a back contact solar cell, and includes: a first conductivity type substrate 2, a first conductivity type doping layer 21, two second conductivity type doping layers 22, and two inner layers. The concave structure 23, a passivation layer 3, a first electrode 41, and two second electrodes 42. This embodiment The first conductivity type and the second conductivity type are respectively an n-type semiconductor and a p-type semiconductor, but may be reversed in implementation. The substrate 2 of the present embodiment is an n-type wafer substrate, and may be a single crystal germanium substrate or a polycrystalline germanium substrate. The substrate 2 includes a front surface 201 and a back surface 202 opposite to each other. The front surface 201 is a light receiving surface and faces the second plate material 12, and can be made into a rough surface as shown in FIG. 4 to increase the amount of light incident, but is not limited thereto. The back surface 202 faces the first plate 11 and has a pair of first faces 203 that should be doped with the first conductive type doping layer 21, and two second portions that respectively correspond to the two doped layers 22 of the second conductive type. Face 204. The first face 203 and the two second faces 204 usually have a height difference to avoid contamination during the subsequent diffusion process, but the implementation is not necessary in the foregoing structure, that is, the back face 202 can also be flat. The plane, that is, the height of the first surface 203 and the two second surface 204 at the same plane.
本實施例的第一導電型摻雜層21配置於該背面202處之內,該第一導電型摻雜層21為n++ 型半導體,其摻雜濃度大於該基板2的摻雜濃度。本實施例的第二導電型摻雜層22為p型半導體,其配置於該背面202處之內,並靠近該第一導電型摻雜層21而間隔地位於該第一導電型摻雜層21的相反側。The first conductive type doped layer 21 of the present embodiment is disposed within the back surface 202. The first conductive type doped layer 21 is an n ++ type semiconductor having a doping concentration greater than a doping concentration of the substrate 2. The second conductive type doped layer 22 of the present embodiment is a p-type semiconductor disposed in the back surface 202 and spaced apart from the first conductive type doped layer 21 at the first conductive type doped layer. The opposite side of 21.
需要說明的是,若該基板2使用p型半導體基板,則該第一導電型摻雜層21就必須製作成摻雜濃度大於前述p型基板之p++ 型半導體,而該兩個第二導電型摻雜層22則製作成n型半導體。It should be noted that, if the substrate 2 uses a p-type semiconductor substrate, the first conductive type doped layer 21 must be formed into a p ++ type semiconductor having a doping concentration greater than that of the p-type substrate, and the two second The conductive doped layer 22 is fabricated as an n-type semiconductor.
本實施例的該兩個內凹結構23分別位於該第一 導電型摻雜層21與該兩個第二導電型摻雜層22之間,該第一導電型摻雜層21與該兩個第二導電型摻雜層22緊鄰該內凹結構23且靠近該背面202之處分別形成一突出弧角,其中所說的靠近該背面202之處,係指該第一導電型摻雜層21是靠近該背面202之第一面部203的位置處,該第二導電型摻雜層22是靠近該背面202之第二面部204的位置處。而且,本發明所謂的突出弧角係指該第一導電型摻雜層21和該兩個第二導電型摻雜層22在與該內凹結構23的轉角連接處部份,其外貌各自形成外表輪廓為弧形平順(smooth)的型態,而非直接轉折的折角(corner)的型態。The two concave structures 23 of this embodiment are respectively located at the first Between the conductive doped layer 21 and the two second conductive type doped layers 22, the first conductive type doped layer 21 and the two second conductive type doped layers 22 are in close proximity to the concave structure 23 and close to The back surface 202 defines a protruding arc angle, wherein the vicinity of the back surface 202 means that the first conductive type doped layer 21 is located near the first surface 203 of the back surface 202. The second conductive type doped layer 22 is located near the second face portion 204 of the back surface 202. Moreover, the so-called protruding arc angle of the present invention means that the first conductive type doped layer 21 and the two second conductive type doped layers 22 are connected to the corners of the concave structure 23, and their appearances are respectively formed. The outline of the outline is an arc-shaped smooth type, rather than the shape of a corner that directly turns.
具體來說,該第一導電型摻雜層21具有兩個分別連接該兩個內凹結構23的第一連接部211,而每一第二導電型摻雜層22分別具有一個連接該兩個內凹結構23的其中一個的第二連接部221,而每一內凹結構23皆具有兩個位於該第一連接部211與該第二連接部221之間的底部231。每一第一連接部211、每一第二連接部221與每一底部231皆呈弧形,並且每一第一連接部211與每一第二連接部221即為本實施例以上所述之突出弧角,而每一底部231皆為向內弧凹的弧角。Specifically, the first conductive type doping layer 21 has two first connecting portions 211 respectively connecting the two concave structures 23, and each of the second conductive type doping layers 22 has one connecting the two. The second connecting portion 221 of one of the concave structures 23, and each of the concave structures 23 has two bottom portions 231 between the first connecting portion 211 and the second connecting portion 221. Each of the first connecting portions 211, each of the second connecting portions 221 and each of the bottom portions 231 are curved, and each of the first connecting portions 211 and each of the second connecting portions 221 is as described above in the embodiment. The arc angle is highlighted, and each bottom 231 is an arc angle that is concave toward the inner arc.
此外,以該兩個第二面部204為基準時,每一內凹結構23的一個位於該兩個底部231之間的底面部232皆較該第一面部203遠離該兩個第二面部204。In addition, when the two second faces 204 are used as a reference, a bottom surface portion 232 of each of the concave structures 23 between the two bottom portions 231 is away from the two second surface portions 204 than the first surface portion 203. .
除此之外,在該基板2的正面201處之內還可設置一第三導電型摻雜層24,其為摻雜濃度大於該基板2 的n+ 型半導體,藉此形成正面電場結構(Front-Side Field,簡稱FSF)以提升載子收集效率及光電轉換效率。而該第三導電型摻雜層24上還可設置一抗反射層25,其材料例如氮化矽(SiNx )等,用於提升光線入射量以及降低載子表面複合速率(Surface Recombination Velocity,簡稱SRV)。但實施上,本發明不以設置該第三導電型摻雜層24與該抗反射層25為必要。In addition, a third conductive type doping layer 24 may be disposed within the front surface 201 of the substrate 2, which is an n + -type semiconductor having a doping concentration greater than that of the substrate 2, thereby forming a front electric field structure ( Front-Side Field (FSF) is used to improve carrier collection efficiency and photoelectric conversion efficiency. The third conductive type doping layer 24 may further be provided with an anti-reflection layer 25, such as tantalum nitride (SiN x ), for increasing the incident light amount and reducing the surface recombination velocity (Surface Recombination Velocity, Referred to as SRV). However, in practice, the present invention is not necessary to provide the third conductive type doped layer 24 and the anti-reflective layer 25.
本實施例的鈍化層3配置於該背面202,並且接觸地位於該第一導電型摻雜層21與該兩個第二導電型摻雜層22上。該鈍化層3的材料可以為氧化物、氮化物或上述材料的組合,具體可為氧化矽(SiOx ),並可用於鈍化、修補該基板2的表面,藉以減少該基板2的表面之懸鍵(Dangling Bond)與缺陷,從而可減少載子陷阱(Trap)並降低載子的表面複合速率,以提升該太陽能電池13的轉換效率。而該鈍化層3具有一個貫穿且位於該背面202的第一面部203上的第一開口31,以及數個貫穿且分別位於該背面202的第二面部204上的第二開口32。The passivation layer 3 of the present embodiment is disposed on the back surface 202 and is in contact with the first conductive type doped layer 21 and the two second conductive type doped layers 22. The material of the passivation layer 3 may be an oxide, a nitride or a combination of the above materials, specifically yttrium oxide (SiO x ), and may be used for passivating and repairing the surface of the substrate 2, thereby reducing the surface suspension of the substrate 2. The Dangling Bond and the defect can reduce the carrier trap and reduce the surface recombination rate of the carrier to improve the conversion efficiency of the solar cell 13. The passivation layer 3 has a first opening 31 extending through the first surface 203 of the back surface 202, and a plurality of second openings 32 extending through the second surface 204 of the back surface 202, respectively.
本實施例的第一電極41配置於該鈍化層3上,且穿過該鈍化層3的第一開口31而接觸該第一導電型摻雜層21。本實施例的該兩個第二電極42分別配置於該鈍化層3上,且分別穿過該數個第二開口32而接觸對應的第二導電型摻雜層22。The first electrode 41 of the present embodiment is disposed on the passivation layer 3 and contacts the first conductive type doped layer 21 through the first opening 31 of the passivation layer 3. The two second electrodes 42 of the present embodiment are respectively disposed on the passivation layer 3 and respectively pass through the plurality of second openings 32 to contact the corresponding second conductive type doping layer 22 .
需要說明的是,本實施例雖然以一個第一導電型摻雜層21、兩個第二導電型摻雜層22及兩個內凹結構23 為例,但實際上在一太陽能電池13中,第二導電型摻雜層22與第一導電型摻雜層21的數量可以為更多個,並且形成p-n-p-n之交錯配置且重複排列,而任一組相鄰的第二導電型摻雜層22與第一導電型摻雜層21之間即形成一個內凹結構23。而且相對應地,該背面202的第一面部203、該鈍化層3的第一開口31以及該第一電極41皆對應第一導電型摻雜層21的位置與數量,而該背面202的第二面部204、該鈍化層3的第二開口32以及該第二電極42皆對應第二導電型摻雜層22的位置與數量。此外,本發明也可以只針對其中一組第二導電型摻雜層22、第一導電型摻雜層21及內凹結構23進行改良。It should be noted that, in this embodiment, a first conductive type doping layer 21, two second conductive type doping layers 22, and two concave structures 23 are used. For example, in fact, in a solar cell 13, the number of the second conductive type doping layer 22 and the first conductive type doping layer 21 may be more, and the pnpn is formed in a staggered configuration and repeatedly arranged. A concave structure 23 is formed between a group of adjacent second conductive type doped layers 22 and the first conductive type doped layer 21. Correspondingly, the first surface 203 of the back surface 202, the first opening 31 of the passivation layer 3, and the first electrode 41 correspond to the position and the number of the first conductive type doping layer 21, and the back surface 202 The second surface 204, the second opening 32 of the passivation layer 3, and the second electrode 42 all correspond to the position and number of the second conductive type doping layer 22. Furthermore, the present invention can also be modified only for one of the second conductive type doped layers 22, the first conductive type doped layer 21, and the concave structure 23.
參閱圖4、5、6、7,本發明太陽能電池的製造方法的較佳實施例,包含以下步驟:Referring to Figures 4, 5, 6, and 7, a preferred embodiment of the method of fabricating a solar cell of the present invention comprises the following steps:
步驟S01:提供該基板2,並對該基板2的正面201與背面202進行拋光。Step S01: The substrate 2 is provided, and the front surface 201 and the back surface 202 of the substrate 2 are polished.
步驟S02:在該基板2的背面202形成一第二導電型摻雜層22’。具體可藉由擴散製程或其他的摻雜方式在該背面202處摻雜三族元素(例如硼、鋁、鎵、銦、鉈),進而在該背面202處之內形成重摻雜的p型半導體。Step S02: A second conductive type doped layer 22' is formed on the back surface 202 of the substrate 2. Specifically, a tri-group element (for example, boron, aluminum, gallium, indium, or antimony) may be doped at the back surface 202 by a diffusion process or other doping method, thereby forming a heavily doped p-type in the back surface 202. semiconductor.
步驟S03:在該第二導電型摻雜層22’上配置一遮罩層800,所述遮罩層800的材料例如氧化矽(SiOx )。具體可使用例如PECVD之真空鍍膜方式形成連續的該遮罩層800,其中,所述的真空鍍膜方式可包含物 理氣相沉積(PVD)、化學氣相沉積(CVD)等方式。Step S03: the second conductivity type doped layer 22 'disposed on a mask layer 800, the mask material layer 800, for example, silicon oxide (SiO x). Specifically, the mask layer 800 may be formed by a vacuum coating method such as PECVD, wherein the vacuum coating method may include physical vapor deposition (PVD), chemical vapor deposition (CVD), or the like.
步驟S04:在該遮罩層800上形成一開口801,並移除該第二導電型摻雜層22’的對應於該開口801處的部位,進而在該基板2的背面202形成彼此具有一高低差的該第一面部203與該兩個第二面部204。Step S04: forming an opening 801 on the mask layer 800, and removing a portion of the second conductive type doped layer 22' corresponding to the opening 801, thereby forming a mutual one on the back surface 202 of the substrate 2. The first face 203 and the two second faces 204 are different in height.
具體而言,本步驟可透過雷射燒蝕方式,使該遮罩層800形成該開口801,接著使用氫氧化鉀(KOH)溶液進行蝕刻,以移除該第二導電型摻雜層22’對應於該開口801處的部位,進而分隔出該兩個分別位於該開口801之相反側的第二導電型摻雜層22。在此同時,該背面202對應該開口801的部位形成向內凹陷的該第一面部203,而該背面202對應該兩個第二導電型摻雜層22的部位則分別形成該兩個第二面部204。Specifically, in this step, the mask layer 800 is formed into the opening 801 by laser ablation, and then etched using a potassium hydroxide (KOH) solution to remove the second conductive type doped layer 22'. Corresponding to the portion at the opening 801, the two second conductive type doping layers 22 respectively located on opposite sides of the opening 801 are separated. At the same time, the portion of the back surface 202 corresponding to the opening 801 forms the first surface portion 203 recessed inwardly, and the portion of the back surface 202 corresponding to the two second conductive type doping layers 22 respectively form the two portions Two faces 204.
步驟S05:透過該開口801在該基板2的背面202形成該第一導電型摻雜層21,每一第二導電型摻雜層22靠近該第一導電型摻雜層21且彼此之間具有一交界處26。具體可藉由擴散製程或其他的摻雜方式在該背面202處摻雜五族元素(例如磷等),進而在該背面202處之內形成重摻雜的n++ 型的該第一導電型摻雜層21。Step S05: forming the first conductive type doping layer 21 on the back surface 202 of the substrate 2 through the opening 801. Each of the second conductive type doping layers 22 is adjacent to the first conductive type doped layer 21 and has a mutual A junction of 26. Specifically, a fifth group element (for example, phosphorus or the like) may be doped at the back surface 202 by a diffusion process or other doping method, thereby forming a heavily doped n ++ type of the first conductive layer in the back surface 202. Type doped layer 21.
步驟S06:移除該遮罩層800。Step S06: The mask layer 800 is removed.
步驟S07:將一蝕刻材料700覆蓋於該第一導電型摻雜層21與該第二導電型摻雜層22之間的該交界處26,並透過該蝕刻材料700蝕刻該交界處26而形成該內凹結構23,使該第一導電型摻雜層21與每一第二導電型摻雜 層22緊鄰該內凹結構23且靠近該背面202之處分別形成所述的突出弧角(也就是第一連接部211與第二連接部221)。在本實施例中,該蝕刻材料700包含磷酸(Phosphoric acid)與己內醯胺(ε-caprolactam)。Step S07: covering an interface 26 between the first conductive type doping layer 21 and the second conductive type doping layer 22 by an etching material 700, and etching the boundary portion 26 through the etching material 700 to form The concave structure 23 is such that the first conductive type doping layer 21 is doped with each second conductivity type The layer 22 is adjacent to the concave structure 23 and adjacent to the back surface 202 to form the protruding arc angles (that is, the first connecting portion 211 and the second connecting portion 221). In the present embodiment, the etching material 700 comprises phosphoric acid and ε-caprolactam.
進一步說明的是,本實施例可使用噴墨印刷(Inkjet Printing)或網版印刷(Screen Printing)等方式,將該蝕刻材料700噴塗或塗佈於該背面202上,使蝕刻材料700覆蓋於該第一導電型摻雜層21與該第二導電型摻雜層22之間的該交界處26。Further, in this embodiment, the etching material 700 may be sprayed or coated on the back surface 202 by using inkjet printing (Inkjet Printing) or screen printing, and the etching material 700 may be covered thereon. The interface 26 between the first conductive type doped layer 21 and the second conductive type doped layer 22.
接著提供一300~550℃的溫度來加熱該蝕刻材料700,使該蝕刻材料700等向性蝕刻該交界處26以形成該內凹結構23,同時使該第一導電型摻雜層21分別形成連接該兩個內凹結構23且呈弧形的第一連接部211,而每一第二導電型摻雜層22分別形成連接該兩個內凹結構23且呈弧形的第二連接部221。每一內凹結構23皆形成兩個位於該第一連接部211與該第二連接部221之間且呈弧形的底部231,並且以該兩個第二面部204為基準時,每一內凹結構23的位於該兩個底部231之間的底面部232皆較該第一面部203遠離該兩個第二面部204。Then, a temperature of 300 to 550 ° C is provided to heat the etching material 700, and the etching material 700 is isotropically etched to the interface 26 to form the concave structure 23, and the first conductive type doping layer 21 is separately formed. a first connecting portion 211 connecting the two concave structures 23 and having an arc shape, and each of the second conductive type doping layers 22 respectively forming a second connecting portion 221 connecting the two concave structures 23 and having an arc shape . Each of the concave structures 23 forms two bottom portions 231 between the first connecting portion 211 and the second connecting portion 221 and is curved, and each of the two second surface portions 204 is used as a reference. The bottom surface portion 232 of the concave structure 23 between the two bottom portions 231 is away from the two second surface portions 204 than the first surface portion 203.
其中,當溫度低於300℃時,該蝕刻材料700的蝕刻反應效率不佳,因而無法得到理想的內凹結構23,又當溫度高於550℃時,同樣也會造成該蝕刻材料700的蝕刻反應效率不佳,進而導致蝕刻不足情形。較佳地,前述溫度為350~400℃。最後,清洗該基板2以除去該蝕刻 材料700。Wherein, when the temperature is lower than 300 ° C, the etching reaction efficiency of the etching material 700 is not good, so that the ideal concave structure 23 cannot be obtained, and when the temperature is higher than 550 ° C, the etching of the etching material 700 is also caused. The reaction efficiency is poor, which in turn leads to an underetching condition. Preferably, the aforementioned temperature is 350 to 400 °C. Finally, the substrate 2 is cleaned to remove the etching Material 700.
步驟S08:在該基板2的背面202且位於該第一導電型摻雜層21與該兩個第二導電型摻雜層22上形成該鈍化層3。具體可使用例如PECVD之真空鍍膜方式形成連續的該鈍化層3,並且該鈍化層3順應該背面202的形貌成形,也就是該鈍化層3對應每一第二導電型摻雜層22的第二連接部221的部位也呈向外弧凸的弧形。Step S08: forming the passivation layer 3 on the back surface 202 of the substrate 2 and on the first conductive type doping layer 21 and the two second conductive type doping layers 22. Specifically, the passivation layer 3 may be formed by a vacuum plating method such as PECVD, and the passivation layer 3 is formed in conformity with the topography of the back surface 202, that is, the passivation layer 3 corresponds to each of the second conductive type doping layers 22. The portion of the two connecting portions 221 is also curved in an outward arc convex shape.
步驟S09:先將該基板2的正面201進行粗糙化處理,接著在該正面201處之內形成該第三導電型摻雜層24,再於該第三導電型摻雜層24上形成該抗反射層25。具體而言,本實施例先透過蝕刻方式對該正面201進行粗糙化處理,使該正面201具有凹凸不平的結構以提高入光量。接著利用擴散製程在該正面201進行摻雜,進而在該正面201處之內形成摻雜濃度大於該基板2的摻雜濃度的n+ 型半導體,即可得到該第三導電型摻雜層24。最後利用例如PECVD之真空鍍膜方式形成連續的該抗反射層25。然而在實施上,該製造方法不以包含該步驟S09為必要。在實施上,步驟S09當然也可於該第一導電型摻雜層21與該兩個第二導電型摻雜層22形成之前進行。Step S09: roughening the front surface 201 of the substrate 2, then forming the third conductive type doping layer 24 in the front surface 201, and forming the anti-resistance on the third conductive type doping layer 24. Reflective layer 25. Specifically, in the present embodiment, the front surface 201 is roughened by etching, so that the front surface 201 has an uneven structure to increase the amount of light incident. Then, doping is performed on the front surface 201 by using a diffusion process, and an n + -type semiconductor having a doping concentration greater than a doping concentration of the substrate 2 is formed in the front surface 201 to obtain the third conductive type doped layer 24 . . Finally, the continuous anti-reflection layer 25 is formed by a vacuum coating method such as PECVD. However, in practice, the manufacturing method is not necessary to include the step S09. In practice, step S09 can of course be performed before the formation of the first conductive type doped layer 21 and the two second conductive type doped layers 22.
步驟S10:在該鈍化層3上形成對應該第一導電型摻雜層21的該第一開口31,以及分別對應該兩個第二導電型摻雜層22的該數個第二開口32。具體可使用乾蝕刻例如雷射蝕刻、溼蝕刻或使用蝕刻膠等方式,於該鈍化層3上形成該第一開口31與該數個第二開口32。Step S10: forming the first opening 31 corresponding to the first conductive type doping layer 21 on the passivation layer 3, and the plurality of second openings 32 respectively corresponding to the two second conductive type doping layers 22. Specifically, the first opening 31 and the plurality of second openings 32 may be formed on the passivation layer 3 by dry etching, such as laser etching, wet etching, or using an etchant.
步驟S11:形成配置於該鈍化層3上,且穿過該鈍化層3而接觸該第一導電型摻雜層21的該第一電極41。具體可使用網印(Screen Printing)、噴印(Inkjet Printing)或真空鍍膜方式,於該鈍化層3上形成該第一電極41,使該第一電極41的局部部位填充於該鈍化層3的第一開口31內而接觸該第一導電型摻雜層21。Step S11: forming the first electrode 41 disposed on the passivation layer 3 and contacting the first conductive type doped layer 21 through the passivation layer 3. Specifically, the first electrode 41 is formed on the passivation layer 3 by using Screen Printing, Inkjet Printing or vacuum coating, and a part of the first electrode 41 is filled in the passivation layer 3 . The first opening 31 is in contact with the first conductive type doping layer 21 .
步驟S12:形成配置於該鈍化層3上,且穿過該鈍化層3而分別接觸該兩個第二導電型摻雜層22的該兩個第二電極42。實施上,可使用與步驟S11相同的製作方式,於該鈍化層3上形成該兩個第二電極42,使該兩個第二電極42的局部部位填充於該鈍化層3的第二開口32內而分別接觸該兩個第二導電型摻雜層22。Step S12: forming the two second electrodes 42 disposed on the passivation layer 3 and passing through the passivation layer 3 to respectively contact the two second conductive type doping layers 22. In practice, the two second electrodes 42 may be formed on the passivation layer 3 in the same manner as in the step S11, so that a partial portion of the two second electrodes 42 is filled in the second opening 32 of the passivation layer 3. The two second conductive type doping layers 22 are respectively in contact with each other.
需要說明的是,本發明不須限定該第一電極41與該兩個第二電極42的製作順序,而且實際上兩者可以透過一次的網印、噴印或鍍膜方式同時製作完成。當然,若該第一電極41與該兩個第二電極42所採用之材料不同時,即可分開製作之。It should be noted that the present invention does not need to limit the order in which the first electrode 41 and the two second electrodes 42 are formed, and in fact, both can be simultaneously fabricated by one-time screen printing, printing or coating. Of course, if the first electrode 41 and the two second electrodes 42 are made of different materials, they can be separately fabricated.
由以上說明可知,本發明在步驟S07中,只要將該蝕刻材料700覆蓋於該第一導電型摻雜層21與該第二導電型摻雜層22之間的該交界處26,就可透過該蝕刻材料700蝕刻該交界處26而形成該內凹結構23,之後就能在該背面202上形成該鈍化層3等進行後續工序。前述創新製法,可省略以往太陽能電池的製法中以雷射與氫氧化鉀溶液進行蝕刻開孔等工序,故可節省材料而降低製造成本, 又能節省時間而增進生產效率。除此之外,本發明的步驟S07不使用設備成本較高的雷射方式來開孔,而使用價格便宜的該蝕刻材料700來開孔,因而還可大幅降低製造成本。As can be seen from the above description, in the step S07, the etching material 700 covers the interface 26 between the first conductive type doping layer 21 and the second conductive type doping layer 22, and is transparent. The etching material 700 etches the boundary portion 26 to form the recessed structure 23, and then the passivation layer 3 or the like is formed on the back surface 202 for subsequent processes. According to the above-described innovative manufacturing method, the steps of etching and opening a hole by a laser and a potassium hydroxide solution in the conventional solar cell manufacturing method can be omitted, thereby saving materials and reducing manufacturing costs. It also saves time and increases production efficiency. In addition, step S07 of the present invention does not use a laser device with a relatively high equipment cost to open the hole, but uses the etching material 700 which is inexpensive to open the hole, thereby greatly reducing the manufacturing cost.
值得一提的是,本發明透過該蝕刻材料700具有等向性蝕刻的特性,將該第一導電型摻雜層21與每一第二導電型摻雜層22緊鄰該內凹結構23且靠近該背面202之處改良為突出弧角(即第一連接部211與第二連接部221),也就是該第一導電型摻雜層21的第一連接部211與每一第二導電型摻雜層22的第二連接部221皆呈弧形,可避免該太陽能電池13在運作時發生電荷集中與電場集中的現象,以克服以往太陽能電池容易因電荷累積量過高而損壞的問題,並提升本實施例的太陽能電池13的使用壽命。It is worth mentioning that the present invention has an isotropic etching property through the etching material 700, and the first conductive type doping layer 21 and each of the second conductive type doping layers 22 are adjacent to the concave structure 23 and close to each other. The back surface 202 is modified to have a protruding arc angle (ie, the first connecting portion 211 and the second connecting portion 221), that is, the first connecting portion 211 of the first conductive type doping layer 21 is mixed with each second conductive type. The second connecting portions 221 of the hybrid layer 22 are all curved, which can avoid the phenomenon of charge concentration and electric field concentration during the operation of the solar cell 13 to overcome the problem that the solar cell is easily damaged due to excessive charge accumulation. The service life of the solar cell 13 of the present embodiment is improved.
此外,透過前述創新結構與創新製法的設計,可使後續披覆的該鈍化層3對應每一第一連接部211與每一第二連接部221的厚度均勻,並提升該鈍化層3的品質與鈍化效果,從而降低載子陷阱與載子的表面複合速率,所以本實施例的太陽能電池13的光電轉換效率可進一步得到提升,故確實能達成本發明之目的。In addition, through the design of the foregoing innovative structure and the innovative manufacturing method, the passivation layer 3 of the subsequent cladding can be made uniform for the thickness of each of the first connecting portions 211 and each of the second connecting portions 221, and the quality of the passivation layer 3 can be improved. With the passivation effect, thereby reducing the surface recombination rate of the carrier trap and the carrier, the photoelectric conversion efficiency of the solar cell 13 of the present embodiment can be further improved, so that the object of the present invention can be achieved.
惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the patent application scope and patent specification content of the present invention, All remain within the scope of the invention patent.
13‧‧‧太陽能電池13‧‧‧Solar battery
2‧‧‧基板2‧‧‧Substrate
201‧‧‧正面201‧‧‧ positive
202‧‧‧背面202‧‧‧Back
203‧‧‧第一面部203‧‧‧ first face
204‧‧‧第二面部204‧‧‧ second face
21‧‧‧第一導電型摻雜層21‧‧‧First Conductive Doped Layer
211‧‧‧第一連接部211‧‧‧First connection
22‧‧‧第二導電型摻雜層22‧‧‧Second Conductive Doped Layer
221‧‧‧第二連接部221‧‧‧Second connection
23‧‧‧內凹結構23‧‧‧ concave structure
231‧‧‧底部231‧‧‧ bottom
232‧‧‧底面部232‧‧‧ bottom part
24‧‧‧第三導電型摻雜層24‧‧‧ Third Conductive Doped Layer
25‧‧‧抗反射層25‧‧‧Anti-reflective layer
3‧‧‧鈍化層3‧‧‧ Passivation layer
31‧‧‧第一開口31‧‧‧ first opening
32‧‧‧第二開口32‧‧‧second opening
41‧‧‧第一電極41‧‧‧First electrode
42‧‧‧第二電極42‧‧‧second electrode
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