TWI490889B - Method for manufacturing alloy chip resistor - Google Patents

Method for manufacturing alloy chip resistor Download PDF

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TWI490889B
TWI490889B TW102130508A TW102130508A TWI490889B TW I490889 B TWI490889 B TW I490889B TW 102130508 A TW102130508 A TW 102130508A TW 102130508 A TW102130508 A TW 102130508A TW I490889 B TWI490889 B TW I490889B
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alloy
semi
resistor
resistance
finished
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TW102130508A
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TW201508780A (en
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Hung Ju Cheng
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Hung Ju Cheng
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Description

合金晶片電阻器製造方法 Alloy wafer resistor manufacturing method

本發明係有關於一種合金晶片電阻器製造方法,尤其是指一種透過以雷射切割或沖壓搭配雷射切割的方式來生產製造合金晶片電阻器,以提高合金晶片電阻器的良率。 The invention relates to a method for manufacturing an alloy wafer resistor, in particular to a method for manufacturing an alloy wafer resistor by laser cutting or stamping with laser cutting to improve the yield of the alloy wafer resistor.

按,由於合金晶片電阻器在較大功率及超低電阻值時具有穩定特性,因此,常被應用於高精度的電流檢知器,也是目前電阻器選用的趨勢。又,合金晶片電阻器雖然具有上述優點,但其卻有阻值精確度較難掌控的缺點,因此,在該合金晶片電阻器之製程中通常會有阻值修整微調之步驟,以提高該合金晶片電阻器之阻值的精確度。 According to the alloy chip resistors, which have stable characteristics at higher power and ultra-low resistance values, they are often used in high-precision current detectors, which is also the trend of resistors. Moreover, although the alloy wafer resistor has the above advantages, it has the disadvantage that the resistance accuracy is difficult to control. Therefore, in the process of the alloy chip resistor, there is usually a step of trimming and trimming to improve the alloy. The accuracy of the resistance of the chip resistor.

合金晶片電阻器之阻值的形成主要是依據下列公式所得:,其中: R,代表電阻值,市場需求容差主要以±1%為主。 The formation of the resistance of the alloy chip resistor is mainly based on the following formula: , where: R, representing the resistance value, the market demand tolerance is mainly ±1%.

l,代表導體長度,以沖壓/蝕刻方式在本體產生導體路徑,藉由導體路徑的差異產生出不同電阻值之產品。 l , represents the length of the conductor, and creates a conductor path in the body by stamping/etching, and produces a product with different resistance values by the difference of the conductor paths.

A,代表截面積,因合金板材係以輾壓方式生產,板材本身即有加工公差,一般要求公差在±0.01~±0.03mm以內。 A, representing the cross-sectional area, because the alloy sheet is produced by rolling, the sheet itself has machining tolerances, and the general tolerance is within ±0.01~±0.03mm.

ρ,代表電阻係數,每批合金板原材之電阻係數因冶煉的差異,都會有些微變化。 ρ, which represents the resistivity, the resistivity of each batch of alloy plate material will vary slightly due to the difference in smelting.

由上述之公式及說明可知,合金板材的電阻係數、截面積及導體路徑…等因素在生產過程中均為變數,在各項變數交叉變化影響之下形成成品電阻值分佈過大無法集中或偏離目標值,加上市場需求主要是以容差±1%的合金晶片電阻器產品為主力,過度分散的電阻值就無法滿足需求,也降低了產品的良品率。於是如何透過製程管理及加工技術的控制來提高電阻值的集中度及符合目標值,成了業界致力研究的課題。 According to the above formula and description, the resistivity, cross-sectional area and conductor path of the alloy sheet are all variable in the production process. Under the influence of the cross-variation of various variables, the distribution of the resistance value of the finished product is too large to concentrate or deviate from the target. The value, plus the market demand is mainly based on the tolerance of ±1% of the alloy chip resistor products, the excessively dispersed resistance value can not meet the demand, but also reduce the product yield. Therefore, how to improve the concentration of resistance values and meet the target value through the control of process management and processing technology has become a topic of research in the industry.

目前合金晶片電阻器生產模式大致可分為二種模式: At present, the production mode of alloy chip resistors can be roughly divided into two modes:

1、未修阻(製程短/良率低): 1, no repair resistance (short process / low yield):

1.1直接以沖壓/蝕刻製程決定電阻值,不再進行任何修阻加工。而沖壓/蝕刻條件為經多次試驗,驗證得到較佳的製程條件(導體路徑),此一製程方式電性平均製程良率約為40~60%。 1.1 The resistance value is determined directly by the stamping/etching process, and no repair processing is performed any more. The stamping/etching conditions are verified by multiple tests to obtain better process conditions (conductor paths). The electrical average process yield of this process is about 40-60%.

1.2未修阻製程也可獲得製程短/良率高的方式,電阻公式:R ,其中ρ電阻系數及A截面積(厚度)均為合金原材生產過程中即已固定,合金電阻的生產者已無法對這兩個變數進行任何的調整。電阻生產者唯有以其製程能力透過高精度/高穩定度之加工方式,控制l導體長度,適時的調整導體長度,以配合ρ及A的變化,進而使R值趨於一致,此一方案也是本發明致力達成的目標。 1.2 Unrepaired process can also obtain a short process / high yield mode, resistance formula: R Among them, the ρ resistivity and the A cross-sectional area (thickness) are fixed in the production process of the alloy raw materials, and the producer of the alloy resistance has been unable to make any adjustment to these two variables. Only resistance producer through its ability to process high-precision processing mode / high degree of stability, control conductor length l, timely adjustment of the length of the conductor, and ρ A changes to fit, thereby enabling the convergence value R, this program It is also the goal that the present invention is committed to.

2、修阻(製程長/良率高):合金板材在沖壓時設定初R值為目標值的-10%左右,再以修阻製程分段或單顆以研磨/切割/切削…等方式進行電阻值修正(變更截面積,即令截面積變小,以使電阻值上升),令經修阻製程後之合金晶片電阻器之電阻值符合需求。此一製程之電性良率約可提昇至80%以上。然而,此一修阻製程,必須事先增加如斷單邊、群體電阻值量測、分類…等數道製程,導致延長製程時程及增加設備、人力、耗材…等的支出。 2, repair resistance (long process / high yield): alloy sheet is set at the initial R value of about -10% of the target value, and then repaired process segmentation or single grinding / cutting / cutting ... Correction of the resistance value (changing the cross-sectional area, that is, making the cross-sectional area smaller, so that the resistance value is increased), so that the resistance value of the alloy wafer resistor after the repair process is satisfactory. The electrical yield of this process can be increased to more than 80%. However, in this repair process, it is necessary to increase the number of processes such as breaking unilateral, group resistance measurement, classification, etc. in advance, resulting in prolonged process time and increased expenditure on equipment, manpower, consumables, and the like.

今,本發明人即是鑑於習知技術之缺失,故而研發提供一種合金晶片電阻器之製造方法,以使合金晶片電阻器在阻值精確度、產品良率方面,能夠符合產業的需求。 Nowadays, the present inventors have developed a method for manufacturing an alloy wafer resistor in view of the lack of the prior art, so that the alloy wafer resistor can meet the industrial requirements in terms of resistance accuracy and product yield.

本發明之主要目的,係提供一種合金晶片電阻器製造方法,主要是在生產過程中適時的調整導體路徑長度,以因應相關變數的 變化,達到提高電阻值集中度與良率之目的。 The main object of the present invention is to provide a method for manufacturing an alloy wafer resistor, which is mainly for adjusting the length of the conductor path in a timely manner in the production process, in order to cope with the relevant variables. Change, to achieve the purpose of increasing the concentration and yield of resistance values.

上述本發明之主要目的與功效,是由以下之具體技術手段所達成:一種合金晶片電阻器製造方法,係包括以下步驟:(a)依據所需之特性,選用一合金板之材料;(b)依需求阻值預先設計一符合該需求阻值之導體路徑的切割圖型,再以雷射切割製程於該合金板上依據該切割圖形切割出複數個合金晶片電阻器個體半成品,令該合金晶片電阻器個體半成品的中段為電阻本體區域,該合金晶片電阻器個體半成品的兩端為外露導體區域及連結相鄰之該合金晶片電阻器個體半成品的連結區域,以在合金板上形成連續之合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條;(c)於該合金晶片電阻器個體半成品的本體區域包覆有絕緣體;(d)在合金晶片電阻器兩端外露導體區域,以電鍍方式鍍上銅金屬,以形成導電銅端電極;(e)再以模具將原合金晶片電阻器矩陣或合金電阻條進行沖壓或切割,以形成複數個合金晶片電阻器個體〔請參看第三圖〕;(f)最後再於各個合金晶片電阻器個體的導電銅端極鍍上導電金屬形成電極,藉此即成為合金晶片電阻器成品。 The above main object and effect of the present invention are achieved by the following specific technical means: a method for manufacturing an alloy wafer resistor, comprising the steps of: (a) selecting an alloy plate material according to a desired characteristic; Cutting a pattern of a conductor path conforming to the required resistance value according to the required resistance value, and then cutting a plurality of individual semi-finished products of the alloy chip resistor according to the cutting pattern by using a laser cutting process to make the alloy The middle section of the individual semi-finished product of the chip resistor is a resistive body region, and the two ends of the individual semi-finished products of the alloy chip resistor are an exposed conductor region and a joint region connecting the adjacent semi-finished products of the adjacent alloy chip resistors to form a continuous layer on the alloy plate. Alloy wafer resistor semi-finished matrix or alloy wafer resistor semi-finished strip; (c) the body region of the individual semi-finished product of the alloy wafer resistor is covered with an insulator; (d) exposed conductor region at both ends of the alloy wafer resistor, by electroplating Copper metal is plated to form a conductive copper terminal electrode; (e) the original alloy wafer resistor matrix or alloy is further moldd by a mold The bar is stamped or cut to form a plurality of individual alloy die resistors (see the third figure); (f) finally, the conductive copper end of each individual alloy die resistor is plated with a conductive metal to form an electrode. That is, it becomes a finished product of an alloy wafer resistor.

如上所述之合金晶片電阻器製造方法的較佳實施例中,該合金板係選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵鉻鋁合金或錳銅合金其中之一。 In a preferred embodiment of the method of fabricating an alloy wafer resistor as described above, the alloy plate is selected from one of a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, an iron-chromium-aluminum alloy, or a manganese-copper alloy.

如上所述之合金晶片電阻器製造方法的較佳實施例中,在步驟(b)之前,於待切合金板上至少取樣一樣品,並先量測該樣品之電阻值,依該樣品量測值以程式控制調整雷射切割形狀或切割線條的長短。 In a preferred embodiment of the method for manufacturing an alloy wafer resistor as described above, at least one sample is sampled on the alloy plate to be cut before the step (b), and the resistance value of the sample is first measured, and the sample is measured according to the sample. The value is programmed to adjust the length of the laser cut shape or cut line.

如上所述之合金晶片電阻器製造方法的較佳實施例中,該導電金屬為選自鎳、錫或銀其中之一或二種以上並採層疊設置。 In a preferred embodiment of the method for manufacturing an alloy wafer resistor as described above, the conductive metal is one or more selected from the group consisting of nickel, tin or silver and laminated.

如上所述之合金晶片電阻器製造方法的較佳實施例中,於該合金晶片電阻器個體半成品的本體區域所包覆之絕緣體係採射出成型、塗裝、曝光顯影其中之一的方式形成。 In a preferred embodiment of the method for fabricating an alloy wafer resistor as described above, the insulating system coated in the body region of the individual semi-finished product of the alloy wafer resistor is formed by one of molding, painting, exposure and development.

上述本發明之主要目的與功效,亦可由以下之具體技術手段所達成:一種合金晶片電阻器製造方法,係包括以下步驟:(a)依據所需之特性,選用一合金板之材料;(b)依需求阻值預先設計一切割圖型,先以模具沖壓出合金晶片電阻器之外型,以於該合金板上得到複數個合金晶片電阻器個體半成品,令該合金晶片電阻器個體半成品的中段為電阻本體區域,該合金晶片電阻器個體半成品的兩端為外露導體區域及連結相 鄰之該合金晶片電阻器個體半成品的連結區域,以在合金板上形成連續之合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條;(c)在該合金晶片電阻器個體半成品的中段電阻本體區域,再以雷射切割製程切割導體路徑;(d)於該合金晶片電阻器個體半成品的本體區域包覆有絕緣體;(e)在合金晶片電阻器兩端外露導體區域,以電鍍方式鍍上銅金屬,以形成導電銅端電極;(f)以模具將原合金晶片電阻器矩陣或合金晶片電阻器條進行沖壓或切割形成合金晶片電阻器個體;(g)於合金晶片電阻器個體的導電銅端極,鍍上導電金屬以形成合金晶片電阻器之電極,藉此完成合金晶片電阻器的成品製作流程。 The above-mentioned main object and effect of the present invention can also be achieved by the following specific technical means: a method for manufacturing an alloy wafer resistor, comprising the steps of: (a) selecting an alloy plate material according to a desired characteristic; According to the required resistance value, a cutting pattern is pre-designed, and the outer shape of the alloy wafer resistor is first punched out by the mold, so that a plurality of individual semi-finished products of the alloy chip resistor are obtained on the alloy plate, so that the alloy chip resistor is an individual semi-finished product. The middle section is the resistive body region, and the ends of the individual semi-finished products of the alloy chip resistor are exposed conductor regions and connecting phases a joining region of the individual semi-finished product of the alloy wafer resistor to form a continuous alloy wafer resistor semi-finished matrix or alloy chip resistor semi-finished strip on the alloy plate; (c) a middle-resistance body of the individual semi-finished product of the alloy chip resistor a region, wherein the conductor path is cut by a laser cutting process; (d) an insulator is coated on the body region of the individual semi-finished product of the alloy chip resistor; (e) the exposed conductor region is exposed at both ends of the alloy wafer resistor, and is plated by electroplating Copper metal to form a conductive copper terminal electrode; (f) stamping or cutting the original alloy wafer resistor matrix or alloy wafer resistor strip in a mold to form an alloy wafer resistor individual; (g) Conducting an individual of the alloy wafer resistor individual The copper terminal is plated with a conductive metal to form an electrode of the alloy wafer resistor, thereby completing the finished product fabrication process of the alloy wafer resistor.

如上所述之合金電阻製造方法的較佳實施例中,該合金板係選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵鉻鋁合金或錳銅合金其中之一。 In a preferred embodiment of the method of manufacturing an alloy resistor as described above, the alloy sheet is selected from one of a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, an iron-chromium-aluminum alloy, or a manganese-copper alloy.

如上所述之合金電阻製造方法的較佳實施例中,該導電金屬選自銅、鎳、錫、銀其中之一或二者以上並採層疊設置。 In a preferred embodiment of the method of manufacturing an alloy resistor as described above, the conductive metal is selected from one or more of copper, nickel, tin, and silver and is laminated.

如上所述之合金電阻製造方法的較佳實施例中,在步驟(b)之前,於待切合金板上至少取樣一樣品,並先量測該樣品之電阻 值,依該樣品量測值以程式控制調整雷射切割形狀或切割線條的長短。 In a preferred embodiment of the alloy resistance manufacturing method as described above, at least one sample is sampled on the alloy plate to be cut before the step (b), and the resistance of the sample is first measured. The value is adjusted according to the sample measurement to adjust the length of the laser cutting shape or the cutting line.

(1)‧‧‧合金板 (1)‧‧‧ alloy plate

(2)‧‧‧合金晶片電阻器個體半成品 (2) ‧‧‧ alloy wafer resistors individual semi-finished products

(21)‧‧‧電阻本體區域 (21)‧‧‧Resistive body area

(22)‧‧‧外露導體區域 (22) ‧‧‧Exposed conductor area

(23)‧‧‧連結區域 (23)‧‧‧ Linked area

(L)‧‧‧導體路徑 (L)‧‧‧Conductor path

(A)‧‧‧合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條 (A)‧‧‧ alloy wafer resistor semi-finished matrix or alloy wafer resistor semi-finished strip

(B)‧‧‧合金晶片電阻器 (B)‧‧‧ alloy wafer resistors

第一圖:本發明其一較佳實施例之合金晶片電阻器製造方法的步驟流程圖 First FIG.: Flow chart of steps of a method for manufacturing an alloy wafer resistor according to a preferred embodiment of the present invention

第二圖:本發明其一較佳實施例於實施步驟(b)後之示意圖 Second Figure: Schematic diagram of a preferred embodiment of the present invention after performing step (b)

第三圖:本發明其一較佳實施例於實施步驟(f)後之示意圖 Third Figure: Schematic diagram of a preferred embodiment of the present invention after performing step (f)

第四圖:本發明其二較佳實施例之合金晶片電阻器製造方法的步驟流程圖 Fourth: Flow chart of steps of a method for manufacturing an alloy wafer resistor according to a second preferred embodiment of the present invention

第五圖:本發明其二較佳實施例於實施步驟(b)後之示意圖 Figure 5 is a schematic view of the second preferred embodiment of the present invention after the implementation of step (b)

第六圖:本發明其二較佳實施例於實施步驟(c)後之示意圖 Figure 6 is a schematic view of the second preferred embodiment of the present invention after performing step (c)

第七圖:本發明其二較佳實施例於實施步驟(g)後之示意圖 Figure 7 is a schematic view of the second preferred embodiment of the present invention after performing step (g)

為令本發明所運用之技術內容、發明目的及其達成之功效有 更完整且清楚的揭露,茲於下詳細說明之,並請一併參閱所揭之圖式及圖號:請參看第一圖所示,其係本發明之其一較佳實施例的步驟流程圖。 In order to make the technical content, the purpose of the invention and the effects achieved by the invention have A more complete and clear disclosure will be described in detail below, and please refer to the drawings and drawings of the drawings: please refer to the first figure, which is a flow of steps of a preferred embodiment of the present invention. Figure.

本發明其一較佳實施例之合金電阻製造方法,係包括以下步驟:(a)依據所需之特性,選用一選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵鉻鋁合金或錳銅合金其中之一的合金板(1);(b)依需求阻值預先設計一符合該需求阻值之導體路徑的切割圖形,再以雷射切割製程於該合金板上依據該切割圖形切割出複數個合金晶片電阻器個體半成品(2)〔請一併參看第二圖〕,令該合金晶片電阻器個體半成品(2)的中段為電阻本體區域(21),該合金晶片電阻器個體半成品(2)的兩端為外露導體區域(22)及連結相鄰之該合金晶片電阻器個體半成品(2)的連結區域(23),以在合金板(1)上形成連續之合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條(A);(c)於該合金晶片電阻器個體半成品(2)的電阻本體區域(21)處以射出成型、塗裝或曝光顯影…等方式形成一包覆之絕緣體;(d)在合金晶片電阻器個體半成品(2)兩端外露導體區 域(22),以電鍍方式鍍上銅金屬,以形成合金晶片電阻器(B)之導電銅端電極;(e)以模具將原合金晶片電阻器矩陣或合金晶片電阻器條進行沖壓或切割,以形成複數個合金晶片電阻器個體;(f)在合金晶片電阻器個體兩端之導電銅端電極,以電鍍方式鍍上如鎳、錫或銀…等導電金屬,以形成複數個合金晶片電阻器(B)成品〔請一併參看第三圖〕。 The alloy resistance manufacturing method of a preferred embodiment of the present invention comprises the following steps: (a) selecting a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, an iron-chromium-aluminum alloy or An alloy plate of one of the manganese-copper alloys (1); (b) a cutting pattern of a conductor path conforming to the required resistance value is pre-designed according to the required resistance value, and then the laser cutting process is performed on the alloy plate according to the cutting pattern Cutting out a plurality of individual semi-finished products of alloy die resistors (2) (please refer to the second figure together), so that the middle section of the individual semi-finished product (2) of the alloy chip resistor is a resistive body region (21), the alloy chip resistor individual The two ends of the semi-finished product (2) are an exposed conductor region (22) and a joint region (23) connecting the adjacent semi-finished products (2) of the alloy chip resistor to form a continuous alloy chip resistor on the alloy plate (1). a semi-finished product matrix or an alloy wafer resistor semi-finished product strip (A); (c) a package formed by injection molding, painting or exposure development, etc. at the resistive body region (21) of the individual semi-finished product (2) of the alloy wafer resistor Overlying insulator; (d) in alloy crystal Piece resistor individual semi-finished product (2) exposed conductor area at both ends Field (22), electroplated with copper metal to form a conductive copper terminal electrode of the alloy wafer resistor (B); (e) stamping or cutting the original alloy wafer resistor matrix or alloy wafer resistor strip with a mold To form a plurality of alloy die resistor individual; (f) a conductive copper terminal electrode at each end of the alloy chip resistor, electroplated with a conductive metal such as nickel, tin or silver to form a plurality of alloy wafers Resistors (B) finished products (please refer to the third figure together).

除此之外,可在步驟(b)大量切割前,於待切合金板上至少取樣一樣品,並先量測該樣品之電阻值,依該樣品量測值以程式控制/調整雷射切割形狀或切割線條的長短,使成品的阻值更接近預設值。其中,若該樣品之電阻值低於目標阻值,則延長切割線條,使導體路徑(L)變長,進而提升電阻值,反之,則縮短導體路徑(L)使得電阻值得以下降。 In addition, at least one sample may be sampled on the alloy plate to be cut before mass cutting in step (b), and the resistance value of the sample may be measured first, and the laser cutting may be controlled/adjusted according to the sample measurement value. The length of the shape or cutting line makes the resistance of the finished product closer to the preset value. Wherein, if the resistance value of the sample is lower than the target resistance value, the cutting line is extended, the conductor path (L) is lengthened, and the resistance value is increased, and conversely, the conductor path (L) is shortened so that the resistance value is lowered.

請參看第二圖所示,其係本發明之其二較佳實施例的步驟流程圖。 Please refer to the second figure, which is a flow chart of the steps of the second preferred embodiment of the present invention.

本發明其二較佳實施例之合金電阻製造方法,係包括以下步驟:(a)依據所需之特性,選用一選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵鉻鋁合金或錳銅合金其中之一的合金板(1)之材料;(b)依需求阻值預先設計一符合該需求阻值之導體路徑的 切割圖型,先以模具沖壓出電阻產品之外型〔請一併參看第五圖〕,以於該合金板(1)上得到複數個合金晶片電阻器個體半成品(2),令該合金晶片電阻器個體半成品(2)的中段為電阻本體區域(21),該合金晶片電阻器個體半成品(2)的兩端為外露導體區域(22)及連結相鄰之該合金晶片電阻器個體半成品(2)的連結區域(23),以在合金板(1)上形成連續之合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條(A);(c)於該合金晶片電阻器個體半成品(2)中段的電阻本體區域(21)上,依據該切割圖形以雷射切割製程切割至少一符合該需求阻值之導體路徑(L)〔請一併參看第六圖〕;(d)於該合金晶片電阻器個體半成品(2)的電阻本體區域(21)處以射出成型、塗裝或曝光顯影…等方式形成一包覆之絕緣體;(e)在合金晶片電阻器個體半成品(2)兩端外露導體區域(22),以電鍍方式鍍上銅金屬,以形成合金晶片電阻器(B)之導電銅端電極;(f)以模具將原合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條(A)進行沖壓或切割,以形成複數個合金晶片電阻器(B)個體;(g)在合金晶片電阻器個體兩端之導電銅端電極,以電鍍方式鍍上如鎳、錫或銀…等導電金屬,以形成複數個合金晶片電阻 器(B)成品〔請一併參看第七圖〕。 The alloy resistance manufacturing method of the second preferred embodiment of the present invention comprises the following steps: (a) selecting a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, an iron-chromium-alloy or a material of the alloy plate (1) of one of the manganese-copper alloys; (b) a pre-designed conductor path conforming to the required resistance value according to the required resistance value To cut the pattern, first stamp out the shape of the resistor product (please refer to the fifth figure together) to obtain a plurality of individual semi-finished products of the alloy chip resistor (2) on the alloy plate (1), so that the alloy wafer The middle section of the resistor individual semi-finished product (2) is a resistive body region (21), and the two ends of the individual semi-finished product (2) of the alloy wafer resistor are an exposed conductor region (22) and an adjacent semi-finished product of the adjacent alloy die resistor ( 2) a joining region (23) for forming a continuous alloy wafer resistor semi-finished matrix or alloy wafer resistor semi-finished strip (A) on the alloy sheet (1); (c) an individual semi-finished product of the alloy wafer resistor (2) a resistive body region (21) of the middle section, according to the cutting pattern, cutting at least one conductor path (L) conforming to the required resistance value by a laser cutting process (please refer to the sixth figure); (d) the alloy Forming a coated insulator by means of injection molding, painting or exposure development, etc. in the resistive body region (21) of the individual semi-finished product of the wafer resistor; (e) exposing at both ends of the individual semi-finished product (2) of the alloy wafer resistor Conductor area (22), plated with copper gold To form a conductive copper terminal electrode of the alloy wafer resistor (B); (f) stamping or cutting the original alloy wafer resistor semi-finished matrix or the alloy wafer resistor semi-finished strip (A) by a mold to form a plurality of alloy wafers Resistor (B) individual; (g) Conductive copper terminal electrode at each end of the alloy chip resistor, electroplated with a conductive metal such as nickel, tin or silver to form a plurality of alloy chip resistors (B) finished product (please refer to the seventh picture together).

另可在步驟(b)大量切割前,於待切合金板上至少取樣一樣品,並先量測該樣品之電阻值,依該樣品量測值以程式控制/調整雷射切割形狀或切割線條的長短。其中,若該樣品之電阻值低於目標阻值,則延長切割線條,使導體路徑(L)變長,進而提升電阻值,反之,則縮短導體路徑(L)使得電阻值得以下降。 In addition, before step (b) a large number of cutting, at least one sample is sampled on the alloy plate to be cut, and the resistance value of the sample is first measured, and the laser cutting shape or cutting line is controlled/adjusted according to the sample measurement value. The length of time. Wherein, if the resistance value of the sample is lower than the target resistance value, the cutting line is extended, the conductor path (L) is lengthened, and the resistance value is increased, and conversely, the conductor path (L) is shortened so that the resistance value is lowered.

以上所舉者僅係本發明之部份實施例,並非用以限制本發明,致依本發明之創意精神及特徵,稍加變化修飾而成者,亦應包括在本專利範圍之內。 The above is only a part of the embodiments of the present invention, and is not intended to limit the present invention. It is intended to be included in the scope of the present invention.

綜上所述,本發明實施例確能達到所預期之使用功效,又其所揭露之具體技術手段,不僅未曾見諸於同類產品中,亦未曾公開於申請前,誠已完全符合專利法之規定與要求,爰依法提出發明專利之申請,懇請惠予審查,並賜准專利,則實感德便。 In summary, the embodiments of the present invention can achieve the expected use efficiency, and the specific technical means disclosed therein have not been seen in similar products, nor have they been disclosed before the application, and have completely complied with the patent law. The regulations and requirements, the application for invention patents in accordance with the law, and the application for review, and the grant of patents, are truly sensible.

Claims (6)

一種合金晶片電阻器製造方法,係包括以下步驟:(a)依據所需之特性,選用一合金板之材料;(a1)於該合金板上至少取樣一樣品,並先量測該樣品之電阻值,若該樣品之電阻值低於目標阻值,則延長切割線條,使導體路徑變長,進而提升電阻值,反之,則縮短導體路徑使得電阻值得以下降,再依該樣品量測值以程式控制/調整雷射切割形狀或切割線條的長短,以達最終產品阻值集中之目的;(b)依需求阻值預先設計一符合該需求阻值之導體路徑的切割圖型,以雷射切割製程於該合金板上切割出複數個合金電阻個體半成品,令該合金電阻個體半成品的中段為電阻本體區域,該合金電阻個體半成品的兩端為外露導體區域及連結相鄰之該合金電阻個體半成品的連結區域,以在合金板上形成連續之合金電阻半成品矩陣或合金電阻半成品條;(c)於該合金電阻個體半成品的本體區域射出成型、塗裝或曝光顯影其中之一的方式形成一包覆有絕緣體;(d)在合金電阻半成品兩端外露導體區域,以電鍍方式鍍上銅金屬,以形成合金電阻之導電銅端電極; (e)以模具將原合金電阻半成品矩陣或合金電阻半成品條進行沖壓或切割,以形成複數個合金電阻半成品個體;(f)在合金電阻半成品個體兩端導電銅端極處,以電鍍方式鍍上導電金屬,以形成合金電阻成品之電極。 An alloy wafer resistor manufacturing method comprises the steps of: (a) selecting an alloy plate material according to a desired characteristic; (a1) sampling at least one sample on the alloy plate, and measuring the resistance of the sample first. Value, if the resistance value of the sample is lower than the target resistance value, the cutting line is extended, the conductor path is lengthened, and the resistance value is increased, and vice versa, the conductor path is shortened so that the resistance value is decreased, and then the sample measurement value is used. The program controls/adjusts the length of the laser cutting shape or the cutting line to achieve the concentration of the final product resistance; (b) pre-designs a cutting pattern conforming to the conductor path of the required resistance according to the required resistance value to the laser The cutting process cuts a plurality of individual semi-finished alloy resistors on the alloy plate, so that the middle portion of the semi-finished product of the alloy resistor is a resistive body region, and the ends of the semi-finished product of the alloy resistor are exposed conductor regions and the adjacent alloy resistors are connected a joint region of the semi-finished product to form a continuous alloy resistance semi-finished matrix or alloy resistance semi-finished strip on the alloy plate; (c) the alloy resistance individual Forming, coating or exposing one of the finished body regions to form an insulator; (d) exposing the conductor region at both ends of the alloy resistor semi-finished product, electroplating copper metal to form alloy resistance Conductive copper terminal electrode; (e) stamping or cutting the original alloy resistance semi-finished product matrix or the alloy resistance semi-finished product strip by a mold to form a plurality of alloy resistance semi-finished products; (f) plating at the conductive copper end of the alloy resistance semi-finished product at both ends Conductive metal is applied to form an electrode of the finished alloy resistor. 如申請專利範圍第1項所述之合金晶片電阻器製造方法,其中,該合金板係選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵鉻鋁合金或錳銅合金其中之一。 The method for manufacturing an alloy wafer resistor according to claim 1, wherein the alloy plate is one selected from the group consisting of a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, an iron-chromium-aluminum alloy, and a manganese-copper alloy. 如申請專利範圍第1或2項所述合金晶片電阻器製造方法,其中,該導電金屬選自鎳、錫、銀其中之一或二者以上並採層疊設置。 The method of manufacturing an alloy wafer resistor according to claim 1 or 2, wherein the conductive metal is selected from one or more of nickel, tin, and silver and laminated. 一種合金晶片電阻器製造方法,係包括以下步驟:(a)依據所需之特性,選用一合金板之材料;(a1)於該合金板上至少取樣一樣品,並先量測該樣品之電阻值,若該樣品之電阻值低於目標阻值,則延長切割線條,使導體路徑變長,進而提升電阻值,反之,則縮短導體路徑使得電阻值得以下降,再依該樣品量測值以程式控制/調整雷射切割形狀或切割線條的長短,以達最終產品阻值集中之目的;(b)依需求阻值預先設計一符合該需求阻值之導體路徑的切割圖型,先以模具沖壓出合金晶片電阻器之外型,以於該 合金板上得到複數個合金晶片電阻器個體半成品,令該合金晶片電阻器個體半成品的中段為電阻本體區域,該合金晶片電阻器個體半成品的兩端為外露導體區域及連結相鄰之該合金晶片電阻器個體半成品的連結區域,以在合金板上形成連續之合金晶片電阻器半成品矩陣或合金晶片電阻器半成品條;(c)於該合金晶片電阻器個體半成品的中段電阻本體區域,再以雷射切割製程切割符合該需求阻值之導體路徑;(d)於該合金晶片電阻器個體半成品的本體區域以射出成型、塗裝或曝光顯影方式包覆有絕緣體;(e)在合金晶片電阻器個體半成品兩端外露導體區域,以電鍍方式鍍上銅金屬,以形成合金電阻半成品之導電銅端電極;(f)以模具將原合金晶片電阻器矩陣或合金晶片電阻器條進行沖壓或切割,以形成複數個合金晶片電阻器半成品個體;(g)在合金電阻半成品個體兩端導電銅端電極處,以電鍍方式鍍上導電金屬,以形成合金電阻成品之電極。 An alloy wafer resistor manufacturing method comprises the steps of: (a) selecting an alloy plate material according to a desired characteristic; (a1) sampling at least one sample on the alloy plate, and measuring the resistance of the sample first. Value, if the resistance value of the sample is lower than the target resistance value, the cutting line is extended, the conductor path is lengthened, and the resistance value is increased, and vice versa, the conductor path is shortened so that the resistance value is decreased, and then the sample measurement value is used. The program controls/adjusts the length of the laser cutting shape or the cutting line to achieve the purpose of concentration concentration of the final product; (b) pre-designs a cutting pattern conforming to the conductor path of the required resistance according to the required resistance value, first adopting the mold Stamping out the shape of the alloy wafer resistor for the purpose The plurality of alloy wafer resistor individual semi-finished products are obtained on the alloy plate, wherein the middle portion of the individual semi-finished products of the alloy chip resistor is a resistive body region, and the ends of the individual semi-finished products of the alloy chip resistor are exposed conductor regions and the adjacent alloy wafers are connected a joint region of the individual semi-finished products of the resistor to form a continuous alloy chip resistor semi-finished matrix or an alloy chip resistor semi-finished strip on the alloy plate; (c) a middle-resistance body region of the individual semi-finished product of the alloy chip resistor, and then The shot cutting process cuts the conductor path in accordance with the required resistance; (d) the insulator body of the individual semi-finished product of the alloy chip resistor is coated with an insulator by injection molding, coating or exposure development; (e) the alloy wafer resistor An exposed conductor region at both ends of the individual semi-finished product, plated with copper metal to form a conductive copper terminal electrode of the alloy resistance semi-finished product; (f) stamping or cutting the original alloy wafer resistor matrix or the alloy wafer resistor strip with a mold, To form a plurality of alloy wafer resistor semi-finished products; (g) semi-finished alloy resistors Copper termination at both ends of the conductive bodies, galvanically plated with a conductive metal to form an alloy electrode resistance of the finished product. 如申請專利範圍第4項所述之合金晶片電阻器製造方法,其中,該合金板係選自鎳鉻合金、鎳鉻鋁合金、銅鎳合金、鐵 鉻鋁合金或錳銅合金其中之一。 The method for manufacturing an alloy wafer resistor according to claim 4, wherein the alloy plate is selected from the group consisting of a nickel-chromium alloy, a nickel-chromium-aluminum alloy, a copper-nickel alloy, and an iron. One of chrome aluminum alloy or manganese copper alloy. 如申請專利範圍第4或5項所述之合金晶片電阻器製造方法,其中,該導電金屬選自鎳、錫、銀其中之一或二者以上並採層疊設置。 The method of manufacturing an alloy wafer resistor according to claim 4, wherein the conductive metal is selected from one or more of nickel, tin, and silver and laminated.
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