TWI487005B - A group III nitride semiconductor substrate, an epitaxial substrate, and a semiconductor device - Google Patents
A group III nitride semiconductor substrate, an epitaxial substrate, and a semiconductor device Download PDFInfo
- Publication number
- TWI487005B TWI487005B TW099102706A TW99102706A TWI487005B TW I487005 B TWI487005 B TW I487005B TW 099102706 A TW099102706 A TW 099102706A TW 99102706 A TW99102706 A TW 99102706A TW I487005 B TWI487005 B TW I487005B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- layer
- group iii
- iii nitride
- semiconductor substrate
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims description 174
- 239000004065 semiconductor Substances 0.000 title claims description 145
- 150000004767 nitrides Chemical class 0.000 title claims description 86
- 239000010410 layer Substances 0.000 claims description 170
- 239000002344 surface layer Substances 0.000 claims description 58
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 claims description 20
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- 239000005749 Copper compound Substances 0.000 claims description 10
- 150000001722 carbon compounds Chemical class 0.000 claims description 10
- 150000001880 copper compounds Chemical class 0.000 claims description 10
- 230000003746 surface roughness Effects 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 9
- 150000003304 ruthenium compounds Chemical class 0.000 claims description 8
- 239000013078 crystal Substances 0.000 description 44
- 238000005498 polishing Methods 0.000 description 38
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 23
- 239000006061 abrasive grain Substances 0.000 description 18
- 239000007789 gas Substances 0.000 description 18
- 238000000034 method Methods 0.000 description 18
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- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
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- 239000012535 impurity Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
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- KMUONIBRACKNSN-UHFFFAOYSA-N potassium dichromate Chemical compound [K+].[K+].[O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O KMUONIBRACKNSN-UHFFFAOYSA-N 0.000 description 2
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- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
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- JRKICGRDRMAZLK-UHFFFAOYSA-L peroxydisulfate Chemical compound [O-]S(=O)(=O)OOS([O-])(=O)=O JRKICGRDRMAZLK-UHFFFAOYSA-L 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 description 1
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- 235000019396 potassium bromate Nutrition 0.000 description 1
- 239000001103 potassium chloride Substances 0.000 description 1
- 235000011164 potassium chloride Nutrition 0.000 description 1
- 239000012286 potassium permanganate Substances 0.000 description 1
- USHAGKDGDHPEEY-UHFFFAOYSA-L potassium persulfate Chemical compound [K+].[K+].[O-]S(=O)(=O)OOS([O-])(=O)=O USHAGKDGDHPEEY-UHFFFAOYSA-L 0.000 description 1
- 230000008569 process Effects 0.000 description 1
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- 229910052938 sodium sulfate Inorganic materials 0.000 description 1
- 235000011152 sodium sulphate Nutrition 0.000 description 1
- QHFDHWJHIAVELW-UHFFFAOYSA-M sodium;4,6-dioxo-1h-1,3,5-triazin-2-olate Chemical compound [Na+].[O-]C1=NC(=O)NC(=O)N1 QHFDHWJHIAVELW-UHFFFAOYSA-M 0.000 description 1
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- 125000004434 sulfur atom Chemical group 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
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Description
本發明係關於一種III族氮化物半導體基板、磊晶基板及半導體裝置。
近年來,以化合物半導體為代表之半導體有效利用其各種特性,應用範圍進一步擴大。例如,化合物半導體作為用以積層磊晶層之基底基板而有用,可用於發光二極體(LED,Light Emitting Diode)、雷射二極體(LD,Laser Diode)等半導體裝置。
於使用半導體基板作為基底基板之情形時,必需使半導體基板之表面成為無應變之鏡面。因此,對半導體之單晶錠實施前加工(例如切斷、磨削、蝕刻)而獲得半導體基板後,對半導體基板之表面實施鏡面研磨。
作為半導體基板,例如已知有下述專利文獻1~3中所記載者。專利文獻1中揭示有如下半導體基板,其係將利用氣相磊晶法(VPE,Vapor Phase Epitaxy)使其結晶成長而得之結晶性III-V族氮化物(例如(Al、Ga、In)-N)切斷後,實施前加工而獲得。專利文獻1中揭示有:作為前加工,對半導體基板之表面進行機械研磨後,為了將由於機械研磨而產生之表面損傷去除而實施化學研磨(CMP,Chemical Mechanical Polishing,化學機械研磨)。
專利文獻2中揭示有如下半導體基板,其藉由對Alx
Gay
Inz
N(0<y≦1,x+y+z=1)晶圓之表面利用CMP進行研磨,使RMS(Root Mean Square,均方根)基準之表面粗糙度未達0.15nm,而使表面之缺陷及污染減少。專利文獻2中揭示有:進行CMP時使用Al2
O3
或SiO2
作為研磨粒,及於研磨液中添加氧化劑而調整pH值。
專利文獻3中揭示有如下半導體基板,其根據堆積(蓄積)於磊晶層與半導體基板之界面的Si會使裝置之特性下降的推測,而使磊晶層與半導體基板之界面的Si濃度為8×1017
cm-3
以下。
專利文獻1:美國專利6596079號說明書
專利文獻2:美國專利6488767號說明書
專利文獻3:日本專利第3183335號公報
然而,使用於上述專利文獻1~3中所記載之半導體基板上配置磊晶層(井層)而成之積層體的半導體裝置中,在使發光強度提高方面有限。因此,強烈地迫切期望開發出可使半導體裝置之發光強度提高的半導體基板。
本發明係為了解決上述問題而成者,其目的在於提供一種可使半導體裝置之發光強度提高之III族氮化物半導體基板、磊晶基板及半導體裝置。
本發明者們進行銳意研究,結果發現,若於半導體基板之表面存在C(碳)等雜質,則於半導體基板之表面上形成磊晶層時C會堆積於界面,導致於磊晶層/半導體基板界面形成電阻高之層(以下稱為「高電阻層」)。並且發現,由於形成高電阻層,故而導致磊晶層/半導體基板界面之電阻增加,發光強度下降。
進而,本發明者們發現,於半導體裝置中所使用之III族氮化物半導體基板中,由於基板表面具有特定之面方位,並且特定量之硫化物及氧化物存在於基板表面,故而可於磊晶層與半導體基板之界面抑制C堆積。藉由如上所述抑制C之堆積,則磊晶層與半導體基板之界面的高電阻層之形成得到抑制。藉此,不僅可降低磊晶層與半導體基板之界面的電阻,而且可使磊晶層之結晶品質提高。因此,可使半導體裝置之發光強度提高。
即,本發明係一種III族氮化物半導體基板,其係用於半導體裝置者,於III族氮化物半導體基板之表面包含表面層,表面層包含以S換算為30×1010
個/cm2
~2000×1010
個/cm2
之硫化物、及以O換算為2at%~20at%之氧化物,並且表面之法線軸相對於c軸之傾斜角度為10°~81°。
又,表面層較好的是包含以S換算為40×1010
個/cm2
~1500×1010
個/cm2
之硫化物。此時,可進一步抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度進一步提高。
又,表面層較好的是包含以O換算為3at%~16at%之氧化物。此時,可進一步抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度進一步提高。
進而,本發明者們發現,藉由特定量之氯化物、或者特定量之矽化合物存在於基板表面,可進一步抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度進一步提高。
即,表面層較好的是包含以Cl換算為120×1010
個/cm2
~15000×1010
個/cm2
之氯化物。又,表面層較好的是包含以Si換算為100×1010
個/cm2
~12000×1010
個/cm2
之矽化合物。
進而,本發明者們發現,藉由使基板表面之碳化合物之含量為特定量以下,可進一步抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度進一步提高。
即,表面層中之碳化合物之含量較好的是以C換算為22at%以下。
又,本發明者們發現,基板表面之銅化合物有助於高電阻層之形成。進而發現,藉由使基板表面之銅化合物之含量為特定量以下,可進一步抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度進一步提高。
即,表面層中之銅化合物之含量較好的是以Cu換算為150×1010
個/cm2
以下。
又,表面層之表面粗糙度較好的是以RMS基準計為5nm以下。此時,可使磊晶層之結晶品質進一步提高,且使半導體裝置之發光強度進一步提高。
又,表面層之錯位密度較好的是1×106
個/cm2
以下。此時,可使磊晶層之結晶品質進一步提高,因此可使半導體裝置之發光強度進一步提高。
又,表面之面方位較好的是{20-21}面、{20-2-1}面、{10-11}面、{10-1-1}面、{11-22}面、{11-2-2}面、{22-43}面、{22-4-3}面、{11-21}面、{11-2-1}面中之任一者。此時,可降低發光之半值寬。
本發明之磊晶基板包括上述III族氮化物半導體基板、以及形成於III族氮化物半導體基板之表面層上的磊晶層,並且磊晶層包含III族氮化物半導體。
本發明之磊晶基板中,由於包括上述III族氮化物半導體基板,故而可於磊晶層與半導體基板之界面抑制C堆積。因此,可抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度提高。
又,磊晶基板較好的是包含磊晶層具有量子井結構之活性層,活性層係以產生波長為430nm~550nm之光的方式而設置。
本發明之半導體裝置包括上述磊晶基板。
本發明之半導體裝置中,由於包括上述磊晶基板,故而可於磊晶層與半導體基板之界面抑制C堆積。因此,可抑制磊晶層與半導體基板之界面的高電阻層之形成,且使半導體裝置之發光強度提高。
依據本發明,提供一種可使半導體裝置之發光強度提高之III族氮化物半導體基板、磊晶基板及半導體裝置。
以下,一面參照圖式,一面對本發明之III族氮化物半導體基板、磊晶基板及半導體裝置之較佳實施形態進行詳細說明。
圖1係表示第1實施形態之III族氮化物半導體基板10之概略剖面圖。III族氮化物半導體基板10(以下稱為「氮化物基板10」)係如圖1所示,包含相互對向之表面10a及背面10b,且於表面10a上形成有表面層12。
作為氮化物基板10之構成材料,較好的是具有纖鋅礦型結構之結晶,例如可列舉GaN、AlN、InN、AlGaN、InGaN。包含GaN之氮化物基板10可利用HVPE(Hydride Vapor Phase Epitaxy,氫化物氣相磊晶)法、助溶劑法等來製作。包含AlN之氮化物基板10可利用HVPE法、昇華法等來製作。包含InN、AlGaN、InGaN之氮化物基板10可利用HVPE法等來製作。
氮化物基板10可於表面10a上磊晶成長所需之半導體層(磊晶層)。表面10a之品質較好的是適合於磊晶層之形成。表面10a之品質與基板內部之本體部分之結晶品質不同,容易受到表面組成或粗糙度、加工變質層之影響。
此處,所謂加工變質層,係指藉由結晶之研削或研磨而形成於結晶之表面側區域的晶格紊亂之層。加工變質層可藉由對將結晶以劈開面斷裂而成之剖面進行SEM(Scanning Electron Microscopy,掃描電子顯微鏡)觀察或TEM(Transmission Electron Microscopy,穿透式電子顯微鏡)觀察、CL(Cathode Luminescence,陰極發光)觀察,來確認其存在及其厚度。加工變質層之厚度較好的是20nm以下,更好的是10nm以下。若加工變質層之厚度較厚,則有磊晶層之形態(morphology)及結晶性下降之傾向。
所謂CL觀察,係指使電子束作為激發光而射入III族氮化物半導體結晶中,觀察自III族氮化物半導體結晶中射出之可見光或者接近可見波長區域之波長的光。若進行III族氮化物半導體結晶之CL觀察,則於表面狀態良好之結晶區域觀察到光,而於結晶紊亂之加工變質層之區域未觀察到光,係觀察到較黑之直線狀陰影。
於將氮化物基板10用於半導體裝置中之情形時,較好的是於氮化物基板10與磊晶層之界面抑制高電阻層形成。若由於高電阻層之存在而造成上述界面之電阻變高,則導致半導體裝置之發光效率下降。尤其於向半導體裝置通入較大電流之情形時,發光效率明顯下降。
就抑制如上所述之高電阻層之形成之觀點而言,表面層12包含硫化物及氧化物。
表面層12包含以S換算為30×1010
個/cm2
~2000×1010
個/cm2
之硫化物、及以O換算為2at%~20at%之氧化物。硫化物之含量較好的是以S換算為40×1010
個/cm2
~1500×1010
個/cm2
,更好的是100×1010
個/cm2
~500×1010
個/cm2
。氧化物之含量較好的是以O換算為3at%~16at%,更好的是4at%~12at%。若硫化物之含量未達30×1010
個/cm2
,或者氧化物之含量未達2at%,則於半導體基板與磊晶層之界面形成高電阻層,且由於界面之高電阻化而使半導體裝置之發光強度下降。若硫化物之含量超過2000×1010
個/cm2
,或者氧化物之含量超過20at%,則磊晶層之結晶品質下降,半導體裝置之發光強度下降。
表面層12較好的是包含以Cl換算為120×1010
個/cm2
~15000×1010
個/cm2
之氯化物。氯化物之含量較好的是以Cl換算為350×1010
個/cm2
~10000×1010
個/cm2
,進而好的是1000×1010
個/cm2
~5000×1010
個/cm2
。若氯化物之含量未達120×1010
個/cm2
,則有容易於半導體基板與磊晶層之界面形成高電阻層,且由於界面之高電阻化而使半導體裝置之發光強度下降之傾向。若氯化物之含量超過15000×1010
個/cm2
,則有磊晶層之結晶品質容易下降,且半導體裝置之發光強度下降之傾向。
表面層12較好的是包含以Si換算為100×1010
個/cm2
~12000×1010
個/cm2
之矽化合物。矽化合物之含量較好的是以Si換算為200×1010
個/cm2
~12000×1010
個/cm2
,進而好的是500×1010
個/cm2
~8000×1010
個/cm2
,極好的是1000×1010
個/cm2
~5000×1010
個/cm2
。若矽化合物之含量未達100×1010
個/cm2
,則有容易於半導體基板與磊晶層之界面形成高電阻層,且由於界面之高電阻化而使半導體裝置之發光強度下降之傾向。若矽化合物之含量超過12000×1010
個/cm2
,則有磊晶層之結晶品質容易下降,且半導體裝置之發光強度下降之傾向。
表面層12亦可包含碳化合物。表面層12中之碳化合物之含量較好的是以C換算為22at%以下,更好的是18at%以下,進而好的是15at%以下。若碳化合物之含量超過22at%,則有磊晶層之結晶品質容易下降,且半導體裝置之發光強度下降之傾向,並且有容易於半導體基板與磊晶層之界面形成高電阻層,且由於界面之高電阻化而使半導體裝置之發光強度下降之傾向。
表面層12亦可包含銅化合物。表面層12中之銅化合物之含量較好的是以Cu換算為150×1010
個/cm2
以下,更好的是100×1010
個/cm2
以下,進而好的是50×1010
個/c
m2
以下。若銅化合物之含量超過150×1010
個/cm2
,則有磊晶層之結晶品質容易下降,且半導體裝置之發光強度下降之傾向,並且有容易於半導體基板與磊晶層之界面形成高電阻層,且由於界面之高電阻化而使半導體裝置之發光強度下降之傾向。
表面層12之組成中,對於S、Si、Cl及Cu,可利用TXRF(Total Reflection X-ray Fluorescence,全反射螢光X射線分析)進行定量。TXRF係根據X射線之進入深度,對距離表面5nm左右之組成進行評價。對於O及C,可利用AES(Auger Electron Spectroscopy,歐傑電子能譜)進行定量。AES具有0.1%之分解能力。AES係根據歐傑電子之逸出深度,對距離表面5nm左右之組成進行評價。再者,表面層12係具有利用TXRF或AES計測含有成分而獲得之厚度的層,例如具有5nm左右之厚度。
表面層12與氮化物基板10內部之本體部分之組成的差異可藉由利用SIMS(Secondary Ion Mass Spectrometry,二次離子質譜法)進行深度方向之分析而評價。又,對於氮化物基板10內部、氮化物基板10與磊晶層之界面、以及磊晶層內部之組成的差異亦可利用SIMS進行評價。
就可使磊晶層之結晶品質進一步提高,且使元件發光之積分強度進一步提高之觀點而言,氮化物基板10中之表面層12之表面粗糙度較好的是以RMS基準計為5nm以下,更好的是3nm以下,進而好的是1nm以下。又,就兼顧優異之生產性與磊晶層之結晶品質的觀點而言,表面粗糙度較好的是1nm~3nm。此處,RMS基準之表面粗糙度(均方根粗糙度)可使用AFM(Atomic Force Microscope,原子力顯微鏡),測定表面10a之10μm見方之區域而作為基準面積。
表面層12之錯位密度較好的是1×106
個/cm2
以下,更好的是1×105
個/cm2
以下,進而好的是1×104
個/cm2
以下。若錯位密度超過1×106
個/cm2
,則有磊晶層之結晶品質容易下降,且半導體裝置之發光強度下降之傾向。另一方面,就結晶製作時之優異之成本、生產性之觀點而言,錯位密度較好的是1×102
個/cm2
以上。錯位密度可進行CL觀察,數出表面層12之10μm見方區域內的未發光之點的數量而算出。
氮化物基板10之表面10a為半極性面,表面10a之面方位較好的是纖鋅礦型結構之{20-21}面、{20-2-1}面、{10-11}面、{10-1-1}面、{11-22}面、{11-2-2]面、{22-43}面、{22-4-3]面、{11-21}面、{11-2-1}面中之任一者。此時,由於可使磊晶層之銦(In)之摻入效率提高,故而獲得良好之發光特性。表面10a之面方位例如可使用X射線繞射裝置來測定。
表面10a之法線軸相對於c軸之傾斜角度(偏離角)為10°~81°,較好的是17°~80°,更好的是63°~79°。藉由傾斜角度為10°以上,則由纖鋅礦型結構之自發極化所引起之壓電電場得到抑制,因此可使發光裝置之PL(photoluminescence,光致發光)強度提高。藉由傾斜角度為81°以下,可降低磊晶層(井層)之錯位密度,使半導體裝置之發光強度提高。
繼而,對氮化物基板10之製造方法進行說明。
首先,利用HVPE法等使III族氮化物半導體結晶於c軸方向或m軸方向上成長後,對其結晶實施外周加工而成形,獲得III族氮化物半導體之錠。繼而,將所獲得之錠以所需之角度使用線鋸或片鋸來切斷,獲得表面10a具有所需偏離角之氮化物基板10。再者,使用半極性基板作為基底基板,於半極性基板上使III族氮化物半導體之結晶成長,亦可使用表面具有所需偏離角之錠。
繼而,為了使基板表面平坦化而進行研磨(grinding)加工(研削)或磨削加工等機械加工。研削時可使用包含鑽石、SiC、BN、Al2
O3
、Cr2
O3
、ZrO2
等之磨石作為硬質研磨粒。磨削加工時可使用包含鑽石、SiC、BN、Al2
O3
、Cr2
O3
、ZrO2
等之普通研磨劑作為硬質研磨粒。
研磨粒係考慮到機械性作用或特性而適當選定。例如就提高研磨率之觀點而言,係使用高硬度且粒徑大之研磨粒。就使表面平滑之觀點、或抑制加工變質層之形成的觀點而言,係使用低硬度且粒徑小之研磨粒。又,就縮短研磨時間且獲得平滑之表面的觀點而言,較適合的是隨著研磨處理之進行,使研磨粒自粒度大之研磨粒變化為粒度小之研磨粒的多階段研磨。
對氮化物基板10實施研削或磨削加工後,為了降低氮化物基板10之表面10a之表面粗糙度或去除加工變質層,而對表面10a進行乾式蝕刻或CMP等表面精加工。再者,乾式蝕刻可於研削或磨削加工之前進行。
作為乾式蝕刻,可列舉:RIE(Reactive Ion Etching,反應性離子蝕刻)、感應耦合電漿RIE(Inductively Coupled Plasma-Reactive Ion Etching,ICP-RIE)、ECR(Electron Cyclotron Resonance,電子迴旋加速器共振)-RIE、CAIBE(Chemically Assisted Ion Beam Etching,化學輔助離子束蝕刻)、RIBE(Reactive Ion Beam Etching,反應性離子束蝕刻)等,其中較好的是反應性離子蝕刻。反應性離子蝕刻中例如可使用圖2所示之乾式蝕刻裝置16。
乾式蝕刻裝置16包括腔室16a。腔室16a內設有平行板型上部電極16b及下部電極16c、以與上部電極16b對向之方式配置於下部電極16c上之基板支持台16d。於腔室16a內設有與氣體源連接之氣體供給口16e、與真空泵連接之氣體排氣口16f。於腔室16a之外部配置有與下部電極16c連接之高頻電源16g。
於乾式蝕刻裝置16中,自氣體供給口16e向腔室16a內供給氣體,且自高頻電源16g向下部電極16c供給高頻電力,藉此可使腔室16a內產生電漿。藉由於基板支持台16d上配置氮化物基板10,可對氮化物基板10之表面10a進行乾式蝕刻。
藉由使用硫系氣體作為自氣體供給口16e供給之蝕刻氣體,不僅可獲得較高之蝕刻率,而且可調整表面層12之硫化物之含量。作為硫系氣體,例如可使用H2
S、SO2
、SF4
、SF6
等。同樣地,藉由使用氯系氣體作為蝕刻氣體,不僅可獲得較高之蝕刻率,而且可調整表面層12之氯化物之含量。作為氯系氣體,例如可使用Cl2
、HCl、CCl4
、BCl3
、SiCl4
、SiHCl3
。表面層12之矽化合物、碳化合物之含量可藉由使用例如SiCl4
、SiHCl3
、CH4
、C2
H2
作為蝕刻氣體而調整。再者,亦可藉由調整氣體之種類、氣體流量、腔室內之壓力、蝕刻之功率,來控制表面層12之含有成分之含量。
反應性離子蝕刻中,較好的是於將腔室內之壓力設為P(Pa),將氣體流量設為Q(sccm),且將腔室容積設為V(L)時,滿足下述式(1)。
0.05≦PV/Q≦3.0 …(1)
於PV/Q小於0.05之情形時,有表面粗糙度增加之傾向。於PV/Q大於3.0之情形時,有表面改質之效果變小之傾向。
CMP中例如可使用圖3所示之拋光裝置18。拋光裝置18包括壓盤18a、拋光墊18b、晶體盒18c、鉛垂18d、及漿料液供給口18e。
拋光墊18b係載置於壓盤18a上。壓盤18a及拋光墊18b可以壓盤18a之中心軸線X1為中心而旋轉。晶體盒18c係用以於氮化物基板10之下面支持該氮化物基板10之零件。對於氮化物基板10,由載置於晶體盒18c之上面之鉛垂18d而施加負重。晶體盒18c係與軸線X1大致平行,且於自軸線X1移位之位置具有中心軸線X2,可以該中心軸線X2為中心而旋轉。漿料液供給口18e向拋光墊18b上供給CMP溶液之漿料S。
利用該拋光裝置18,藉由使壓盤18a及拋光墊18b與晶體盒18c旋轉,將漿料S供給至拋光墊18b上,使氮化物基板10之表面10a接觸拋光墊18b,可進行表面10a之CMP。
表面層12之含有成分之含量可利用CMP溶液之添加物、pH值、氧化還原電位進行調整。CMP溶液中可添加研磨粒。作為研磨粒之材質,可使用選自由ZrO2
、SiO2
、CeO2
、MnO2
、Fe2
O3
、Fe3
O4
、NiO、ZnO、CoO、Co3
O4
、GeO2
、CuO、Ga2
O3
、In2
O3
所組成之群中之至少一種金屬氧化物。亦可使用Si、Cu、Cu-Zn合金、Cu-Sn合金、Si3
N4
、SiAlON等化合物。就提高清洗性之觀點而言,研磨粒之材質較好的是離子化傾向高之材質,若為離子化傾向高於H之材質,則可使清洗之去除效率特別提高。再者,亦可使用不含研磨粒之CMP溶液。藉由使用Si、Si3
N4
、SiAlON等作為研磨粒,可調整表面層12之矽化合物之含量。藉由使用Cu、Cu-Zn合金、Cu-Sn合金等,可調整表面層12之銅化合物之含量。
就充分抑制CMP後於表面10a上殘存研磨粒之觀點而言,可於CMP溶液中添加界面活性劑。作為界面活性劑,例如可列舉羧酸型、磺酸型、硫酸酯型、四級銨鹽型、烷基胺鹽型、酯型、醚型。
作為CMP溶液之溶劑,較好的是非極性溶劑。作為非極性溶劑,可列舉烴、四氯化碳、二乙基醚等。藉由使用非極性溶劑,可促進作為金屬氧化物之研磨粒與基板之固體接觸,因此可效率良好地控制基板表面之金屬組成。
CMP溶液對半導體基板之化學作用(機械化學效果)可利用CMP溶液之pH值或氧化還原電位來調整。CMP溶液之pH值較好的是1~6或8.5~14,更好的是1.5~4或10~13。作為pH調整劑,除了鹽酸、硝酸、硫酸、磷酸等無機酸,甲酸、乙酸、檸檬酸、蘋果酸、酒石酸、琥珀酸、鄰苯二甲酸、順丁烯二酸、反丁烯二酸等有機酸,KOH、NaOH、NH4
OH、有機鹼、胺等鹼以外,可使用硫酸鹽、碳酸鹽、磷酸鹽等鹽。藉由使用有機酸作為pH調整劑,與無機酸、無機鹽相比較,即便為相同之pH值,亦可使雜質之去除效果提高。作為有機酸,較好的是二羧酸(二元羧酸)。
藉由使用硫酸等含硫原子之酸、硫酸鈉等硫酸鹽、硫代硫酸鈉等硫代硫酸鹽作為pH調整劑及氧化劑,可調整表面層12之硫化物之含量。藉由使用鹽酸等含氯原子之酸,氯化鉀等鹽,次氯酸、次氯酸鈉、次氯酸鈣等次氯酸鹽,三氯異三聚氰酸等氯化異三聚氰酸,二氯異三聚氰酸鈉等氯化異三聚氰酸鹽,可調整表面層12之氯化物之含量。藉由使用碳酸、碳酸鹽、檸檬酸、乙二酸、反丁烯二酸、鄰苯二甲酸、蘋果酸等有機酸、有機酸鹽等,可調整表面層12之碳化合物之含量。
CMP溶液之氧化還原電位可使用氧化劑來調整。藉由於CMP溶液中添加氧化劑,使氧化還原電位增加,則不僅可一面將研磨粒之去除效果維持為較高一面使研磨率提高,而且可調整表面層12之氧化物之含量。作為氧化劑,並無特別限制,就充分提高氧化還原電位之觀點而言,較好的是使用:次氯酸、次氯酸鈉、次氯酸鈣等次氯酸鹽,三氯異三聚氰酸等氯化異三聚氰酸,二氯異三聚氰酸鈉等氯化異三聚氰酸鹽等氯系氧化劑;硫酸、硫代硫酸鈉等硫代硫酸鹽等硫系氧化劑;過錳酸鉀等過錳酸鹽;二鉻酸鉀等二鉻酸鹽;溴酸鉀等溴酸鹽;硫代硫酸鈉等硫代硫酸鹽;過硫酸銨、過硫酸鉀等過硫酸鹽;硝酸、過氧化氫水、臭氧等。該等之中,藉由使用硫系氧化劑或氯系氧化劑,可使研磨率提高,且可將研磨後之表面層12之硫化物或氯化物之含量調整為上述較佳之含量。
此處,將CMP溶液之pH值設為x,且將氧化還原電位之值設為y(mV)時,x及y之關係較好的是滿足下述式(2)。
-50x+1400≦y≦-50x+1900 …(2)
若y超過式(2)之上限值,則不僅有對拋光墊或研磨設備之腐蝕作用變強,難以於穩定之狀態下進行研磨之傾向,而且有基板表面之氧化過度進行之傾向。若y未達式(2)之下限值,則有基板表面之氧化作用容易變弱,研磨率下降之傾向。
藉由控制CMP溶液之黏度,可調整表面層12之含有成分之含量。CMP溶液之黏度較好的是2mPa‧s~30mPa‧s,更好的是5mPa‧s~10mPa‧s。若CMP溶液之黏度低於2mPa‧s,則有表面層12之含有成分之含量高於上述所需值之傾向;若超過30mPa‧s,則有表面層12之含有成分之含量低於上述所需值之傾向。再者,CMP溶液之黏度可藉由添加乙二醇等高黏度之有機化合物或水鋁土等無機化合物來調整。
利用CMP溶液之硫酸離子之濃度或接觸係數C,可調整表面層12之硫化物之含量。所謂接觸係數C,係使用CMP溶液之黏度η(mPa‧s)、研磨時之周速度V(m/s)、研磨時之壓力P(kPa),以「C=η×V/P」來定義。接觸係數C較好的是1.0×10-6
m~2.0×10-6
m。若接觸係數C未達1.0×10-6
m,則有CMP中對半導體基板之負載容易變強,表面層12之硫化物之含量成為過剩量之傾向;若超過2.0×10-6
m,則不僅有研磨率下降之傾向,而且有表面層12之硫化物之含量變小之傾向。
研磨時之壓力較好的是3kPa~80kPa,更好的是10kPa~60kPa。若壓力未達3kPa,則有研磨率於實用上不充分之傾向;若超過80kPa,則有基板之表面品質下降之傾向。
利用氮化物基板10,藉由表面10a具有上述特定之面方位,而且以S換算為30×1010
個/cm2
~2000×1010
個/cm2
之硫化物、及以O換算為2at%~20at%之氧化物存在於表面層12上,可於磊晶層與氮化物基板10之界面抑制C堆積。藉由以上述方式抑制C之堆積,則磊晶層與氮化物基板10之界面的高電阻層之形成得到抑制。藉此,不僅可降低磊晶層與氮化物基板10之界面的電阻,而且可使磊晶層之結晶品質提高。因此,可使半導體裝置之發光強度提高。
圖4係表示第1實施形態之磊晶基板20之概略剖面圖。磊晶基板20如圖4所示,包括作為基底基板之上述氮化物基板10、積層於氮化物基板10之表面10a上的磊晶層22。
磊晶層22例如包含III族氮化物半導體。作為III族氮化物半導體,較好的是具有纖鋅礦型結構之結晶,例如可列舉GaN、AlN、InN、AlGaN、InGaN。磊晶層22可利用HVPE法、MOCVD(Metal Organic Chemical Vapor Deposition,金屬有機化學氣相沈積)法、VOC(Volatile Organic Compound,揮發性有機物)法、MBE(Molecular Beam Epitaxy,分子束磊晶)法、昇華法等氣相成長法而形成。藉由於氮化物基板10上設置磊晶層22,可使半導體裝置之發光強度提高。
圖5係表示第2實施形態之磊晶基板30之概略剖面圖。磊晶基板30係如圖5所示,於氮化物基板10之表面10a上形成由複數層構成之磊晶層32。藉由於氮化物基板10上設置磊晶層32,可使半導體裝置之發光強度提高。
磊晶層32包括第1半導體區域32a、第2半導體區域32b、設置於第1半導體區域32a及第2半導體區域32b之間的活性層32c。第1半導體區域32a包含一層或複數層n型半導體層,例如包含厚度為1μm之n型GaN層32d、以及厚度為150nm之n型Al0.1
Ga0.9
N層32e。第2半導體區域32b包含一層或複數層p型半導體層,例如包含厚度為20nm之p型Al0.2
Ga0.8
N層32f、以及厚度為150nm之p型GaN層32g。磊晶層32中,n型GaN層32d、n型Al0.1
Ga0.9
N層32e、活性層32c、p型Al0.2
Ga0.8
N層32f、以及p型GaN層32g以該順序積層於氮化物基板10上。
活性層32c例如係以產生波長為430nm~550nm之光的方式而設置。活性層32c例如包含4層障壁層及3層井層,具有障壁層及井層交替積層而成之多重量子井結構(MQW,Multiple Quantum Well)。障壁層例如為厚度10nm之GaN層。井層例如為厚度3nm之Ga0.85
In0.15
N層。
磊晶層32例如可利用MOCVD(有機金屬化學氣相沈積)法,使n型GaN層32d、n型Al0.1
Ga0.9
N層32e、活性層32c、p型Al0.2
Ga0.8
N層32f及p型GaN層32g於氮化物基板10上依序磊晶成長而形成。
圖6係表示第3實施形態之磊晶基板40之平面圖。磊晶基板40係如圖6所示,包括配置於氮化物基板10之表面10a上之磊晶層42。
磊晶層42包括具有比預定之錯位密度小之錯位密度的複數個低錯位密度區域44A、具有比該預定之錯位密度大之錯位密度的複數個高錯位密度區域44B。該預定之錯位密度例如為8×107
cm-2
。
低錯位密度區域44A及高錯位密度區域44B分別與氮化物基板10之表面10a之平面方向(圖6中之Y方向)相互大致平行地伸長為條紋狀,自磊晶層42之背面形成至表面。磊晶層42具有低錯位密度區域44A及高錯位密度區域44B交替排列之條紋結構。磊晶層42例如由GaN構成,藉由上述條紋結構而使結晶內之錯位密度減小。低錯位密度區域44A及高錯位密度區域44B可藉由使用掃描型電子顯微鏡(例如,日立製作所製造之S-4300)進行CL觀察而確認。
繼而,使用圖7對磊晶基板40之製造方法進行說明。首先,如圖7(a)所示,於成為基底基板之氮化物基板10之表面10a上,例如以於圖7(a)之Y方向上伸長之方式圖案化地形成條紋狀之遮罩層46。遮罩層46例如係由SiO2
形成。
繼而,如圖7(b)所示,於形成有上述遮罩層46之表面10a上,利用氣相成長法使磊晶層42刻面成長。作為氣相成長法,可使用HVPE法、MOCVD法、VOC法、MBE法、昇華法等。若使磊晶層42藉由刻面成長而成長為厚膜,則遮罩層46由磊晶層42覆蓋,於位於遮罩層46上之部分形成高錯位密度區域44B。
高錯位密度區域44B不僅為上述條紋結構,亦可為如圖8(a)所示條紋狀之高錯位密度區域44B相互正交之方形結構、或如圖8(b)所示點狀之高錯位密度區域44B相互隔開預定間隔而有規則地排列而成之點狀結構。如上所述之方形結構或點狀結構之高錯位密度區域44B與條紋結構同樣,可藉由使用遮罩層46的磊晶層42之圖案形成而獲得。
圖9係表示第1實施形態之半導體裝置100之概略剖面圖。半導體裝置100如圖9所示,包括磊晶基板20、覆蓋磊晶層22之表面23整體而形成之電極90A、覆蓋氮化物基板10之背面10b整體而形成之電極90B。電極90A、90B例如藉由金屬蒸鍍而形成。電極90A、90B之形成位置可視需要而適當變更,電極90B與氮化物基板10電性連接,且電極90A與磊晶層22電性連接即可。
圖10係表示第2實施形態之半導體裝置200之概略剖面圖。半導體裝置200係如圖10所示,包括磊晶基板30、覆蓋磊晶層32之表面33之整體而形成之第1電極(p側電極)92A、覆蓋氮化物基板10之背面10b之一部分而形成之第2電極(n側電極)92B。半導體裝置200之尺寸例如為400μm見方或2mm見方。導電體91A經由焊層93而與電極92A電性連接。導電體91B經由導線94而與電極92B電性連接。
半導體裝置200可利用以下順序來製造。首先,利用上述方法獲得氮化物基板10。繼而,於氮化物基板10之表面10a上積層磊晶層32。進而,於磊晶層32之表面33上形成電極92A,同時於氮化物基板10之背面10b上形成電極92B。繼而,將電極92A利用焊層93而與導電體91A電性連接,同時將電極92B利用導線94而與導電體91B電性連接。
再者,本發明並不限定於上述實施形態。上述說明中所記載之{20-21}面、M面、A面等面方位並非由該記載自身所特別限定者,包括結晶學上等價之面及方位。例如,所謂{20-21}面,不僅包括{20-21}面,並且包括(02-21)面、(0-221)面、(2-201)面、(-2021)面、(-2201)面。
以下,利用實施例對本發明進行詳細說明,本發明之範圍並不限定於該等實施例。
首先,使n型GaN結晶(摻雜劑:O)利用HVPE法而於c軸方向上成長。繼而,對GaN結晶與c軸垂直或平行地進行切片,分別獲得直徑50mm×厚度0.5mm之GaN基板。又,使GaN結晶自c軸朝m軸方向傾斜,或者自c軸朝a軸方向傾斜而進行切片,分別獲得直徑50mm×厚度0.5mm之GaN基板。
繼而,對GaN基板之表面、以及與表面相反側之背面實施乾式蝕刻而去除加工變質層。乾式蝕刻時使用具有與圖2相同之構成的RIE裝置。真空腔室之容積(V)係設為20L。基板支持台之材質係設為SiC。蝕刻氣體中使用Cl2
、CH4
,氣體流量(Q)係設為30sccm。於壓力(P)4.0Pa、功率50W~200W下進行乾式蝕刻(PV/Q=2.67)。
將GaN基板之背面以蠟貼附於陶瓷製晶體盒。於磨削(lap)裝置上設置直徑為380mm之壓盤,一面將分散有鑽石之研磨粒的漿料自漿料供給口供給至壓盤,一面使壓盤以其旋轉軸為中心而旋轉。繼而,一面藉由使晶體盒上承載鉛垂而將GaN基板按壓於壓盤上,一面使GaN基板以晶體盒之旋轉軸為中心而旋轉,藉此進行n型GaN結晶之表面之磨削。
磨削係於以下條件下進行。作為壓盤,係使用銅壓盤、錫壓盤。作為研磨粒,係準備研磨粒徑為9μm、3μm、2μm之3種鑽石之研磨粒,於磨削進行之同時,階段性地使用研磨粒徑小之研磨粒。研磨壓力係設為100g/cm2
~500g/cm2
,GaN基板及壓盤之轉速均設為30次/min~60次/min。確認藉由以上之磨削,GaN結晶基板之表面成為鏡面。
使用具有與圖3相同之構成的拋光裝置,進行GaN基板之表面之CMP。CMP係於以下條件下進行。作為拋光墊,係使用聚胺基甲酸酯之麂皮墊(Nitta Haas股份有限公司製造,Supreme RN-R)。作為壓盤,係使用直徑為380mm之圓形不鏽鋼壓盤。GaN基板與拋光墊之接觸係數C係設為1.0×10-6
m~2.0×10-6
m。拋光壓力係設為10kPa~80kPa,GaN基板及拋光墊之轉速均設為30次/min~120次/min。漿料(CMP溶液)中,使粒徑為200nm之二氧化矽粒子作為研磨粒而於水中分散20質量%。於漿料中添加檸檬酸、H2
SO4
作為pH調整劑,且添加二氯異三聚氰酸鈉作為氧化劑,將漿料之pH值及氧化還原電位調整為下述式(3)之範圍(x:pH,y=氧化還原電位(mV))。
-50x+1400≦y≦-50x+1900 …(3)
藉由適當變更乾式蝕刻、CMP之條件,而製作表面組成不同之GaN基板。GaN基板之表面之硫化物之含量的評價係藉由TXRF而進行,氧化物之含量之評價係藉由AES而進行。TXRF係對X射線之射線源使用W封入型X射線管,X射線功率係設為電壓40kV、電流40mA,以入射角度0.05°進行測定。AES係以加速電壓10keV進行測定。將GaN基板之表面之面方位及表面組成示於表1~5中。
以下述順序製作具有圖1所示之構成的雷射二極體。首先,將GaN基板10配置於MOCVD爐內之基座上後,於表面10a上形成磊晶層52,獲得磊晶基板50。
磊晶層52係利用MOCVD法以下述成長順序來製作。首先,於GaN基板10上成長厚度為1000nm之n型GaN層52a。繼而,成長厚度為1200nm之n型InAlGaN包覆層52b。然後,成長厚度為200nm之n型GaN導引層52c及厚度為65nm之非摻雜InGaN導引層52d後,成長由GaN厚度15nm/InGaN厚度3nm構成之3個週期MQW(活性層)52e。繼而,成長厚度為65nm之非摻雜InGaN導引層52f、厚度為20nm之p型AlGaN阻擋層52g及厚度為200nm之p型GaN導引層52h。繼而,成長厚度為400nm之p型InAlGaN包覆層52i。最後,成長厚度為50nm之p型GaN接觸層52j。再者,於磊晶層52之製作時,使用三甲基鎵(TMGa)、三甲基鋁(TMAl)、三甲基銦(TMIn)、氨(NH3
)、矽烷(SiH4
)、環戊二烯基鎂(Cp2
Mg)作為原料。
將SiO2
之絕緣膜95成膜於接觸層52j上後,使用光微影法且藉由濕式蝕刻而形成寬度為10μm之條紋窗。以與將c軸投影至基板表面上之方向成為平行之方式設置雷射條紋。
形成條紋窗後,蒸鍍包含Ni/Au之p側電極96A、包含Ti/Al之墊電極。繼而,對GaN基板10之背面10b使用鑽石漿料進行研磨,製作背面10b為鏡面(反射鏡(mirror))狀態之基板生產物。此時,使用接觸式膜厚計測定基板生產物之厚度。再者,厚度之測定可藉由試料剖面之顯微鏡觀察而進行。顯微鏡可使用光學顯微鏡或掃描型電子顯微鏡。進而,於GaN基板10之背面(研磨面)10b上,藉由蒸鍍而形成包含Ti/Al/Ti/Au之n側電極96B。
於對於雷射條紋之共振腔反射鏡(resonator mirror)之製作時,利用使用波長為355nm之YAG雷射之雷射刻劃器。於使用雷射刻劃器而使其斷裂之情形時,與使用鑽石刻劃之情形相比較,可提高振盪晶片良率。刻劃槽係於以下條件下形成:雷射光功率為100mW,掃描速度為5mm/s。刻劃槽為長度30μm、寬度10μm、深度40μm之槽。以800μm間距通過基板之絕緣膜之開口部位而對磊晶層之表面直接照射雷射光,藉此形成刻劃槽。共振器長度係設為600μm。
使用刮刀,藉由割斷而製作共振鏡(resonant mirror)。藉由對基板背側按壓而使其斷裂,製作雷射棒。利用真空蒸鍍法,於雷射棒之端面塗佈介電質多層膜。介電質多層膜係將SiO2
與TiO2
交替積層而構成。膜厚係分別於50~100nm之範圍內調整,係以反射率之中心波長達到500~530nm之範圍的方式而設計。將一側之反射面設為10個週期,且將反射率之設計值設計為約95%。將另一側之反射面設為6個週期,且將反射率之設計值設為約80%。
對於藉由以上而獲得之LD,於室溫下進行利用通電之評價。電源係使用脈衝寬度為500ns、佔空比為0.1%之脈衝電源,將針落至表面電極而通電。電流密度係設為100A/cm2
。觀測LED模式光時,藉由將光纖配置於雷射棒表面側,而測定自表面射出之發光光譜。將LED模式光之積分強度、以及根據光譜測定之發光峰值而算出之半值寬示於表1~5中。再者,表1~3係使用使GaN結晶自c軸朝m軸方向傾斜來切片而得之GaN基板之LD的評價結果。表4、5係使用使GaN結晶自c軸朝a軸方向傾斜來切片而得之GaN基板之LD的評價結果。觀測雷射光時,藉由將光纖配置於雷射棒端面側,而測定自端面射出之發光光譜。LED模式光之發光波長為500nm~550nm。雷射之振盪波長為500nm~530nm。
如表1~5所示,實施例1-1~1-14及實施例2-1~2-10中,表面之法線軸相對於c軸而具有特定之傾斜角度,且硫化物之含量為以S換算為30×1010
個/cm2
~2000×1010
個/cm2
之範圍,並且氧化物之含量為以O換算為2at%~20at%之範圍,因此獲得良好之發光強度。又,於表面之面方位為{20-21}面、{20-2-1}面、{10-11}面、{10-1-1}面、{11-22]面、{11-2-2]面、{22-43]面、{22-4-3]面、{11-21}面、{11-2-1}面中之任一者的情形時,確認根據光譜測定之發光峰值而算出之半值寬小,且發光波長之範圍小。尤其於{20-21}面、{20-2-1}面、{11-21}面、{11-2-1}面,獲得較高之積分強度與較小之半值寬。
另一方面,於比較例1-1、1-3、1-4、1-6、2-1、2-3、2-4及2-6中,氧化物之含量脫離上述範圍,因此確認發光強度減小。於比較例1-2、1-5、2-2及2-5中,表面不具有上述特定之面方位,因此確認發光強度減小。於比較例1-7~1-10中,氧化物之含量或者硫化物之含量脫離上述範圍,因此確認發光強度減小。
進而,作為實施例1-15及實施例1-16,係以與實施例1-5同等之面方位、氧化物、硫化物之含量,製作氯化物、矽化合物、碳化合物及銅化合物之含量以及表面粗糙度、錯位密度不同之基板,以相同之方式進行雷射特性之評價。實施例1-15中,Cl濃度為5000×1010
個/cm2
,Si濃度為2000×1010
個/cm2
,碳濃度為12at%,銅濃度為50×1010
個/cm2
,表面粗糙度為1.5nm,錯位密度為1×106
個/cm2
。實施例1-16中,Cl濃度為18000×1010
個/cm2
,Si濃度為15000×1010
個/cm2
,碳濃度為25at%,銅濃度為200×1010
個/cm2
,表面粗糙度為6nm,錯位密度為1×107
個/cm2
。實施例1-15中,積分強度為17.3,半值寬為47nm。實施例1-16中,積分強度為14.9,半值寬為50nm。實施例1-15中,由於氧化物、硫化物、氯化物、矽化合物、碳化合物及銅化合物之含量以及表面粗糙度、錯位密度為上述特定之範圍,因此獲得特別良好之特性。
10...氮化物基板(III族氮化物半導體基板)
10a...表面
12...表面層
20、30、40、50...磊晶基板
22、32、42、52...磊晶層
32c、52e...活性層
100、200...半導體裝置
圖1係表示第1實施形態之III族氮化物半導體基板之概略剖面圖;
圖2係表示可用於乾式蝕刻之裝置之圖;
圖3係表示可用於拋光之裝置之圖;
圖4係表示第1實施形態之磊晶基板之概略剖面圖;
圖5係表示第2實施形態之磊晶基板之概略剖面圖;
圖6係表示第3實施形態之磊晶基板之平面圖;
圖7(a)、(b)係表示製作第3實施形態之磊晶基板之順序之圖;
圖8(a)、(b)係表示第3實施形態之磊晶基板之變形例之平面圖;
圖9係表示第1實施形態之半導體裝置之概略剖面圖;
圖10係表示第2實施形態之半導體裝置之概略剖面圖;及
圖11係表示實施例中所使用之半導體裝置之概略剖面圖。
10...氮化物基板(III族氮化物半導體基板)
10a...表面
10b...背面
12...表面層
20...磊晶基板
22...磊晶層
23...磊晶層22之表面
90A、90B...電極
100...半導體裝置
Claims (13)
- 一種III族氮化物半導體基板,其係用於半導體裝置中者,於上述III族氮化物半導體基板之表面包含表面層,上述表面層包含以S換算為30×1010 個/cm2 ~2000×1010 個/cm2 之硫化物、及以O換算為2at%~20at%之氧化物,並且上述表面之法線軸相對於c軸之傾斜角度為10°~81°。
- 如請求項1之III族氮化物半導體基板,其中上述表面層包含以S換算為40×1010 個/cm2 ~1500×1010 個/cm2 之上述硫化物。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層包含以O換算為3at%~16at%之上述氧化物。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層包含以C1換算為120×1010 個/cm2 ~15000×1010 個/cm2 之氯化物。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層包含以Si換算為100×1010 個/cm2 ~12000×1010 個/cm2 之矽化合物。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層中之碳化合物之含量以C換算為22at%以下。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層中之銅化合物之含量以Cu換算為150×1010 個/cm2 以下。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層之表面粗糙度以RMS基準為5nm以下。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面層之錯位密度為1×106 個/cm2 以下。
- 如請求項1或2之III族氮化物半導體基板,其中上述表面之面方位為{20-21}面、{20-2-1}面、{10-11}面、{10-1-1}面、{11-22}面、{11-2-2}面、{22-43}面、{22-4-3}面、{11-21}面、{11-2-1}面中之任一者。
- 一種磊晶基板,其包括如請求項1至10中任一項之III族氮化物半導體基板、以及形成於上述III族氮化物半導體基板之上述表面層上之磊晶層,並且上述磊晶層包含III族氮化物半導體。
- 如請求項11之磊晶基板,其中上述磊晶層包含具有量子井結構之活性層,並且上述活性層係以產生波長為430nm~550nm之光的方式而設置。
- 一種半導體裝置,其包括如請求項11或12之磊晶基板。
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JP5365454B2 (ja) * | 2009-09-30 | 2013-12-11 | 住友電気工業株式会社 | Iii族窒化物半導体基板、エピタキシャル基板及び半導体デバイス |
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2009
- 2009-09-30 JP JP2009228605A patent/JP4513927B1/ja active Active
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2010
- 2010-01-28 EP EP10820172.4A patent/EP2485282B1/en active Active
- 2010-01-28 CN CN201080043216.6A patent/CN102576787B/zh active Active
- 2010-01-28 WO PCT/JP2010/051145 patent/WO2011040051A1/ja active Application Filing
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Patent Citations (2)
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EP1739760A2 (en) * | 1998-05-28 | 2007-01-03 | Sumitomo Electric Industries, Ltd. | Gallium nitride signal crystal substrate and method of producing the same |
EP2080823A1 (en) * | 2006-10-19 | 2009-07-22 | Sumitomo Electric Industries, Ltd. | Group iii element nitride substrate, substrate with epitaxial layer, processes for producing these, and process for producing semiconductor element |
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WO2011040051A1 (ja) | 2011-04-07 |
US20120068155A1 (en) | 2012-03-22 |
US20140367735A1 (en) | 2014-12-18 |
JP2011077382A (ja) | 2011-04-14 |
JP4513927B1 (ja) | 2010-07-28 |
KR20120057564A (ko) | 2012-06-05 |
EP2485282A4 (en) | 2015-02-11 |
TW201112312A (en) | 2011-04-01 |
EP2485282B1 (en) | 2020-02-19 |
KR101621998B1 (ko) | 2016-05-17 |
EP2485282A1 (en) | 2012-08-08 |
US9070828B2 (en) | 2015-06-30 |
CN102576787A (zh) | 2012-07-11 |
CN102576787B (zh) | 2015-07-08 |
US8853670B2 (en) | 2014-10-07 |
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