TWI425898B - Method for fabricating wiring structure of circuit board - Google Patents

Description

Method for manufacturing circuit structure of circuit board

The present invention relates to a circuit board process, and more particularly to a method of fabricating a circuit board circuit structure.

Today's circuit board technology has developed an embedded circuit board in which the lines on the surface are buried in the dielectric layer, not protruding from the surface of the dielectric layer.

1A to FIG. 1E are schematic flow diagrams illustrating a method of manufacturing a buried circuit board according to a conventional method. Referring first to FIG. 1A, a conventional method of manufacturing a buried wiring board includes the following steps. First, a copper metal layer 114a and a copper wiring layer 116a are sequentially formed on a carrier substrate 112a to form a wiring carrier substrate 110a.

Referring to FIG. 1B, the line carrier substrate 110a is then pressed onto the other line carrier substrate 110b by a prepreg, wherein the line carrier substrate 110b has the same structure as the line carrier substrate 110a. In detail, the line carrier substrate 110b also includes a carrier substrate 112b, a copper wiring layer 116b, and a copper metal layer 114b between the copper wiring layer 116b and the carrier substrate 112b. After the line carrier substrate 110a is pressed onto the line carrier substrate 110b, the film is cured to form a dielectric layer 120.

Referring to FIG. 1B and FIG. 1C, the carrier substrate 112a and the carrier substrate 112b are removed, and the copper metal layers 114a, 114b and the copper wiring layers 116a, 116b are left. Thereafter, mechanical drilling and through-hole plating (PTH) are sequentially performed to form a conductive through hole structure T1. When the conductive via structure T1 is formed, a copper plating layer 130a and a copper plating layer 130b are formed on the copper metal layer 114a and the copper metal layer 114b, respectively.

Referring to FIG. 1C and FIG. 1D, an etching process is then performed to remove the copper plating layers 130a, 130b and the copper metal layers 114a, 114b. Thereafter, the ink material 140 is filled in the conductive via structure T1.

Referring to FIG. 1D and FIG. 1E, after filling the ink material 140, a solder resist layer 150a is formed on the copper wiring layer 116a to form a solder resist layer 150b on the copper wiring layer 116b. As such, an embedded circuit board 100 has been manufactured.

However, in the process of removing the copper plating layers 130a, 130b and the copper metal layers 114a, 114b, since the removal method is an etching process, the surfaces of the copper wiring layers 116a and 116b become rough (see figure). 1D and FIG. 1E), so that the thickness of both of the copper wiring layers 116a and 116b becomes uneven. This will seriously degrade the electrical quality of the buried wiring board 100 and cause a decrease in yield.

The present invention provides a circuit manufacturing method for a circuit board to improve the yield of the circuit board.

The invention provides a method of manufacturing a circuit structure of a circuit board. First, a line carrier substrate is formed, which includes a carrier substrate, a first circuit layer, and an anti-corrosion barrier layer between the carrier substrate and the first circuit layer. Then, the circuit carrier substrate is pressed onto an insulating layer, wherein the insulating layer is disposed on a second circuit layer, and the first circuit layer and the second circuit layer are respectively located on opposite sides of the insulating layer. After the bonding line carries the substrate, a conductive connection structure is formed in the insulating layer and the carrier substrate is removed. The conductive connection structure is connected between the first circuit layer and the second circuit layer.

In an embodiment of the invention, the method of fabricating the wiring structure of the circuit board further includes removing the anti-corrosion barrier layer.

In an embodiment of the invention, the method of removing the anti-corrosion barrier layer includes partially removing the anti-corrosion barrier layer.

In an embodiment of the invention, the carrier substrate is made of a single material.

In an embodiment of the invention, the carrier substrate comprises a first material layer and a second material layer, and the first material layer is located between the second material layer and the corrosion inhibiting layer. The method of removing the carrier substrate includes removing the second material layer prior to forming the conductive connection structure. After forming the conductive connection structure, the first material layer is etched.

In an embodiment of the invention, the method of forming the conductive connection structure includes: performing a drilling process on the first circuit layer to form a blind via, wherein the blind via extends from the first circuit layer to the second circuit layer. Then, a conductive blind via structure is formed in the blind via, wherein the conductive blind via structure is electrically connected between the first wiring layer and the second wiring layer.

In an embodiment of the invention, the drilling process is a laser drilling process.

In an embodiment of the invention, the first circuit layer includes at least one annular conductive pattern, and the blind via extends from the annular conductive pattern to the second wiring layer.

In an embodiment of the invention, the material of the corrosion inhibiting layer is selected from the group consisting of nickel, tin, gold, chromium, and titanium.

In an embodiment of the invention, the anti-corrosion barrier layer has a thickness of between 0.1 micrometers and 10 micrometers.

In one embodiment of the invention, the method of forming a line carrier substrate includes forming a patterned photosensitive layer on the carrier substrate that partially exposes a surface of the carrier substrate. Thereafter, an anti-corrosion barrier layer is formed on the carrier substrate, wherein the anti-corrosion barrier layer covers the surface of the carrier substrate partially exposed by the patterned photosensitive layer. Next, a first wiring layer is formed, wherein the first wiring layer covers the anti-corrosion barrier layer. Thereafter, the patterned photosensitive layer is removed.

In an embodiment of the invention, the method for forming a line carrier substrate includes: forming an anti-corrosion barrier layer on the carrier substrate, wherein the anti-corrosion barrier layer comprehensively covers the carrier substrate. Next, a first wiring layer is formed on the anti-corrosion barrier layer.

With the above-described anti-corrosion barrier layer, the first wiring layer is protected from being roughened by the surface of the first wiring layer. Compared with the prior art, the present invention can make the thickness of the first circuit layer uniform, and improve the electrical quality of the circuit board to improve the yield of the circuit board.

The above and other objects, features, and advantages of the present invention will become more apparent and understood.

[First Embodiment]

2A to 2J are schematic flow charts showing a method of manufacturing a circuit structure of a circuit board according to a first embodiment of the present invention. Referring first to FIG. 2D, first, a line carrier substrate 200 is formed. The circuit carrier substrate 200 includes a carrier substrate 210, an anti-corrosion barrier layer 220, and a first wiring layer 230, and the anti-corrosion barrier layer 220 is located between the carrier substrate 210 and the first wiring layer 230.

The carrier substrate 210 may be made of only a single material. For example, the carrier substrate 210 may be a single material metal plate, ceramic plate or plastic plate. Of course, the carrier substrate 210 may also be a composite board made of two or more materials.

In this embodiment, the carrier substrate 210 is a composite material of a two-layer material, and includes a first material layer 212a and a second material layer 212b, wherein the first material layer 212a is located in the corrosion inhibiting layer 220 and the second material layer. Between 212b. The material of the first material layer 212a may be a metal such as copper, aluminum or other suitable metal material, and the material of the first material layer 212a is different from the corrosion inhibiting layer 220.

The second material layer 212b can be a metal, or a ceramic, polymeric material, or other suitable non-metallic material. When the second material layer 212b is a polymer material, the second material layer 212b may be polyimide (PI).

Although the carrier substrate 210 shown in FIG. 2D includes only the first material layer 212a and the second material layer 212b, in other unillustrated embodiments, the carrier substrate 210 may further include a third material layer disposed on the first The material layer 212a and the second material layer 212b, and the material of the third material layer may be a polymer material such as polyimide. Therefore, the carrier substrate 210 shown in FIGS. 2A to 2J is merely illustrative, and the present invention is not limited thereto.

The material of the anti-corrosion barrier layer 220 may be metal and different from the material of the first circuit layer 230. In detail, the material of the first circuit layer 230 may be copper, aluminum or other suitable conductive material, and the anti-corrosion barrier layer 220 may be nickel, tin, gold, chromium, titanium or other low-chemically active metal materials, or It can be any combination of these metallic materials. Further, the thickness of the anti-corrosion barrier layer 220 may be between 0.1 micrometers and 10 micrometers. Of course, the thickness of the anti-corrosion barrier layer 220 may also exceed 10 microns depending on the requirements of the product.

There are various methods for forming the line carrier substrate 200, and a method of forming one of the line carrier substrates 200 will be described in detail below with reference to FIGS. 2A to 2D.

Referring to FIG. 2A, first, a patterned photosensitive layer 240 is formed on the carrier substrate 210, which partially exposes the surface 210a of the carrier substrate 210. In this embodiment, the patterned photosensitive layer 240 partially exposes the first material layer 212a on the second material layer 212b, and the patterned photosensitive layer 240 may be formed through a lithography process, and may be a liquid film. Or dry film.

Referring to FIG. 2B, an anti-corrosion barrier layer 220 is formed on the carrier substrate 210, wherein the anti-corrosion barrier layer 220 covers the surface 210a of the carrier substrate 210 partially exposed by the patterned photosensitive layer 240. The anti-corrosion barrier layer 220 may be formed by electroplating, electroless plating, or chemical vapor deposition (CVD), or may be vapor deposition, sputtering, or other physical vapor deposition. (Physical Vapor Deposition, PVD) to form.

Referring to FIG. 2C, next, a first wiring layer 230 is formed. The first wiring layer 230 covers the anti-corrosion barrier layer 220, and the method of forming the first wiring layer 230 may be the same as the method of forming the anti-corrosion barrier layer 220. Referring to FIG. 2C and FIG. 2D, after the first wiring layer 230 is formed, the patterned photosensitive layer 240 is removed. As such, the line carrier substrate 200 is formed.

Referring to FIG. 2E, after the line carrier substrate 200 is formed, the bonding line carrier substrate 200 is disposed on an insulating layer 310, wherein the insulating layer 310 is disposed on a second wiring layer 320, and the first circuit layer 230 and the second line are disposed. The layers 320 are respectively located on opposite sides of the insulating layer 310.

The second circuit layer 320 shown in FIG. 2E may be an inner circuit layer of the wiring board. However, in other embodiments not shown, the second circuit layer 320 may also be an outer layer of the circuit board, and the first circuit layer 230 and the second circuit layer 320 may be double sided circuit boards. Has a two-layer line. Therefore, the second circuit layer 320 shown in FIGS. 2A to 2J is merely illustrative and does not limit the present invention.

The insulating layer 310 can be designed to have different thicknesses depending on different products. When the insulating layer 310 necessarily needs to have a relatively thin thickness, for example, 10 mils or less, the insulating layer 310 may be formed of a semi-cured film. Conversely, when the insulating layer 310 necessarily needs to have a relatively thick thickness, such as more than 10 mils, the insulating layer 310 may include a semi-cured film and a blank core.

Referring to FIG. 2E and FIG. 2F, the carrier substrate 210 can then be removed. In detail, a portion of the carrier substrate 210 can be removed, such as removing the second material layer 212b. For example, since the second material layer 212b may be metal, the second material layer 212b may be removed using an etching process. In addition, the second material layer 212b may also be a plastic or polymer material, so the second material layer 212b may also be removed by peeling or other means.

Referring to FIG. 2F to FIG. 2H, a conductive connection structure 330 is formed in the insulating layer 310, as shown in FIG. 2H. The conductive connection structure 330 is connected between the first circuit layer 230 and the second circuit layer 320. In the embodiment shown in FIG. 2H, the conductive connection structure 330 is a conductive blind via structure, but in other embodiments not shown, the conductive connection structure 330 may also be a conductive via structure. Therefore, the conductive connection structure 330 shown in FIGS. 2A to 2J is not intended to limit the present invention.

There are various methods for forming the conductive connection structure 330, and a method of forming the conductive connection structure 330 will be described below with reference to FIGS. 2F to 2H. However, it should be noted that the method of forming the conductive connection structure 330 disclosed in FIG. 2F to FIG. 2H is for illustrative purposes only and is not intended to limit the invention.

Referring to FIG. 2F and FIG. 2G, first, a drilling process is performed on the first circuit layer 230 to form at least one blind via B1, wherein the blind via B1 extends from the first wiring layer 230 to the second wiring layer 320, and is blind. The hole B1 partially exposes the second wiring layer 320. In this embodiment, the first circuit layer 230 may include at least one annular conductive pattern 232, a plurality of traces 234, and at least one pad 236, and the drilling process is a laser drilling process, wherein FIG. 2F also shows A top view of the annular conductive pattern 232 is taken out.

In the above, when performing the laser drilling process, the laser may be first aligned with the intermediate portion of the annular conductive pattern 232, as shown by the dotted line in FIG. 2F. Next, a laser beam is emitted to melt the first material layer 212a and the insulating layer 310 to form a blind via B1, wherein the blind via B1 extends from the annular conductive pattern 232 to the second wiring layer 320.

After the blind holes B1 are formed, some of the glue remains at the bottom of the blind holes B1, and these slags reduce the quality of the electrical connection between the first circuit layer 230 and the second circuit layer 320. Therefore, after the blind hole B1 is formed, the blind hole B1 can be desmear. In this way, the quality of the electrical connection between the first circuit layer 230 and the second circuit layer 320 can be improved.

Referring to FIG. 2G and FIG. 2H , a conductive via structure (ie, the conductive connection structure 330 ) is formed in the blind via B1 , and the conductive connection structure 330 may be made of the same material as the first wiring layer 230 . The method of forming the conductive connection structure 330 may include an electroplating method, and when the conductive connection structure 330 is formed, a plated metal layer 340 is also formed on the first material layer 212a. In addition, another method of forming the conductive connection structure 330 may include filling a conductive paste or a conductive paste, such as copper paste, copper paste, carbon paste, carbon paste, conductive polymer conductive material or other conductive and fluid conductive. material. After forming the conductive connection structure 330, an electroplating process is performed to form a plated metal layer 340 on the first material layer 212a.

It is worth mentioning that the above drilling process can also be a mechanical drilling process. In detail, if the thickness of the insulating layer 310 is too thick, for example, more than 100 micrometers, a mechanical drilling process can be utilized to form the blind via B1. In addition, the conductive connection structure 330 may also be a conductive via structure. When the drilling process is a mechanical drilling process, the conductive connection structure 330 can be formed by a mechanical drilling process without requiring the annular conductive pattern 232. Therefore, the method of forming the conductive blind via structure 330 disclosed in FIGS. 2F to 2H is merely illustrative and is not intended to limit the present invention.

2H and FIG. 2I, after forming the conductive connection structure 330, the plated metal layer 340 and the first material layer 212a are etched to completely remove the carrier substrate 210 and expose the anti-corrosion barrier layer 220. Since the material of the first material layer 212a is different from the material of the anti-corrosion barrier layer 220, when the first material layer 212a is etched, the anti-corrosion barrier layer 220 can protect the first circuit layer 230 from etching agents to avoid the first line. The surface of layer 230 becomes rough.

Referring to FIG. 2I and FIG. 2J, the anti-corrosion barrier layer 220 is removed. The anti-corrosion barrier layer 220 may be partially removed, that is, a portion of the anti-corrosion barrier layer 220 remaining on the pads 236. Of course, the anti-corrosion barrier layer 220 can also be completely removed depending on the design and requirements of the product.

The material of the anti-corrosion barrier layer 220 may be nickel, tin, gold, chromium, titanium or other low-chemically active metal materials, or may be any combination of these metal materials. When the material of the anti-corrosion barrier layer 220 is nickel, gold may be directly plated on the pad 236 for surface treatment. This can increase the oxidation resistance of the pad 236. When the material of the anti-corrosion barrier layer 220 is tin, the anti-corrosion barrier layer 220 can be applied to the surface treatment of the lead-free metal. It can be seen that the partially retained corrosion inhibiting layer 220 can be applied in subsequent surface treatments.

Thereafter, a solder resist layer 350 may be formed on the first wiring layer 230 and the insulating layer 310, and a wiring board 300 is substantially completed.

It is worth mentioning that the circuit board 300 of the present embodiment can be applied in a chip packaging process, that is, the circuit board 300 can be an IC carrier board. Of course, the circuit board 300 can also be used to assemble electronic components such as capacitors, resistors, inductors, and chip packages. Therefore, the circuit board 300 of the present embodiment can be applied to a first, second or second order packaging process.

[Second embodiment]

3A to 3F are schematic flow charts showing a method of manufacturing a circuit structure of a circuit board according to a second embodiment of the present invention. Referring to FIG. 3A, first, an anti-corrosion barrier layer 420 is formed on a carrier substrate 410, wherein the anti-corrosion barrier layer 420 comprehensively covers the carrier substrate 410, and the material and thickness of the anti-corrosion barrier layer 420 can be the same as that of the first embodiment. The barrier layer 220 is the same.

The structure of the carrier substrate 410 may be the same as that of the carrier substrate 210 of the first embodiment, that is, the carrier substrate 410 may be a composite board made of two materials. Of course, the carrier substrate 410 may be made of only a single material. For example, the carrier substrate 410 may be a single material metal plate, a ceramic plate or a plastic plate, or the carrier substrate 410 may be made of two or more materials. Into the composite board.

Referring to FIG. 3B, next, a first wiring layer 430 is formed on the anti-corrosion barrier layer 420. The method of forming the first wiring layer 430 is the same as that of the first embodiment, and therefore the description will not be repeated. After the first wiring layer 430 is formed, a wiring carrier substrate 400 is substantially formed.

Referring to FIG. 3C, after the line carrier substrate 400 is formed, the bonding line carrier substrate 400 is disposed on an insulating layer 510, wherein the insulating layer 510 is disposed on a second circuit layer 520, and the first circuit layer 430 is The two circuit layers 520 are respectively located on opposite sides of the insulating layer 510. In this embodiment, the first circuit layer 430 can include at least one annular conductive pattern 432, a plurality of traces 434, and at least one pad 436. FIG. 3C also illustrates a top view of the annular conductive pattern 432.

The second wiring layer 520 shown in FIG. 3C may be an inner layer wiring of the wiring board. However, in other embodiments not shown, the second circuit layer 520 may also be an outer layer of the circuit board, that is, the first circuit layer 430 and the second circuit layer 520 may be two-layer lines of the double-sided circuit board. Therefore, the second circuit layer 520 shown in FIGS. 3A to 3F is merely illustrative and does not limit the present invention.

Referring to FIG. 3C and FIG. 3D, a conductive connection structure 530 is formed in the insulating layer 510, and the carrier substrate 410 is removed. The method of forming the conductive connection structure 530 and the method of removing the carrier substrate 410 are similar to those of the first embodiment, and therefore will not be repeatedly described.

Although the conductive connection structure 530 shown in FIG. 3D is a conductive blind hole structure, in other embodiments not shown, the conductive connection structure 530 may also be a conductive via structure. Therefore, the conductive connection structure 530 shown in FIGS. 3A to 3F does not limit the present invention.

Referring to FIG. 3D and FIG. 3E, the anti-corrosion barrier layer 420 is completely removed to expose the first wiring layer 430, the insulating layer 510, and the conductive connection structure 530. As such, a circuit board 500 has been substantially completed.

Referring to FIG. 3F, a solder mask 540 may be formed on the insulating layer 510 and the first wiring layer 430. The solder resist layer 540 exposes the pads 436 and covers the traces 434 and the conductive connection structure 530.

In summary, when the carrier substrate is removed, the anti-corrosion barrier layer can protect the first circuit layer to avoid roughening of the surface of the first circuit layer and uneven thickness. Compared with the prior art, the present invention can improve the electrical quality of the circuit board, thereby improving the yield of the circuit board.

In addition, the anti-corrosion barrier layer may be partially retained, and a portion of the retained anti-corrosion barrier layer may be applied to subsequent surface treatments, thereby reducing the time required for subsequent surface treatment.

The present invention has been disclosed in some embodiments, and is not intended to limit the scope of the present invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims.

100. . . Buried circuit board

110a, 110b, 200, 400. . . Line carrier substrate

112a, 112b, 210, 410. . . Carrier substrate

114a, 114b. . . Copper metal layer

116a, 116b. . . Copper circuit layer

120. . . Dielectric layer

130a, 130b. . . Copper plating

140. . . Ink material

150a, 150b, 350, 540. . . Solder mask

210a. . . surface

212a. . . First material layer

212b. . . Second material layer

220, 420. . . Anti-corrosion barrier

230,430. . . First circuit layer

232, 432. . . Circular conductive pattern

234, 434. . . Traces

236, 436. . . Pad

240. . . Patterned photosensitive layer

300, 500. . . circuit board

310, 510. . . Insulation

320, 520. . . Second circuit layer

330, 530. . . Conductive connection structure

340. . . Plating metal layer

B1. . . Blind hole

T1. . . Conductive via structure

1A to FIG. 1E are schematic flow diagrams illustrating a method of manufacturing a buried circuit board according to a conventional method.

2A to 2J are schematic flow charts showing a method of manufacturing a circuit structure of a circuit board according to a first embodiment of the present invention.

3A to 3F are schematic flow charts showing a method of manufacturing a circuit structure of a circuit board according to a second embodiment of the present invention.

200. . . Line carrier substrate

210. . . Carrier substrate

212a. . . First material layer

212b. . . Second material layer

220. . . Anti-corrosion barrier

230. . . First circuit layer

310. . . Insulation

320. . . Second circuit layer

Claims (9)

A method for manufacturing a circuit board structure includes: forming a circuit carrier substrate, comprising a carrier substrate, a first circuit layer, and an anti-corrosion barrier layer between the carrier substrate and the first circuit layer; The circuit carrying substrate is disposed on an insulating layer, wherein the insulating layer is disposed on a second circuit layer before pressing the circuit carrier substrate, and the first circuit layer and the second circuit layer are respectively located on the insulating layer After the two sides are pressed, a conductive connection structure is formed in the insulating layer, wherein the conductive connection structure is connected between the first circuit layer and the second circuit layer; and the carrier substrate is removed And partially removing the anti-corrosion barrier layer while leaving a portion of the anti-corrosion barrier layer on the first wiring layer. The method of manufacturing a wiring structure of a wiring board according to claim 1, wherein the carrier substrate is made of a single material. The method of manufacturing a circuit board of the circuit board of claim 1, wherein the carrier substrate comprises a first material layer and a second material layer, and the first material layer is located at the second material layer Between the anti-etching barrier layers, the method of removing the carrier substrate includes: removing the second material layer before forming the conductive connection structure; and etching the first material layer after forming the conductive connection structure. The circuit structure of the circuit board as described in claim 1 The manufacturing method, wherein the method of forming the conductive connection structure comprises: performing a drilling process on the first circuit layer to form a blind via, wherein the blind via extends from the first circuit layer to the second circuit layer; And forming a conductive blind via structure in the blind via, wherein the conductive via via is electrically connected between the first wiring layer and the second wiring layer. The method for manufacturing a circuit structure of a circuit board according to claim 4, wherein the drilling process is a laser drilling process or a mechanical drilling process. The method of fabricating a wiring structure for a wiring board according to claim 4, wherein the first wiring layer comprises at least one annular conductive pattern, and the blind via extends from the annular conductive pattern to the second wiring layer. The method for manufacturing a wiring structure of a wiring board according to claim 1, wherein the material of the corrosion inhibiting layer is selected from the group consisting of nickel, tin, gold, chromium, and titanium. The method of manufacturing a wiring structure of a wiring board according to claim 1, wherein the corrosion inhibiting layer has a thickness of between 0.1 μm and 10 μm. The method for manufacturing a circuit board structure according to claim 1, wherein the method for forming the circuit carrier substrate comprises: forming a patterned photosensitive layer on the carrier substrate, partially exposing a surface of the carrier substrate; Forming the anti-corrosion barrier layer on the carrier substrate, wherein the anti-corrosion barrier layer covers a surface of the carrier substrate partially exposed by the patterned photosensitive layer; forming the first circuit layer, wherein the first circuit layer covers the anti-corrosion resistance a barrier layer; and removing the patterned photosensitive layer.