TW556453B - PCB with inlaid outerlayer circuits and production methods thereof - Google Patents

PCB with inlaid outerlayer circuits and production methods thereof Download PDF

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Publication number
TW556453B
TW556453B TW91101781A TW91101781A TW556453B TW 556453 B TW556453 B TW 556453B TW 91101781 A TW91101781 A TW 91101781A TW 91101781 A TW91101781 A TW 91101781A TW 556453 B TW556453 B TW 556453B
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Taiwan
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layer
circuit board
printed circuit
item
scope
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TW91101781A
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Chinese (zh)
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Shiue-Fang Wu
Shiau-Chi Wen
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Shiue-Fang Wu
Shiau-Chi Wen
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Priority to TW91101781A priority Critical patent/TW556453B/en
Priority to JP2002130672A priority patent/JP2003234564A/en
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Publication of TW556453B publication Critical patent/TW556453B/en

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Abstract

Printed circuit board (PCB) with inlaid outerlayer circuits and production methods thereof. The present invention provides an innovative thin flat printed circuit board having outerlayer circuitry inlaid into the dielectric layer, thus the circuitry has 3-side adhesion with the adjacent dielectric material. According to the methods for manufacturing such PCB of the present invention, various difficulties and defects incurred by using conventional copper clad laminate and/or copper foil are avoided. This invention employs the TIPTOP (template inlay precision transfer of patterns) process, using optical engraving and pattern metallization procedures conducted on a metal plate to form the circuit pattern, followed by transferring the pattern to a polymer-based dielectric material via lamination. Finally, a printed circuit is emerged after removal of metal plate and etching away the covering copper foil. This invention is particularly useful in manufacturing ultra thin PCB with very fine line width and pitch.

Description

五、發明說明(1) t發明係有關於一種印刷電路板 別是有關於一種且有鑪旗岭从βA 八表Xe方法,特 法。 /、 入式外層導線之印刷電路板及其製 ,統習用之印刷電路板製法是在銅箔基 造單、雙面&」i t 轉移、㈣、電料方法以製 内M U it政^ „之導電線路或疋多層印刷電路板之 ”介:之膠合片(Prepreg編“ly)以卜:壓線二之銅: :轉移、 t^^, 1 Λ?1 V'"" 1 9 ^ ^ Μ « ”Τ1ϋ代表介電之膠合片,而 卜層導電線路,該最外層導電線路與介電 f 一广::之黏著結心對於厚銅箱、寬線路之有 板傳統之製法不失為—項經濟有效的方法W電路 …、、而,為了因應電子產品朝向輕薄短小發展的 Γ刷:路板之製造亦朝向厚度超薄,導電i:;:;;, :统ίΐί、!ΠΓ發展,因此薄基板、薄銅落成為依昭 傳、,先方法製造超薄細線路印刷電路板 :、 印刷電路板之製程包合古、θ a 晋之穿、材枓,惟 皮々L广回溫、兩濕、強酸強驗的處理裎 二?此壤境下薄基板容易因熱漲冷 j 增加加工之難度且難以大面積製作,,1不但 人# 早而形成產品瑕疵;此外,或是闵盔# 因為外層導線凸出,不路導致產品缺陷;或是 不仁&成表面凹凸不平,更因為與介 556453 發明說明(2) 電層的黏著力不足,因此 清理)時容易因外力損俨在加防焊綠漆之前處理(刷磨 因導致傳統方法用落而造成不良產品;種種原 符合經濟效益或品質可主超溥細線路之印刷電路板時無法 直無法有效克服的技術:J原則’這些都是亟待解決卻- 有鐘於此,本發明搵报 刷電路板,如第2及3圖二種具有鑲嵌式外層導線之印 表鑲嵌於介電質的導電線=:==100代表介電質’120代 係鑲嵌於介電層内,因& * ,其特徵為最外層之導電線路 因而與介雷屏且古一;丄a 本發明亦提供-種根據磁=:;有。面之㈣結合。 大致分具;= 冓之印刷電路板的方法,其 屬薄膜於-離型模版上,阻/法.)係先形成—導電金 膜,另一作用A报士 ”乍用有一.主要為當作離型 阻構成的溝槽内形成導電:路有::後續以電鍍方式在光 (電AD=:r 法二 电兔屬膜於一離型模版卜,Μ ^ 阻臈構& f m g m f g k 1用錫膜、錫合金膜或光 :ΠΓίΓ可得到導電線路。接著在線路及模版 上开y成一層薄金屬膜(作為齙刑 步驟。此法為減去法⑽Btra(:Tive)。以便進灯接、、,之壓合 面笨目的旨在提供一種具有鑲喪式外層導線之平 : = !ί路板’而其特徵為最外層之導線係鑲嵌於由 同刀子t合物所構成的介電層内,目*與介電層具有兩側V. Description of the invention (1) The invention of the invention relates to a printed circuit board, in particular, to a method and a furnace flag range from βA to Xe method, special method. / 、 The printed circuit board and its manufacturing of in-line outer conductors. The conventional printed circuit board manufacturing method is to make single, double-sided & "Conductive circuit or multi-layer printed circuit board" "Medium:" Prepreg ed. "Ly": Copper wire: 2 transfer, t ^^, 1 Λ? 1 V '" " 1 9 ^ ^ «" T1ϋ "stands for dielectric plywood, and the layered conductive line, the outermost conductive line and the dielectric f are widely used :: The adhesion of the core to the thick copper box, the wide line of traditional manufacturing methods — An economical and effective method for W circuits ... In order to respond to the development of electronic products toward light, thin, and short Γ brushes: the manufacture of road boards is also oriented to ultra-thin, conductive i:;: ;;,: tong ίΐί,! ΠΓ development Therefore, thin substrates and thin copper substrates have become the first method to manufacture ultra-thin and thin-circuit printed circuit boards according to Zhao Chuan :, the manufacturing process of printed circuit boards includes the ancient, θ a, Jin, and materials, but the leather is widely used. Temperature, humidity and strong acid treatment? In this soil environment, the thin substrate is easy to increase processing difficulty due to heat and cold, and it is difficult to produce a large area. 1 not only people # early and cause product defects; in addition, or Min helmet # because the outer wire is protruding, the product will be caused by the way Defects; or embarrassment & unevenness of the surface, and because of the description of the invention (2) Insufficient adhesion of the electric layer, so it is easy to be damaged due to external forces when it is cleaned. Lead to the use of traditional methods and cause bad products; all kinds of technologies that are originally economical or can not be effectively overcome when printed circuit boards with ultra-thin lines can be used: J principles' these are urgent needs to be resolved-but there is a clock here The printed circuit board of the present invention, as shown in Figures 2 and 3, has two types of printed wires with inlaid outer conductors. The conductive wires are embedded in the dielectric. =: == 100 represents the dielectric. The 120th generation is embedded in the dielectric. In the layer, because of & *, it is characterized by the outermost conductive line and therefore Jie Lei Ping and Gu Yi; 丄 a The present invention also provides-a kind of magnetic basis = :; Yes. The combination of surface ㈣. Roughly divided; = The method of the printed circuit board It is a thin film on a release mold, resistance / method.) Is formed first-conductive gold film, the other function is A. "The first use is. It is mainly used to form conduction in the trench formed by the release resistance: road Have :: Followed by electroplating in the light (electric AD =: r method, the second electric rabbit film is in a release template, M ^ resistance structure & fmgmfgk 1 can be obtained with tin film, tin alloy film or light: ΠΓίΓ can be obtained Conductive circuit. Then open y to form a thin metal film on the circuit and the template (as a punishment step. This method is to subtract the method Btra (: Tive). In order to enter the lamp connection, the, and the crimping surface is intended to provide A type of flat wire with an inlayed outer layer: =! Ί road board, and its characteristic is that the outermost wire is embedded in a dielectric layer composed of the same compound, and the mesh and the dielectric layer have two sides

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面及底面共三個介面的黏著結合。 本^明之另一目的旨在提供一種具有鑲嵌式外層導線 =γ型印刷電路板,其特徵為成品之總厚度僅為各層 由南为子聚合物所構成之介電質膠合片經壓合之後的累計 厚度與最外層保護膜厚度之總和。 本發明之又一目的旨在提供一種製造具有鑲嵌式外層 導線之平面薄型印刷電路板以及多層印刷電路板之製造方 法’從根本免除薄基板與薄鋼箔所衍生的技術難題。 本發明之具有鑲嵌式外層導線之印刷電路板,其包括 介電層以及導線層,其特徵在於該導線層係鑲嵌於^介電 層中。適用於本發明之介電層是由絕緣材料所構成之介電 質膠合片(prepreg),而該絕緣材料較佳為高分子聚合物 (Polymer Resin),例如環氧樹脂、改質之環氧樹脂、聚 酯(Polyester)、丙烯酸酯、氟素聚合物 (Fluoro-polymer)、聚亞苯基氧化物(p〇iyphenylene Oxide)、聚醯亞胺(Polyimide)、酚醛樹脂(phenolic resin)、聚楓(Polysulfone)、矽素聚合物(Silicone polymer)、BT樹脂(Bismaleimide Triazine ModifiedAdhesive combination of three interfaces on the top and bottom. Another object of the present invention is to provide a printed circuit board with a mosaic outer wire = γ-type printed circuit board, which is characterized in that the total thickness of the finished product is only after the layers of the dielectric adhesive sheet composed of the south polymer are laminated. Sum of the cumulative thickness and the thickness of the outermost protective film. Yet another object of the present invention is to provide a manufacturing method of a planar thin printed circuit board with a multilayer outer conductor and a multilayer printed circuit board ', which fundamentally eliminates the technical problems derived from thin substrates and thin steel foils. The printed circuit board with inlaid outer-layer wires of the present invention includes a dielectric layer and a wire layer, and is characterized in that the wire layer is embedded in the dielectric layer. The dielectric layer suitable for the present invention is a dielectric prepreg composed of an insulating material, and the insulating material is preferably a polymer resin, such as epoxy resin, modified epoxy Resin, Polyester, Acrylate, Fluoro-polymer, Polyphenylene Oxide, Polyimide, Phenolic Resin, Poly Maple (Polysulfone), Silicone polymer (Silicone polymer), BT resin (Bismaleimide Triazine Modified

Epoxy(BT Resin)、氰酸聚自旨(Cyanate Ester)及聚乙稀 (Pol ye thy 1 ene)。該導線層則較佳由銅、金或鋁構成,且 單層之導線層厚度較佳在76微米(MICRON)以下。 上述高分子材料中’亦可包含玻璃纖維、A r a m i d纖維 或PTFE纖維之補強物,以及陶瓷類粉末之改質填充物。 根據本發明之一實施例(光阻膜法),具有鑲嵌式外層Epoxy (BT Resin), Cyanate Ester and Pol ye thy 1 ene. The wire layer is preferably composed of copper, gold or aluminum, and the thickness of the single wire layer is preferably less than 76 microns (MICRON). The above-mentioned polymer material 'may also include a reinforcing material of glass fiber, Aramid fiber or PTFE fiber, and a modified filler of ceramic powder. According to an embodiment of the present invention (photoresist film method), it has a mosaic outer layer

556453 五、發明說明(4) 導線之印刷電路板的萝 版;(b)在該離型模版、之〉’包括:ja)*供—離型模 屬層上形成光阻層;= ^形成金屬層;(c)在該金 定的電路圖形,而露出/先^影在邊先阻層上形成既 形成導線層於露出之;金屬層;(:)進行金屬化 成具有既定電路圖形的導二’(f )移除忒光阻層而形 離型模版與一介電声Ϊ線層於該離型模版上;(㈧將該 而鑲嵌於該介;使該導線層與介電層緊密結合 合;⑻除去該離型模:.= 而得。 ’及G)除去該介電層上的金屬層 或矣^ ^忒離型杈版為表面經300到1 600粒度等級之拋光 $表:::加:護膜之金屬板,該保 鑛 鋁、锯卞馐二:。適用於本發明之金屬層為銅、 銘錫或鎳,而導線層較佳為銅、金或銘。 、:據,發明之具有鑲嵌式外層導線之印刷電路板的製 ^ 4金屬化形成金屬層之步驟可藉由電鍍法、電解 '、法、化學沈積法、氣相沈積法或濺鍍法進行。 根據本發明之另一實施例(雷射熔蝕法),具有鑲嵌式 夕層導線的印刷電路板之製造方法,包括:(a )提供一離 型模版’(b)依序在該離型模版之一表面上全面形成導線 $以及保護層;(c)藉由一圖案化步驟將該導線層形成所 需之線路圖形;(d )對該導線層及該離型模版全面進行金 屬化而在該離型模版表面形成一金屬層;(e)將該離型模 版與一介電層壓合,使該導線層與介電層緊密結合而鑲嵌556453 V. Description of the invention (4) Loose version of the printed circuit board of the lead; (b) Forming a photoresist layer on the release stencil, including: ja) * supply-release mold layer; = ^ form A metal layer; (c) forming a circuit pattern on the gold, and forming an exposed / first shadow layer on the edge-first resistance layer to form a wire layer to be exposed; a metal layer; (:) metallizing a conductive pattern having a predetermined circuit pattern 2 '(f) remove the 忒 photoresist layer and release the stencil and a dielectric acoustic ray wire layer on the stencil; (㈧ inlaid in the dielectric; make the wire layer and the dielectric layer tight Combined; ⑻ remove the release mold:. = To get. 'And G) remove the metal layer or 矣 ^ ^ 忒 忒 release plate is a surface polished from 300 to 1 600 particle size ::: Plus: The metal sheet of the protective film. The metal layer suitable for the present invention is copper, tin or nickel, and the wire layer is preferably copper, gold or tin. According to: According to the invention, the production of a printed circuit board with a mosaic-type outer conductor ^ 4 The steps of metallization to form a metal layer can be performed by electroplating, electrolysis, chemical deposition, vapor deposition, or sputtering. . According to another embodiment of the present invention (laser ablation method), a method for manufacturing a printed circuit board with a mosaic-type conductive layer includes: (a) providing a release template '(b) sequentially in the release A wire $ and a protective layer are formed on one surface of the template; (c) the wire layer is formed into a desired circuit pattern through a patterning step; (d) the wire layer and the release template are metallized in a comprehensive manner. A metal layer is formed on the surface of the release stencil; (e) the release stencil is laminated with a dielectric, so that the wire layer and the dielectric layer are tightly combined and embedded;

第9頁 1^· 556453 五、發明說明(5) -—— 於該介電層中,且該金屬層則與該介電層之表面接人· (h)移除該離型模版;及(i)除去該介電層上的金屬二而 得。 曰 上述方法中該保護層是用以在後續之化學蝕刻+ 護線路板,其較佳為錫膜或共熔組成之錫合金骐,^該錫 合金較佳為錫鉛合金、錫銅合金、錫銀合金、 人二’ 錫銀銅合金。 η 4或 根據本發明之具有鑲嵌式外層導線之印刷電路板的製 造方法,除了可單獨或複數個組成單面、雙面印: 之外’亦可製造多層印刷電路板。 根據本發明之另一實施例,可將上述方法製得的線 板堆疊而形成多層印刷電路板,其方法包括:(& )以上述 方法形成複數個鑲嵌式外層導線之印刷電路板做為内層線 路板,(b)以上述方法形成複數個尚未脫模的鑲嵌式外層 導線之印刷電路板做為外層線路板;(c)將一外層線路9 板、一介電層、一内層線路板、一介電層、一外層線路 對位疊合並壓合;(d)除去離型模版;以及(e)去除包附在 表面的金屬層以形成具有鑲嵌式外層導線之多層印刷電路 板。 上述方法中步驟(c )中該等線路板亦可以交錯對位而 疊合。 、本發明之鑲般式外層導線平面超薄印刷電路板,主要 為無須透過傳統製程所需之在薄基板或是銅羯上進行影像 轉移、蝕刻、壓合等容易造成產品缺陷的方法,直接在潔Page 9 1 556453 5. Description of the invention (5) ----- In the dielectric layer, and the metal layer is in contact with the surface of the dielectric layer. (H) Remove the release template; and (I) It is obtained by removing metal two on the dielectric layer. In the above method, the protective layer is used for subsequent chemical etching + protecting the circuit board. It is preferably a tin film or a eutectic tin alloy, and the tin alloy is preferably a tin-lead alloy, a tin-copper alloy, Tin-silver alloy, man II 'tin-silver-copper alloy. η 4 or the method for manufacturing a printed circuit board with inlaid outer conductors according to the present invention can be used to manufacture a multilayer printed circuit board in addition to single or double-sided printing: alone or in plural. According to another embodiment of the present invention, the wire boards obtained by the above method can be stacked to form a multilayer printed circuit board. The method includes: (&) A printed circuit board in which a plurality of inlaid outer layer wires are formed by the above method. Inner layer circuit board, (b) forming a plurality of printed circuit boards with inlaid outer layer wires that have not been demolded as the outer layer circuit board in the above-mentioned method; (c) using an outer layer circuit board 9, a dielectric layer, and an inner layer circuit board A dielectric layer and an outer layer line are aligned and laminated; (d) removing the release template; and (e) removing the metal layer enclosed on the surface to form a multilayer printed circuit board with a mosaic-type outer conductor. The circuit boards in step (c) in the above method may also be staggered and aligned. The flat ultra-thin printed circuit board with inlaid outer wires of the present invention is mainly a method that does not require image transfer, etching, lamination, etc. on a thin substrate or copper backing, which is likely to cause product defects, through the traditional process. In clean

556453 五、發明說明(6) _ 淨平滑的離型模版上利用光學鑄模及 (MetaU ization)技術形成所需之導°案-屬化 方式將此線路轉移鑲嵌於由古八〒电深路’並藉由壓合 膠合片上,再將覆蓋在表層合物所構成之介電質 而顯現所需之導電線路;本明^以蝕刻方式去除,從 板其最外層導線係鑲嵌於介^ 、徵為製成之印刷電路 圖所示之凸出於介電層之上,:盥:非傳統製法如第1 的黏著結合。 /、;丨電層具有三個介面 根據本發明之方法,可 路板製程所衍生的諸如薄鋼 /、= ^、、、田線路薄型印刷電 JX辟則泊谷易皺折、 不同層線路對位困冑、外層導;J基板易變形、 剝洛、、電路板表面因導線外凸而不平整的Κΐ: 所ίίί2Ϊ高產品良率。_免處理薄基板或薄二: 縮所衍生 =導㈡力不足的問題,可製成細導線内= 板並肊棱昇產品良率與降低製造成本。 冤路 下文i 述::丄特徵和優點更明顯易懂, 下: 佳貫鼽例,並配合所附圖示,作詳細說明如 簡單圖式說明·. 第1圖係顯示習用技術之印刷電路板的實施例結構 圖0 第2圖係顯示本發明之雙面印刷電路板的結構圖。556453 V. Description of the invention (6) _ The use of optical molds and (MetaU ization) technology to form the necessary guidance on the net-smooth release template-case-based method to transfer and inlay this line in the ancient Hachiman Electric Deep Road ' And by pressing the glued sheet, and then covering the dielectric composed of the surface layer composition to display the required conductive lines; this Ming ^ removed by etching, the outermost wire from the board is embedded in the dielectric ^, The printed circuit diagram shown above is made to protrude above the dielectric layer, as shown in the following figure: Non-traditional manufacturing method such as the first adhesive bonding. / 、; 丨 Electric layer has three interfaces. According to the method of the present invention, thin-film printed circuits such as thin steel /, = ^, and, which are derived from the circuit board manufacturing process, can easily be wrinkled and have different layers. Alignment difficulties, outer layer guide; J substrate is easily deformed, peeled, and the surface of the circuit board is uneven due to the protruding wires of the wires. Κΐ: So ίί 2 2 High product yield. _No need to deal with thin substrates or thin substrates: Shrinkage-derived = Insufficient conductivity, can be made into thin wires = Boards and sharpen product yield and reduce manufacturing costs. The injustices are described below: 丄 The features and advantages are more obvious and easy to understand, and the following: Good examples, and the accompanying drawings are used to explain in detail, such as simple diagrams. Figure 1 shows the printed circuit of conventional technology Embodiment Structure of the Board FIG. 2 is a diagram showing the structure of a double-sided printed circuit board of the present invention.

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第3圖係顯示本發明之 第4 A〜4 J圖係顯示本發 第5 A〜5 I圖係顯示本發 第6 A〜6 C圖係顯示本發 符號說明: 夕層印刷電路板的結構圖。 明之貫施例1的製程示意圖。 明之實施例2的製程示意圖。 明之實施例3的製程示意圖。 11 0、2 1 0、3 1 0〜離型模版; 140 、 240 、 340〜金屬層; 12、120、220、320 〜導線層; 1 5 0 α、2 6 0〜光阻劑; 230〜保護層;Figure 3 shows the fourth A to 4 J of the present invention. Figure 5 shows the present. 5 A to 5 I. Figure shows the present. 6 A to 6 C. Figure shows the present symbol. Explanation: Structure diagram. The schematic diagram of the manufacturing process of Example 1 of Mingzhiguan. The process schematic diagram of the second embodiment of the invention. The schematic diagram of the manufacturing process of the third embodiment. 11 0, 2 1 0, 3 1 0 ~ release template; 140, 240, 340 ~ metal layer; 12, 120, 220, 320 ~ wire layer; 1 50 0 α, 2 6 0 ~ photoresist; 230 ~ The protective layer;

10、100、200、300〜介電層; 160〜光罩; 9 2 5 0〜雷射溶敍。 實施例 實施例110, 100, 200, 300 ~ dielectric layer; 160 ~ photomask; 9 2550 ~ laser dissolution. Example Example 1

第4A〜U圖係顯示本發明之實施例丨的製程示意圖。如 第4A圖所* ’首先在一平滑潔淨的離型模版11〇表面以電 鍍(electroplating)方式形成一銅羯層14〇。除了銅之 外,亦可為其它導電金屬。接著施加上一層負型 (negative type)光阻層15〇α,如第4β圖所示,再如c 圖所不透過光罩1 60以曝光方式將線路圖之影像轉移至該 光阻層150 α上,該光阻層之已曝光部分15〇因光聚合反應 而硬化如第4D圖所示,移除未反應部分之光阻層丨5〇 α即 形成如第4Ε圖所示的溝槽式電鍍線路模型之光阻層15〇,Figures 4A ~ U are schematic diagrams showing the process of the embodiment of the present invention. As shown in FIG. 4A * ', a copper rhenium layer 14o is first formed by electroplating on a smooth and clean surface of the release template 11o. In addition to copper, it can be other conductive metals. Next, a negative type photoresist layer 15α is applied, as shown in FIG. 4β, and then the image of the circuit diagram is transferred to the photoresist layer 150 in an exposure manner as shown in FIG. On α, the exposed portion of the photoresist layer is hardened by photopolymerization as shown in FIG. 4D, and the unreacted portion of the photoresist layer is removed. 5α forms a trench as shown in FIG. 4E Photoresist layer 15 of the electroplated circuit model,

0747-7 598TWF;Phoebe.p t d 第12頁 556453 五、發明說明(8) ' — ^ ---— 5 5二,進'電錢鋼(或其它導電金屬)以形成所需的鋼導 、^ ’如第4 F圖所示。隨後剝除光阻層1 5 0,即可巧 單層的印刷電路才反如第4G圖戶斤*。 PT传到 再以同樣方法製成另一層印刷電路板,將兩層印刷雷 路板面面相對’中間夾之以介電質膠合片1 00並進行對位 ,^作業如第411圖所示,該銅導線層12〇被鑲嵌於介電質 膠合片^00中,然後拆除離型模版1 1 0後即形成如第4 I圖所 不之覆蓋銅箔層1 4〇之雙面印刷電路板,接著進行蝕刻作 業以除去覆蓋在表面的銅箔層14〇,之後視需要進行鑽 ,二貫孔電鑛、防焊綠漆或表面保護處理之後續作業,即 可传到如第4 J圖所示本發明之具有鑲嵌式外層導線之 薄型印刷電路板。 合八本發明亦可採用正型光阻替代負型光阻,其曝光部分 曰刀解並在進行顯影步驟時被溶解而移除,從而 式線路圖案模型。 霉槽 實施例2 —^第5 A〜5 I圖係顯示本發明之實施例2的製程示意圖。在 實施例2中係透過雷射熔蝕方式以製作鑲嵌式外層導線平 面薄型雙面印刷電路板。此實施例主要係以錫或錫合金祺 做為保濩層,利用雷射炼餘(L a s e r a b 1 a t丨〇 n)雕刻成型方 式以代替光學鑄模成型方式,其詳細製程說明如下: ,首先在一潔淨平滑之離型模版210表面上以電鍍方式 形成一銅落層220 α(或其它導電金屬箔)如第5人圖所示。 然後鍍上一層錫膜230 α(或錫合金膜)如第5Β圖所示做為0747-7 598TWF; Phoebe.ptd Page 12 556453 V. Description of the invention (8) '— ^ --- — 5 52 Second, enter' electric money steel (or other conductive metal) to form the required steel guide, ^ 'As shown in Figure 4F. Then stripping the photoresist layer 150, the single-layer printed circuit is just as good as the 4G picture. PT is transferred to another layer of printed circuit board in the same way, and the two layers of printed circuit boards are facing each other with a dielectric adhesive sheet 100 and aligned. The operation is shown in Figure 411 The copper wire layer 120 is embedded in the dielectric adhesive sheet ^ 00, and then the release template 1 110 is removed to form a double-sided printed circuit covering the copper foil layer 140 as shown in FIG. 4I. Plate, and then carry out an etching operation to remove the copper foil layer 14 covering the surface, and then follow-up operations such as drilling, through-hole electric ore, anti-solder green paint, or surface protection treatment can be transferred to the 4th J as required. The figure shows a thin printed circuit board with inlaid outer conductors of the present invention. The present invention can also use a positive type photoresistor instead of a negative type photoresist, the exposed part of which is sliced and dissolved and removed during the development step, thereby forming a circuit pattern model. Mold mold Example 2-5th to 5th I to 5I are schematic diagrams showing the manufacturing process of Example 2 of the present invention. In Example 2, a laser-etching method was used to produce a flat, thin, double-sided printed circuit board with a mosaic outer conductor. In this embodiment, tin or tin alloy is used as the protective layer, and laser smelting (Laserab 1 at 丨 〇n) is used to replace the optical mold molding method. The detailed process is described as follows: On the surface of a clean and smooth release stencil 210, a copper falling layer 220 α (or other conductive metal foil) is formed by electroplating as shown in the fifth figure. Then coated with a layer of tin film 230 α (or tin alloy film) as shown in Figure 5B

556453 五 、、發明說明(9) 〜 j呆護層’之後利用雷射熔蝕250除去部分錫膜,留住如第 5C圖所示之所需線路圖形的錫膜23〇,接著利用化學蝕刻 之銅猪層而得如第5D圖所示銅導線層220 ’再以 予万式剝除錫膜230如第5E圖所示。隨之再進行電鑛以 確保離型模版210上存在一銅箔層24〇,如第5F圖 I 路板。 夂菴 八、、後以同樣方法製得另一電路板,將一介電質膠合片 2 0 〇置於該兩個電路板之間疊合後,進行對位壓合作業如 第5G圖所示,該銅導線層22〇被鑲嵌於該介電質膠合片2〇〇 中三接著拆除離型模版21〇即可形成如第5H圖所示之表面 ^銅箱層240之雙面印刷電路板,接著進行蝕刻作業以 ’于、去表面銅箔層240,然後視需要進行鑽孔、貫孔電鍍、 =1綠漆或表面保護處理之後續作業,即可得到兩 有鑲嵌式外層導線之平面薄型印刷電路板如第51圖戶;示: 光學錫膜亦可以光阻膜代#,而轉移影像則以 f述之實施例1、2僅以雙面印刷電路板為例 明之製程,同理亦可製作單面印刷電路板。 月本發 實施例3 除了單雙面印刷電路板,本發明 t , , BA.C « „ m Λ /Λ ^ ! I程示意圖。首先,如第6A圖所示, 貫細例3的 之尚未拆除離型模版的線路板做為最 :::或2製成 型模版310、銅導線層32〇、銅落層_ :預J =括: J只表 < 雙面内層556453 V. Description of the invention (9) ~ j After the protective layer is used, a portion of the tin film is removed by laser ablation 250, and the tin film 23 of the required circuit pattern as shown in FIG. 5C is retained, followed by chemical etching. The copper pig layer is obtained as shown in FIG. 5D and the copper wire layer 220 ′ is stripped in a pre-type manner as shown in FIG. 5E. Subsequently, power mining is performed to ensure that a copper foil layer 24 exists on the release template 210, such as the circuit board in FIG. 5F. 28. After that, another circuit board is prepared in the same way. A dielectric adhesive sheet 200 is placed between the two circuit boards and stacked, and the alignment pressure cooperation is performed as shown in Figure 5G. It is shown that the copper wire layer 22 is embedded in the dielectric adhesive sheet 200, and then the release template 21 is removed to form a double-sided printed circuit with a surface ^ copper box layer 240 as shown in FIG. 5H. Plate, and then perform an etching operation to remove and remove the surface copper foil layer 240, and then perform subsequent operations such as drilling, through-hole plating, = 1 green paint, or surface protection treatment to obtain two inlaid outer conductors. The flat thin printed circuit board is shown in Figure 51. Note: The optical tin film can also be replaced by a photoresist film, and the transfer image is described in Example 1 and 2 described in f. Only the double-sided printed circuit board is used as an example. Management can also make single-sided printed circuit boards. Example 3 of the present invention In addition to the single-sided printed circuit board, the t,, BA.C «m Λ / Λ ^! Process schematic diagram of the present invention. First, as shown in FIG. Detach the circuit board of the release template as the most ::: or 2 to make the mold template 310, the copper wire layer 32, and the copper layer _: preJ = including: J only table < double-sided inner layer

〇747-7598TWF;Phoebe.ptd $ 14頁 556453 五、發明說明G〇) f路板^(包括介電層300、銅導線層320 )及尚未拆除離型 ^版之最下層線路八(包括離型模版31〇、銅導線層32〇、鋼 /白層340)依序疊合’在aba之間插入兩個介雷皙膠合片 ,行對位壓合作業。接著拆除離型模版電3二= 仵到表面覆蓋銅箔層34〇之多層印刷電路板如第6β圖所 不、’,後進行蝕刻作業以除去表面銅箔層34〇之後,視需 J J行鑽孔、貫孔電鍍、防焊綠漆或表面保護處理之後續 =業,即可得到所需之具有鑲嵌式外層導線之平面薄型多 層印刷電路板如第6C圖所示。 故經由前述說明可知,本發明之具有 之印刷電路板,具有下列各項優點:有辗嵌式外層導線 1. =使用傳統製程所需之昂貴的薄基板 '薄銅落及 成本及避免薄基板漲縮變形、薄銅箱容易 、、屬折之加工技術難題,可以提昇產品良率。 匆 2. 外層導線係鑲嵌於介電層内:因而與介 且 個,|面的黏著結合,增加附著強度 ;::二 於介雷屏夕μ _ ^ ^ 又田於踝路並未外凸 路為指曰『’避免U工作業時因外力作用而導致線 路文扣、脫落,造成產品的瑕疵。 守双綠 3 ·主要作業係依附在離型模· 不變形且不总、m 、 ·由於離型模版堅固 不艾7且不易漲縮,因此可以避免多 的問題。 θ< 踝路對位不準 可形成超薄超細線路的結構 熱板(Heat spreader)的熱傳路^,.且0有目紐發熱元件到黄 八有降低材枓使用…濟效益,更具有縮〇747-7598TWF; Phoebe.ptd $ 14 pages 556453 V. Description of the invention G) f circuit board ^ (including dielectric layer 300, copper wire layer 320) and the lowest layer of the release ^ version which has not been removed The template 31o, the copper wire layer 32o, and the steel / white layer 340) are sequentially superimposed 'to insert two intermediary Leixi plywood sheets between the aba to perform the counter pressure cooperation. Then remove the release stencil board 32 = to the multilayer printed circuit board whose surface is covered with the copper foil layer 34 °, as shown in Figure 6β, and then perform an etching operation to remove the surface copper foil layer 34 °. After drilling, through-hole plating, solder green paint or surface protection treatment, you can get the required flat thin multilayer printed circuit board with inlaid outer conductors as shown in Figure 6C. Therefore, from the foregoing description, it can be known that the printed circuit board of the present invention has the following advantages: there is a roll-in type outer layer wire 1. = an expensive thin substrate required for using a traditional process; It is a processing technical problem that the expansion and contraction deformation, the thin copper box is easy, and the folding can improve the product yield. Hurry 2. The outer wire is inlaid in the dielectric layer: so it adheres to the dielectric surface and increases the adhesion strength ;: two in the median lightning screen μ _ ^ ^ Youtian Yu ankle road is not convex Lu Wei refers to "'to avoid line buckle and fall off due to external forces during U work, resulting in product defects. Shou Shuang Green 3 · The main operation is attached to the release mold. · It is not deformed and not total, m. · Since the release template is strong and not easy to expand and contract, many problems can be avoided. θ < Misalignment of the ankle path can form a heat transfer path of the structural heat plate (Heat spreader) of ultra-thin and ultra-fine lines ^, and 0 heating elements to Huang Ba can reduce the use of materials ... economic benefits, more Shrink

0747-7598TWF;Phoebe.ptd 第15頁 556453 五、發明說明(11) 子產品體積之 5. 可精確 阻抗控制之優 6. 表面較 峰谷,有助於 綜上所述 路板及其製法 印刷電路板的 薄基板與薄銅 缺失與難題, 雖然本發 限定本發明, 和範圍内,當 範圍當視後附 電線路及 可以明確 外層不再 漆的印刷 明之鑲嵌 形成創新 且其製法 可有效地 南產品良 較佳實施 習此技藝 許之更動 專利範圍 優點。 控制導 點,且 平整: 防焊綠 ,本發 ,不僅 結構, 箔,更 達到提 明已以 #何熟 可作些 之申請 介電層 控制產 因線路 作業及 式外層 的錶嵌 不但免 克服傳 率與降 例揭露 者,在 與潤飾 所界定 之厚度 品之總 密佈形 其品質 導線平 式外層 用昂貴 統製程 低生產 如上, 不脫離 ’因此 者為準 :具有 厚度。 成綿密 〇 面薄型 導線平 的製程 所衍生 成本的 然其並 本發明 本發明 較佳的 起伏的 印刷電 面薄型 設備、 的各項 優勢。 非用以 之精神 之保護0747-7598TWF; Phoebe.ptd Page 15 556453 V. Description of the invention (11) Volume of the sub-product 5. Excellent precision of precise impedance control 6. The surface is more peak and valley, which helps to summarize the road board and its manufacturing method The lack and difficulty of the thin substrate and thin copper of the circuit board, although the present invention limits the present invention, and within the scope, when the scope is viewed, the electric circuit and the inlay that can be clearly defined that the outer layer is no longer painted are innovative and the manufacturing method can be effectively used. South product good implementation of this skill may change the advantages of patent scope. Control guide point and flatness: solder-proof green, the hair, not only the structure, foil, but also to make it clear that the application of dielectric layer control with # 何 熟 可做 some can control the production of the line due to the operation of the line and the embedded surface of the outer layer can not only be overcome The transmission rate and downgrading are revealed, in the total dense shape of the product with the thickness defined by the refining, the quality of the flat outer layer of the conductive wire is expensive, the production process is low, and the above is not detached, so whichever prevails: thickness. The process of forming a thin, flat surface of a thin wire has the same cost as the cost of the invention, and the advantages of the preferred undulating printed circuit surface thin device of the present invention. Protection of non-use spirit

Claims (1)

556453 六、申請專利範圍 --- 1 · 一種具有鑲嵌式外層導線之印刷電路板,其包括: 介電層;以及 導線層;其中該導線層係鑲嵌於該介電層内,而與介 電層有三面之黏著接合。 2 ·如申睛專利範圍第1項所述之鑲嵌式外層導線印刷 電路板,其中該介電層是由絕緣材料所構成。 3 ·如申請專利範圍第2項所述之鑲嵌式外層導線印刷 電路板 八中θ亥絕緣材料為南分子聚合物(P 〇 1 y m e r Resin) ° 4·如申請專利範圍第丨項所述之鑲嵌式外層導線印刷 電路板可單獨或複數個組成單面、雙面或多層導電線路。 5 ·如申請專利範圍第1項所述之鑲嵌式外層導線印刷 電路板,其中導線由銅、金或鋁構成。 6 ·如申請專利範圍第1項所述之鑲嵌式外層導線印刷 電路板,其中單層導線之厚度在76微米(MICRON)以下者。 7·如申請專利範圍第3項所述之鑲嵌式外層導線印刷 電路板,其中高分子聚合物為環氧樹脂、改質之環氧樹 脂、聚酯(Polyester)、丙烯酸酯、氟素聚合物 (Fluoro-polymer)、聚亞苯基氧化物(Polyphenylene Oxide)、聚醯亞胺(Polyimide)、盼酸樹脂(Phenolic resin)、聚楓(Polysulfone)、石夕素聚合物(Silicone polymer)、BT 樹脂(Bismaleimide Triazine Modified Epoxy(BT Resin))、氰酸聚酯(Cyanate Ester)或聚乙稀 (Polyethylene) o556453 VI. Scope of patent application-1 · A printed circuit board with a mosaic-type outer conductor, comprising: a dielectric layer; and a conductor layer; wherein the conductor layer is embedded in the dielectric layer, and the dielectric The layers have three-sided adhesive bonds. 2. The inlaid outer conductor printed circuit board as described in item 1 of the Shenjing patent scope, wherein the dielectric layer is made of an insulating material. 3 · The inlaid outer conductor printed circuit board No. 8 in the patent application scope described in item 2 of the scope of patent application θ hai insulation material is South molecular polymer (P 〇1 ymer Resin) ° 4 · as described in the scope of the patent application The inlaid outer conductor printed circuit board can form single-sided, double-sided or multi-layer conductive circuits individually or in multiples. 5 · The inlaid outer conductor printed circuit board according to item 1 of the scope of patent application, wherein the conductor is composed of copper, gold or aluminum. 6 · The inlaid outer conductor printed circuit board according to item 1 of the scope of patent application, wherein the thickness of the single-layer conductor is less than 76 microns (MICRON). 7. The inlaid outer conductor printed circuit board according to item 3 of the scope of patent application, wherein the high molecular polymer is epoxy resin, modified epoxy resin, polyester, acrylic ester, and fluoropolymer (Fluoro-polymer), Polyphenylene Oxide, Polyimide, Phenolic resin, Polysulfone, Silicone polymer, BT Resin (Bismaleimide Triazine Modified Epoxy (BT Resin)), Cyanate Ester (Polyethylene) or Polyethylene (Polyethylene) o 0747-7598TWF;Phoebe.ptd 第17頁 556453 六、申請專利範圍 8·如申請專利範圍第7項所述之鑲嵌式外層導線印刷 電路板,其中該南分子聚合物亦包含玻璃纖維、Aramid纖 維或PTFE纖維之補強物,以及陶瓷類粉末之改質填充物。 9· 一種具有鑲嵌式外層導線之印刷電路板的製造方 法,包括: (a) 提供一離型模版; (b) 在該離型模版之一表面上形成金屬層; (c) 在該金屬層上形成光阻層; 册(d)以曝光顯影在該光阻層上形成既定的電路圖形, 而露出部分的該金屬層; (e)進行金屬化形成導線層於露出之該金屬声上· (〇移除該光阻層而形成具有既定電路圖二綠 於該離型模版上; ^的導線層 (g) 將該離型模版與一介電層壓合, 電層緊密έ士人而植七仏—人 導線層與介 电尽糸在、、、口。而鑲嵌於該介電層中,而 電層之表面接合; ϋ ,屬層則與該介 (h) 除去該離型模版;及 (1)除去該介電層上的金屬層而得。 I 0 ·如申請專利範圍第9項所述之具有、 , 之印刷電路板的製造方法,其中該離型模:式外層導線 到1 6 0 0粒度等級之拋光或表面施加保護祺之^表面經300 II ·如申請專利範圍第丨〇項所述之具有 屬板。 線之印刷電路板的製造方法,其中該保護膜嵌式外層導 錯、鑛鈦、錢鈦氮或塗佈p T F £者。 、:錢鉻、鑛0747-7598TWF; Phoebe.ptd Page 17 556453 6. Application scope of patent 8. The inlaid outer conductor printed circuit board as described in item 7 of the scope of application for patent, wherein the south molecular polymer also includes glass fiber, Aramid fiber or Reinforcement of PTFE fiber and modified filler of ceramic powder. 9. · A method for manufacturing a printed circuit board with a mosaic-type outer conductor, comprising: (a) providing a release stencil; (b) forming a metal layer on one surface of the release stencil; (c) forming the metal layer A photoresist layer is formed on the book; book (d) forming a predetermined circuit pattern on the photoresist layer by exposure and development, and exposing a part of the metal layer; (e) metallizing to form a wire layer on the exposed metal sound · (0) The photoresist layer is removed to form a green circuit with a predetermined circuit diagram on the release template; the wire layer (g) is a laminate of the release template and a dielectric, and the electrical layer is tightly planted. Seventh 人 —The human wire layer and the dielectric are fully interspersed with each other, and are embedded in the dielectric layer, and the surface of the electric layer is bonded; ϋ, the metal layer and the dielectric (h) remove the release template; And (1) It is obtained by removing the metal layer on the dielectric layer. I 0 · A method for manufacturing a printed circuit board having, as described in item 9 of the scope of the patent application, wherein the release mold: a type outer layer wire to 1 6 0 0 Grain level polishing or surface protection. The surface is 300 II. The method of manufacturing a printed circuit board with a wire as described in the item of the scope of interest, wherein the protective film is embedded with outer layer misleading, mineral titanium, titanium titanium nitrogen, or coated with p TF £. ,mine 0747-7598TWF;Phoebe.ptd 第18頁 556453 六、申請專利範圍 線之印刷電路板的製造方法,其中該金屬層為選自鋼、 金、鋁、錫、鎳所組成之群組中厶/者。 ?口申請專利範圍第1 8項所述之具有鑲嵌式外層導 中該導線層為銅、金或 丨砑寻乾圍第項厂 線之印刷電路板的製造方法,其 鋁。 26·如申請專利範圍第丨8項所述之具有鑲嵌式外層導 線之印刷電路板的製造方法,其中步驟(d )金屬化方法為 電鍍法、電解沈積法、化學沈積法、氣相沈積法或濺鍍 法。 X 2 7 ·如申請專利範圍第丨8項所述之具有鑲嵌式外層 線之印刷電路板的製造方法,其中該方法可適用於製曰造 面、雙面印刷電路板或多層印刷電路板之内層線路。早 2 8 ·如申請專利範圍第1 8項所述之具有鑲嵌式外層導 線之印刷電路板的製造方法,其中該介電層為絕緣材曰料。 29.如申請專利範圍第28項所述之具有鑲嵌式外層 =印刷電路板的製造方法’其中該絕緣材料為高分子聚 造方I一包種括具有鑲嵌式外層導線之多層印刷電路板之製 U)以申請專利範圍第9項或第18項所述 數個鑲嵌式外層導線之印刷電斤江之方法形成複 (b)以申請專利範圍第9項 裏路板, 步驟 、乂驟(3)〜(g)或第18項之 (a )〜(e )所述之方法形成斿 數個尚未脫模的鑲嵌式外 第21頁 0747-7598TWF;Phoebe.ptd 556453 六、申請專利範圍 層導線之印刷電路板 (Γ) ^ m反^為外層線路板; 介電層一一:Λ線路板、-介電層、一.内層線路板、- 曰 卜層線路板對位疊合並壓合, (d) 除去離型模版;以及 (e) 去除包附在表面的金屬層以形成具有鑲嵌式外層 導線之多層印刷電路板。 i右鎮私i & & [之具有銀敗式外層導 3 1 ·如申請專利範圍第1 8項戶'其中少驟(c )中該等線 線之多層印刷電路板的製造方法’ /、 路板係以交錯對位而疊合。0747-7598TWF; Phoebe.ptd Page 18 556453 6. Method for manufacturing a printed circuit board with a patent application line, wherein the metal layer is selected from the group consisting of steel, gold, aluminum, tin, and nickel . The method for manufacturing a printed circuit board with an inlaid outer layer conductor described in item 18 of the patent application scope, wherein the conductor layer is copper, gold, or aluminum alloy. 26. The method for manufacturing a printed circuit board with a mosaic-type outer conductor as described in item 8 of the patent application scope, wherein the step (d) of the metallization method is an electroplating method, an electrolytic deposition method, a chemical deposition method, or a vapor deposition method. Or sputtering. X 2 7 · The method for manufacturing a printed circuit board with an inlaid outer layer wire as described in item 8 of the scope of patent application, wherein the method can be applied to the manufacture of a surface, a double-sided printed circuit board, or a multilayer printed circuit board. Inner circuit. As early as 28 · The method for manufacturing a printed circuit board with a mosaic-type outer layer conductor as described in item 18 of the scope of patent application, wherein the dielectric layer is an insulating material. 29. The method of manufacturing an inlay outer layer = printed circuit board as described in item 28 of the scope of the patent application, wherein the insulating material is a polymer polymer I, including a multilayer printed circuit board including an inlay outer layer wire (U) Utilizing the method of printing electric wires of several inlaid outer conductors as described in item 9 or item 18 of the scope of patent application (b) forming a road board in step 9 of the scope of patent application, steps, steps ( 3) ~ (g) or the method described in item (a) ~ (e) of item 18 to form a number of inlaid outer panels that have not been demolded. Page 21 0747-7598TWF; Phoebe.ptd 556453 The printed circuit board (Γ) ^ m of the wire is the outer circuit board; the dielectric layers are: Λ circuit board, -dielectric layer, one. Inner layer circuit board,-layer circuit board (D) removing the release stencil; and (e) removing the metal layer enclosed on the surface to form a multilayer printed circuit board with a mosaic outer conductor. i 右 镇 私 i & & [of a silver-defining outer layer guide 3 1 · If the patent application scope of the item 18 households 'Among them (c) manufacturing method of the multilayer printed circuit board of these lines' /, The boards are superimposed in staggered alignment. 0747-7598TW; Phoebe, ptd 第22頁0747-7598TW; Phoebe, ptd p. 22
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US7413670B2 (en) 2004-06-25 2008-08-19 Mutual-Pak Technology Co., Ltd. Method for forming wiring on a substrate
TWI398205B (en) * 2008-05-07 2013-06-01 Samsung Electro Mech Method for manufacturing printed circuit board
TWI419022B (en) * 2010-03-16 2013-12-11 Wintek Corp Touch panel and the manufacturing method thereof
TWI420990B (en) * 2010-03-18 2013-12-21 Zhen Ding Technology Co Ltd Method for manufacturing printed circuit board
TWI425898B (en) * 2007-11-22 2014-02-01 Unimicron Technology Corp Method for fabricating wiring structure of circuit board
TWI499364B (en) * 2014-01-03 2015-09-01 Subtron Technology Co Ltd Core substrate and method for fabricating circuit board
TWI640233B (en) * 2016-06-02 2018-11-01 鵬鼎科技股份有限公司 Circuit board unit with fine circuit and method for manufacturing same

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CN112165773B (en) * 2020-10-07 2022-10-11 广州添利电子科技有限公司 Process for manufacturing graph in circuit burying mode

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7413670B2 (en) 2004-06-25 2008-08-19 Mutual-Pak Technology Co., Ltd. Method for forming wiring on a substrate
TWI425898B (en) * 2007-11-22 2014-02-01 Unimicron Technology Corp Method for fabricating wiring structure of circuit board
TWI398205B (en) * 2008-05-07 2013-06-01 Samsung Electro Mech Method for manufacturing printed circuit board
TWI419022B (en) * 2010-03-16 2013-12-11 Wintek Corp Touch panel and the manufacturing method thereof
TWI420990B (en) * 2010-03-18 2013-12-21 Zhen Ding Technology Co Ltd Method for manufacturing printed circuit board
TWI499364B (en) * 2014-01-03 2015-09-01 Subtron Technology Co Ltd Core substrate and method for fabricating circuit board
US9282643B2 (en) 2014-01-03 2016-03-08 Subtron Technology Co., Ltd. Core substrate and method for fabricating circuit board
TWI640233B (en) * 2016-06-02 2018-11-01 鵬鼎科技股份有限公司 Circuit board unit with fine circuit and method for manufacturing same

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