TWI425888B - Circuit substrate structure and method of manufacturing the same - Google Patents

Description

Circuit substrate structure and manufacturing method thereof

The present invention relates to a circuit substrate structure and a method of fabricating the same, and more particularly to a method of fabricating a circuit substrate structure on a non-conductive carrier.

Based on the diversification of current 3C products, the public is more particular about the convenience and portability of 3C products, driving the development of electronic products toward miniaturization, light weight and multi-functionality, and at the same time promoting IC design and its circuit design towards three-dimensional The direction of 3D design is progressing. By the three-dimensional design of the circuit components, complex circuits can be formed on a finite-volume circuit component, so that the electronic product can be reduced in size and weight, and the miniaturization and weight reduction can be made without affecting its function. In other words, the three-dimensional circuit component design enables electronic products to retain complex circuits in a small volume. Therefore, the three-dimensional design of circuit components does make the electronic products smaller, lighter and more multifunctional. Multiple potentials, high product competitiveness, and can be widely used in various levels, such as mobile phones, automotive circuits, cash machines and hearing aids and other electronic products.

At present, one of the various methods for fabricating three-dimensional circuit components is MID-LDS (Molded Interconnect device-Laser Direct Structuring), which is to contain a catalyst. The non-conductive plastic forms the component carrier by injection molding, and then activates the catalyst on the carrier with a laser to convert the catalyst into a catalyst core, through the catalyst core and the pre-plated metal ions. An electroless plating reaction is performed to form a metal conductive line.

The design of the conductive circuit structure in the above three-dimensional circuit process is usually composed of a plurality of lines that are not connected to each other, and the metal catalyst attached to the surface of the portion of the circuit component on which the conductive circuit pattern is to be formed is applied to the electroless plating solution. The pre-plated metal ions present in the catalyst undergo a catalytic reaction to reduce the pre-plated metal ions to a part of the surface of the circuit component on which the circuit pattern is to be formed, so that the electroless plating has no influence on the uneven distribution of the power line and the geometric shape compared to the electroplating. Complex plating parts also have the advantage of obtaining a coating of uniform thickness. At present, the conventional methods use electroless plating to make conductive lines of three-dimensional circuit components.

Electroless plating is a catalytic reaction of a pre-plated metal ion present in an electroless plating solution by a metal catalyst attached to a surface of a circuit component on which a circuit pattern is to be formed without applying electric power. The metal plating ions are reduced to the surface of the portion of the circuit component where the circuit pattern is to be formed. Therefore, the electroless plating method can form a metal plating layer having a uniform thickness on the surface of the portion of the circuit component on which the circuit pattern is to be formed.

It can be seen from the above that the current conductive circuit structure in the three-dimensional circuit process has the purpose of achieving a miniaturization, light weight and multi-functionality of the electronic products, and achieving high product competitiveness, and has a wide application potential in 3C electronic products. In the field, however, it still has the following limitations and disadvantages:

1. A method for manufacturing a three-dimensional circuit component, although the conductive circuit structure in the three-dimensional circuit process can be efficiently produced, but a large amount of catalyst is added to the non-conductive plastic, and then the molded carrier is injected and molded. In the interconnect component-laser direct molding (MID-LDS) process, the catalyst involved in the reaction is only in the surface layer, but it is expensive because it needs to add a certain proportion of catalyst to the non-conductive plastic. Touch Media cost.

2. As mentioned above, a large amount of catalyst is added to the non-conductive plastic in the MID-LDS process, and then injection molded to form a carrier, because the catalyst is evenly distributed in the carrier, and the surface of the metal is removed by laser stripping. The core needs a higher dose of reducing agent concentration in the subsequent electroless plating process to enable the metal core to be smoothly plated. In contrast, the chemical copper plating solution is relatively unstable, and requires more chemical plating solution to chemically reduce the surface of the entire carrier, forming a conductive circuit of the desired three-dimensional circuit on the circuit component, but it consumes high electroless plating. Liquid cost.

Accordingly, the process technology of the existing three-dimensional circuit is still limited by the high production cost, and there is still a lack of a conductive line structure and a manufacturing method thereof for use in the field of 3C electronic products.

In view of the above problems in the prior art, the object of the present invention is to provide a circuit board structure and a manufacturing method thereof, which solve the problems of high production cost and the like in the process of the conventional three-dimensional circuit.

According to the object of the present invention, a method for manufacturing a circuit substrate structure is proposed, which is suitable for a circuit process of a non-conductive carrier. First, a carrier is provided, and an adhesion promoting portion having a rough surface is formed on the surface of the carrier by a roughening treatment method, and adhesion is promoted. The nature of the part is converted from hydrophobic to hydrophilic, and then a catalyst is placed on the surface of the adhesion promoting portion of the carrier, and finally the catalyst is reacted by an electroless plating reduction method to form a metal layer in the adhesion promoting portion.

Preferably, the carrier may be a non-conductive carrier, and has a material of heat conduction property, wherein the roughening treatment may be performed by a sandblasting method or a laser irradiation etching method; the carrier surface may be further provided with a touch before the roughening treatment step Medium insulation layer On the carrier, the carrier penetrates from the catalytic insulating layer to the surface by a roughening treatment, and an adhesion promoting portion is formed on the surface of the carrier.

Preferably, the material of the non-conductive carrier may be a ceramic material or a polymer plastic, wherein the polymer plastic may be a thermoplastic or a thermosetting plastic, wherein the ceramic material may be one of an oxide, a nitride, a carbide, and a boride. . Further, the ceramic material is formed by combining one of an oxide, a nitride, a carbide, and a boride with a binder to form a mixture of injection, extrusion, etc., and after the mixture is formed, the binder is removed and then sintered.

Preferably, the catalyst may be one of titanium, bismuth, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, rhodium, ruthenium, osmium, iridium, iridium, tin or a mixture thereof or the above Elemental compound.

Preferably, the polymer plastic of the non-conductive carrier may be added with an inorganic filler; wherein the inorganic filler may be a component of tannic acid, a citric acid derivative, a carbonic acid, a carbonic acid derivative, a phosphoric acid, a phosphoric acid derivative, an activated carbon, and a porous material. One or a combination of carbon, carbon black, glass fiber, carbon fiber or mineral fiber.

Preferably, the wavelength range of the laser irradiation may be between 248 nm and 10600 nm; wherein the laser irradiation etching method may be a carbon dioxide (CO ₂ ) laser or a Nd: YAG thunder. Shot, doped yttrium vanadate crystal (Nd: YVO ₄ ) laser, excimer (EXCIMER) laser or fiber laser (Fiber Laser).

Preferably, the non-conductive carrier having thermal conductivity properties may disperse a material having a heat conductive property or a derivative thereof therein; more preferably, the material having heat conductive properties may be a metal heat conductive material or a non-metal heat conductive material; The metal heat conductive material may be one or a combination of lead, aluminum, gold, copper, tungsten, magnesium, molybdenum, zinc or silver; the above non-gold The heat conductive material may be graphite, graphene, diamond, carbon nanotube, nano carbon sphere, nano foam, carbon sixty, carbon nano cone, carbon nanometer, carbon nanotube dropper, dendritic carbon micron One of or a combination of structure, cerium oxide, aluminum oxide, zirconium oxide, boron nitride, aluminum nitride, magnesium oxide, tantalum nitride or tantalum carbide.

Preferably, the non-conductive carrier is embedded with at least one heat conducting column for increasing the heat transfer efficiency of the non-conductive carrier; the material of the heat conducting column may be lead, aluminum, gold, copper, tungsten, magnesium, molybdenum, zinc, silver. , graphite, graphene, diamond, carbon nanotube, nano carbon sphere, nano foam, carbon sixty, carbon nanocone, carbon nanohorn, carbon nanotube dropper, dendritic carbon microstructure, cerium oxide One or a combination of alumina, zirconia, boron nitride, aluminum nitride, magnesium oxide, tantalum nitride or tantalum carbide.

Further, by using the manufacturing method as described above, after the carrier is provided, at least one conductive contact is disposed on the carrier outside the adhesion promoting portion by the roughening treatment; and the edge and the adhesion of the carrier are connected by the conductive contacts. The promotion unit forms a common line; a metal layer is disposed on the adhesion promoting portion and each of the conductive contacts; and an anti-plating insulation layer is disposed on each of the conductive contacts; further, the adhesion can be promoted by the electroplating method An electroplated layer is disposed on the portion to increase the thickness of the metal layer; finally, the anti-plating insulating layer and the metal layer disposed on each of the conductive contacts are removed to obtain an independent circuit pattern.

Preferably, the above manufacturing method is suitable for a three-dimensional circuit process of a plastic film interconnection component having heat conduction properties, the carrier having heat conduction property, and a metal layer having electrical conductivity can be generated by electroplating during electroplating. As a negative electrode in the electroplating process, and the positive electrode of the power source is connected with the pre-plated metal solid, when the carrier element is immersed in the plating solution containing the pre-plated metal ions, the pre-plated metal ions receive electrons on the metal layer as the negative electrode. Reducing pre-plated metal to the metal layer to form a desired metal line; wherein the pre-plated metal comprises copper, nickel, chromium, tin, silver or gold or Alloy metal.

According to the manufacturing method of the above-mentioned circuit substrate structure, it can be widely applied to a non-conductive carrier, a non-conductive carrier having thermal conductivity properties, or a three-dimensional circuit process of a plastic film interconnection assembly having heat conduction properties.

An object of the present invention is to provide a circuit substrate structure comprising a carrier and at least one adhesion promoting portion, wherein each of the adhesion promoting portions forms a rough surface on the surface of the carrier by using a roughening treatment method. And the rough surface of each adhesion promoting portion is in an open state, and a metal layer is formed in each of the adhesion promoting portions, and the metal layer is formed by reacting the catalyst of each adhesion promoting portion with the electroless plating solution.

Preferably, the circuit substrate structure further includes at least one conductive contact, and each of the conductive contacts is disposed on the carrier along with the roughening treatment, and is disposed outside each adhesion promoting portion, and is connected to the edge of the carrier by each conductive contact. And each adhesion promoting portion forms a communication line.

The circuit substrate structure further includes a plating layer, and an anti-plating insulating layer is further disposed on each of the conductive contacts, and a plating layer is disposed on each of the adhesion promoting portions by using an electroplating method to increase the thickness of the metal layer on each of the circuit patterns, and finally The anti-plating insulation layer and the metal layer on each of the conductive contacts are removed to obtain an independent circuit pattern.

Another object of the present invention is to fabricate a circuit substrate structure comprising a carrier, a catalyst insulating layer, at least one adhesion promoting portion, and a metal layer by using the method for manufacturing the circuit substrate structure; wherein each adhesion promoting portion Roughening treatment is used to form a rough surface through the catalyst insulating layer and on the surface of the carrier, and the rough surface of each adhesion promoting portion is in an open state, and a metal layer is disposed in each adhesion promoting portion. The metal layer is formed by reacting a catalyst of each adhesion promoting portion with an electroless plating solution.

The circuit substrate structure further includes at least one conductive contact and a plating layer, and each of the conductive contacts penetrates the catalytic insulating layer along the roughening treatment method and is disposed on the surface of the carrier and disposed outside the adhesion promoting portion, and is connected by each conductive contact The edge of the carrier and the adhesion promoting portion form a communication line, and each of the conductive contacts is used for connecting the edge of the carrier and the adhesion promoting portion to form a metal layer by electroless plating, and an anti-plating insulation is disposed on the metal layer of each conductive contact. The layer is used for insulating the conductive contacts to prevent electroplating of the metal, forming a plating layer by electroplating to increase the thickness of the metal layer, and finally removing the anti-plating insulating layer and the metal layer on each conductive contact. , get an independent circuit pattern.

In summary, the circuit board structure and the manufacturing method thereof provided by the present invention provide the following advantages:

(1) In the conventional three-dimensional circuit process, a large amount of catalyst, catalyst, and electroless plating solution are required to be added to the polymer plastic, which has a problem of high production cost. Since the non-conductive carrier of the present invention does not contain a metal oxide or a catalyst, when a regionalized rough surface is formed by laser irradiation etching, the catalyst can be attached only to the surface of the carrier surface, effectively reducing the use of the polymer plastic in the circuit manufacturing process. catalyst.

(2) Conventional LDS laser lasers activate metal oxides or catalysts to produce metal cores. For the electroless copper plating, a higher dose of reducing agent concentration is required to enable the metal core to be smoothly plated, and the chemical copper plating solution. It is less stable and has a shorter life span, and the management cost of the plating solution is increased, which requires higher production costs. The invention forms a rough adhesion portion by laser irradiation etching, which can effectively adsorb the catalyst to facilitate the subsequent metal layer Formation, while reducing the use of catalyst or catalyst, has the advantage of lower production costs, greatly reducing the cost of use of catalysts and catalysts as well as electroless plating solutions.

1‧‧‧Line substrate structure

11‧‧‧ Carrier

111‧‧‧Electrical contacts

1111‧‧‧ Thermal material

12‧‧‧Adhesion Promotion Department

121‧‧‧Rough surface

13‧‧‧metal layer

141‧‧‧Anti-plating insulation

14‧‧‧catalyst insulation

15‧‧‧Electroplating

16‧‧‧ Thermal Conductor

S1~S4‧‧‧ Process steps

S1a~S7a‧‧‧ process steps

Sa1~Sa5‧‧‧Process steps

Fig. 1 is a flow chart showing the steps of a method of manufacturing a circuit board structure according to a first embodiment of the present invention.

Fig. 2 is a schematic structural view showing the structure of a wiring substrate according to a first embodiment of the present invention.

Fig. 3 is a flow chart showing the steps of a method of manufacturing a circuit board structure according to a second embodiment of the present invention.

4 to 5 are schematic views showing the structure of the circuit substrate structure of the second embodiment of the present invention.

Figure 6 is a flow chart showing the steps of a method of manufacturing a circuit substrate structure according to a third embodiment of the present invention.

Figure 7 is a schematic view showing the structure of a circuit substrate structure according to a third embodiment of the present invention.

8 to 9 are schematic views showing the structure of a circuit substrate structure according to a fourth embodiment of the present invention.

Figure 10 is a schematic view showing the structure of a circuit substrate structure according to a fifth embodiment of the present invention.

Figure 11 is a schematic view showing the structure of a circuit substrate structure according to a sixth embodiment of the present invention.

Figure 12 is a schematic view showing the structure of a circuit substrate structure according to a seventh embodiment of the present invention.

13 to 14 are schematic views showing the structure of the circuit substrate structure of the eighth embodiment of the present invention.

15 to 16 are schematic views showing the structure of a circuit substrate structure according to a ninth embodiment of the present invention.

The technical features, contents, and advantages of the present invention, as well as the advantages thereof, can be understood by the present inventors, and the present invention will be described in detail with reference to the accompanying drawings. The subject matter is only for the purpose of illustration and description. It is not intended to be a true proportion and precise configuration after the implementation of the present invention. Therefore, the scope and configuration relationship of the attached drawings should not be interpreted or limited. First described. In order to understand the technical features and practical effects of the present invention in detail, and in accordance with the contents of the specification, the following embodiments will be further described in detail below.

The invention provides a circuit substrate structure and a manufacturing method thereof. 1 is a schematic view showing a first embodiment of a flow chart of a method for fabricating a circuit substrate structure according to the present invention.

Referring to FIG. 1 , the main steps of the method for fabricating the circuit substrate structure of the present invention include:

In step S1, a carrier is first provided. The carrier can be a non-conductive carrier.

In step S2, an adhesion promoting portion having a rough surface is formed on the surface of the carrier by a roughening treatment.

In step S3, a catalyst is disposed in the adhesion promoting portion. In the above-described method of forming the catalyst, the carrier is immersed in the catalyst solution tank, and the catalyst is attached to the adhesion promoting portion.

In step S4, electroless metallization is finally performed on the catalyst on the surface of the carrier to form a metal layer.

Referring to FIG. 1 of the attached file, the adhesion promoting portion in step S2 is presented by an electron microscope photographing result, which exhibits an uneven rough shape. Please refer to the attached figure 2, Esau Scanning Electron Microscopy (SEM) is used to detect the adhesion promoter on the surface of the carrier after roughening, and the pore size is about 10-20 μm.

Please refer to the attachments 3 and 4, the surface of the carrier is cleaned in step S3, and the grease, dirt and the like on the surface of the carrier are removed; in this embodiment, the carrier is immersed in the diluted detergent (the interface may be included) In the active agent, the surface of the carrier is degreased to be clean, and the properties of the rough surface of the adhesion promoting portion are converted from hydrophobic to hydrophilic, and the carrier is washed with pure water.

Further, an image of water droplets adhering to the surface of the carrier is captured by an electron microscope. Referring to Fig. 4 of the attached figure, the surface of the carrier which has not been roughened on the right side of the figure is attached with water droplets on the surface of the carrier, and the water droplets do not show adhesion and adsorption, so they are in the form of water droplets. The left side of the figure is the adhesion promoting part of the surface of the carrier after roughening treatment, and the water droplets appear to adhere and diffuse, so the adhesion promoting part has changed from hydrophobic to hydrophilic, indicating that more catalyst can be adsorbed and can be compared. Firmly in the adhesion promoter to facilitate subsequent electroless plating reactions.

The catalyst used in the step S3 may be one of titanium, bismuth, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, rhodium, ruthenium, iridium, osmium, iridium, or tin, or a mixture thereof. A compound which may contain the above elements. For example, palladium chloride (PdCl ₂ ), tin chloride (SnCl ₂ ), palladium sulphate (II) hydrate (Palladium Sulfate Hydrate), etc., but not limited thereto.

In step S4, at least one metal layer may be electrolessly plated on the catalyst on the surface of the carrier by using a copper or nickel chemical reduction reaction, or the first conductive film before the electroplating treatment may be used as a non-conductive carrier for the copper and nickel behind. , general electrical plating procedures for chromium. In this In the invention, the metal layer may be any metal or alloy having good electrical conductivity. In this embodiment, copper is reacted with a catalyst to form a metal layer, but is not limited thereto. The manufacturing method of the circuit substrate structure of the above steps S1 to S4 can be widely applied to the stereo or planar circuit process of the non-conductive carrier.

Referring to Fig. 2, the circuit board structure of the first embodiment manufactured by the above steps S1 to S4 of Fig. 1 is used. As shown in the figure, the circuit substrate structure 1 of the present invention is suitable for use in a circuit structure. The circuit substrate structure 1 includes a carrier 11 and at least one adhesion promoting portion 12, wherein each of the adhesion promoting portions 12 is roughened (this embodiment uses a lightning The surface of the carrier 11 is formed by a radiation etching method to form a rough surface 121, and the rough surface 121 of each adhesion promoting portion 12 is in an open state. Thereafter, the carrier 11 is immersed in the catalyst solution tank, and the catalyst is attached to the adhesion promoting portion 12. Finally, electroless metallization is performed on the catalyst on the surface of the carrier 11 to form a metal layer 13, which includes at least one wiring pattern.

In the present invention, the metal layer can also be used as a non-conductive carrier for the initial conductive film before the electroplating process. In order to better understand the technical means for further application in the electroplating process, it is specifically described that the electroplating treatment is performed on the metal layer. Process. Referring to FIG. 3, a schematic diagram of a second embodiment of the flow chart of the present invention applied to the electroplating process is as follows:

In step S1a, a carrier is first provided, and the carrier may be a non-conductive carrier.

In step S2a, an adhesion promoting portion and a conductive contact of the wiring pattern having a rough surface are formed on the surface of the carrier by a roughening treatment.

In step S3a, a catalyst is disposed in the adhesion promoting portion. In the above-described method of forming the catalyst, the carrier is immersed in the catalyst solution tank, and the catalyst is attached to the adhesion promoting portion.

In step S4a, electroless metallization is performed on the catalyst on the surface of the carrier to form a metal layer.

In step S5a, an anti-plating insulating layer is further applied to the conductive contacts.

In step S6a, a plating layer may be provided on the metal layer by a plating process.

In step S7a, the anti-plating insulating layer and the metal layer on the conductive contacts are finally removed to form separate circuit patterns.

Referring to Figures 4 and 5, the circuit board structure produced by the above steps S1a to S7a of Fig. 3 is used. As shown in FIG. 4, the circuit board structure 1 of the present invention is applied to a circuit structure, and the circuit board structure 1 includes a carrier 11 and at least one adhesion promoting portion 12, wherein each of the adhesion promoting portions 12 is roughened (this embodiment) The surface of the carrier 11 is formed by a laser irradiation to form a rough surface 121 of each of the adhesion promoting portions 12, and the rough surface 121 of each of the adhesion promoting portions 12 is in an open state, and the surface of the carrier 11 is further provided with a conductive contact 111 on the carrier 11. Each of the conductive contacts 111 is connected to the edge of the carrier 11 and the adhesion promoting portion 12, and the conductive layer 111 is used to connect the edge of the carrier 11 and the adhesion promoting portion 12 to form a metal layer 13 by electroless plating. As shown in FIG. 5, an anti-plating insulating layer 141 is further applied to each of the conductive contacts 111, and the thickness of the metal layer 13 of the adhesion promoting portion 12 is increased by electroplating to form a plating layer 15, and finally the conductive contacts are removed. The plating resist 141 and the metal layer 13 on the dots 111 are removed to form separate circuit patterns.

During the electroplating process, the metal layer 13 having electrical conductivity can be generated by electroplating as a negative electrode during the electroplating process, and the positive electrode of the power source and the pre-plated metal solid are connected, and the carrier 11 element is immersed in the pre-plated metal ion. In the plating solution, the pre-plated metal ions receive electrons on the metal layer 13 as the negative electrode to reduce precipitation of the pre-plated metal in gold. The genus layer 13 forms the desired metal line. The pre-plated metal may be copper, nickel, chromium, tin, silver or gold or an alloy metal thereof.

Since the surface of the carrier does not have a portion of the active catalytic layer, when the electroless plating is performed, the material property may easily react with the catalyst or the electroless plating solution. Please refer to the flow chart of the method for fabricating the circuit substrate structure according to the third embodiment of the present invention, which is shown in FIG.

In step Sa1, a carrier is first provided, and the carrier may be a non-conductive carrier.

In step Sa2, a catalytic insulating layer is disposed on the surface of the carrier.

In step Sa3, the adhesion promoting portion is formed by penetrating the carrier through the catalyst insulating layer and on the surface of the carrier.

In step Sa4, a catalyst is provided in the adhesion promoting unit. In the above-described method of forming the catalyst, the carrier is immersed in the catalyst solution tank, and the catalyst is attached to the adhesion promoting portion.

In step Sa5, electroless metallization is finally performed on the catalyst on the surface of the carrier to form a metal layer.

In other words, the circuit board structure of the third embodiment of the present invention is the same as that of the first embodiment, and the difference is that the catalyst insulating layer 14 is disposed on the surface of the carrier 11 before step S2 (as shown in FIG. 7).

Moreover, referring to FIG. 8 and FIG. 9, the flow of steps of the method for fabricating the circuit substrate structure according to the fourth embodiment of the present invention is the same as that of the second embodiment, and the difference between the two is that before step 2a The catalyst insulating layer 14 is provided on the surface of the carrier 11, and the carrier is penetrated through the catalytic insulating layer 14 by a roughening treatment, and is provided on the surface of the carrier to form respective adhesion promoting portions. The subsequent steps are the same as those of S2a to S7a.

The catalyst insulating layer 14 may be processed by printing, inkjet or the like using a photoresist, an ink or a coating, or may be an insulating tape or a dry film photoresist as a catalytic insulating layer 14 and a catalytic insulating layer. 14 may or may not be removed.

In all the above embodiments, the carrier is immersed in the catalyst solution tank, and the main component of the catalyst solution may be palladium chloride, tin chloride and hydrogen chloride (PdCl ₂ + SnCl ₂ + HCl), thereby forming a layer in the adhesion promoting portion. Very thin and catalytic catalyst. Since the tin ions on the surface of the material of the carrier become tin hydroxide Sn(OH) ₄ , since it has no catalytic effect, the tin hydroxide forms a colloid to attenuate the catalytic effect of the palladium (Pd) metal particles. The "tin shell" treatment is stripped to reduce the metallic palladium (Pd) on the surface of the support as a catalyst for subsequent electroless plating. The above process is called Accelerator.

Further, in order to increase the heat transfer efficiency of the overall circuit substrate structure, a heat conducting column may be buried in the carrier. Referring to FIG. 10, it is a flow chart of a method for fabricating a circuit board structure according to a fifth embodiment of the present invention. The step flow is the same as that of the first embodiment. The difference between the two is that a step is buried before step S2. The heat transfer column 16 is mounted on the carrier 11, and is attached to the surface of the carrier 11 at a position corresponding to the heat transfer column 16 and around the heat transfer column 16 in step S2, and an adhesion promoting portion 12 having a rough surface 121 is formed by a roughening process. The buried heat conducting column is disposed on the carrier, and at least one heat conducting column 16 is embedded in the high heat source in the carrier according to the manufacturer's design product requirement to increase the heat transfer efficiency of the overall circuit substrate structure.

Further, the material of the heat conducting column may be lead, aluminum, gold, copper, tungsten, magnesium, molybdenum, zinc, silver, graphite, graphene, diamond, carbon nanotube, nano carbon sphere, nano foam, carbon sixty , carbon nanocone, carbon nanohorn, carbon nanotube dropper, dendritic carbon micron structure, yttria, alumina, zirconia, boron nitride, aluminum nitride, magnesium oxide, tantalum nitride or carbon One of them or a combination thereof, but not limited to this.

Referring to Fig. 11, there is shown a schematic diagram of a circuit board structure according to a sixth embodiment of the present invention. Similar to the purpose of the fifth embodiment described above, in order to increase the heat transfer efficiency of the overall circuit substrate structure, a heat conductive material may be added to the carrier. The structure of the sixth embodiment is the same as that of the first embodiment (Fig. 2). The difference between the two is that, in the step of providing the carrier 11 in the step S1, the heat conductive material 1111 is added and uniformly mixed in the carrier 11. Then, the adhesion promoting portion 12 having the rough surface 121 is also formed by the roughening treatment. The subsequent steps are the same as in the first embodiment.

Referring to FIG. 12, it is a schematic diagram of a circuit board structure according to a seventh embodiment of the present invention, and its structure is the same as that of the third embodiment. The difference between the two is that, in the step of providing the carrier 11 in the step 1. The heat conductive material 1111 has been added and uniformly mixed in the carrier 11, and then the catalyst insulating layer 14 is first disposed on the surface of the carrier 11 before the step 2 to isolate the surface of the carrier 11, so as to avoid the surface of the carrier 11 from being easily catalyzed by the material properties. The electroless plating solution reacts.

Referring to Figures 13 to 14, there is shown a schematic diagram of a circuit board structure according to an eighth embodiment of the present invention, which is a modification of the second embodiment (Figs. 4-5). In the step of providing the carrier 11 in the step S1, the heat conductive material 1111 is added and uniformly mixed in the carrier 11. The subsequent steps are the same as in the second embodiment.

Referring to Figures 15 to 16, a schematic diagram of a circuit board structure according to a ninth embodiment of the present invention is a modification of the fourth embodiment (Figs. 8-9). In the step of providing the carrier 11, the heat conductive material 1111 is added and uniformly mixed in the carrier 11, and the subsequent steps are the same as in the fourth embodiment.

In summary, the sixth, seventh, eighth, and ninth embodiments of the present invention are all added to the carrier 11. The heat conductive material 1111 is added, and the required addition amount and kind can be appropriately adjusted according to the demand of the manufacturer to design the product, and the purpose is to increase the heat transfer efficiency of the overall circuit substrate structure.

The material of the non-conductive carrier used in the present invention may be a polymer plastic or a ceramic material. The polymer plastic can be a thermoplastic or a thermosetting plastic. The material of the non-conductive carrier used has thermal conductivity, and an inorganic filler may be added to the polymer of the non-conductive carrier, wherein the inorganic filler may be a component of tannic acid, a citric acid derivative, a carbonic acid, a carbonic acid derivative, or a phosphoric acid. One or a combination of a phosphoric acid derivative, activated carbon, porous carbon, carbon black, glass fiber, carbon fiber or mineral fiber. Further, the ceramic material may be one of an oxide, a nitride, a carbide, and a boride. Further, the ceramic material is formed by combining one of an oxide, a nitride, a carbide, and a boride with a binder to form a mixture of injection, extrusion, etc., and after the mixture is formed, the binder is removed and then sintered.

The roughening treatment method used in the present invention may adopt a sandblasting processing method or a laser irradiation etching method to form a surface of the carrier to form a roughening adhesion promoting portion, and the laser irradiation wavelength range may be 248 Nai. Between meters and 10,600 nm, the laser irradiation etching method can be carbon dioxide (CO ₂ ) laser, 铷 铬 chrome (Nd: YAG) laser, ytterbium yttrium vanadate crystal (Nd: YVO ₄ ) laser, Excimer (EXCIMER) laser or Fiber Laser, but not limited to this.

In the present invention, the non-conductive carrier is dispersedly added with a material having thermal conductivity properties or a derivative thereof; the material having thermal conductivity properties may be a metal heat conductive material or a non-metal heat conductive material; the metal heat conductive material used may be lead, aluminum or gold. , one or a combination of copper, tungsten, magnesium, molybdenum, zinc or silver; the non-metallic heat conductive material used may be graphite, graphene, diamond, carbon nanotube, nano carbon sphere, nano foam, carbon six X. Carbon nanocone, carbon nanohorn, carbon nanotube dropper, dendritic carbon microstructure, cerium oxide, aluminum oxide, One or a combination of zirconia, boron nitride, aluminum nitride, magnesium oxide, tantalum nitride or tantalum carbide, but not limited thereto.

The catalyst used in this embodiment may be one of titanium, bismuth, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, rhodium, ruthenium, osmium, iridium, iridium, or tin, or a mixture thereof. Compounds which may also contain the above elements. For example, palladium chloride (PdCl ₂ ), tin chloride (SnCl ₂ ), palladium sulphate (II) hydrate (Palladium Sulfate Hydrate), etc., but not limited thereto.

According to the manufacturing method of the circuit substrate structure described in the above first to ninth embodiments, it can be widely applied to various non-conductive carriers, and it can be a three-dimensional circuit process of a material having heat conduction properties or a plastic film interconnection component having heat conduction properties. .

Please refer to the attached figure 5, which is the material obtained after the elemental analysis (EDS) of the carrier of the present invention in Figure 2 of the annex, as shown in the data, the carrier of the present invention is not doped with any metal oxide or Catalyst, the gold (Au) element presented in the figure is a gold layer which is first coated on the non-conductive conductor during the pre-treatment, in order to increase the conductivity, avoid the accumulation of surface electrons, and avoid charge accumulation. It affects the resolution.

Please refer to the attached figure 6 for the laser SEM image of the surface of the carrier (LPKF) by the conventional LPKF-LDS technology. Currently, the LPKF carrier used in the industry is doped with metal oxide components; Referring to Figure 7 of the Annex, the data shows that the LPKF carrier is doped with metal oxides. The elemental analysis (EDS) shows the presence of chromium (Cr) and copper (Cu) elements in the LPKF carrier. From the above, the technical features of the present invention are different from the prior art in that the carrier of the present invention is formed by a roughening treatment (laser irradiation etching) to form a regionalized rough surface because it does not contain any metal oxide. After that, the catalyst can be attached and adhered to the roughened area of the surface of the carrier, which can effectively reduce the amount of the catalyst used in the polymer in the stereo or planar circuit process. The prior art activates a metal oxide by an LDS laser to generate a metal core. Since the conventional LPKF carrier contains a metal oxide, a higher dose of a reducing agent is required in the electroless copper plating reaction to enable the metal core to be smoothly plated. The plating solution with relatively chemical copper is unstable, the life is short, the cost of the plating solution is increased, and the high production cost is required.

In summary, the circuit board structure and the manufacturing method thereof of the present invention form a adhesion promoting portion by laser irradiation etching, which can effectively adsorb the catalyst and be firmly disposed on the adhesion promoting portion for subsequent use. The formation of the metal layer can effectively reduce the use of the catalyst or the catalyst, and has the advantages of lower production cost, and can greatly reduce the amount of the catalyst and the catalyst and the use cost of the electroless plating solution. A method of improving the production cost of a conventional laser laser to activate a metal oxide or a catalyst to produce a metal core is expensive.

Moreover, it should be noted that in each of the embodiments of the present invention, each of the adhesion promoting portion, the catalyst, the metal layer, the plating resist, the catalyst insulating layer, and the plating layer are provided with a non-conductive Presented on one of the single planes on the carrier. However, the present invention is not limited thereto, and may be provided with different adhesion promoting portions, a catalyst, a metal layer, an anti-plating insulating layer, a catalytic insulating layer, and a plating layer on different planes of the non-conductive carrier. Wait. In other words, the circuit board structure of the present invention and the method of manufacturing the same are capable of producing a three-dimensional or planar circuit.

Furthermore, in various embodiments of the present invention, there will be a cleaning action before the next step in each step to avoid contamination of the next step of the manufacturing process of the next step, a technique familiar in the art. Means, therefore, are not described in the present invention. For example, a non-conductive carrier is formed by a roughening treatment to form an adhesion promoting portion having a rough surface. At this point, there will be waste remaining on the non-conductive carrier, and the waste is removed from the surface of the non-conductive carrier by a cleaning action. However, it should be emphasized that the non-conductive carrier is immersed in the catalyst solution tank, so that the catalyst adheres to the adhesion promoting portion, and after the cleaning operation, the catalyst can adhere to the adhesion promoting portion due to the rough surface of the adhesion promoting portion. If the remaining portion of the non-conductive carrier does not have an adhesion promoting portion, the catalyst may be removed due to the cleaning action, or the residual amount of the catalyst may not easily react with the electroless plating, or the reaction may not have a line quality to the circuit substrate structure. Too big impact.

The embodiments described above are merely illustrative of the technical spirit and the features of the present invention, and the objects of the present invention can be understood by those skilled in the art, and the scope of the present invention cannot be limited thereto. That is, the equivalent variations or modifications made by the spirit of the present invention should still be included in the scope of the present invention.

S1~S4‧‧‧Step procedure

Claims (17)

A method for manufacturing a circuit substrate structure, which is suitable for a circuit process of a non-conductive carrier, comprising the steps of: providing a carrier; forming a rough surface and a predetermined path adhesion promoting portion on the surface of the carrier by a roughening treatment method; The roughening treatment method is one of a sandblasting processing method or a laser irradiation etching method; a catalyst is disposed on the adhesion promoting portion; and the catalyst is reacted by an electroless plating reduction method, and further in the adhesion promoting portion A metal layer is formed, and the metal layer includes a circuit pattern corresponding to the predetermined path of the adhesion promoting portion. The method for manufacturing a circuit substrate structure according to claim 1, wherein before the surface of the carrier is subjected to the roughening step, a catalyst insulating layer is further disposed on the carrier, and the roughening treatment is further performed. The adhesion promoting portion is formed on the surface of the carrier through the catalyst insulating layer. The method of manufacturing a circuit substrate structure according to claim 1, wherein the carrier is made of a non-conductive material, and the non-conductive material comprises one of a polymer plastic or a ceramic material. The method for manufacturing a circuit substrate structure according to claim 1, wherein the catalyst comprises titanium, bismuth, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, rhodium, ruthenium, iridium. One of or a mixture of ruthenium, osmium, and tin or a compound of the above elements. The method of manufacturing a circuit substrate structure according to claim 3, wherein the method Polymer plastics include inorganic fillers. The method of manufacturing a wiring substrate structure according to claim 3, wherein the non-conductive carrier is obtained by dispersing a material having a heat conductive property or a derivative thereof. The method for manufacturing a circuit substrate structure according to claim 3, wherein the material of the non-conductive carrier having heat conducting properties comprises a metal heat conductive material or a non-metal heat conductive material. The method of manufacturing a circuit substrate structure according to claim 3, wherein at least one heat conducting column is embedded in the non-conductive carrier. The method for manufacturing a circuit board structure according to claim 1, further comprising the step of: providing the carrier, and simultaneously providing at least one conductive contact outside the adhesion promoting portion by the roughening treatment On the carrier, each of the conductive contacts is connected to the edge of the carrier and the adhesion promoting portion and forms a line connecting the same; the metal plating layer is disposed on each of the adhesion promoting portions; and each of the conductive contacts is provided with an anti-plating layer An insulating layer; an electroplating layer is disposed on each of the metal layers by electroplating; and the anti-plating insulating layer and the metal layer disposed on each of the conductive contacts are removed to obtain respective independent circuit patterns. A circuit substrate structure comprising: a carrier; at least one adhesion promoting portion, each of the adhesion promoting portions forming a rough surface on the surface of the carrier by a roughening treatment, and the rough surface of each of the adhesion promoting portions is open a state, and each of the adhesion promoting portions has a predetermined path; and a metal layer, wherein the metal layer is disposed in each of the adhesion promoting portions, and the metal layer is preset to react with the electroless plating solution of each of the adhesion promoting portions Formed, and the metal layer includes A circuit pattern corresponding to one of the predetermined paths of the adhesion promoting portion; wherein the roughening treatment method is one of a sandblasting processing method or a laser irradiation etching method. The circuit substrate structure of claim 10, further comprising at least one conductive contact, each of the conductive contacts connecting the edge of the carrier and each of the adhesion promoting portions and forming a communication line. The circuit substrate structure of claim 11, wherein a plating resist is further disposed on the metal layer of each of the conductive contacts. The circuit substrate structure of claim 12, wherein a plating layer is disposed on the metal layer. A circuit substrate structure comprising: a carrier; a catalyst insulating layer disposed on the surface of the carrier; at least one adhesion promoting portion, each of the adhesion promoting portions penetrating the catalyst through a roughening treatment The layer is disposed on the surface of the carrier, and the rough surface of each of the adhesion promoting portions is in an open state and has a predetermined path; and a metal layer is attached to each of the adhesion promoting portions, and the metal layer is preset to each adhesion The catalyst of the promotion unit is formed by reacting with the electroless plating solution, and the metal layer includes a circuit pattern corresponding to the predetermined path corresponding to the adhesion promoting portion; wherein the roughening treatment method is a sandblasting processing method or a laser processing irradiation One of the ways. The circuit substrate structure of claim 14, further comprising at least one conductive contact, each of the conductive contacts connecting the edge of the carrier and each of the adhesion promoting portions and forming a communication line. The circuit substrate structure of claim 15, wherein each of the conductive contacts An anti-plating insulating layer is disposed on the metal layer. The circuit substrate structure of claim 16, wherein a plating layer is disposed on each of the metal layers.