CN103220884A - Line substrate structure and manufacturing method thereof - Google Patents
Line substrate structure and manufacturing method thereof Download PDFInfo
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- CN103220884A CN103220884A CN2012100164587A CN201210016458A CN103220884A CN 103220884 A CN103220884 A CN 103220884A CN 2012100164587 A CN2012100164587 A CN 2012100164587A CN 201210016458 A CN201210016458 A CN 201210016458A CN 103220884 A CN103220884 A CN 103220884A
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Abstract
The invention discloses a manufacturing method of a line substrate structure and a manufactured product of the substrate structure. The method includes the steps of firstly, forming an attachment promoting portion with a rough surface on the surface of a carrier through a roughness processing method, then, arranging catalytic agents on the surface of the attachment promoting portion, finally, enabling the catalytic agents to react through a chemical planting reduction method, and thus forming a metal layer on the attachment promoting portion. The manufacturing method can effectively reduce the use of the catalytic agents or catalysts and can greatly reduce use cost of the catalytic agents and the catalysts.
Description
Technical field
The present invention relates to a kind of circuit substrate structure and preparation method thereof, particularly a kind of formation on non-conductive carrier has the manufacture method of circuit substrate structure.
Background technology
Variation based on present 3C Product makes popular more exquisite for the convenience and the portability of 3C Product, order about electronic product and develop, impelled IC design and circuit design thereof to develop simultaneously towards the direction of three-dimensional 3D design towards the direction of microminiaturization, lightweight and multifunction.By the three-dimensional of circuit unit design, can on the circuit unit of limited bulk, form complicated circuit, allow electronic product not influencing under its function, can dwindle the outward appearance volume, make its microminiaturization and lightweight more.In other words, the circuit unit design of three-dimensional, impel electronic product under small volume, also can possess complicated circuit, therefore the three-dimensional of circuit unit design has really and allows the multiple potentiality of electronic product microminiaturization, lightweight and multifunction, has the high product competitiveness, and can be applied in widely on the various aspects, as electronic products such as mobile phone, automobile circuit, ATM (automatic teller machine) and hearing aidss.
At present, be used for making the multiple mode of stereo circuit assembly, one of them is molded interconnecting assembly-laser straight forming method (MID-LDS, Molded Interconnect device-Laser Direct Structuring), this mode is that the non-conductive plastics that will contain catalyst form assembly carrier via ejection formation, again with the catalyst on the laser laser activation carrier, make catalyst change catalyst nuclear into, carry out electroless plating reaction by catalyst nuclear and preplating metal ion, and form the metallic conduction circuit.
Conducting wire structure Design in the above-mentioned stereo circuit manufacturing process often is made up of mutual disjunct a plurality of circuit, form the accompanying metal solvent of part surface of conducting wire pattern by desire on the circuit unit, the preplating metal ion that exists in the chemical plating fluid is carried out a catalytic reaction form the part surface of circuit patterns, so chemical plating has the advantage that does not have the uneven influence of electric force lines distribution and also can obtain the uniform coating of thickness to the plating piece of complex geometry compared to plating the preplating metal ion is reduced on circuit unit desire.The method of prior art use at present adopts the chemical plating mode to make the conducting wire of stereo circuit assembly more.
Chemical plating is under the situation that does not apply electric power, form the accompanying metal solvent of part surface of circuit patterns by desire on the circuit unit, the preplating metal ion that exists in the chemical plating fluid is carried out a catalytic reaction, form the part surface of circuit patterns the preplating metal ion is reduced on circuit unit desire.Therefore, electroless plating method can form thickness even metal coating by the part surface of desire formation circuit patterns on circuit unit.
By as seen above-mentioned, at present the conducting wire structure in the stereo circuit manufacturing process its objective is and makes made electronic product microminiaturization, lightweight and multifunction and reach the high product competitiveness more, has vast application potential on 3C electronic product field, yet it still has following restriction and shortcoming:
1. the manufacture method of existing stereo circuit assembly, though can efficiently produce the conducting wire structure in the stereo circuit manufacturing process, but need be added into a large amount of catalyst to non-conductive plastics, ejection formation carrier again, in molded interconnecting assembly-laser straight forming method (MID-LDS) manufacturing process, the catalyst that participates in reaction but because need to add a certain proportion of catalyst in non-conductive plastics, therefore need expend higher catalyst cost also only at superficial layer.
2. as mentioned above, because of needing to add a large amount of catalyst to non-conductive plastics in the MID-LDS manufacturing process, ejection formation forms carrier again, because catalyst is evenly distributed in the carrier, the metal core that divests the rear surface through laser needs the reductant concentration of higher dosage in subsequent chemistry plating process, just can make metal core open plating smoothly.Relatively, the chemical copper plating bath need expend more chemical plating fluid chemical reduction reaction is carried out on the integral carriers surface than unstability, forms the conducting wire of needed stereo circuit on circuit unit, yet but expends higher chemical plating fluid cost.
Therefore, the manufacturing technology of existing stereo circuit still is subject to the great number production cost, still lacks a kind of conducting wire structure and preparation method thereof at present and is applied in the field, 3C electronic product field.
Summary of the invention
For solving above-mentioned problems of the prior art, the object of the present invention is to provide a kind of circuit substrate structure and preparation method thereof, need expend higher problems such as production cost to solve in the existing stereo circuit manufacturing process.
According to purpose of the present invention, a kind of manufacture method of circuit substrate structure is proposed, be applicable to the circuit production process of non-conductive carrier, one carrier at first is provided, and form with the roughened method at carrier surface and to have one of rough surface and adhere to promotion portion, the character of adhering to promotion portion is converted to hydrophily by hydrophobicity, in the promotion portion of the adhering to surface of carrier one catalyst is set again, last catalyst reacts with the chemical plating reducing process, and then is adhering to promotion portion formation metal level.
Preferably, above-mentioned carrier can be non-conductive carrier, and it has the heat conductivity material, and wherein the roughened method can be with sandblast processing mode or laser irradiation etching mode; Before above-mentioned carrier surface carries out roughened method step, the catalyst insulating barrier can further be set on carrier, and be through to the surface from the catalyst insulating barrier with the roughened method, and form the promotion portion of adhering at carrier surface at carrier.
Preferably, the material of above-mentioned non-conductive carrier can be ceramic material, high molecule plastic, and wherein high molecule plastic can be thermoplastics or thermoset plastics, wherein ceramic material can be oxide, nitride, carbide, boride one of them.Further, ceramic material be oxide, nitride, carbide, boride one of them in conjunction with adhesive form can penetrate, the mixture of extrusion etc., and after mixture is shaped, remove adhesive thermal sintering again.
Preferably, above-mentioned catalyst can be the compound of titanium, antimony, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, iridium, osmium, rhodium, rhenium, ruthenium, tin one of them or its mixture or above-mentioned element.
Preferably, the high molecule plastic of above-mentioned non-conductive carrier can add inorganic filler; Wherein the composition of inorganic filler can be silicic acid, silica derivative, carbonic acid, carbonic acid derivative, phosphoric acid, phosphoric acid derivatives, activated carbon, porous carbon, carbon black, glass fibre, carbon fiber or ore deposit fiber one of them or its combination.
Preferably, the wave-length coverage of above-mentioned laser irradiation can be between 248 nanometer to 10600 nanometers; Wherein laser irradiation etching mode can be carbon dioxide (CO
2-) laser, the refined chromium of rubidium (Nd:YAG) laser, Nd-doped yttrium vanadate crystal (Nd:YVO
4-) laser, quasi-molecule (EXCIMER) laser or optical fiber laser (Fiber Laser).
Preferably, above-mentioned non-conductive carrier with heat conduction property can will have heat conductivity material or derivatives thereof dispersion of materials in it; More preferably, the material with heat conduction property can be metal heat-conducting material or nonmetal heat conduction material; Above-mentioned metal heat-conducting material can be lead, aluminium, gold, copper, tungsten, magnesium, molybdenum, zinc or silver one of them or its combination; Above-mentioned nonmetal heat conduction material can be graphite, Graphene, diamond, CNT (carbon nano-tube), nano carbon microsphere, nanometer foam, carbon 60, carbon nanocone, carbon nanohorn, carbon nanometer dropper, tree-shaped carbon micrometer structure, beryllium oxide, aluminium oxide, zirconia, boron nitride, aluminium nitride, magnesium oxide, silicon nitride or carborundum one of them or its combination.
Preferably, bury at least one heating column underground in the above-mentioned non-conductive carrier, in order to increase the hot transfer efficiency of non-conductive carrier; The material of above-mentioned heating column can be lead, aluminium, gold, copper, tungsten, magnesium, molybdenum, zinc, silver, graphite, Graphene, diamond, CNT (carbon nano-tube), nano carbon microsphere, nanometer foam, carbon 60, carbon nanocone, carbon nanohorn, carbon nanometer dropper, tree-shaped carbon micrometer structure, beryllium oxide, aluminium oxide, zirconia, boron nitride, aluminium nitride, magnesium oxide, silicon nitride or carborundum one of them or its combination.
Further can utilize aforesaid manufacture method, after carrier is provided, at least one conductive junction point is set on carrier with the roughened method outside adhering to promotion portion simultaneously; And by the edge of each conductive junction point connection carrier with respectively adhere to promotion portion and form the circuit communicate; Handle in adhering on promotion portion and each conductive junction point metal level is set carrying out electroless plating; One anti-plating insulating barrier is set on each conductive junction point; Further, can utilize the energising plating mode electrodeposited coating to be set to increase metal layer thickness in the promotion portion adhering to; Remove the anti-plating insulating barrier and the metal level that are arranged on each conductive junction point at last, obtain independently circuit pattern.
Preferably, above-mentioned manufacture method is applicable to the stereo circuit manufacturing process of the plastic film interconnecting assembly with heat conduction property, described carrier has heat conduction property, in electroplating process, can by electroplate energising produce have conducting property metal level in electroplating process as negative pole, and allow positive source and preplating metal solid join, when carrier module is soaked in the electroplate liquid that contains the preplating metal ion, the preplating metal ion just receives electronics on as the metal level of negative pole and reduces and separate out pre-plating in metal level, forms desired metallic circuit; Wherein pre-electroplated metal comprises can be copper, nickel, chromium, tin, silver or gold or its alloying metal.
According to the manufacture method of above-mentioned circuit substrate structure, can be widely used in non-conductive carrier, have the non-conductive carrier of heat conduction property or have the stereo circuit manufacturing process of the plastic film interconnecting assembly of heat conduction property.
A purpose of the present invention, utilize the manufacture method of above-mentioned circuit substrate structure to produce a kind of circuit substrate structure, it comprises a carrier, at least one promotion portion of adhering to, wherein respectively adhering to promotion portion utilizes the roughened mode to form rough surface at carrier surface, and the rough surface that respectively adheres to promotion portion presents open state, and one metal level being set respectively adhering to promotion portion, this metal level is formed by defaulting in the catalyst and the chemical plating fluid reaction of respectively adhering to promotion portion.
Preferably, above-mentioned circuit substrate structure further comprises at least one conductive junction point, each conductive junction point also is arranged on the carrier with the roughened method, and is arranged at and respectively adheres to outside the promotion portion, by the edge of each conductive junction point connection carrier with respectively adhere to promotion portion and form the circuit that communicates.
Above-mentioned circuit substrate structure further comprises electrodeposited coating, one anti-plating insulating barrier is set on each conductive junction point again, utilize the energising plating mode electrodeposited coating to be set respectively adhering in the promotion portion, to increase the metal layer thickness on each circuit pattern, remove anti-plating insulating barrier and metal level on each conductive junction point at last, obtain independently circuit pattern.
Another object of the present invention utilizes the manufacture method of above-mentioned circuit substrate structure to produce a kind of circuit substrate structure, and it comprises a carrier, a catalyst insulating barrier, an at least one promotion portion and metal level of adhering to; Wherein respectively adhering to promotion portion utilizes the roughened mode to run through the catalyst insulating barrier and is arranged at carrier surface and forms rough surface, and the rough surface that respectively adheres to promotion portion is open state, and one metal level being set respectively adhering to promotion portion, this metal level is formed by defaulting in the catalyst and the chemical plating fluid reaction of respectively adhering to promotion portion.
Above-mentioned circuit substrate structure further comprises at least one conductive junction point and electrodeposited coating, each conductive junction point also runs through the catalyst insulating barrier with the roughened method and is arranged at carrier surface and is arranged at and adheres to outside the promotion portion, edge by each conductive junction point connection carrier and adhere to promotion portion and form the circuit that communicates, by each conductive junction point in order to the edge of connection carrier with adhere to promotion portion and carry out chemical plating and form metal level, one anti-plating insulating barrier is set on the metal level of each conductive junction point, it is in order to insulate each conductive junction point, prevent to electroplate precipitating metal, utilize the energising plating mode to form electrodeposited coating, in order to increase metal layer thickness, at last anti-plating insulating barrier on each conductive junction point and metal level are removed, obtained independently circuit pattern.
In sum, circuit substrate structure provided by the present invention and preparation method thereof has following advantage:
(1) in the existing stereo circuit manufacturing process, because of in high molecule plastic, being added into a large amount of catalyst or catalyst and chemical plating fluid, having the higher production cost problem that expends.Because of non-conductive carrier of the present invention not containing metal oxide or catalyst, after forming the compartmentalization rough surface with laser irradiation etching, catalyst can only be attached to the zone of carrier surface, effectively is reduced to the employed catalyst of high molecule plastic in the circuit production process.
(2) existing LDS laser laser activation metal oxide or catalyst produce the method for metal core, reductant concentration for the reaction needed higher dosage of electroless copper just can make metal core open plating smoothly, the plating bath of chemical copper is shorter than instability and life-span relatively, the administrative expenses of plating bath increase, and need higher production cost.The present invention forms coarse facies posterior hepatis with laser irradiation etching mode, it can effectively adsorb catalyst, in order to the formation of subsequent metal layer, and the use of minimizing catalyst or catalyst, have advantage, significantly reduce the use cost of catalyst and catalyst and chemical plating fluid than low production cost.
Description of drawings
Fig. 1 is the circuit substrate structure step of manufacturing flow chart of first embodiment of the invention;
Fig. 2 is the structural representation of the circuit substrate structure of first embodiment of the invention;
Fig. 3 is the circuit substrate structure step of manufacturing flow chart of second embodiment of the invention;
Fig. 4-5 is the structural representation of the circuit substrate structure of second embodiment of the invention;
Fig. 6 is the circuit substrate structure step of manufacturing flow chart of third embodiment of the invention;
Fig. 7 is the structural representation of the circuit substrate structure of third embodiment of the invention;
Fig. 8-9 is the structural representation of the circuit substrate structure of fourth embodiment of the invention;
Figure 10 is the structural representation of the circuit substrate structure of fifth embodiment of the invention;
Figure 11 is the structural representation of the circuit substrate structure of sixth embodiment of the invention;
Figure 12 is the structural representation of the circuit substrate structure of seventh embodiment of the invention;
Figure 13-14 is the structural representation of the circuit substrate structure of eighth embodiment of the invention;
Figure 15-16 is the structural representation of the circuit substrate structure of ninth embodiment of the invention;
(circular portion is the promotion portion of adhering to of carrier surface after roughened among the figure in the promotion portion of adhering to that Figure 17 produces down for electron microscope; Through the carrier surface of roughened, its surface presents irregular coarse sense of touch);
Figure 18 is the SEM surface microscopic figure of the adhere to promotion portion of carrier of the present invention after roughened;
Figure 19 for microscopically (wherein big circular portion is for forming a promotion portion of adhering to circuit pattern of rough surface at carrier surface after roughened through the carrier surface of roughened with without the comparison schematic diagram of the carrier surface of roughened; Little circular portion is the carrier surface without roughened);
Figure 20 for microscopically through the carrier surface of roughened and without the hydrophily of the carrier surface of roughened relatively schematic diagram (left part is the promotion portion of adhering to of the carrier surface after roughened among the figure, transfer hydrophily to by hydrophobicity, water droplet can be attached to the promotion portion of adhering to of carrier surface among the figure; The right side is divided into without the carrier surface after the roughened among the figure, still presents hydrophobicity, and water droplet is difficult for being attached to carrier surface among the figure);
Figure 21 carries out the schematic diagram data (any conductive metal composition does not mix in the carrier) of elementary analysis (EDS) back gained for the carrier of the present invention of Figure 18;
Figure 22 for the LPKF-LDS technology to carrier (LPKF) surface with laser carved SEM figure (being doped with metal oxide in the used LPKF carrier on the industry at present);
Figure 23 carries out the schematic diagram data (be doped with the metal oxide of conductivity in the carrier, its metal ingredient includes chromium Cr, copper Cu) of elementary analysis (EDS) back gained for the carrier (LPKF) of Figure 22.
Mark the following drawings mark thereon in conjunction with the accompanying drawings:
The 1-circuit substrate structure; The 11-carrier; The 111-conductive junction point; The 1111-Heat Conduction Material; 12-adheres to promotion portion; The 121-rough surface; The 13-metal level; The anti-plating of 141-insulating barrier; 14-catalyst insulating barrier; The 15-electrodeposited coating; The 16-heat carrier;
S1-S4: process step; S1a-S7a: process step; Sa1-Sa5: process step.
Embodiment
For ease of the effect of understanding technical characterictic of the present invention, content and advantage and reaching, now with conjunction with figs. of the present invention, and be described in detail as follows with the expression-form of embodiment, and wherein employed accompanying drawing, its purport only is signal and aid illustration book, may not be true ratio after the invention process and precisely configuration, so should not understand, limit to the interest field of the present invention on reality is implemented with regard to the ratio and the configuration relation of appended accompanying drawing.Being can detail knowledge technical characterictic of the present invention and practical effect, and can implement according to the content of specification, existing further by following examples, describe in detail as after.
The present invention proposes a kind of circuit substrate structure and preparation method thereof.See also Fig. 1, it is the first embodiment schematic diagram of the flow chart of steps of circuit substrate structure manufacture method of the present invention.
As shown in Figure 1, the manufacture method key step of circuit substrate structure of the present invention comprises:
Step S1 at first provides a carrier.Carrier can be non-conductive carrier.
Step S2 forms the promotion portion of adhering to rough surface at carrier surface with the roughened method.
Step S3 is provided with a catalyst in adhering to promotion portion.Above-mentioned catalyst generation type is that carrier is immersed in the catalyst solution tank, makes catalyst attached to adhering to promotion portion.
Step S4 carries out chemical plating metalization at last to form metal level on the catalyst of carrier surface.
Please refer to Figure 17, in the promotion portion of adhering to of step S2, the result presents by the electron microscope photography, and it presents irregular rough form.Please refer to Figure 18, (Scanning Electron Microscopy, be called for short: SEM) detecting obtains the promotion portion of adhering to of the carrier surface after roughened, the about 10-20 μ of its pore size m with sweep electron microscope.
Please refer to Figure 19 and shown in Figure 20, with the carrier surface clean, remove materials such as grease on the carrier surface and dirty dirt at step S3; Present embodiment adopts carrier is dipped in the good cleaning agent (cleaning agent can contain interfacial agent) of dilution, make its carrier surface clean in order to oil removing, and the character that will adhere to the rough surface of promotion portion is converted to hydrophily by hydrophobicity, cleans carrier with pure water again.
Further, catch the globule by electron microscope and drip the image that is attached on the carrier surface.With reference to shown in Figure 20, the carrier surface of right side after without roughened drips the globule and is attached to carrier surface among the figure, and the globule does not present and adheres to and adsorption phenomena, so be drops.The left side is the promotion portion of adhering to of the carrier surface after roughened among the figure, the globule presents and adheres to and diffusion phenomena, so adhering to promotion portion transfers hydrophily to by hydrophobicity, represent that more catalyst is adsorbable and can plate reaction in order to subsequent chemistry more securely attached to adhering to promotion portion.
The catalyst that is adopted at step S3 can be used titanium, antimony, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, iridium, osmium, rhodium, rhenium, ruthenium, tin one of them or its mixture, also can comprise the compound of above-mentioned element.For example: palladium bichloride (PdCl
2), stannic chloride (SnCl
2), palladium sulfate (II) hydrate (Palladium Sulfate Hydrate) etc., but not as limit.
Step S4 can adopt copper or nickel carrying out on the chemical plating one deck metal level at least on the catalyst of carrier surface with chemical reduction reaction, also can carry out initial conducting film before the electroplating processes, for the general electric galvanizing process of back copper, nickel, chromium as non-conductive carrier.In the present invention, metal level can be any metal or alloy with good electrical conductive properties, and present embodiment adopts copper and catalyst reaction to form metal level, but does not exceed with this example.The manufacture method of the circuit substrate structure of above-mentioned steps S1-S4 can be widely used in the solid or the planar circuit manufacturing process of non-conductive carrier.
Please refer to shown in Figure 2ly, it is the circuit substrate structure of the first made embodiment of the above-mentioned step S1-S4 that utilizes Fig. 1.As shown in the figure, circuit substrate structure 1 of the present invention is applicable in the line construction, circuit substrate structure 1 comprises carrier 11 and at least one promotion portion 12 of adhering to, wherein respectively adhere to promotion portion 12 and form rough surface 121 with roughened method (present embodiment adopts laser irradiation etching mode) in carrier 11 surfaces, the rough surface 121 that respectively adheres to promotion portion 12 is open state.Afterwards, carrier 11 is immersed in the catalyst solution tank, make catalyst attached to adhering to promotion portion 12.At last, carry out chemical plating metalization to form metal level 13 on the catalyst on carrier 11 surfaces, metal level 13 comprises at least one circuit pattern.
In the present invention, metal level also can carry out initial conducting film before the electroplating processes as non-conductive carrier, for more understanding the technological means that this case further is applied in electroplating processes, therefore specially is illustrated in the handling process of the enterprising electroplating of metal level in this.See also shown in Figure 3ly, the present invention is applied to the second embodiment schematic diagram of the flow chart of steps of electroplating processes, and is as follows:
Step S1a at first provides a carrier, and carrier can be non-conductive carrier.
Step S2a, what form circuit pattern with rough surface with the roughened method in carrier surface adheres to promotion portion and conductive junction point.
Step S3a is provided with a catalyst in adhering to promotion portion.The mode that above-mentioned catalyst forms is that carrier is immersed in the catalyst solution tank, makes catalyst attached to adhering to promotion portion.
Step S4a carries out chemical plating metalization to form metal level on the catalyst of carrier surface.
Step S5a imposes anti-plating insulating barrier again on conductive junction point.
Step S6a can utilize electroplating processes that electrodeposited coating is set on metal level.
Step S7a removes anti-plating insulating barrier on the conductive junction point and metal level at last, forms each independently circuit pattern.
Please refer to Fig. 4 and shown in Figure 5, it is the above-mentioned made circuit substrate structure of step S1a-S7a that utilizes Fig. 3.As shown in Figure 4, circuit substrate structure 1 of the present invention is applicable in the line construction, circuit substrate structure 1 comprises carrier 11 and at least one promotion portion 12 of adhering to, wherein respectively adhering to promotion portion 12 is arranged at carrier 11 surfaces with roughened method (present embodiment adopt laser irradiation etching mode) and respectively adheres to the rough surface 121 of promotion portion 12 to form, the rough surface 121 that respectively adheres to promotion portion 12 is open state, conductive junction point 111 is also further set up in carrier 11 in carrier 11 surfaces, each conductive junction point 111 is connected in the edge of carrier 11 and respectively adheres to promotion portion 12, by each conductive junction point 111 in order to the edge of connection carrier 11 with respectively adhere to promotion portion 12 and carry out chemical plating and form metal level 13.As shown in Figure 5, on each conductive junction point 111, impose an anti-plating insulating barrier 141 again, metal level 13 thickness that utilize the increase of energising plating mode to adhere to promotion portion 12 form an electrodeposited coating 15, remove anti-plating insulating barrier 141 and metal level 13 on each conductive junction point 111 at last, form the circuit pattern of each independence.
In the middle of the electroplating process, can by electroplate energising produce have conducting property metal level 13 in electroplating process as negative pole, and allow the positive pole of power supply and preplating metal solid join, when carrier 11 assemblies are soaked in the electroplate liquid that contains the preplating metal ion, the preplating metal ion just receives electronics on as the metal level 13 of negative pole and reduces and separate out pre-plating in metal level 13, forms desired metallic circuit.Wherein, pre-electroplated metal can be copper, nickel, chromium, tin, silver or gold or its alloying metal.
Because carrier surface do not have the part of active catalytic layer, when carrying out chemical plating, may react because of its material property easily produces with catalyst, chemical plating fluid.See also the steps flow chart of third embodiment of the present invention circuit substrate structure manufacture method, see also Fig. 6, as follows:
Step Sa1 at first provides a carrier, and carrier can be non-conductive carrier.
Step Sa2 is provided with the catalyst insulating barrier at carrier surface.
Step Sa3 runs through the catalyst insulating barrier with the roughened method and is arranged at carrier surface and forms at carrier and respectively adheres to promotion portion.
Step Sa4 is provided with catalyst in adhering to promotion portion.The mode that above-mentioned catalyst forms is that carrier is immersed in the catalyst solution tank, makes catalyst attached to adhering to promotion portion.
Step Sa5 carries out chemical plating metalization at last to form metal level on the catalyst of carrier surface.
In brief, the circuit substrate structure of third embodiment of the invention and first embodiment are identical, both differences be in, on carrier 11 surfaces catalyst insulating barrier 14 (as shown in Figure 7) is set before the step S2.
In addition, please refer to Fig. 8 and shown in Figure 9, the steps flow chart of the circuit substrate structure manufacture method of the fourth embodiment of the present invention and second embodiment are identical, both difference be in, on carrier 11 surfaces catalyst insulating barrier 14 is set before the step S2a, and run through catalyst insulating barrier 14 in carrier with the roughened method, and be arranged at carrier surface and form and respectively adhere to promotion portion, subsequent step is identical with S2a-S7a.
Wherein, catalyst insulating barrier 14 can use photoresist, printing ink or coating to process in modes such as printing, ink-jets, maybe can stick insulating tape or dry film photoresist as catalyst insulating barrier 14, and catalyst insulating barrier 14 can be selected to remove or do not remove.
Among above-mentioned all embodiment, adopt carrier is immersed in the catalyst solution tank, catalyst solution main component can be palladium bichloride, stannic chloride and hydrogen chloride (PdCl
2+ SnCl
2+ HCl), can form the very thin and catalyst of tool catalytic action of one deck adhering to promotion portion like this.Because the tin ion of the material surface of carrier becomes stannic hydroxide Sn (OH)
4, because of its no catalytic effect, and stannic hydroxide can form the catalytic effect that colloid weakens palladium (Pd) metallic.Divest this " tin shell " and handle, make the surface reduction of carrier go out the palladium (Pd) of metallic state with catalyst as the subsequent chemistry plating.Said process is referred to as speedization (Accelerator).
Further, for increasing the hot transfer efficiency of whole circuit substrate structure, can bury a heating column underground in carrier.Please refer to shown in Figure 10, it is the steps flow chart of the circuit substrate structure manufacture method of fifth embodiment of the invention, its steps flow chart and first embodiment are identical, both differences be in, bury a heating column 16 underground in carrier 11 before the step S2, in step S2, around carrier 11 surperficial corresponding heating column 16 positions and heating column 16, form the promotion portion 12 of adhering to the roughened method with rough surface 121.The described heating column of burying underground can be according to the producer designs product demand in carrier, and the high thermal source place that is chosen in the carrier buries at least one heating column 16 underground to increase the hot transfer efficiency of whole circuit substrate structure.
Further, the heating column material can be lead, aluminium, gold, copper, tungsten, magnesium, molybdenum, zinc, silver, graphite, Graphene, diamond, CNT (carbon nano-tube), nano carbon microsphere, nanometer foam, carbon 60, carbon nanocone, carbon nanohorn, carbon nanometer dropper, tree-shaped carbon micrometer structure, beryllium oxide, aluminium oxide, zirconia, boron nitride, aluminium nitride, magnesium oxide, silicon nitride or carborundum one of them or its combination, but not as limit.
Please refer to shown in Figure 11ly, it is the schematic diagram of the circuit substrate structure of sixth embodiment of the invention.Identical with the purpose of above-mentioned the 5th embodiment, be all the hot transfer efficiency that increases whole circuit substrate structure, can add Heat Conduction Material in carrier.The structure of the 6th embodiment and first embodiment (Fig. 2) are identical, both differences be in, step S1 carrier 11 steps are provided the time, in the middle of added Heat Conduction Material 1111, and evenly be mixed in the carrier 11, form the promotion portion 12 of adhering to the roughened method equally afterwards with rough surface 121.Subsequent step is all identical with first embodiment.
Please refer to shown in Figure 12, it is the circuit substrate structure schematic diagram of seventh embodiment of the invention, its structure and the 3rd embodiment are identical, both differences be in, step 1 the step of carrier 11 is provided the time, centrally added Heat Conduction Material 1111 and evenly be mixed in the carrier 11, before step S2, catalyst insulating barrier 14 is set earlier afterwards in carrier 11 surfaces, with isolated carrier 11 surfaces, avoid carrier 11 surfaces to react because of its material property easily produces with catalyst, chemical plating fluid.
Please refer to shown in Figure 13-14, it is the circuit substrate structure schematic diagram of eighth embodiment of the invention, and it is the distortion sample attitude (Fig. 4-5) of second embodiment, both differences be in, step S1 the step of carrier 11 is provided the time, add Heat Conduction Material 1111, and evenly be mixed in the carrier 11.Subsequent step is all identical with second embodiment.
Please refer to shown in Figure 15-16, it is the circuit substrate structure schematic diagram of ninth embodiment of the invention, it is the distortion sample attitude (Fig. 8-9) of the 4th embodiment, both differences be in, when the step of carrier 11 is provided, the central Heat Conduction Material 1111 that adds also evenly is mixed in the carrier 11, and subsequent step is all identical with the 4th embodiment.
In sum, the 6th, seven, eight, nine embodiment of the present invention, all add Heat Conduction Material 1111 in carrier 11, its required addition and kind can be done appropriateness adjustment according to the producer designs product demand, and purpose is for increasing the hot transfer efficiency of whole circuit substrate structure.
The material of the non-conductive carrier that adopts among the present invention can be high molecule plastic or ceramic material.High molecule plastic can be thermoplastics or thermoset plastics.The material of the non-conductive carrier that adopts has heat conduction property, and can add inorganic filler in the high molecule plastic of non-conductive carrier, wherein the composition of inorganic filler can be silicic acid, silica derivative, carbonic acid, carbonic acid derivative, phosphoric acid, phosphoric acid derivatives, activated carbon, porous carbon, carbon black, glass fibre, carbon fiber or ore deposit fiber one of them or its combination.In addition, ceramic material can be oxide, nitride, carbide, boride one of them.Further, ceramic material by oxide, nitride, carbide, boride one of them in conjunction with adhesive form can penetrate, the mixture of extrusion etc., and after mixture is shaped, remove adhesive thermal sintering again.
The roughened method that is adopted among the present invention can adopt modes such as sandblast processing mode or laser irradiation etching that its carrier surface is provided with and form the promotion portion of adhering to roughening, the laser illumination wavelength scope that adopts can be between being between 248 nanometer to 10600 nanometers, and wherein laser irradiation etching mode can be carbon dioxide (CO
2) laser, the refined chromium of rubidium (Nd:YAG) laser, Nd-doped yttrium vanadate crystal (Nd:YVO
4) laser, quasi-molecule (EXCIMER) laser or optical fiber laser (Fiber Laser), but not as limit.
Among the present invention, non-conductive carrier disperses interpolation to have heat conductivity material or derivatives thereof material; The material with heat conduction property that is adopted can be metal heat-conducting material or nonmetal heat conduction material; The metal heat-conducting material that adopts can be lead, aluminium, gold, copper, tungsten, magnesium, molybdenum, zinc or silver one of them or its combination; The nonmetal heat conduction material that adopts can be graphite, Graphene, diamond, CNT (carbon nano-tube), nano carbon microsphere, nanometer foam, carbon 60, carbon nanocone, carbon nanohorn, carbon nanometer dropper, tree-shaped carbon micrometer structure, beryllium oxide, aluminium oxide, zirconia, boron nitride, aluminium nitride, magnesium oxide, silicon nitride or carborundum one of them or its combination, but not as limit.
The catalyst that present embodiment adopted can adopt titanium, antimony, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, iridium, osmium, rhodium, rhenium, ruthenium, tin one of them or its mixture, also can comprise the compound of above-mentioned element.For example: palladium bichloride (PdCl
2), stannic chloride (SnCl
2), palladium sulfate (II) hydrate (Palladium Sulfate Hydrate) etc., but not as limit.
According to the manufacture method of above-mentioned first to the 9th described circuit substrate structure of embodiment, can be widely used in various non-conductive carriers, and it can have the material of heat conduction property or have the stereo circuit manufacturing process of the plastic film interconnecting assembly of heat conduction property.
Please refer to shown in Figure 21, its carrier of the present invention with Figure 18 carries out the data of elementary analysis (EDS) back gained, as showing do not mix in the carrier of the present invention any metal oxide or catalyst in the data, the gold that is presented among the figure (Au) element is the gold layer that non-conductive conductor all need plate earlier in the pre-treatment process, it is in order to increase conductivity, avoid the accumulation of surface electronic, can avoid the electric charge accumulation that resolution is impacted.
See also shown in Figure 22, its for existing LPKF-LDS technology to carrier (LPKF) surface with laser carved SEM figure, all be doped with the metal oxide composition in the used LPKF carrier on the industry at present; Other sees also shown in Figure 23, shows in the LPKF carrier in the middle of the data to be doped with metal oxide, shows among elementary analysis (EDS) figure to have chromium (Cr) and copper (Cu) element is present in the LPKF carrier.By above-mentioned described, technical characterictic of the present invention is with the different of prior art, carrier of the present invention is not because of containing any metal oxide, after formation compartmentalization rough surface is set in roughened mode (laser irradiation etching), catalyst can adhere to and the firm roughened area that invests carrier surface, can effectively be reduced in the employed catalyst amount of high molecule plastic in solid or the planar circuit manufacturing process.Prior art with LDS laser laser activation metal oxide to produce metal core, because of existing LPKF carrier contains metal oxide, therefore need the reductant concentration of higher dosage just can make metal core open plating smoothly in the reaction of electroless copper, the plating bath with relative chemical copper is unstable, the life-span is short, expense plating bath increases and need higher shortcomings such as production cost.
In sum, circuit substrate structure of the present invention and manufacture method thereof, make its non-conductive carrier form the promotion portion of adhering to by laser irradiation etching, it can effectively adsorb catalyst and firm being arranged at adhered in the promotion portion, formation in order to subsequent metal layer, can effectively reduce the use of catalyst or catalyst, have advantage, can significantly reduce the use cost of catalyst and catalyst amount and chemical plating fluid than low production cost.The method of improving existing laser laser activation metal oxide or catalyst generation metal core expends the problem of higher production cost.
In addition, it should be noted that, in various embodiments of the present invention, respectively adhere to promotion portion, catalyst, metal level, anti-plating insulating barrier, catalyst insulating barrier, and electrodeposited coating etc., be provided with on one of them single plane on the non-conductive carrier and present at this.But when the present invention implements in reality, be not limited to this, also can be arranged on the promotion portion of respectively adhering to that is provided with on the different plane of non-conductive carrier, catalyst, metal level, anti-plating insulating barrier, catalyst insulating barrier, reach electrodeposited coating etc.In other words, circuit substrate structure of the present invention and manufacture method thereof can be made the circuit on solid or plane.
Moreover, in various embodiments of the present invention, before each step will be carried out next step, all have cleaning, pollute the fabrication schedule of next step to avoid previous step, therefore the technological means that this technical field is familiar with does not give unnecessary details in the present invention.For example: form the promotion portion of adhering to the roughened method on the non-conductive carrier, at this moment, will have waste material and remain in non-conductive carrier, utilize cleaning that waste material is removed from non-conductive carrier surface with rough surface.But wherein be stressed that, non-conductive carrier immerses in the catalyst solution tank, make catalyst attached to adhering to promotion portion, through behind the cleaning, owing to adhere to the rough surface of promotion portion, make that catalyst can be attached to adhering to promotion portion, all the other do not have the part of the promotion of adhering to portion non-conductive carrier, then can be because of cleaning, and remove catalyst, or the residual quantity of catalyst is difficult for and chemical plating produces reaction, or the unlikely line quality to circuit substrate structure of its reaction has too big influence.
The above embodiment is only for illustrating the present invention's technological thought and characteristics, its purpose makes those of ordinary skill in the art can understand content of the present invention and is implementing according to this, when not limiting claim of the present invention with this, promptly the equalization of doing according to disclosed spirit generally changes or modifies, and must be encompassed in the claim of the present invention.
Claims (18)
1. the manufacture method of a circuit substrate structure is applicable to it is characterized in that the circuit production process of non-conductive carrier, comprises the following step:
One carrier is provided;
Have one of rough surface with a roughened method in this carrier surface formation and adhere to promotion portion;
One catalyst is set to be adhered in the promotion portion in described; And
Described catalyst reacts with the chemical plating reducing process, and then forms a metal level in the described promotion portion of adhering to.
2. the manufacture method of circuit substrate structure according to claim 1 is characterized in that, described roughened method can be sandblast processing mode or laser irradiation etching mode one of them.
3. the manufacture method of circuit substrate structure according to claim 1, it is characterized in that, before described carrier surface carries out described roughened method step, one catalyst insulating barrier further is set on described carrier, and further run through described catalyst insulating barrier with the roughened method, adhere to promotion portion and form this at described carrier surface.
4. the manufacture method of circuit substrate structure according to claim 1 is characterized in that, described carrier is made a non-conductive carrier by non-conducting material, described non-conducting material comprise high molecule plastic or ceramic material one of them.
5. the manufacture method of circuit substrate structure according to claim 1, described catalyst comprise the compound of titanium, antimony, silver, palladium, iron, nickel, copper, vanadium, cobalt, zinc, platinum, iridium, osmium, rhodium, rhenium, ruthenium, tin one of them or its mixture or above-mentioned element.
6. the manufacture method of circuit substrate structure according to claim 4 is characterized in that, described high molecule plastic comprises inorganic filler.
7. the manufacture method of circuit substrate structure according to claim 4 is characterized in that, described non-conductive carrier will have heat conductivity material or derivatives thereof dispersion of materials wherein.
8. the manufacture method of circuit substrate structure according to claim 4 is characterized in that, described material with non-conductive carrier of heat conduction property comprises a metal heat-conducting material or a nonmetal heat conduction material.
9. the manufacture method of circuit substrate structure according to claim 4 is characterized in that, buries at least one heating column underground in the described non-conductive carrier.
10. the manufacture method of circuit substrate structure according to claim 1 is characterized in that, further comprises the steps:
After described carrier is provided, outside adhering to promotion portion, this at least one conductive junction point is set with described roughened method on this carrier simultaneously, and edge and the described promotion portion of adhering to that each described conductive junction point connects described carrier also form the circuit that communicates;
Carrying out electroless plating is handled in each described adhering to this metal level is set in the promotion portion;
One anti-plating insulating barrier is set on each described conductive junction point;
Utilize plating mode on each described metal level, an electrodeposited coating to be set;
Remove the described anti-plating insulating barrier and the described metal level that are arranged on each described conductive junction point, obtain each independently circuit pattern.
11. a circuit substrate structure is characterized in that, comprises:
One carrier;
At least one promotion portion of adhering to, each described promotion portion of adhering to forms rough surface at described carrier surface, and each described rough surface that adheres to promotion portion presents open state; And
One metal level is provided with described metal level in each described promotion portion of adhering to, and described metal level is formed by defaulting in each described catalyst and chemical plating fluid reaction of adhering to promotion portion.
12. circuit substrate structure according to claim 11 is characterized in that, further comprises at least one conductive junction point, each described conductive junction point connects the edge of this carrier and respectively this adheres to promotion portion and forms the circuit that communicates.
13. circuit substrate structure according to claim 12 is characterized in that, an anti-plating insulating barrier further is set on the metal level of each described conductive junction point.
14. circuit substrate structure according to claim 13 is characterized in that, an electrodeposited coating is set on the described metal level.
15. a circuit substrate structure is characterized in that, comprises:
One carrier;
One catalyst insulating barrier, it is arranged on the described carrier surface;
At least one promotion portion of adhering to, each described promotion portion of adhering to runs through described catalyst insulating barrier and is arranged at described carrier surface, and each described rough surface that adheres to promotion portion is open state; And
One metal level, it is arranged on each described adhering in the promotion portion, and described metal level is formed by defaulting in the catalyst and the chemical plating fluid reaction of respectively adhering to promotion portion.
16. circuit substrate structure according to claim 15 is characterized in that, further comprises at least one conductive junction point, each described conductive junction point connects the edge of this carrier and respectively this adheres to promotion portion and forms the circuit that communicates.
17. circuit substrate structure according to claim 16 is characterized in that, an anti-plating insulating barrier is set on the metal level of each described conductive junction point.
18. circuit substrate structure according to claim 17 is characterized in that, on each described metal level an electrodeposited coating is set.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100164587A CN103220884A (en) | 2012-01-18 | 2012-01-18 | Line substrate structure and manufacturing method thereof |
| PCT/CN2012/071130 WO2013107065A1 (en) | 2012-01-18 | 2012-02-14 | Circuit substrate structure and manufacturing method thereof |
| US13/533,702 US20130180773A1 (en) | 2012-01-18 | 2012-06-26 | Circuit substrate structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100164587A CN103220884A (en) | 2012-01-18 | 2012-01-18 | Line substrate structure and manufacturing method thereof |
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| Publication Number | Publication Date |
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| CN103220884A true CN103220884A (en) | 2013-07-24 |
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ID=48818169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012100164587A Pending CN103220884A (en) | 2012-01-18 | 2012-01-18 | Line substrate structure and manufacturing method thereof |
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| CN (1) | CN103220884A (en) |
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| CN104896320A (en) * | 2014-03-06 | 2015-09-09 | 苏州同拓光电科技有限公司 | LED (light-emitting diode) lamp |
| CN105463418A (en) * | 2014-09-10 | 2016-04-06 | 启碁科技股份有限公司 | Metal pattern manufacturing method and substrate structure |
| CN106538072A (en) * | 2014-06-30 | 2017-03-22 | 3M创新有限公司 | Metallic microstructures with reduced-visibility and methods for producing same |
| CN108024457A (en) * | 2017-12-01 | 2018-05-11 | 湖南文理学院 | A kind of preparation method of macromolecule flexible conductive film |
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| CN112151470A (en) * | 2020-09-28 | 2020-12-29 | 青岛歌尔微电子研究院有限公司 | Chip packaging structure, preparation method thereof and electronic device |
| CN113860919A (en) * | 2021-09-25 | 2021-12-31 | 麦德美科技（苏州）有限公司 | Chemical roughening and metalizing process for alumina ceramic |
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| CN110831350A (en) * | 2019-11-14 | 2020-02-21 | 四会富仕电子科技股份有限公司 | Method for manufacturing bottomless copper circuit board |
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| CN112151470A (en) * | 2020-09-28 | 2020-12-29 | 青岛歌尔微电子研究院有限公司 | Chip packaging structure, preparation method thereof and electronic device |
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Application publication date: 20130724 |