TWI424233B - Array substrate, substrate module, and display panel - Google Patents

Array substrate, substrate module, and display panel Download PDF

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Publication number
TWI424233B
TWI424233B TW99145582A TW99145582A TWI424233B TW I424233 B TWI424233 B TW I424233B TW 99145582 A TW99145582 A TW 99145582A TW 99145582 A TW99145582 A TW 99145582A TW I424233 B TWI424233 B TW I424233B
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substrate
thickness
conductive layer
sealant
region
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TW99145582A
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TW201227102A (en
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Chung Ming Shen
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Au Optronics Corp
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Priority to TW99145582A priority Critical patent/TWI424233B/en
Priority to CN201110049931.7A priority patent/CN102169263B/en
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Publication of TWI424233B publication Critical patent/TWI424233B/en

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Description

陣列基板、基板模組以及顯示面板Array substrate, substrate module, and display panel

本發明是有關於一種陣列基板、基板模組以及顯示面板,且特別是有關於一種品質良好的陣列基板、基板模組以及顯示面板。The present invention relates to an array substrate, a substrate module, and a display panel, and more particularly to an array substrate, a substrate module, and a display panel of good quality.

現今社會多媒體技術相當發達,多半受惠於半導體元件或顯示裝置的進步。就顯示器而言,具有高畫質、空間利用效率佳、低消耗功率、無輻射等優越特性之液晶顯示器已逐漸成為市場之主流。Today's social multimedia technology is quite developed, and most of them benefit from the advancement of semiconductor components or display devices. As far as the display is concerned, a liquid crystal display having superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation has gradually become the mainstream of the market.

液晶顯示器包括一液晶顯示面板以及一背光模組,其中背光模組用以提供足夠的亮度,液晶顯示面板才可以顯示圖像。簡單地來說,液晶顯示面板主要包括薄膜電晶體陣列基板(TFT Array Substrate)、彩色濾光基板(Color Filter)以及配置在薄膜電晶體陣列基板與彩色濾光基板之間的液晶層。一般而言,為了讓液晶層能夠保存於兩個基板之間,因此在將兩個基板組立前,會先在薄膜電晶體陣列基板或彩色濾光基板上適當的位置形成框膠,然後再將液晶分子滴注於兩基板其中之一上。之後,壓合兩基板,以形成液晶顯示面板,或者,先壓合兩基板,再將液晶分子灌注於兩基板之間。The liquid crystal display comprises a liquid crystal display panel and a backlight module, wherein the backlight module is used to provide sufficient brightness, and the liquid crystal display panel can display images. Briefly, the liquid crystal display panel mainly includes a TFT Array Substrate, a color filter, and a liquid crystal layer disposed between the thin film transistor array substrate and the color filter substrate. Generally, in order to allow the liquid crystal layer to be stored between the two substrates, the frame glue is first formed on the thin film transistor array substrate or the color filter substrate before the two substrates are assembled, and then The liquid crystal molecules are dropped on one of the two substrates. Thereafter, the two substrates are pressed together to form a liquid crystal display panel, or the two substrates are first pressed together, and liquid crystal molecules are poured between the two substrates.

在組立液晶顯示面板時,框膠所在位置必須具備良好的平整性,以使薄膜電晶體陣列基板與彩色濾光基板彼此平行而維持固定的間隙。不過,在薄膜電晶體陣列基板的設計中,有部分的導線會設置在與框膠重疊的區域,其中這些導線因為阻抗的需求不同而有不同的厚度設計。因此,框膠將薄膜電晶體陣列基板與彩色濾光基板組立在一起時,免不了會因為框膠設置位置的不平整而發生基板歪斜的現象,也可稱為翹翹板現象。When the liquid crystal display panel is assembled, the position of the sealant must have good flatness so that the thin film transistor array substrate and the color filter substrate are parallel to each other to maintain a fixed gap. However, in the design of the thin film transistor array substrate, some of the wires are disposed in an area overlapping the frame glue, wherein the wires have different thickness designs due to different impedance requirements. Therefore, when the sealant is assembled with the color filter array substrate and the color filter substrate, the phenomenon that the substrate is skewed due to the unevenness of the position where the sealant is disposed may also be referred to as a seesaw phenomenon.

本發明提供一種陣列基板,其上所設置的導線中有部分的導線在框膠區以及非框膠區具有不同的厚度以符合特定的阻抗需求,同時位在框膠區的所有導線都具有相同厚度。The invention provides an array substrate, wherein a part of the wires disposed on the wire have different thicknesses in the glue-bonding zone and the non-frame rubber zone to meet specific impedance requirements, and all the wires in the glue-blocking zone have the same thickness.

本發明提供一種基板模組,不容易發生翹翹板現象。The invention provides a substrate module, and the phenomenon of the seesaw is not easy to occur.

本發明提供一種顯示面板,其顯示介質填充於兩個彼此平行的基板之間,且將兩基板組立在一起的框膠大體具有均勻的厚度。The present invention provides a display panel in which a display medium is filled between two substrates that are parallel to each other, and a sealant that groups the two substrates together has a substantially uniform thickness.

本發明提出一種陣列基板,包括一基板、一框膠、一主動元件陣列以及至少一第一導線。基板具有一顯示區以及圍繞顯示區的一框膠區。框膠設置於框膠區中。主動元件陣列配置於顯示區中。第一導線配置於基板上,並由顯示區延伸至框膠區中。第一導線在顯示區中具有一第一厚度,而在框膠區中具有一第二厚度,且第一厚度大於第二厚度。The invention provides an array substrate comprising a substrate, a sealant, an active device array and at least one first wire. The substrate has a display area and a sealant area surrounding the display area. The sealant is placed in the sealant area. The active device array is arranged in the display area. The first wire is disposed on the substrate and extends from the display area into the sealant area. The first wire has a first thickness in the display region and a second thickness in the seal region, and the first thickness is greater than the second thickness.

本發明另提出一種基板模組,包括一陣列基板、一對向基板以及一框膠。陣列基板包括一基板、一主動元件陣列以及至少一第一導線。基板具有一顯示區以及圍繞顯示區的一框膠區。主動元件陣列配置於顯示區中。第一導線配置於基板上,並由顯示區延伸至框膠區中。第一導線在顯示區中具有一第一厚度,而在框膠區中具有一第二厚度,且第一厚度大於第二厚度。對向基板與陣列基板相向而設。框膠設置於框膠區中並將陣列基板以及對向基板組立在一起。The invention further provides a substrate module comprising an array substrate, a pair of substrates and a sealant. The array substrate includes a substrate, an active device array, and at least one first wire. The substrate has a display area and a sealant area surrounding the display area. The active device array is arranged in the display area. The first wire is disposed on the substrate and extends from the display area into the sealant area. The first wire has a first thickness in the display region and a second thickness in the seal region, and the first thickness is greater than the second thickness. The opposite substrate and the array substrate face each other. The sealant is disposed in the sealant region and the array substrate and the opposite substrate are grouped together.

本發明又提出一種顯示面板,包括一陣列基板、一對向基板、一框膠以及一顯示介質。陣列基板包括一基板、一主動元件陣列以及至少一第一導線。基板具有一顯示區以及圍繞顯示區的一框膠區。主動元件陣列配置於顯示區中。第一導線配置於基板上,並由顯示區延伸至框膠區中。第一導線在顯示區中具有一第一厚度,而在框膠區中具有一第二厚度,且第一厚度大於第二厚度。對向基板與陣列基板相向而設。框膠設置於框膠區中並將陣列基板以及對向基板組立在一起。顯示介質配置於陣列基板、對向基板以及框膠之間。The invention further provides a display panel comprising an array substrate, a pair of substrates, a frame glue and a display medium. The array substrate includes a substrate, an active device array, and at least one first wire. The substrate has a display area and a sealant area surrounding the display area. The active device array is arranged in the display area. The first wire is disposed on the substrate and extends from the display area into the sealant area. The first wire has a first thickness in the display region and a second thickness in the seal region, and the first thickness is greater than the second thickness. The opposite substrate and the array substrate face each other. The sealant is disposed in the sealant region and the array substrate and the opposite substrate are grouped together. The display medium is disposed between the array substrate, the opposite substrate, and the sealant.

本發明更提出一種陣列基板,包括一基板、一框膠、一主動元件陣列以及至少一第一導線。基板具有顯示區以及圍繞顯示區的框膠區。框膠設置於框膠區中。主動元件陣列配置於顯示區中。第一導線配置於基板上,並由顯示區延伸至框膠區中。第一導線至少由一第一導電層以及一第二導電層相疊所構成,且第一導電層與第二導電層在顯示區中重疊地配置於基板上,而在框膠區中並列地配置於基板上。The invention further provides an array substrate comprising a substrate, a sealant, an active device array and at least one first wire. The substrate has a display area and a sealant area surrounding the display area. The sealant is placed in the sealant area. The active device array is arranged in the display area. The first wire is disposed on the substrate and extends from the display area into the sealant area. The first conductive line is formed by at least a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer are disposed on the substrate in an overlapping manner in the display region, and juxtaposed in the sealant region. Disposed on the substrate.

基於上述,本發明的陣列基板中,同一導線在框膠區以及非框膠區分別具有不同厚度,其中這樣的導線在框膠區中的部分與位於框膠區的其他導線可以具有相同的厚度,而在非框膠區的厚度較大。如此一來,這樣的導線可以具有所需的阻抗,並且不會使得框膠區的平整性變差。因此,框膠設置於框膠區時可以具有理想的平整性,而基板模組以及顯示面板利用本發明的陣列基板便可以擁有所需的導線阻抗以及良好的組立良率。Based on the above, in the array substrate of the present invention, the same wire has different thicknesses in the sealant region and the non-frame seal region, wherein the portion of the wire in the sealant region and the other wires located in the sealant region may have the same thickness. And the thickness in the non-frame rubber area is larger. As a result, such a wire can have a desired impedance and does not deteriorate the flatness of the seal region. Therefore, the sealant can have ideal flatness when disposed in the sealant region, and the substrate module and the display panel can have the required wire impedance and good assembly yield by using the array substrate of the present invention.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

圖1繪示為本發明一實施例的陣列基板示意圖,圖2為沿圖1之剖線I-I’所繪示的剖面圖,而圖3為沿圖1之剖線I-I”所繪示的剖面圖。請同時參照圖1至圖3,陣列基板100包括一基板110、一框膠120、一主動元件陣列130以及至少一第一導線140。基板110具有一顯示區112以及圍繞顯示區112的一框膠區114。框膠120設置於框膠區114中,也就是說框膠120所在位置即為框膠區114內。主動元件陣列130配置於顯示區112中。第一導線140配置於基板110上,並由顯示區112延伸至框膠區114中。值得一提的是,第一導線140在顯示區112中具有一第一厚度t1,而在框膠區114中具有一第二厚度t2,且第一厚度t1大於第二厚度t2。除此之外,第一導線140可以更延伸至基板110的一外側區116中,且框膠區114位在外側區116以及顯示區112之間。如圖1所示,第一導線140在從顯示區112進入至框膠區114時,於鄰近框膠區114之顯示區112之一部分內即具有第二厚度t2,然並不以此為限。1 is a schematic view of an array substrate according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line I-I' of FIG. 1, and FIG. 3 is a cross-sectional line II" of FIG. 1 to 3, the array substrate 100 includes a substrate 110, a sealant 120, an active device array 130, and at least a first lead 140. The substrate 110 has a display area 112 and surrounding the display area. A frame rubber portion 114 of the 112. The frame glue 120 is disposed in the sealant region 114, that is, the position of the sealant 120 is the glue seal region 114. The active device array 130 is disposed in the display region 112. The first wire 140 It is disposed on the substrate 110 and extends from the display area 112 into the sealant region 114. It is worth mentioning that the first wire 140 has a first thickness t1 in the display area 112 and one in the sealant area 114. The second thickness t2, and the first thickness t1 is greater than the second thickness t2. In addition, the first wire 140 may extend into an outer region 116 of the substrate 110, and the glue region 114 is located at the outer region 116 and displayed. Between the regions 112. As shown in FIG. 1, the first wire 140 is adjacent to the sealant region 114 when it enters from the display region 112. A portion of the display area 112 of the sealant region 114 has a second thickness t2, which is not limited thereto.

在本實施例中,第一導線140可以電性連接於主動元件陣列130以供傳遞一掃描訊號、傳遞一資料訊號或傳遞一共通訊號。或是,第一導線140可以作為修補線之用,而不傳遞訊號。當陣列基板100的尺寸增大,第一導線140的長度勢必要增長而使負載增加。因此,為了維持一定的訊號傳輸品質,第一導線140的阻抗不能太高。In this embodiment, the first wire 140 can be electrically connected to the active device array 130 for transmitting a scan signal, transmitting a data signal, or transmitting a common communication number. Alternatively, the first wire 140 can be used as a repair line without transmitting a signal. As the size of the array substrate 100 increases, the length of the first wire 140 is necessarily increased to increase the load. Therefore, in order to maintain a certain signal transmission quality, the impedance of the first wire 140 cannot be too high.

一般而言,在固定線寬的設計下,第一導線140的阻抗例如是與其厚度成反比。也就是說,厚度越厚,第一導線140的阻抗越低,反之則阻抗越高。因此,本實施例讓第一導線140在顯示區112中的第一厚度t1較大有助於降低第一導線140的阻抗。第一導線140在外側區116例如也具有第一厚度t1以維持阻抗的均勻性。另外,在本實施例中,第一導線140在框膠區114的第二厚度t2較薄,其使得框膠120不容易在框膠區114造成表面的不平整。所以,第一導線140的厚度設計可使框膠120配置於實質上平整的表面,而不容易發生框膠120厚度不均勻的現象。In general, the impedance of the first wire 140 is, for example, inversely proportional to its thickness under a fixed line width design. That is, the thicker the thickness, the lower the impedance of the first wire 140, and vice versa. Therefore, the present embodiment makes the first thickness t1 of the first wire 140 in the display region 112 large to help reduce the impedance of the first wire 140. The first wire 140 also has, for example, a first thickness t1 in the outer region 116 to maintain uniformity of impedance. In addition, in the present embodiment, the first wire 140 is thinner at the second thickness t2 of the sealant region 114, which makes the sealant 120 less likely to cause surface unevenness in the sealant region 114. Therefore, the thickness of the first wire 140 is designed such that the sealant 120 is disposed on a substantially flat surface, and the thickness of the sealant 120 is not easily uneven.

由圖1可知,為了維持均勻的阻抗,第一導線140在經過框膠區114時可以沿著剖線I-I’以及剖線I-I”兩種路徑分布。藉著這樣的設計,第一導線140在顯示區112中以及在框膠區114中可以具有不同的第一厚度t1以及第二厚度t2,可是第一導線140在顯示區112中以及在框膠區114中仍可以具有實質上相同的阻抗。也就是說,本實施例的第一導線140在框膠區114可以沿兩條路徑配置而不因為在框膠區114中的第二厚度t2較薄使得阻抗提高。如此一來,第一導線140非但可以具有理想的阻抗也不會造成框膠區114表面的不平整。As can be seen from FIG. 1, in order to maintain a uniform impedance, the first wire 140 can be distributed along the cross-sectional line I-I' and the cross-sectional line II" when passing through the sealant region 114. With such a design, the first wire The 140 may have a different first thickness t1 and a second thickness t2 in the display region 112 and in the sealant region 114, but the first wire 140 may still have substantially the same in the display region 112 and in the sealant region 114. That is, the first wire 140 of the present embodiment can be disposed along the two paths in the sealant region 114 without increasing the impedance because the second thickness t2 in the sealant region 114 is thin. The first wire 140 can have not only a desired impedance but also an unevenness in the surface of the sealant region 114.

此外,圖4為沿圖1之剖線II-II’所繪示的剖面示意圖。請同時參照圖1與圖4,陣列基板100可以更包括多條第二導線150,其配置於基板110上。第二導線150也是由顯示區112延伸至框膠區114中。詳言之,第二導線150各自例如是由單一導電層所構成。第二導線150的阻抗不須特別地降低,因此第二導線150所具有的第三厚度t3實質上可以為單一導電層的厚度。Further, Fig. 4 is a schematic cross-sectional view taken along line II-II' of Fig. 1. Referring to FIG. 1 and FIG. 4 simultaneously, the array substrate 100 may further include a plurality of second wires 150 disposed on the substrate 110. The second wire 150 also extends from the display region 112 into the sealant region 114. In particular, the second wires 150 are each formed, for example, of a single conductive layer. The impedance of the second wire 150 need not be particularly lowered, so the third wire 150 has a third thickness t3 which may be substantially the thickness of the single conductive layer.

在本實施例中,第一導線140必須具有較低的阻抗,所以第一導線140在顯示區112的第一厚度t1大於單一導電層的厚度。若將這樣厚度的第一導線140也配置於框膠區114中,則框膠區114的表面平整性將會變差。也就是說,第二導線150所在位置的表面相對較低而第一導線140所在位置的表面相對較高。此時,框膠120配置於高度不均於的框膠區114勢必會造成框膠120的厚度不均勻而不利於後續的組立過程。In the present embodiment, the first wire 140 must have a lower impedance, so the first thickness t1 of the first wire 140 in the display region 112 is greater than the thickness of the single conductive layer. If the first wire 140 having such a thickness is also disposed in the sealant region 114, the surface flatness of the sealant region 114 will be deteriorated. That is, the surface where the second wire 150 is located is relatively low and the surface where the first wire 140 is located is relatively high. At this time, the placement of the sealant 120 in the highly uneven rubber seal region 114 tends to cause the thickness of the sealant 120 to be uneven, which is disadvantageous for the subsequent assembly process.

因此,在本實施例中,為了使框膠120配置於平整的表面上,第一導線140在框膠區114可以僅具有第二厚度t2,其中各第二導線150的第三厚度t3實質上等於第一導線140在框膠區114的第二厚度t2。也就是說,本實施例令第一導線140在框膠區114的第二厚度t2與其他的導線(例如第二導線150)的第三厚度t3相等,藉此使得框膠120設置在厚度相同的這些導線上而維持框膠120的厚度均勻性。本實施例即可藉著這種分線的方式設置第一導線140,以使第一導線140在具有低阻抗的特性下,同時也維持框膠120配置位置的平整性。Therefore, in the embodiment, in order to arrange the sealant 120 on the flat surface, the first wire 140 may have only the second thickness t2 in the sealant region 114, wherein the third thickness t3 of each second wire 150 is substantially It is equal to the second thickness t2 of the first wire 140 at the sealant region 114. That is, the present embodiment makes the first thickness 140 of the first wire 140 at the second thickness t2 of the sealant region 114 equal to the third thickness t3 of the other wires (for example, the second wire 150), thereby making the sealant 120 have the same thickness. These wires are used to maintain the thickness uniformity of the sealant 120. In this embodiment, the first wire 140 can be disposed by means of such a split line, so that the first wire 140 has the characteristics of low impedance while maintaining the flatness of the position of the sealant 120.

詳言之,圖5以及圖6繪示為圖1之剖線I-I’與剖線I-I”的一種實施方式。請同時參照圖1、圖5與圖6,在一實施例中,第一導線140至少由一第一導電層142以及一第二導電層144所構成,且第一導電層142與第二導電層144在顯示區112中重疊地配置於基板110上,而在框膠區114中並列地配置於基板110上。也就是說,第一導線140在框膠區114中是以兩條不同的路徑(剖線I-I’以及剖線I-I”的路徑)分佈的。5 and 6 show an embodiment of the cross-sectional line I-I' and the cross-sectional line II" of Fig. 1. Referring also to Figures 1, 5 and 6, in an embodiment, A wire 140 is formed by at least a first conductive layer 142 and a second conductive layer 144, and the first conductive layer 142 and the second conductive layer 144 are disposed on the substrate 110 in an overlapping manner in the display region 112. The region 114 is juxtaposed on the substrate 110. That is, the first wire 140 is distributed in the sealant region 114 in two different paths (the path of the line I-I' and the line II).

值得一提的是,第一導電層142與第二導電層144在顯示區112以及外側區116中重疊地配置於基板110上,而在框膠區114中並列地配置於基板110上。如此一來,第一導線140無論在顯示區112、在框膠區114以及在外側區116中都是由第一導電層142與第二導電層144所組成。因此,第一導線140可以具有均勻的阻抗,不因在框膠區114需具有較薄厚度而使得第一導線140的阻抗在局部區域中提高。It is to be noted that the first conductive layer 142 and the second conductive layer 144 are disposed on the substrate 110 in the display region 112 and the outer region 116, and are arranged side by side on the substrate 110 in the sealant region 114. As such, the first conductive line 140 is composed of the first conductive layer 142 and the second conductive layer 144 in the display region 112, the sealant region 114, and the outer region 116. Therefore, the first wire 140 may have a uniform impedance, and the impedance of the first wire 140 may be increased in a partial region without requiring a thinner thickness in the sealant region 114.

詳言之,第一導電層142包括依序連接的一第一部份142A、一第二部份142B以及一第三部份142C。第一部分142A位於顯示區112中並與第二導電層144疊置在一起,第三部份142C與框膠120重疊並與第二導電層144並列,而第二部份142B連接於第一部分142A與第三部份142C之間。In detail, the first conductive layer 142 includes a first portion 142A, a second portion 142B, and a third portion 142C that are sequentially connected. The first portion 142A is located in the display region 112 and overlaps the second conductive layer 144. The third portion 142C overlaps the sealant 120 and is juxtaposed with the second conductive layer 144, and the second portion 142B is coupled to the first portion 142A. Between the third part 142C.

相似地,第二導電層144也包括有依序連接的一第一部份144A、一第二部份144B以及一第三部份144C。第一部分144A位於顯示區112中並與第一導電層142疊置在一起,第三部份144C與框膠120重疊並與第一導電層142並列,而第二部份144B連接於第一部分144A與第三部份144C之間。第二導電層144的第二部分144B在圖1的上視圖中例如是對應於剖線I-I”的彎折處。Similarly, the second conductive layer 144 also includes a first portion 144A, a second portion 144B, and a third portion 144C that are sequentially connected. The first portion 144A is located in the display region 112 and overlaps the first conductive layer 142. The third portion 144C overlaps the sealant 120 and is juxtaposed with the first conductive layer 142, and the second portion 144B is coupled to the first portion 144A. Between the third part 144C. The second portion 144B of the second conductive layer 144 is, for example, a bend corresponding to the line I-I" in the upper view of FIG.

在本實施例中,如圖5所示,第一導電層142與第二導電層144相較係為相對接近基板110的膜層。不過,本發明不以此為限。在其他實施方式中,第一導電層142與第二導電層144的疊置順序可以互換。也就是說,本發明不特別地限定第一導電層142疊置於第二導電層144上的實施方式或是第二導電層144疊置於第一導電層142上的實施方式。In this embodiment, as shown in FIG. 5 , the first conductive layer 142 and the second conductive layer 144 are relatively close to the film layer of the substrate 110 . However, the invention is not limited thereto. In other embodiments, the stacking order of the first conductive layer 142 and the second conductive layer 144 may be interchanged. That is, the present invention does not particularly limit the embodiment in which the first conductive layer 142 is stacked on the second conductive layer 144 or the embodiment in which the second conductive layer 144 is stacked on the first conductive layer 142.

另外,第一導電層142與第二導電層144實質上具有相同的厚度,也就是單一導電層的厚度,其可以由多層金屬層的堆疊所構成也可以僅由一層金屬層所構成。也就是說,第一導線140在顯示區112的第一厚度t1可以為第一導線140在框膠區114的第二厚度t2的兩倍。當然,在圖4中,第二導線150的第三厚度t3可以等於第一導電層142與第二導電層144其中一者的厚度。具體而言,第二導線150可以與第一導電層142或第二導電層144為相同膜層。由於第一導體層142與第二導體層144可以經由不同的光罩圖案化而成,其可以具有不同的布線路徑而實現本發明之精神。In addition, the first conductive layer 142 and the second conductive layer 144 have substantially the same thickness, that is, the thickness of the single conductive layer, which may be composed of a stack of multiple metal layers or may be composed of only one metal layer. That is, the first thickness t1 of the first wire 140 at the display region 112 may be twice the second thickness t2 of the first wire 140 at the sealant region 114. Of course, in FIG. 4, the third thickness t3 of the second wire 150 may be equal to the thickness of one of the first conductive layer 142 and the second conductive layer 144. Specifically, the second wire 150 may be the same film layer as the first conductive layer 142 or the second conductive layer 144. Since the first conductor layer 142 and the second conductor layer 144 can be patterned via different reticle, they can have different routing paths to achieve the spirit of the present invention.

圖7繪示為本發明一實施例的基板模組示意圖。請參照圖7,基板模組200包括一陣列基板100以及一對向基板210。陣列基板100可參照圖1繪示的圖式以及相關的描述,其至少包括有基板110、框膠120以及圖1所繪示的主動元件陣列130與至少一第一導線140。對向基板210與陣列基板100相向而設,且框膠120將陣列基板100以及對向基板210組立在一起。對向基板210可以是彩色濾光基板。由前述實施例可知,框膠120所設的框膠區114具有均勻的平整性,所以框膠120的厚度可以呈現一均勻的狀態。因此,基板模組200中,對向基板210與陣列基板100實質上彼此平行。也就是說,基板模組200不容易發生翹翹板現象。FIG. 7 is a schematic diagram of a substrate module according to an embodiment of the invention. Referring to FIG. 7 , the substrate module 200 includes an array substrate 100 and a pair of substrates 210 . The array substrate 100 can be referenced to FIG. 1 and a related description, which includes at least a substrate 110, a sealant 120, and the active device array 130 and the at least one first wire 140 illustrated in FIG. 1 . The counter substrate 210 is disposed opposite to the array substrate 100, and the sealant 120 assembles the array substrate 100 and the counter substrate 210 together. The opposite substrate 210 may be a color filter substrate. It can be seen from the foregoing embodiment that the sealant region 114 provided by the sealant 120 has uniform flatness, so that the thickness of the sealant 120 can assume a uniform state. Therefore, in the substrate module 200, the opposite substrate 210 and the array substrate 100 are substantially parallel to each other. That is to say, the substrate module 200 is less prone to warp phenomenon.

圖8繪示為本發明一實施例的顯示面板示意圖。請參照圖8,顯示面板300包括了前述實施例的基板模組200以及顯示介質310,其中顯示介質310配置於陣列基板100、對向基板210以及框膠120之間。顯示介質310可以是液晶層、電泳顯示介質、電濕潤顯示介質或有機電激發光顯示介質等。由於基板模組200的對向基板210與陣列基板100可以維持彼此平行的配置關係,對向基板210與陣列基板100之間的間隙也可以維持在一定值。因此,顯示介質310可以具有均勻的厚度,而有助於提供理想的顯示效果。FIG. 8 is a schematic diagram of a display panel according to an embodiment of the invention. Referring to FIG. 8 , the display panel 300 includes the substrate module 200 and the display medium 310 of the foregoing embodiment. The display medium 310 is disposed between the array substrate 100 , the opposite substrate 210 , and the sealant 120 . The display medium 310 may be a liquid crystal layer, an electrophoretic display medium, an electrowetting display medium, an organic electroluminescent display medium, or the like. Since the opposing substrate 210 of the substrate module 200 and the array substrate 100 can maintain an arrangement relationship parallel to each other, the gap between the opposing substrate 210 and the array substrate 100 can be maintained at a constant value. Therefore, the display medium 310 can have a uniform thickness to help provide a desired display effect.

綜上所述,本發明利用分線的方式使得同一導線在不同的區域中可以具有不同的厚度,且阻抗仍可維持一致。因此,導線在陣列基板上不一定會造成顯著的高度起伏。當陣列基板上需配置框膠時,框膠可以配置在實質上平整的表面上,而不容易發生厚度不均勻的現象。陣列基板與對向基板組立在一起時,也不容易有翹翹板現象發生。因此,基板模組與顯示面板都可以具有良好的組裝良率,而所有的導線也都可以具有理想的阻抗。In summary, the present invention utilizes a splitting manner such that the same wire can have different thicknesses in different regions, and the impedance can be maintained consistent. Therefore, the wires do not necessarily cause significant height fluctuations on the array substrate. When the sealant is to be disposed on the array substrate, the sealant can be disposed on the substantially flat surface without uneven thickness. When the array substrate and the opposite substrate are grouped together, it is not easy to have a seesaw phenomenon. Therefore, both the substrate module and the display panel can have good assembly yield, and all the wires can have ideal impedance.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100...陣列基板100. . . Array substrate

110...基板110. . . Substrate

112...顯示區112. . . Display area

114...框膠區114. . . Frame glue zone

116...外側區116. . . Outer zone

120...框膠120. . . Frame glue

130...主動元件陣列130. . . Active component array

140...第一導線140. . . First wire

142...第一導電層142. . . First conductive layer

142A、144A...第一部份142A, 144A. . . first part

142B、144B...第二部份142B, 144B. . . Second part

142C、144C...第三部份142C, 144C. . . Part III

144...第二導電層144. . . Second conductive layer

150...第二導線150. . . Second wire

200...基板模組200. . . Substrate module

210...對向基板210. . . Counter substrate

300...顯示面板300. . . Display panel

310...顯示介質310. . . Display medium

I-I’、I-I”、II-II’...剖線I-I', I-I", II-II'...

t1...第一厚度T1. . . First thickness

t2...第二厚度T2. . . Second thickness

t3...第三厚度T3. . . Third thickness

圖1繪示為本發明一實施例的陣列基板示意圖。FIG. 1 is a schematic diagram of an array substrate according to an embodiment of the invention.

圖2為沿圖1之剖線I-I’所繪示的剖面圖。Figure 2 is a cross-sectional view taken along line I-I' of Figure 1.

圖3為沿圖1之剖線I-I”所繪示的剖面圖。Figure 3 is a cross-sectional view taken along line I-I" of Figure 1.

圖4為沿圖1之剖線II-II’所繪示的剖面示意圖。Fig. 4 is a schematic cross-sectional view taken along line II-II' of Fig. 1.

圖5以及圖6繪示為圖1之剖線I-I’與剖線I-I”的一種實施方式。5 and 6 illustrate an embodiment of a section line I-I' and a section line I-I" of Fig. 1.

圖7繪示為本發明一實施例的基板模組示意圖。FIG. 7 is a schematic diagram of a substrate module according to an embodiment of the invention.

圖8繪示為本發明一實施例的顯示面板示意圖。FIG. 8 is a schematic diagram of a display panel according to an embodiment of the invention.

100...陣列基板100. . . Array substrate

110...基板110. . . Substrate

112...顯示區112. . . Display area

114...框膠區114. . . Frame glue zone

116...外側區116. . . Outer zone

120...框膠120. . . Frame glue

130...主動元件陣列130. . . Active component array

140...第一導線140. . . First wire

150...第二導線150. . . Second wire

I-I’、I-I”、II-II’...剖線I-I', I-I", II-II'...

Claims (10)

一種陣列基板,包括:一基板,具有一顯示區以及圍繞該顯示區的一框膠區;一框膠,設置於該框膠區中;一主動元件陣列,配置於該顯示區中;以及至少一第一導線,配置於該基板上,由該顯示區延伸至該框膠區中,其中該第一導線在該顯示區中具有一第一厚度,而在該框膠區中且與該框膠重疊之部分的厚度為一第二厚度,且該第一厚度大於該第二厚度。 An array substrate comprising: a substrate having a display area and a sealant area surrounding the display area; a frame glue disposed in the sealant area; an active element array disposed in the display area; and at least a first wire disposed on the substrate, extending from the display area to the sealant region, wherein the first wire has a first thickness in the display area, and the frame is in the sealant area and the frame The thickness of the portion where the glue overlaps is a second thickness, and the first thickness is greater than the second thickness. 如申請專利範圍第1項所述之陣列基板,其中該第一導線至少由一第一導電層以及一第二導電層所構成,且該第一導電層與該第二導電層在該顯示區中重疊地配置於該基板上,而在該框膠區中並列地配置於該基板上。 The array substrate of claim 1, wherein the first conductive wire is composed of at least a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer are in the display region. The two are arranged on the substrate in an overlapping manner, and are arranged side by side on the substrate in the sealant region. 如申請專利範圍第2項所述之陣列基板,其中該第一導電層包括依序連接的一第一部份、一第二部份以及一第三部份,該第一部分位於該顯示區中並與該第二導電層疊置在一起,該第三部份與該框膠區重疊並與該第二導電層並列,而該第二部份連接於該第一部分與該第三部份之間。 The array substrate of claim 2, wherein the first conductive layer comprises a first portion, a second portion and a third portion sequentially connected, wherein the first portion is located in the display area And being disposed together with the second conductive layer, the third portion is overlapped with the sealant region and juxtaposed with the second conductive layer, and the second portion is connected between the first portion and the third portion . 如申請專利範圍第2項所述之陣列基板,其中該第一導電層與該第二導電層實質上具有相同的厚度。 The array substrate of claim 2, wherein the first conductive layer and the second conductive layer have substantially the same thickness. 如申請專利範圍第2項所述之陣列基板,其中在該顯示區中,該第二導電層疊置於該第一導電層上。 The array substrate of claim 2, wherein the second conductive stack is disposed on the first conductive layer in the display region. 如申請專利範圍第2項所述之陣列基板,其中在該顯示區中,該第一導電層疊置於該第二導電層上。 The array substrate of claim 2, wherein the first conductive stack is disposed on the second conductive layer in the display region. 如申請專利範圍第1項所述之陣列基板,其中該第一導線更延伸至該基板的一外側區中,該框膠區位在該外側區以及該顯示區之間,且該第一導線在該外側區具有該第一厚度,其中該第一導線由一第一導電層以及一第二導電層所構成,且該第一導電層與該第二導電層在該顯示區以及該外側區中重疊地配置於該基板上,而在該框膠區中並列地配置於該基板上。 The array substrate of claim 1, wherein the first wire extends into an outer region of the substrate, the glue region is located between the outer region and the display region, and the first wire is The outer region has the first thickness, wherein the first conductive line is composed of a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer are in the display area and the outer area They are disposed on the substrate in an overlapping manner, and are arranged side by side on the substrate in the sealant region. 如申請專利範圍第1項所述之陣列基板,更包括多條第二導線,配置於該基板上,由該顯示區延伸至該框膠區中,其中各該第二導線的一第三厚度於質上等於該第二厚度,其中該些第二導線各自由單一導電層所構成。 The array substrate of claim 1, further comprising a plurality of second wires disposed on the substrate, extending from the display region into the sealant region, wherein a third thickness of each of the second wires The second thickness is equal to the second thickness, wherein the second wires are each composed of a single conductive layer. 如申請專利範圍第1項所述之陣列基板,其中該第一導線電性連接於該主動元件陣列,其中該第一導線係不傳遞訊號、傳遞一掃描訊號、傳遞一資料訊號或一共通訊號。 The array substrate of claim 1, wherein the first wire is electrically connected to the active device array, wherein the first wire does not transmit a signal, transmits a scan signal, transmits a data signal or a total communication number. . 一種基板模組,包括一陣列基板,包括:一基板,具有一顯示區以及圍繞該顯示區的一框膠區;一框膠,設置於該框膠區中;一主動元件陣列,配置於該顯示區中;至少一第一導線,由該顯示區延伸至該框膠區 中,其中該第一導線在該顯示區中具有一第一厚度,而在該框膠區中且與該框膠重疊之部分的厚度為一第二厚度,且該第一厚度大於該第二厚度;以及一對向基板,與該陣列基板相向而設,且該框膠將該陣列基板以及該對向基板組立在一起。A substrate module includes an array substrate, comprising: a substrate having a display area and a sealant area surrounding the display area; a frame glue disposed in the sealant region; an active component array disposed on the substrate In the display area; at least one first wire extending from the display area to the sealant area The first wire has a first thickness in the display area, and the thickness of the portion in the glue block and overlapping the frame glue is a second thickness, and the first thickness is greater than the second thickness a thickness; and a pair of substrates disposed opposite the array substrate, and the frame glue grouping the array substrate and the opposite substrate together.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS641216Y2 (en) * 1981-05-22 1989-01-12
US5748179A (en) * 1995-05-15 1998-05-05 Hitachi, Ltd. LCD device having driving circuits with multilayer external terminals
US20040080688A1 (en) * 2002-09-12 2004-04-29 Seiko Epson Corporation Manufacturing method of wiring structure, manufacturing method of electro-optic device, electro-optic device, and electronic apparatus
TW200807079A (en) * 2006-06-15 2008-02-01 Epson Imaging Devices Corp Liquid crystal display panel
CN101216642A (en) * 2008-01-08 2008-07-09 京东方科技集团股份有限公司 Flat-panel display lead wire structure

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000193959A (en) * 1998-12-24 2000-07-14 Hiroshima Opt Kk Liquid crystal display element
JP4399202B2 (en) * 2003-08-20 2010-01-13 東北パイオニア株式会社 Manufacturing method of flat panel display device
CN101493601B (en) * 2009-02-27 2011-06-08 福建华映显示科技有限公司 Liquid crystal display panel and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS641216Y2 (en) * 1981-05-22 1989-01-12
US5748179A (en) * 1995-05-15 1998-05-05 Hitachi, Ltd. LCD device having driving circuits with multilayer external terminals
US20040080688A1 (en) * 2002-09-12 2004-04-29 Seiko Epson Corporation Manufacturing method of wiring structure, manufacturing method of electro-optic device, electro-optic device, and electronic apparatus
TW200807079A (en) * 2006-06-15 2008-02-01 Epson Imaging Devices Corp Liquid crystal display panel
CN101216642A (en) * 2008-01-08 2008-07-09 京东方科技集团股份有限公司 Flat-panel display lead wire structure

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