TWI414076B - Manufacturing method of light-emitting element and light-emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting element which has a structure wherein a light emitting layer part and a Si substrate are laminated with a metal layer between them, and is hard to decrease lamination strength and reflection factor. <P>SOLUTION: A main metal layer 10c forming a reflecting surface is formed on a second principal surface of a compound semiconductor layer 50, and further a first brazing material layer 10s1 comprising an AuSn brazing material whose melting point is 364&deg;C or below is so arranged as to coat the main metal layer 10c. A second brazing material layer 10s2 comprising AuSn brazing material whose melting point is 364&deg;C or below is arranged on a first principal surface of a Si substrate 7. Then, the first brazing material layer 10s1 and the second brazing material layer 10s2 are piled and pressurized, and at the same time, heat treatment for lamination is performed for them at the temperature which is equal to or higher than the melting point of the AuSn brazing material and lower than 364&deg;C, to bind and laminate the first brazing material layer 10s1 and the second brazing material layer 10s2. <P>COPYRIGHT: (C)2007,JPO&amp;INPIT

Description

Light-emitting element manufacturing method and light-emitting element

The present invention relates to a method of manufacturing a light-emitting element and a light-emitting element.

(Patent Document 1) Japanese Laid-Open Patent Publication No. Hei 7-66455 (Patent Document 2) Japanese Laid-Open Patent Publication No. 2001-339100

As a result of years of progress in the materials and component construction of light-emitting elements such as light-emitting diodes or semiconductor lasers, the photoelectric conversion efficiency inside the components is gradually approaching the theoretical limit. Accordingly, when it is desired to obtain an element of higher brightness, the light extraction efficiency of the element becomes extremely important. For example, a light-emitting element in which a light-emitting layer portion is formed by AlGaInP mixed crystal is a double hetero structure which is sandwiched between an n-type AlGaInP cladding layer having a large band gap and a p-type AlGaInP cladding layer. The AlGaInP (or GaInP) active layer is in the shape of a sandwich, whereby a high-luminance component can be realized. Such an AlGaInP double heterostructure is formed by lattice matching with GaAs using an AlGaInP mixed crystal, and is formed by epitaxial growth of each layer composed of an AlGaInP mixed crystal on a GaAs single crystal substrate. When this is used as a light-emitting element, in general, a GaAs single crystal substrate is often directly used as a substrate. However, since the band gap of the AlGaInP mixed crystal constituting the light-emitting layer portion is larger than that of GaAs, it is difficult, that is, the emitted light is absorbed by the GaAs substrate, and it is difficult to obtain sufficient light extraction efficiency. In order to solve this problem, a method of inserting a reflective layer composed of a semiconductor multilayer film between a substrate and a light-emitting element has been proposed (for example, Patent Document 1). However, since the difference in refractive index of the semiconductor layer of the laminated layer is utilized, only Reflecting the light incident at a specific range angle does not expect to greatly improve the light extraction efficiency in principle.

Therefore, in various publications including Patent Document 2, it is disclosed that the GaAs substrate for growth is peeled off, and the Au layer for transmitting the element substrate for reinforcement (for example, a substrate having conductivity), for example, is disclosed. A technique for attaching to a peeling surface. The advantage of this Au layer is that the reflectance is high and the incident angle dependence of the reflectance is small.

However, in the above method, when the Au layer forming the reflective layer is bonded to the light-emitting layer portion, there is a problem that defects such as peeling or a decrease in reflectance are liable to occur. An object of the present invention is to provide a light-emitting device having a structure in which a light-emitting device is obtained by bonding a light-emitting layer portion to an element substrate through a metal layer, and which is less likely to cause bonding strength or reflection. The structure of the rate reduction and the like.

In order to solve the above problems, the light-emitting element manufacturing method of the present invention has a first main surface of a compound semiconductor layer having a light-emitting layer portion as a light extraction surface, and a metal layer is bonded to a second main surface side of the compound semiconductor layer to bond the element. a substrate having a reflective surface formed on a bonding surface of the metal layer and the compound semiconductor, wherein a main metal layer forming the reflective surface is formed on the second main surface of the compound semiconductor layer, and AuSn is disposed to cover the main metal layer a first welding material layer formed of a welding material; on the other hand, a second welding material layer composed of AuSn welding material is disposed on the first main surface of the element substrate; and the first welding material layer and the second welding material layer are overlapped with each other In this state, while performing pressurization, bonding heat treatment is performed at a temperature higher than the melting point of the AuSn-based solder material and lower than the melting point of the main metal layer, thereby making the first solder material layer and the second solder The layers are bonded together.

Further, in the light-emitting element of the present invention, the first main surface of the compound semiconductor layer having the light-emitting layer portion is used as a light extraction surface, and the element substrate is bonded to the second main surface side of the compound semiconductor layer to bond the element substrate. Forming a reflecting surface with the bonding surface of the compound semiconductor; wherein the main metal layer forming the reflecting surface is formed on the second main surface of the compound semiconductor layer, and the AuSn-based solder material is disposed so as to cover the main metal layer a first solder material layer is formed; on the other hand, a second solder material layer composed of an AuSn-based solder material is disposed on the first main surface of the element substrate; and the first solder material layer and the second solder material layer are in a molten form Fit together to form.

Further, in the present invention, the AuSn-based consumable material has one of Au or Sn as a main component (50% by mass or more) and the other component as an auxiliary component having the highest mass content.

When the Si substrate and the compound semiconductor layer are bonded to each other through the metal layer, it is effective to perform the lamination heat treatment while superimposing the layered body of the element substrate and the compound semiconductor layer by pressurizing the metal layer in order to obtain a uniform bonding state. . However, when the pressing force is too high, cracks or cracks are likely to occur in the thin compound semiconductor layer, resulting in a problem that the yield of the product is liable to be lowered. However, as described above, the first solder material layer composed of the AuSn-based solder material is overlapped with the second solder material layer, and in this state, the bonding heat treatment temperature is set to a temperature higher than the melting point of the AuSn-based solder material. The bonding can achieve a uniform bonding state at a lower temperature even if a certain high pressure is not imparted, and contributes to an improvement in product yield.

The element substrate which can be used in the present invention is not particularly limited. However, in the present invention, a conductive substrate such as a Si substrate which is particularly inexpensive and which is easy to ensure the flatness of the bonding surface can be suitably used. Further, another semiconductor substrate such as a GaAS substrate, a GaP substrate, or a SiC substrate can be used instead of the Si substrate. Further, when it is not necessary to use the element substrate as the conduction path of the light-emitting element, an insulating substrate such as a glass substrate or a quartz substrate can be used.

When a Si substrate is used as the element substrate, the melting point of the AuSn solder material constituting the first solder material layer and the second solder material layer is preferably less than 364 ° C. At this time, setting the bonding heat treatment temperature to a temperature lower than 364 ° C can suppress the eutectic reaction between the Au component of the AuSn-based solder material and the Si component of the Si substrate, and can prevent the Si from the Si substrate during the bonding heat treatment. The side emerges from the main metal layer and reduces the reflectivity.

In addition, one of the first welding material layer and the second welding material layer may be a low-temperature AuSn-based welding material having a melting point of less than 364 ° C, and the other is a high-temperature AuSn-based welding material having a melting point of 364 ° C or higher, and the The heat treatment temperature is set so as to exceed the melting point of the low-temperature AuSn-based consumable material and is less than the melting point of the high-temperature AuSn-based consumable material. In this manner, the melting of the high-temperature AuSn-based solder material side can be suppressed, and the bonding can be smoothly performed by melting the low-temperature AuSn-based solder material. In particular, when the main metal layer is an Au-based layer, the first solder material layer is used as a high-temperature AuSn-based solder material having a melting point of 364 ° C or higher, whereby the first solder material layer contacting the main metal layer can be suppressed during bonding. The melting, and can inhibit the erosion of the welding material of the main metal layer.

When the melting point is set to less than 364 ° C, the AuSn-based consumable material can be used, for example, containing Au as a main component (50% by mass or more) and Sn exceeding 16% by mass and less than 27% by mass. When the content of Sn is 16% by mass or less by mass or 27% by mass or more, the melting point of any of the AuSn-based consumables is 334 ° C or higher at the Au-Si eutectic temperature, and the heat treatment temperature cannot be obtained. The premise of melting of the AuSn-based consumables is set to be less than 364 ° C. In addition, the AuSn-based consumables may contain Sn as a main component (50% by mass or more). In addition to Au and Sn, in order to further lower the melting point of the AuSn-based consumable, it may contain sub-components such as Pb, Ga, and Bi. Further, as described above, when one of the first welding material layer and the second welding material layer is a high-temperature AuSn-based welding material having a melting point of 364 ° C or higher, for example, Sn may be adjusted to 10% by mass or more and 16 or more. The composition range of the mass% or less, or 27 mass% or more and 35 mass% or less (the remainder is Au).

When the AuSn-based consumable is used as the Au-Sn binary alloy by the above composition, the lamination heat treatment is preferably performed at 280 ° C or higher and 360 ° C or lower (above the melting point of the AuSn-based consumable). When the heat treatment temperature of the bonding is less than 280 ° C, the AuSn-based consumable of the above composition cannot be melted. Moreover, by setting the bonding heat treatment temperature to 360 ° C or lower, it is possible to more effectively suppress the diffusion of Si from the Si substrate into the AuSn-based solder material.

When the main metal layer contains 95% by mass or more of Au, Ag, and Al, and the Si diffusion barrier effect of the AuSn-based consumable material is added, a reflecting surface having a very good reflectance can be obtained, which contributes to The light extraction efficiency of the produced light-emitting element is improved.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

Fig. 1 is a conceptual diagram showing a light-emitting element 100 according to an embodiment of the present invention. The light-emitting element 100 has a structure in which the light-emitting layer portion 24 is bonded to the transparent metal layer 10 on the first main surface of the Si substrate 7 (which is composed of an n-type Si single crystal) of the element substrate. The light-emitting layer portion 24 has a first conductive type cladding layer (in the present embodiment, p-type (Al _z Ga _{1 - z} ) _y In _{1 - y} P (where x < z ≦ 1) a cladding layer 6) and a second conductivity type cladding layer different from the first conductivity type cladding layer (in the present embodiment, is n-type (Al _z Ga _{1 - z} ) _y In _{1 - y} P (where , x < z ≦ 1) constitutes an n-type cladding layer 4) sandwiching the active layer 5 (from undoped (Al _x Ga _{1 - x} ) _y In _{1 - y} P (where 0 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.55) The structure of the mixed crystal layer is adjusted, and the composition of the visible active layer 5 is adjusted such that the emission wavelength is in the green to red region (the emission wavelength (peak emission wavelength) is 550 nm or more and 670 nm or less). In the light-emitting element 100, a p-type AlGaInP cladding layer 6 is disposed on the metal electrode 9 side, and an n-type AlGaInP cladding layer 4 is disposed on the metal layer 10 side. In addition, the term "non-doped" as used herein means "the dopant is not actively added", and does not exclude the inclusion of dopant components that are inevitably mixed in a general process (for example, 10 ^{1 3} to 10 ^{1 6).} The degree of /cm ³ is the upper limit).

Further, a current diffusion layer 20 made of AlGaAs is formed on the main surface opposite to the Si substrate 7 facing the light-emitting layer portion 24, and is formed substantially at the center of the main surface so as to cover a part of the main surface. A light-emitting driving voltage is applied to a metal electrode (for example, an Au electrode) 9 of the light-emitting layer portion 24. In a region around the metal electrode 9 on the main surface of the current diffusion layer 20, a light extraction region (which is emitted by the light-emitting layer portion 24) is formed. The light emitting layer portion 24 and the current diffusion layer 20 are formed as a compound semiconductor layer 50.

Further, a metal electrode (back surface electrode: for example, an Au electrode) 15 is formed on the back surface of the Si single crystal substrate 7 so as to cover the entire surface thereof. When the metal electrode 15 is an Au electrode, an AuSb bonding alloying layer 16 (which alloys the AuSb alloy and Si) is interposed between the metal electrode 15 and the Si single crystal substrate 7 as a substrate-side bonding alloying layer. Further, the material is not particularly limited as long as the bonding alloy layer can be alloyed with the Si substrate to reduce the contact resistance. For example, a p-type Si substrate may be used as the Si substrate. In this case, a bonding alloying layer composed of Al or an Al alloy or the like is preferably used. Further, when an n-type Si substrate is used, the material of the bonding alloying layer is not limited to the AuSb alloy.

The Si single crystal substrate 7 is obtained by cutting and polishing a Si single crystal ingot, and has a thickness of, for example, 100 μm or more and 500 μm or less. The light-emitting layer portion 24 is bonded to the metal layer 10 via the metal layer 10. In the present embodiment, the metal layer 10 is composed of an AuSn-based solder material layer 10s and a main metal layer 10c which will be described later.

An AuGeNi bonding alloying layer 32 is formed between the light emitting layer portion 24 and the metal layer 10 (for example, a Ge: 15% by mass, Ni: 10% by mass, and an AuGeNi bonding metal layer and a light emitting layer portion composed of the remaining portion of Au) The compound semiconductor alloyer on the 24 side is used as a light-emitting layer side-side bonding alloying layer, which is advantageous in reducing the series resistance of the element. The AuGeNi bonding alloying layer 32 is dispersed and formed on the main surface of the metal layer 10, and has a formation area ratio of 1% or more and 25% or less. Further, an AuSb bonding alloying layer 31 as a substrate-side bonding alloying layer is formed between the Si single crystal substrate 7 and the metal layer 10 so as to be in contact with the first main surface of the Si single crystal substrate 7 (for example, Sb: 5 mass%, and the AuSn alloy composed of the remaining portion of Au is alloyed with Si which forms the substrate 7). Here, the material of the joint alloying layer is not limited to the AuSb alloy.

Next, the AuSb bonding alloy layer 31 is entirely covered with the AuSn-based solder material layer 10s forming part of the metal layer 10. The AuSn-based solder material layer 10s contains Au as a main component and Sn in a range of more than 16% by mass and less than 27% by mass, and a thickness of 50 nm or more and 5 μm or less (In the present embodiment, an Au-Sn binary alloy (Sn content: For example, the mass is 20%) and the thickness is 600 nm). Next, the main metal layer 10c (which is a part of the metal layer 10 is formed) is placed in contact with the entire AuSn-based solder material layer 10s so as to be in contact therewith. The AuSn-based solder material layer 10s is placed in contact with the bonding metallization layer 31 on the main metal layer 10c and the Si substrate 7 side, respectively. In the AuSn-based solder material layer 10s, as will be described later, the first solder material layer 10s1 and the second solder material layer 10s2 are integrated in a molten form.

The main metal layer 10c is a metal containing Au, Ag or Al as a main component, and specifically, is made of a metal having a content ratio of 95% by mass of Au, Ag or Al. The main metal layer 10c forms a reflecting surface, and the light emitted from the light-emitting layer portion 24 is taken out by superimposing the reflected light reflected by the main metal layer 10c on the light directly irradiated onto the light extraction surface side. In the present embodiment, the main metal layer 10c is an Au-based main metal layer composed of a pure Au or an Au alloy having an Au content of 95% by mass or more. In order to sufficiently ensure the reflection effect, the thickness of the main metal layer 10c is preferably 80 nm or more, and the upper limit of the thickness of the main metal layer 10c is not particularly limited, but is appropriately determined in order to saturate the reflection effect and at the same time cost (for example, About 10μm).

Further, the bonding alloying layers 31, 16 provided between the Si single crystal substrate 7 and the metal layer 10, and between the Si single crystal substrate 7 and the electrode 15 on the back side are not limited to the AuSb alloy, as described above. It can also be made of AuSn alloy. In particular, when the bonding alloying layer 31 is formed of the AuSn alloy and the metal layer 10, the bonding alloying layer 31 itself may function to diffuse Si from the Si single crystal substrate 7 side toward the metal layer 10 side. At this time, in addition to the joint alloying layer 31 composed of the AuSn alloy, as described above, by providing the AuSn solder material layer 10s, the effect of suppressing the diffusion of Si toward the metal layer 10 side can be further improved.

Hereinafter, a method of manufacturing the light-emitting element 100 of Fig. 1 will be described.

First, as shown in the first step of FIG. 2, the p-type GaAs buffer layer 2 is epitaxially grown on the main surface of the GaAs single crystal substrate 1 (the semiconductor single crystal substrate which is the substrate for the light-emitting layer growth) in the following order (for example, 0.5). Μm), a peeling layer 3 composed of AlAs (for example, 0.5 μm), and a current diffusion layer 20 (for example, 5 μm) composed of p-type AlGaAs. Then, a p-type AlGaInP cladding layer 6, a 0.6 μm AlGaInP active layer (undoped) 5, and a 1 μm n-type AlGaInP cladding layer 4 of 1 μm were epitaxially grown in the following order as the light-emitting layer portion 24.

Next, as shown in step 2, the main metal layer 10c is formed so as to cover the light-emitting layer portion 24 in which the bonding alloy layer 32 has been formed, and is covered by vapor deposition or sputtering in such a manner as to cover the main metal layer 10c. The first solder material layer 10s1 composed of the AuSn-based solder material is formed. On the other hand, as shown in step 3, for example, an AuSb-bonding metal layer is formed on the main surfaces of both sides of the separately prepared Si single crystal substrate 7 (n-type), and the alloying heat treatment is performed at a temperature range of 100 ° C or more and 500 ° C or less. Thereby, the AuSb bonding alloying layers 31, 16 are formed. Next, a second solder material layer 10s2 composed of an AuSn-based solder material is formed on the AuSb bonding alloy layer 31 by vapor deposition or sputtering (the first solder material layer 10s1 and the second solder material layer 10s2 are all composed of melting points). An AuSn binary alloy having the same composition of 364 ° C or less (Sn content: for example, 20% by mass), and each thickness is 600 nm). Further, a back electrode layer 15 (for example, made of an Au-based metal) is formed on the AuSb bonding alloy layer 16. In the above process, each metal layer can be formed by sputtering, vacuum evaporation, or the like.

Next, as shown in step 4, the first solder material layer 10s1 and the second solder material layer 10s2 are overlapped and pressurized, and the temperature is above the melting point of the solder material and less than 364 ° C, preferably below 280 ° C and 360 ° C. For example, a lamination heat treatment is performed at 300 °C. The Si single crystal substrate 7 is passed through the first solder material layer 10s1 and the second solder material layer 10s2 to be bonded to the light emitting layer portion 24. Further, the first solder material layer 10s1 and the second solder material layer 10s2 are integrated by the above-described bonding heat treatment to form the AuSn-based solder material layer 10s.

In the case of the Au-Sn binary solder material, the Sn content is more than 16% by mass and less than 27% by mass, and the melting point is less than 364 ° C (the Au-Si binary eutectic temperature), and Si can be suppressed from the Si substrate. The first solder material layer 10s1 and the second solder material layer 10s2 are melted and bonded together by being diffused into the solder material, so that a uniform bonding state can be easily achieved at a low temperature and a low pressure. In addition, the SiSn-based solder material layer 10s blocks the Si component from diffusing from the Si single crystal substrate 7 to the main metal layer 10c, thereby effectively preventing the Si component from oozing out toward the main metal layer 10c side. As a result, it is possible to prevent the reflection surface of the finally obtained main metal layer 10c from being contaminated by the Si component.

On the other hand, when the welding material is not the AuSn-based welding material, Si is diffused from the Si single crystal substrate 7 through the AuSb-bonding alloyed metal layer 31 by thermal processing when the second welding material layer 10s2 is formed by vapor deposition or the like. There is a case where the Si appears on the outermost surface of the second solder material layer 10s2. If the emerging Si is oxidized, the adhesion of the first solder material layer 10s1 to the second solder material layer 10s2 is significantly hindered. However, as described above, by forming the solder material layer as the AuSn-based solder material layer, even when the second solder material layer 10s2 is formed, the germination or even oxidation of Si due to the hot working can be effectively prevented and improved. The bonding strength between the Si single crystal substrate 7 and the light emitting layer portion (compound semiconductor layer) 24 bonded by the first solder material layer 10s1 and the second solder material layer 10s2.

Further, in the above-described process, since the first solder material layer 10s1 and the second solder material layer 10s2 are melted and bonded, the pressing force of the bonding may be 5 kPa or more and 1000 kPa or less. The pressing force of the bonding can be reduced in this manner, whereby the occurrence of cracks or cracks in the light-emitting layer portion 24 during the bonding process can be effectively suppressed, and in particular, the arrangement between the main metal layer 10c and the light-emitting layer portion 24 can be effectively suppressed. A problem of cracking occurs around the scatter-like bonding metal layer 32, and good luminescent characteristics can be maintained for a long period of time.

Next, proceeding to step 5, the substrate bonding body is immersed in an etching solution composed of, for example, a 10% aqueous solution of hydrofluoric acid, and the AlAs releasing layer 3 formed between the buffer layer 2 and the light-emitting layer portion 24 is selectively etched to GaAs. The single crystal substrate 1 (which is opaque to light from the light-emitting layer portion 24) is peeled off and removed from the laminated body of the light-emitting layer portion 24 and the Si single crystal substrate 7 bonded to the light-emitting layer portion 24. In addition, the following steps may be employed, in which an etch stop layer composed of AlInP is formed in advance to replace the AlAs release layer 3, and a first etchant (for example, an ammonia/hydrogen peroxide mixture) having selective etching properties for GaAs is used. Simultaneously etching and removing the GaAs buffer layer 2 and the GaAs single crystal substrate 1, and then etching and removing the etch stop layer using a second etching liquid (for example, hydrochloric acid: hydrofluoric acid may be added as an Al oxide removing layer) having selective etching property for AlInP .

Next, as shown in step 6, the wire bonding electrode 9 (bonding pad: first drawing) is formed so as to cover a part of the first main surface of the current diffusion layer 20 (the GaAs single crystal substrate 1 is peeled off and exposed). Hereinafter, a semiconductor wafer is formed by dicing by a usual method, and the semiconductor wafer is fixed to a support, wire bonding or the like is performed, and then resin sealing is performed, whereby a final light-emitting element can be obtained.

Further, one of the first solder material layer 10s1 and the second solder material layer 10s2 may be a low-temperature AuSn-based solder material having a melting point of less than 364 ° C, and the other may be a high-temperature AuSn-based solder material having a melting point of 364 ° C or higher. The bonding heat treatment temperature is set so as to exceed the melting point of the low-temperature AuSn-based consumable material and the melting point of the high-temperature AuSn-based consumable material. In the AuSn-based welding material 10s of the obtained light-emitting element, the first welding material layer 10s1 and the second welding material layer 10s have different welding material layers, and one of them is melted to be bonded, and there is no change.

In particular, the first solder material layer 10s1 is a high-temperature AuSn-based solder material having a melting point of 364 ° C or higher, whereby the first solder material layer 10s1 contacting the main metal layer 10c side during bonding can be suppressed (by high-temperature AuSn-based soldering) The melting of the material is suppressed, and the welding material of the main metal layer 10c is suppressed from being corroded. The high-temperature AuSn-based consumable material may be composed of an Au-Sn binary-based consumable material having a Sn content of 10% by mass or more and 16% by mass or less, or 27% by mass or more and 35% by mass or less. In particular, when the content of Sn 27% by mass or more and 35% by mass or less (for example, 30% by mass) is used, the amount of Au in the consumable material can be reduced, and the cost can be reduced.

Further, the element substrate may be replaced with another semiconductor substrate such as a GaAs substrate, a GaP substrate or a SiC substrate instead of the Si substrate 7. Further, when the element substrate is not required to be used as the light-emitting element conduction path, an insulating substrate such as a glass substrate or a quartz substrate can be used.

1. . . GaAs single crystal substrate (light-emitting layer growth substrate)

4. . . N-type cladding

5. . . Active layer

6. . . P-cladding

7. . . Si single crystal substrate (element substrate)

9. . . Metal electrode

10. . . Metal layer

10c. . . Main metal layer

10s. . . AuSn welding consumable layer

10s1. . . First solder layer

10s2. . . Second solder layer

twenty four. . . Luminous layer

100. . . Light-emitting element

Fig. 1 is a schematic view showing a first embodiment of a light-emitting device of the present invention in a laminated structure.

Fig. 2 is an explanatory view showing a process example of one of the light-emitting elements of Fig. 1.

1. . . GaAs single crystal substrate (light-emitting layer growth substrate)

4. . . N-type cladding

5. . . Active layer

6. . . P-cladding

7. . . Si single crystal substrate (element substrate)

9. . . Metal electrode

10. . . Metal layer

10c. . . Main metal layer

10s. . . AuSn welding consumable layer

10s1. . . First solder layer

10s2. . . Second solder layer

twenty four. . . Luminous layer

100. . . Light-emitting element

Claims (7)

A method for producing a light-emitting device, wherein a first main surface of a compound semiconductor layer having a light-emitting layer portion is used as a light extraction surface, and a device layer is bonded to a second main surface side of the compound semiconductor layer through a metal layer, the metal layer Forming a reflecting surface with the bonding surface of the compound semiconductor layer, wherein a main metal layer forming the reflecting surface is formed on the second main surface of the compound semiconductor layer, and AuSn-based soldering is disposed to cover the main metal layer a first solder material layer formed of the material; on the other hand, a second solder material layer formed of AuSn solder material is disposed on the first main surface of the element substrate; and the first solder material layer and the second solder material layer are mutually When the pressure is applied in this state, the bonding heat treatment is performed at a temperature higher than the melting point of the AuSn-based solder material and lower than the melting point of the main metal layer, thereby forming the first solder material layer and The second solder material layer is bonded and bonded, and the component substrate is a Si substrate, and between the Si substrate and the second solder material layer, and the first main surface of the Si substrate and the second solder material layer The second major surface contact A bonding alloying layer is formed. The method for producing a light-emitting device according to claim 1, wherein the AuSn-based solder material constituting the first solder material layer and the second solder material layer has a melting point of less than 364 °C. The method for producing a light-emitting device according to the first or second aspect of the invention, wherein the AuSn-based consumable material uses Au as a main component and contains Sn is more than 16% by mass and less than 27% by mass. The method for producing a light-emitting device according to the third aspect of the invention, wherein the AuSn-based solder material is made of an Au-Sn binary alloy, and the bonding heat treatment is performed at 280 ° C or higher and 360 ° C or lower. The method for producing a light-emitting device according to claim 1 or 2, wherein the main metal layer is one containing 95% by mass or more of Au, Ag, and Al. A light-emitting element is characterized in that a first main surface of a compound semiconductor layer having a light-emitting layer portion is used as a light extraction surface, and a metal substrate is bonded to a second main surface side of the compound semiconductor layer to bond an element substrate, the metal layer and the compound The bonding surface of the semiconductor forms a reflecting surface, and the main metal layer forming the reflecting surface is formed on the second main surface of the compound semiconductor layer, and the AuSn-based solder material is disposed to cover the main metal layer. a first solder material layer; on the other hand, a second solder material layer composed of an AuSn-based solder material is disposed on the first main surface of the element substrate; the first solder material layer and the second solder material layer are in a molten form Formed in combination, the element substrate is a Si substrate, and the first main surface of the Si substrate and the second main surface of the second solder layer are in contact with the Si substrate and the second solder layer The manner of forming is a bonded alloying layer. The illuminating element of claim 6, wherein the AuSn-based consumable is made of Au as a main component and contains more than 16% by mass of Sn. quality%.