TWI406335B - A plasma etch method and a computer readable memory medium - Google Patents

Abstract

A plasma etching method and a computer readable storing medium are provided to control the distribution of CD(Critical Dimension) of an etch object layer by controlling the etching of an ARC(Anti-Reflective Coating) using a DC voltage applied to one of first and second electrodes. An etch object body(W) is loaded in a process chamber(10). The process chamber includes first and second electrodes opposite to each other in an inner space. An etch object layer, an ARC and a photoresist pattern are sequentially formed on the etch object body. A process gas is introduced into the process chamber. A plasma is formed in the process chamber by applying an RF power to one of the first and the second electrodes. A DC voltage is applied to one out of the first and second electrodes. The DC voltage is in the range of -200 to -1500 V.

Description

Plasma etching method and computer readable memory medium

The present invention relates to a plasma etching method and a computer readable memory medium for plasma etching an antireflection film disposed on a substrate to be processed such as a semiconductor substrate.

In the manufacturing process of the semiconductor device, a photoresist pattern is formed on the semiconductor wafer of the substrate to be processed by a photolithography process, and is used as a mask for etching. However, when the ultrafine pattern is formed, the standing wave, the reflection notch, and the diffracted light and the reflected light from the film to be etched are caused by the optical properties of the film to be etched under the photoresist film and the variation of the thickness of the photoresist film. The change in the critical dimension of the resulting photoresist pattern is unavoidable. Therefore, in order to prevent reflection of the film to be etched, an anti-reflection film composed of a substance having good light absorption in the wavelength range of the light used for the exposure source is interposed between the film to be etched and the photoresist film.

Such an anti-reflection film can be roughly classified into an inorganic anti-reflection film and an organic anti-reflection film, and recently, an organic anti-reflection film is mainly used. Next, when the antireflection film is etched, plasma etching using the photoresist film as a mask is used (for example, see Patent Document 1).

Recently, however, in order to meet the requirements of microfabrication, the lithography mask uses an ArF photoresist which can form a pattern opening of about 0.13 μm or less, because the ArF photoresist has a low plasma resistance and spreads to a CD or the like. In order to secure a desired CD, the etching resistance of the anti-reflection film directly contacting the film to be etched becomes extremely important.

However, in essence, the anti-reflection film is difficult to obtain etching uniformity. Further, the anti-reflection film has various materials which, although having different etching characteristics, have no parameters which can control the etching characteristics in a wide range. Therefore, the in-plane distribution of the etching cannot be appropriately controlled, and when the etching of the etching target film is followed, the CD distribution or the like is liable to cause an error, which is difficult to solve.

On the other hand, in the photolithography technique as described above, the resolution from the relationship between the wavelength of light used for exposure and the like has a certain limit, and in general, it is difficult to form the resolution of the photoresist film. An opening or the like of a size below the limit. However, recently, the semiconductor device has been progressing toward miniaturization, and thus a CD having a size smaller than the limit of the ArF photoresist is required. Therefore, a method of performing CD shrinkage on the antireflection film has been proposed (for example, Patent Document 2). This technique is used to etch the anti-reflection film to create a depo on the etched sidewall, thus achieving a CD that is smaller than the original CD. In this method, the etching power of the parallel plate type is used to increase the power of the high-frequency power applied to the upper electrode, or the etching gas is a C ₄ F ₈ gas which is easy to generate depo.

However, in the former method, the uniformity of etching is inferior, and in the latter method, it is difficult to ensure a desired etching rate, so that the yield is lowered.

[Patent Document 1] Japanese Laid-Open Patent Publication No. 2005-26348 (Patent Document 2) International Publication No. 03/007357

In view of the above facts, an object of the present invention is to provide a plasma etching method capable of controlling a plasma in a wide range when etching an antireflection film, thereby controlling the distribution of etching characteristics and further etching the etching target film thereafter. When you can control the CD distribution.

Further, it is an object of the present invention to provide a plasma etching method which, when etching an anti-reflection film, does not detract from etching uniformity and does not lower the etching rate, but achieves desired CD shrinkage.

Furthermore, it is an object of the present invention to provide a computer readable memory medium in which a program for performing such a plasma etching method is memorized.

In order to solve the above problems, a plasma etching method according to a first aspect of the present invention is a plasma etching method for performing plasma etching on an antireflection film formed on a target object, which is characterized in that: a process in which the object to be processed, in which the etching target film, the anti-reflection film, and the patterned photoresist film are formed, is disposed in a processing container in which the first electrode and the second electrode are disposed vertically upward; a process of introducing a gas into the processing vessel; a process for applying high frequency power to one of the first electrode and the second electrode to generate a plasma; and a process for applying a DC voltage to the electrode of one of the foregoing.

In the first aspect described above, the DC voltage should be in the range of -200 to -1500V.

A plasma etching method according to a second aspect of the present invention is a plasma etching method for performing plasma etching on an anti-reflection film formed on a target object, characterized in that the plasma etching method is formed on a substrate. The object to be processed of the etching target film, the anti-reflection film, and the patterned photoresist film is disposed in a processing container in which the first electrode and the second electrode are disposed vertically upward; and the processing gas is introduced into the processing container a process for applying high frequency power to one of the first electrode and the second electrode to generate a plasma; and, when the plasma is generated, applying an electrode to the electrode of the one of the foregoing When the etching target film is etched, a process of a specific DC voltage of a desired CD distribution can be obtained.

In the second aspect described above, the DC voltage should be in the range of -200 to -1500V. Further, it is also possible to perform a DC voltage value of a desired CD distribution obtained by etching a substrate to be etched on the substrate to be processed for the test object, and apply a DC voltage value to the electrode of the one of the electrodes. The way to apply the aforementioned specific DC voltage;

A plasma etching method according to a third aspect of the present invention is a plasma etching method for performing plasma etching on an anti-reflection film formed on a target object, which is characterized in that: a plasma etching method is formed on a substrate. The object to be processed in which the etching target film, the anti-reflection film, and the patterned photoresist film are disposed in a processing container in which the first electrode and the second electrode are disposed vertically upward; and the processing gas is introduced into the processing container And a process of applying the high-frequency power to one of the first electrode and the second electrode to generate a plasma, and performing the etching of the anti-reflection film by using the photoresist film as a mask; and the etching process And a process of applying a DC voltage of a specific value to one of the electrodes in such a manner that the etching pattern size of the anti-reflection film is smaller than the pattern size of the photoresist film by a specific amount.

A plasma etching method according to a fourth aspect of the present invention, characterized in that the object to be processed in which an etching target film, an anti-reflection film, and a patterned photoresist film are sequentially formed on a substrate is disposed above and below a process in the processing container in which the first electrode and the second electrode are disposed oppositely; a process for introducing the processing gas into the processing container; and applying high frequency power to one of the first electrode and the second electrode a process for generating a plasma and performing etching; in the etching, applying a specific value of a direct current voltage to one of the electrodes in such a manner that the etching pattern size of the anti-reflection film is smaller than a pattern size of the photoresist film And a process for forming an etching prevention film having an etching pattern smaller than a pattern size of the photoresist film as an etching mask, and performing etching of the etching target film at a pattern size smaller than a pattern size of the photoresist.

In the above third or fourth aspect, the DC voltage should be in the range of -200 to -1500V. Further, the DC voltage value at which the pattern size of the anti-reflection film is set to a desired size may be obtained in advance for the object to be processed for testing, and the DC voltage value at the time may be applied to one of the electrodes.

In the above-described first to fourth aspects, the first electrode may be used as an upper electrode, and the second electrode may be used to mount a lower electrode of the object to be processed, and the first electrode may be applied to the first electrode. The high frequency power for the purpose of the plasma and the DC voltage are generated. At this time, high frequency electric power for ion suction is applied to the second electrode.

The computer-readable memory medium provided by the fifth aspect of the present invention is a computer memory medium that memorizes a control program executable on a computer, and is characterized in that: when the control program is executed, the computer is first A plasma etching method to one of the 4th viewpoints controls the plasma processing apparatus.

According to the present invention, when the anti-reflection film is subjected to plasma etching, when the high-frequency electric power for plasma formation is applied to the first electrode or the second electrode to plasma-etch the anti-reflection film, DC is applied to one of the electrodes. The voltage can be controlled by plasma, and the applied DC voltage can be appropriately controlled to control the etching of the anti-reflection film. Thereby, when the anti-reflection film is used as an etching mask to etch the etching target film, the CD distribution can be controlled, and the conventional problem of the CD error of the etching target film can be reduced. Further, in this manner, the etching of the anti-reflection film can be controlled, and the in-plane error of the etching depth of the etching target film can be reduced.

Further, by applying a DC voltage to one of the electrodes to etch the anti-reflection film, the polymer attached to the DC voltage application electrode can be supplied to the object to be processed, and the etching pattern size of the anti-reflection film can be controlled by controlling the supply voltage thereof. A specific amount smaller than the pattern size of the photoresist film does not lower the etching uniformity and the etching rate, but achieves a desired CD shrinkage.

Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings.

Fig. 1 is a schematic cross-sectional view showing an example of a plasma etching apparatus used in an embodiment of the present invention.

The plasma etching apparatus has a configuration of a capacitance-bonding type parallel plate plasma etching apparatus, for example, a chamber having a substantially cylindrical shape (processing container) 10 made of aluminum whose surface is anodized. The chamber 10 is secured to ground.

At the bottom of the chamber 10, a cylindrical susceptor support 14 is disposed via an insulating plate 12 made of ceramic or the like, and a susceptor 16 made of, for example, aluminum is disposed on the susceptor support 14. The lower electrode is formed by the susceptor 16, and the semiconductor wafer W of the substrate to be processed is placed thereon.

On the upper surface of the susceptor 16, an electrostatic chuck 18 for holding the semiconductor wafer W by electrostatic adsorption is disposed. The electrostatic chuck 18 has a structure in which an electrode 20 made of a conductive film is sandwiched between a pair of insulating layers or insulating sheets, and a DC power source 22 is electrically connected to the electrode 20. Next, the semiconductor wafer W is adsorbed and held by the electrostatic chuck 18 by static electricity such as Coulomb force generated by a DC voltage from the DC power source 22.

In order to improve the etching uniformity, a conductive focus ring (correction ring) 24 composed of, for example, germanium is disposed on the upper surface of the susceptor 16 around the electrostatic chuck 18 (semiconductor wafer W). On the side of the susceptor 16 and the susceptor support table 14, a cylindrical inner wall member 26 made of, for example, quartz is disposed.

Inside the susceptor support 14 is disposed, for example, a refrigerant chamber 28 located on the circumference. The refrigerant chamber is circulated and supplied with a refrigerant of a specific temperature, such as cooling water, through a pipe 30a, 30b (not shown), which is disposed outside by a cooling unit, and the temperature of the refrigerant is used to control the semiconductor wafer W on the susceptor. Processing temperature.

Further, a heat transfer gas such as He gas from a heat transfer gas supply means (not shown) is supplied between the upper surface of the electrostatic chuck 18 and the back surface of the semiconductor wafer W via the gas supply line 32.

The upper electrode 34 is disposed in parallel with the susceptor 16 above the susceptor 16 of the lower electrode. Next, the space between the upper and lower electrodes 34, 16 is a plasma generating space. The upper electrode 34 forms a face that is in contact with the plasma generation space of the semiconductor wafer W on the susceptor 16 of the lower electrode, that is, forms an opposite surface.

The upper electrode 34 is supported by the insulating shielding member 42 on the upper portion of the chamber 10, and is composed of an electrode plate 36 having a plurality of discharge holes 37 constituting the opposite surface of the susceptor 16, and detachably supporting the electrode plate 36. The conductive material is composed of, for example, an electrode support 38 made of a water-cooled structure made of anodized aluminum. The electrode plate 36 should be a low-impedance conductor or semiconductor having a small Joule heat, and further, as shown later, it should be a ruthenium-containing substance from the viewpoint of enhancing the photoresist. From this point of view, the electrode plate 36 should be composed of tantalum or SiC. A gas diffusion chamber 40 is disposed inside the electrode support 38, and a plurality of gas passage holes 41 communicating with the gas discharge holes 37 are extended downward from the gas diffusion chamber 40.

A gas introduction port 62 for introducing a processing gas into the gas diffusion chamber 40 is formed in the electrode support 38. The gas introduction port 62 is connected to the gas supply pipe 64, and the gas supply pipe 64 is connected to the processing gas supply source 66. A mass flow controller (MFC) 68 and an on-off valve 70 (also FCN instead of MFC) are disposed in the gas supply pipe 64 from the upstream side. Next, a processing gas for etching purpose from the processing gas supply source 66, for example, a CF ₄ gas fluorocarbon gas (C _x F _y ) from the gas supply pipe 64 to the gas diffusion chamber 40, through the gas passage hole 41 The gas discharge hole 37 is discharged into the plasma generation space in a shower. That is, the upper electrode 34 has a function of supplying a shower head of a process gas.

The first high frequency power source 48 is electrically connected to the upper electrode 34 via the integrator 46 and the power supply rod 44. The first high-frequency power source 48 outputs high-frequency power of, for example, 60 MHz at a frequency of 10 MHz or more. The integrator 46 is used to integrate the load impedance into the internal (or output) impedance of the first high frequency power supply 48. When the plasma is generated in the chamber 10, the output impedance and load of the first high frequency power supply 48 are theoretically provided. Impedance becomes a consistent function. The output terminal of the integrator 46 is coupled to the upper end of the power supply rod 44.

On the other hand, in the upper electrode 34, in addition to the first high-frequency power source 48, the variable DC power source 50 is electrically connected. The variable DC power source 50 can also be a bipolar power source. Specifically, the variable DC power source 50 is coupled to the upper electrode 34 via the integrator 46 and the power supply rod 44, and can be powered by the on/off switch 52. The polarity and current of the variable DC power supply 50. The voltage and the open relationship of the on/off switch 52 are controlled by the controller 51.

As shown in FIG. 2, the integrator 46 includes a first variable capacitor 54 that is branched from the power supply line 49 of the first high-frequency power source 48, and a downstream side of the branch point of the power supply line 49. The second variable capacitor 56; and the above functions are exerted by these. Further, the entire container 46 is provided with a filter 58 capable of separating a high frequency (for example, 60 MHz) from the first high-frequency power source 48 and a high frequency (for example, 2 MHz) from a second high-frequency power source to be described later, and is effective. A DC voltage current (hereinafter, simply referred to as a DC voltage) is supplied to the upper electrode 34. That is, the direct current from the variable DC power source 50 is coupled to the power supply line 49 via the filter 58. The filter 58 is composed of a coil 59 and a capacitor 60, and the high frequency from the first high-frequency power source 48 and the high frequency from a second high-frequency power source to be described later are separated by these.

A cylindrical ground conductor 10a extending from the side wall of the chamber 10 to a position higher than the height of the upper electrode 34 is disposed. The wall portion of the cylindrical ground conductor 10a is electrically insulated from the upper power supply rod 44 by a cylindrical insulating member 44a.

The susceptor 16 of the lower electrode is electrically coupled to the second high frequency power source 90 via the integrator 88. The second high-frequency power source 90 supplies high-frequency power to the lower electrode susceptor 16, and attracts ions to the semiconductor wafer W side. The second high-frequency power source 90 outputs a frequency in the range of 300 kHz to 13.56 MHz, and outputs high-frequency power of, for example, 2 MHz. The integrator 88 is used to integrate the load impedance into the internal (or output) impedance of the second high frequency power supply 90. When the plasma is generated in the chamber 10, the internal impedance and load of the second high frequency power supply 90 are theoretically provided. Impedance becomes a consistent function.

A low-pass filter for grounding the high frequency (2 MHz) from the second high-frequency power source 90 without passing the high frequency (60 MHz) from the first high-frequency power source 48 is electrically connected to the upper electrode 34 ( LPF) 92. The low pass filter (LPF) 92 should be constituted by an LR filter or an LC filter, and it is convenient to provide a large reactance to the high frequency (60 MHz) from the first high frequency power supply 48 as long as one wire is provided. On the other hand, a high-pass filter (HPF) 94 for grounding the high frequency (60 MHz) from the first high-frequency power source 48 is electrically connected to the susceptor 16 of the lower electrode.

At the bottom of the chamber 10, an exhaust port 80 is disposed, and the exhaust port 80 is coupled to the exhaust device 84 via an exhaust pipe 82. The exhaust device 84 has a vacuum pump such as a turbo molecular pump, and can decompress the inside of the chamber 10 to a desired degree of vacuum. Further, on the side wall of the chamber 10, a transfer port 85 for the semiconductor wafer W is disposed, and the transfer port 85 can be opened and closed by the gate valve 86. Further, along the inner wall of the chamber 10, a Depo Shield 11 for preventing the adhesion of etching by-products (depo) is detachably disposed in the chamber 10. That is, the Depo Shield 11 constitutes a chamber wall. In addition, the Depo Shield 11 is also disposed on the outer edge of the inner wall member 26. An exhaust plate 83 is disposed between the Depo Shield 11 on the chamber wall side of the bottom of the chamber 10 and the Depo Shield 11 on the inner wall member 26 side. Depo Shield 11 and exhaust plate 83 should be made of aluminum covered with ceramics such as Y ₂ 0 ₃ .

A portion of the inner wall of the chamber constituting the Depo Shield 11 having substantially the same height as the wafer W is provided with a conductive member (GND block) 91 that is DC-connected to the ground, thereby preventing abnormality. The effect of discharge.

Each component of the plasma processing apparatus is connected to and controlled by a control unit (all control unit) 95. Further, the control unit 95 is connected to a keyboard for managing the plasma processing apparatus by the process manager: a keyboard for performing an input operation of the command, and the like, and a display for displaying the operation state of the plasma processing apparatus; User interface 96.

Further, the control unit 95 is connected to and stores a control program for realizing various processes by the plasma processing device under the control of the control unit 95, and performs processing for each component of the plasma processing device in accordance with the processing conditions. Program, that is, prescription; memory unit 97. The prescription may be stored in a hard disk or a semiconductor memory, or may be set to a specific position of the memory unit 97 in a state of being stored in a removable computer readable memory such as a CDROM or a DVD.

Next, if necessary, the control unit 95 can be executed by calling the arbitrary unit from the memory unit 97 by an instruction from the user interface 96, and the plasma processing apparatus can perform the desired processing under the control of the control unit 95.

Next, a plasma etching method according to a first embodiment of the present invention which is carried out by a plasma etching apparatus having such a configuration will be described.

Here, as shown in FIG. 3, the semiconductor wafer W of the object to be processed is formed by sequentially forming a resist film 102, an etching target film 103, an anti-reflection film (BARC) 104, and a pattern on the Si substrate 101. The material of the photoresist film 105.

The resist film 102 is exemplified by a SiC film. Its thickness is about 20~100nm. Further, the etching target film 103 is exemplified by an interlayer insulating film, for example, an SiO ₂ film and/or a Low-k film. The anti-reflection film 104 is mainly made of an organic system and has a thickness of about 20 to 100 nm. The photoresist film 105 is exemplified by an ArF photoresist and has a thickness of about 100 to 400 nm.

First, the gate valve 86 is placed in an open state, and the semiconductor wafer W having the above configuration is carried into the chamber 10 via the transfer port 85 and placed on the susceptor 16. Then, a processing gas for supplying the anti-reflection film 104 to the gas diffusion chamber 40 is supplied from the processing gas supply source 66 to the gas diffusion chamber 40, and is supplied to the chamber 10 through the gas passage hole 41 and the gas discharge hole 37, and is utilized. The exhaust unit 84 performs the exhaust in the chamber 10 so that the pressure therein becomes a set value in the range of, for example, 0.1 to 150 Pa. In addition, the temperature of the susceptor is about 20 °C.

Here, the processing gas for the purpose of etching the anti-reflection film 104 can be variously used, for example, a gas containing a fluorocarbon gas (C _x F _y ), a mixed gas of N ₂ gas and O ₂ gas, and the like. . Typically, for example, a CF ₄ gas single gas or an Ar gas, a He gas or the like may be added thereto, and an Ar gas or an O ₂ gas may be added to the C ₄ F ₈ gas or the C ₅ F ₈ gas. Things.

In the state where the etching gas is introduced into the chamber 10, the high-frequency power for plasma generation from the first high-frequency power source 48 is applied to the upper electrode 34 at a specific power, and the ion is applied by the second high-frequency power source 90. The inhalation is applied to the susceptor 16 of the lower electrode at a specific power with a high frequency. Next, a specific DC voltage is applied to the upper electrode 34 from the variable DC power source 50. Further, a DC voltage for the electrostatic chuck 18 is applied from the DC power source 22 to the electrode 20 of the electrostatic chuck 18, and the semiconductor wafer W is fixed to the susceptor 16.

The processing gas discharged from the gas discharge hole 37 formed in the electrode plate 36 of the upper electrode 34 is plasma-generated in a glow discharge generated between the upper electrode 34 and the lower electrode susceptor 16 by high-frequency power. The radicals or ions generated by the plasma etch the surface to be processed of the semiconductor wafer W.

Since the high frequency power (for example, 10 MHz or more) of the high frequency power is supplied to the upper electrode 34, the plasma can be made dense in a good state, and a high density plasma can be formed even under a lower pressure condition.

Further, when the plasma is formed in this manner, a DC voltage of a specific polarity and magnitude from the variable DC power source 50 is applied to the upper electrode 34. Thereby, the etching of the anti-reflection film can be controlled. The value of the applied DC voltage at this time should be controlled in such a manner that the desired CD distribution can be obtained in the surface when the etching target film 103 is etched.

More specifically, a DC voltage is applied to the upper electrode 34, and as shown in Fig. 4, the thickness of the plasma sheath formed on the upper electrode 34 side can be increased. Secondly, the plasma sheath becomes thicker, and the plasma can be relatively reduced. For example, when a DC voltage is not applied to the upper electrode 34, the Vdc of the upper electrode side is, for example, -300 V, and as shown in Fig. 5 (a), the plasma has a thin sheath thickness do. However, if a DC voltage of -900 V is applied to the upper electrode 34, the Vdc of the upper electrode side is, for example, -900 V, and the thickness of the plasma sheath is proportional to 3/4 of the absolute value of Vdc, as shown in Fig. 5 (b). As shown, a thicker plasma sheath d _{1 is formed} and the plasma is relatively reduced. The degree of downsizing at this time varies depending on the applied DC voltage. That is, controlling the applied DC voltage can control the plasma distribution, whereby the etching of the anti-reflection film 104 can be controlled. Then, the etching target film 103 is etched by using the etched anti-reflection film 104 and the photoresist film 105 as an etch mask as described above, so that the etching of the anti-reflection film 104 can be controlled by DC voltage application. The CD distribution of the etching target film 103 is controlled. In other words, when the etching target film 103 is etched, the specific DC voltage from the variable DC power source 50 is applied to the upper electrode 34 to etch the anti-reflection film 104, whereby a desired CD distribution can be obtained. Thereby, the CD error of the etching target film can be suppressed. Further, by performing the etching control in this manner, it is possible to suppress the error of the etching depth when etching the etching target film 103. At this time, the DC voltage applied to the upper electrode 34 should be in the range of -200 to -1500V.

As described above, after the etching of the anti-reflection film 104 is performed, as described above, when the photoresist film 105 and the anti-reflection film 104 are used as an etching mask to etch the etching target film 103, etching conditions, for example, processing gas The type, flow rate, pressure, temperature, and the like are not particularly limited, and can be carried out under the conditions normally used.

When the plasma etching method of the present embodiment is carried out, first, the semiconductor wafer for testing is etched under specific conditions by the plasma etching apparatus of FIG. 1, and then the semiconductor wafer is taken out from the plasma etching apparatus, and the inspection apparatus is used. The inspection is performed to obtain a DC voltage value of a desired CD distribution (in-plane uniformity of the CD) when the etching target film is etched in advance, and the DC voltage value at that time is applied to the upper electrode for etching. In this case, the etching treatment can be performed quickly under appropriate conditions. The wafer for such testing can also use the first one or more wafers of the batch number.

Next, the result of confirming the effect of the method of the first embodiment will be described. Here, an organic anti-reflection film is used for the anti-reflection film, and an ArF photoresist film is used for the photoresist film, and the film is etched by the device of FIG. 1 . The treatment conditions are: pressure: 13.3 Pa (100 mT), upper high frequency power: 500 W, lower high frequency power: 400 W, process gas and flow rate: CF ₄ = 150 mL/min (standard state converted value (sccm)), susceptor temperature: 20 ° C and the DC voltage applied to the upper electrode 34 were three types of 0 V, -500 V, and -700 V, and etching was performed for 60 seconds. The in-plane distribution of the etching rate of the anti-reflection film at this time is as shown in Fig. 6. Further, the in-plane distribution of the etching rate of the photoresist film at this time is as shown in Fig. 7. At this time, the etching selection ratio of the anti-reflection film of the photoresist film is as shown in Fig. 8.

As can be seen from the figures, the distribution of the etching characteristics of the anti-reflection film can be changed by changing the DC voltage applied to the upper electrode 34. Secondly, in this example, it can be known that the DC voltage is -500 V, which improves the etching uniformity. When the voltage is -700 V, the in-plane uniformity of the etching selectivity is the highest. In the etching of the etching target film of the substrate, since the photoresist film and the anti-reflection film which is over-etched in this manner are used as a mask, the etching property distribution of the anti-reflection film can be controlled, and the CD of the etching of the etching target film can be controlled. Distribution improves the in-plane uniformity of the CD.

Next, an experiment for confirming the above facts will be described. Here, as shown in FIG. 9, a spacer SiC202 (thickness: 35 nm), a Low-k film 203 (thickness: 320 nm), a DARC 204 (thickness: 50 nm), and an anti-reflection film (BARC) 205 are formed on the Si substrate 201. A semiconductor wafer having a thickness of 80 nm) and a patterned photoresist film (PR) 206 (thickness: 170 nm), using the device of FIG. 1, first, using a photoresist film (PR) 206 as a mask to reflect The film (BARC) 205 is etched, and the photoresist film 206 and the anti-reflection film (BARC) 205 are used as a mask to etch the DARC 204 and the Low-k film 203 of the film to be etched.

The processing conditions for the etching of the anti-reflection film (BARC) 205 are: pressure: 13.3 Pa (100 mT), upper high frequency power: 500 W, lower high frequency power: 400 W, processing gas, and flow rate: CF ₄ = 150 mL/min ( The standard state conversion value (sccm), and the DC voltage to the upper electrode were varied between 0 V and -500 V, and the processing time was 43 sec.

Further, the processing conditions of the Low-k film 203 and the DARC 204 are as follows: pressure: 3.3 Pa (25 mT), upper high frequency power: 400 W, lower high frequency power: 1000 W, processing gas, and flow rate: C ₄ F ₈ /CH ₂ F ₂ /CO/N ₂ =8/20/30/230 mL/min (standard state conversion value (sccm)), no DC voltage was applied, and the treatment time was 30 sec.

The temperature of any etching is lower electrode/upper electrode/wafer=20/60/60 °C, and the He gas introduction pressures at the center and the edge are 2000 Pa and 6000 Pa, respectively.

When observing the etching prevention film (BARC) 205, the center and the edge of the cross section and the plane when a DC voltage of -500 V is applied are not applied, and as a result, when the anti-reflection film (BARC) 205 is etched, the upper electrode is applied. Apply a voltage of -500V to confirm that the difference between the top and the top of the CD is small. Specifically, when no DC voltage is applied, the CD is 64 nm and 70 nm with respect to the center and the edge, respectively. When a DC voltage of -500 V is applied, the CDs at the center and the edge are 63 nm and 63 nm, respectively. From this, it was confirmed that the DC uniformity was obtained when a DC voltage was applied to the upper electrode. In addition, it has also been confirmed that the application of a DC voltage can also eliminate the error of the etching depth.

Next, a plasma etching method according to a second embodiment of the present invention by the above plasma etching apparatus will be described.

Here, basically, the semiconductor wafer W having the structure of Fig. 3 used in the first embodiment is used as the object to be processed.

First, in the same manner as in the first embodiment, the gate valve 86 is opened, and the semiconductor wafer W having the above-described structure is carried into the chamber 10 via the transfer port 85, and placed on the susceptor 16. Next, a processing gas for supplying the gas diffusion chamber 40 with a specific flow rate for etching the anti-reflection film 104 is supplied from the processing gas supply source 66, and is supplied to the chamber 10 through the gas passage hole 41 and the gas discharge hole 37. The exhaust gas in the chamber 10 is exhausted by the exhaust device 84 so that the pressure therein becomes a set value in the range of, for example, 0.1 to 150 Pa. In addition, the temperature of the susceptor is about 20 °C.

Here, the processing gas for the purpose of etching the anti-reflection film 104 should be the same as that of the first embodiment. However, conventionally used ones can be used.

In the state in which the etching gas is introduced into the chamber 10, the high-frequency power for plasma generation is applied to the upper electrode 34 from the first high-frequency power source 48 at a specific power, and the second high-frequency power source 90 is used for the specific power. The lower electrode susceptor 16 applies a high frequency for ion sinking. Next, a specific DC voltage is applied to the upper electrode 34 from the variable DC power source 50. Further, a DC voltage is applied to the electrode 20 of the electrostatic chuck 18 from the DC power source 22 for the electrostatic chuck 18, and the semiconductor wafer W is fixed to the susceptor 16.

The processing gas discharged from the gas discharge hole 37 formed in the electrode plate 36 of the upper electrode 34 is plasma-plasmaized by glow discharge between the upper electrode 34 and the lower electrode susceptor 16 caused by high-frequency power, and the plasma is used. The generated radicals and ions etch the processed surface of the semiconductor wafer W.

Since the upper electrode 34 is supplied with high frequency power in a high frequency range (for example, 10 MHz or more), the plasma can be made dense in a good state, and a high density plasma can be formed under a relatively low pressure condition.

Further, when the plasma is formed in this manner, a DC voltage of a specific polarity and magnitude is applied to the upper electrode 34 by the variable DC power source 50. In the present embodiment, the etching pattern size of the anti-reflection film 104 can be made smaller than the pattern size of the photoresist film by a specific amount. That is, the CD of the anti-reflection film 104 can be further shrunk as compared with the CD of the photoresist film 105.

Give a more specific explanation. The usual etching treatment, particularly when the high-frequency power of the upper electrode 34 is small, causes the polymer to easily adhere to the upper electrode 34. When the polymer is attached, a DC voltage is applied to the upper electrode 34, and the polymer is sputtered and supplied to the semiconductor wafer W of the object to be processed. That is, when the antireflection film 104 is etched, the polymer is supplied, and the polymer adheres to the side walls of the etched portion to shrink the CD. The amount of polymer supplied at this time can be controlled by controlling the DC voltage applied to the upper electrode 34. Therefore, by controlling the DC voltage, it is possible to control the amount of CD shrinkage by attaching a desired amount of the polymer to the portion to be etched. From this point of view, the DC voltage applied to the upper electrode 34 should be in the range of -200 to -1500V.

As described above, after the etching of the anti-reflection film 104 is performed, as described above, when the photoresist film 105 and the anti-reflection film 104 are used as an etching mask to perform etching of the etching target film 103, etching conditions such as processing gas The type, flow rate, pressure, temperature, and the like are not particularly limited, and the conditions generally used can be used. At the time of etching, since the CD of the etching mask prevents the CD of the film 104 from shrinking, etching can be performed with a CD smaller than the CD of the photolithography.

When the plasma etching method of the present embodiment is carried out, first, the semiconductor wafer for testing is etched under specific conditions by the plasma etching apparatus of FIG. 1, and then the semiconductor wafer is taken out from the plasma etching apparatus, and the inspection apparatus is used. The inspection is carried out, and the DC voltage value at which the desired CD shrinkage is obtained is obtained in advance, and when the DC voltage value at that time is applied to the upper electrode for etching, the etching treatment can be quickly performed under appropriate conditions. The wafer for such testing can also use the first one or more wafers of the batch number.

Next, the result of confirming the effect of the method of the second embodiment will be described. Here, as shown in FIG. 10, a spacer Si302 (thickness: 30 nm), a Low-k film 303 (thickness: 150 nm), an SiO ₂ film 304 (thickness: 150 nm), and an anti-reflection film (BARC) are formed on the Si substrate 301. A semiconductor wafer having a structure of 305 (thickness: 65 nm) and a patterned photoresist film (PR) 306 (thickness: 230 nm), using the device of Fig. 1, first, using the photoresist film (PR) 306 as a mask Etching of the anti-reflection film (BARC) 305 is performed, and second, the photoresist film (PR) 306 and the anti-reflection film (BARC) 305 are used as a mask to perform etching of the SiO ₂ film 304 and the Low-k film 303 of the target film. Etching.

The etching conditions of the anti-reflection film (BARC) 305 are as follows: pressure: 20.0 Pa (150 mT), upper high frequency power: 400 W, lower high frequency power: 400 W, process gas and flow rate: CF ₄ = 200 mL/min (standard The state conversion value sccm)) and the DC voltage to the upper electrode vary between 0V and -500V, and the processing time is 50 sec.

Further, the etching conditions of the SiO ₂ film 304 are: 6.7 Pa (50 mT), upper high frequency power: 300 W, lower high frequency power: 600 W, processing gas, and flow rate: CF ₄ /CHF ₃ /Ar=30 /15/1000 mL/min (standard state converted value (sccm)), and no DC voltage applied, the processing time was 90 sec.

Further, the processing conditions of the Low-k film 303 are as follows: pressure: 6.7 Pa (50 mT), upper high frequency power: 1000 W, lower high frequency power: 600 W, processing gas, and flow rate: CF ₄ /Ar/N ₂ = 30/1000/40 mL/min (standard state conversion value (sccm)), and a DC voltage applied at the end, and the processing time was 20 sec.

The temperature of any etching is lower electrode/upper electrode/wafer=20/60/60 °C, and the He gas introduction pressures at the center and the edge are 2000 Pa and 6000 Pa, respectively. In addition, the electrode gap was 35 mm.

When observing the anti-reflection film (BARC) 305, when the DC voltage is not applied and when the DC voltage of -500 V is applied, the center and the edge of the cross section and the plane after the etching are applied. As a result, when the anti-reflection film (BARC) 305 is etched, A voltage of -500 V was applied to the upper electrode, and the amount of photoresist in the center increased from 145 nm to 159 nm as compared with when no DC voltage was applied, and the amount of residual photoresist on the edge also increased from 113 nm to 151 nm. Next, after removing the photoresist film 306 and the anti-reflection film 305 by ashing, if the DC voltage is not applied, the top CD and the bottom CD of the center are 117 nm and 107 nm, respectively, and the top CD and the bottom CD of the edge are 115 nm and 102 nm, respectively. Here, when a voltage of -500 V is applied, the top CD and the bottom CD of the center are 97 nm and 85 nm, respectively, and the top CD and the bottom CD of the edge are 95 nm and 79 nm, respectively, and the CD obtains a shrinkage of 20 nm.

From the above, it was confirmed that a DC voltage was applied during the etching of the anti-reflection film 305, so that the CD can be largely shrunk. In addition, the application of a direct current voltage supplies a polymer to strengthen the PR, and the residual film amount of the photoresist increases while improving the vertical line.

In addition, the present invention is not limited to the above-described embodiment, and various modifications are possible. For example, the etching target film of the above embodiment is exemplified by a Low-k film, an SiO ₂ film, or the like, but is not limited thereto.

In addition, the device to which the present invention is applicable is also limited to the object of Fig. 1, and can be applied to various devices shown below, for example, it can also be applied to the first high frequency power source 48' as shown in Fig. 11. The susceptor 16 of the lower electrode is applied with a high-frequency electric power of, for example, 60 MHz for plasma generation, and a plasma etching apparatus for applying a high-frequency electric power of 2 MHz, for example, 2 MHz, is applied from the second high-frequency power source 90. . As shown in the figure, the same effect as that of the above embodiment can be obtained by connecting the variable DC power source 166 to the upper electrode 234 and applying a specific DC voltage.

Further, at this time, as shown in Fig. 12, the DC power source 168 is connected to the susceptor 16 of the lower electrode, and a DC voltage may be applied to the susceptor 16.

Further, it is also applicable to the susceptor 16 that connects the upper electrode 234' to the ground via the chamber 10, connects the high-frequency power source 170 to the lower electrode, and applies plasma to the high-frequency power source 170 as shown in FIG. For example, a plasma etching apparatus of a type of high frequency power of 13.56 MHz, in which case the variable DC power source 172 is connected to the susceptor 16 of the lower electrode and a specific DC voltage is applied, as shown in the above embodiment. effect.

Further, it is also applicable to the susceptor 16 which is connected to the lower electrode via the chamber 10 and the high-frequency power source 170 is connected to the lower electrode, as shown in Fig. 14, from the high-frequency power source 170. An etching device of a type of high frequency power for plasma formation is applied, and a variable DC power source 174 is applied to the upper electrode 234'.

10. . . Chamber (processing vessel)

16. . . Receptor (lower electrode)

34. . . Upper electrode

44. . . Power supply rod

46, 88. . . Integrator

48. . . First high frequency power supply

50. . . Variable DC power supply

51. . . Controller

52. . . On and off switch

66. . . Process gas supply

84. . . Exhaust

90. . . Second high frequency power supply

91. . . GND block

101. . . Si substrate

103. . . Etching target film

104. . . Anti-reflection film

105. . . Photoresist film

W. . . Semiconductor wafer (processed substrate)

Fig. 1 is a schematic cross-sectional view showing an example of a plasma etching apparatus used in the practice of the present invention.

Fig. 2 is a structural view showing an integrator connected to a first high-frequency power source of the plasma etching apparatus of Fig. 1.

Fig. 3 is a cross-sectional view showing the structure of a semiconductor wafer W used in the first embodiment of the present invention.

Fig. 4 is a graph showing changes in Vdc and thickness of the plasma sheath when a DC voltage is applied to the upper electrode in the plasma processing apparatus of Fig. 1.

Fig. 5 is a view showing a comparison of plasma states when a DC voltage is applied to the upper electrode and when it is not applied, in the plasma processing apparatus of Fig. 1.

Fig. 6 is an in-plane distribution diagram of the etching rate of the anti-reflection film when the applied DC voltage is changed.

Fig. 7 is an in-plane distribution diagram of the etching rate of the photoresist film when the applied DC voltage is changed.

Fig. 8 is a plan view showing the selection ratio of the reflection preventing film of the photoresist in Figs. 6 and 7.

Fig. 9 is a structural view of a semiconductor wafer for confirming the effects of the first embodiment of the present invention.

Fig. 10 is a structural view of a semiconductor wafer for confirming the effects of the second embodiment of the present invention.

Figure 11 is a schematic illustration of another example of a plasma etching apparatus to which the practice of the present invention is applicable.

Figure 12 is a cross-sectional view showing another example of a plasma etching apparatus to which the practice of the present invention is applicable.

Figure 13 is a schematic illustration of another example of a plasma etching apparatus to which the practice of the present invention is applicable.

Figure 14 is a cross-sectional view showing another example of a plasma etching apparatus to which the practice of the present invention is applicable.

10. . . Chamber (processing vessel)

10a. . . Grounding conductor

11. . . DepoShield

12. . . Insulation board

14. . . Receptor support

16. . . Receptor (lower electrode)

18. . . Electrostatic chuck

20. . . electrode

twenty two. . . DC power supply

twenty four. . . Focus ring

26. . . Inner wall member

28. . . Refrigerant room

30a. . . Piping

30b. . . Piping

32. . . Gas supply line

34. . . Upper electrode

36. . . Electrode plate

37. . . Gas discharge hole

38. . . Electrode support

40. . . Gas diffusion chamber

41. . . Gas flow hole

42. . . Insulating shielding member

44. . . Power supply rod

44a. . . Insulating member

46. . . Integrator

48. . . First high frequency power supply

50. . . Variable DC power supply

51. . . Controller

52. . . On and off switch

62. . . Gas inlet

64. . . Gas supply pipe

66. . . Process gas supply

68. . . Mass flow controller

70. . . Switch valve

80. . . exhaust vent

82. . . exhaust pipe

83. . . Exhaust plate

84. . . Exhaust

85. . . Moving import and export

86. . . gate

88. . . Integrator

90. . . Second high frequency power supply

91. . . GND block

92. . . Low pass filter

94. . . High pass filter

95. . . Control department

96. . . User interface

97. . . Memory department

Claims (5)

A plasma etching method for plasma etching a reflection preventing film formed on a target object, wherein the plasma etching method is provided in a processing container in which a first electrode and a second electrode are disposed opposite to each other The second electrode is supplied to the electrostatic chuck, and the processing system is disposed on the electrostatic chuck, and the object to be processed in which the etching target film, the anti-reflection film, and the patterned photoresist film are sequentially formed on the substrate a process for applying a first direct current voltage for adsorbing the object to be processed on the electrostatic chuck to the electrostatic chuck; a process for introducing a processing gas into the processing container; and the first electrode and the second a high-frequency power is applied to one of the electrodes to generate a plasma, and the process of etching the anti-reflection film is performed by using the patterned photoresist film as a mask; and etching of the anti-reflection film is performed as described above The process of applying the second DC voltage to one of the electrodes is performed so that the width of the opening of the anti-reflection film is narrower than the width of the opening of the patterned resist film. The anti-reflection film is applied to the first electrode while the second DC voltage is applied to the first electrode by sputtering, and the sputtered polymer is adhered to the anti-reflection film. The side wall of the part. A plasma etching method, characterized in that: in a processing container in which a first electrode and a second electrode are disposed opposite to each other, The second electrode is supplied to the electrostatic chuck, and the processing system is disposed on the electrostatic chuck, and the object to be processed in which the etching target film, the anti-reflection film, and the patterned photoresist film are sequentially formed is disposed on the substrate. a process of applying a first DC voltage for adsorbing the object to be processed on the electrostatic chuck to the electrostatic chuck; a process for introducing a processing gas into the processing container; and the first electrode and the second electrode Either one of the parties applies high-frequency power to generate a plasma, and the process of etching the anti-reflection film by using the patterned photoresist film as a mask; and the etching of the anti-etching film during the etching of the anti-reflection film a process of applying a second DC voltage to one of the electrodes so as to prevent the width of the opening of the film from being narrower than the width of the opening of the patterned resist film; and using the etched anti-reflection film as the etching The mask etches the anti-reflection film while etching the process of the object to be processed at a pattern size narrower than the width of the opening of the patterned photoresist film While the second DC voltage to the sputtering is attached to the first polymer is applied to the electrode, the first electrode, the polymers may be sputtered is attached to the side wall portion of the antireflection film is etched. The plasma etching method according to claim 1, wherein the second DC voltage is in the range of -200 to -1500V. The plasma etching method as described in claim 1 of the patent application scope, In the test object, the second DC voltage value in which the pattern size of the anti-reflection film is a desired size is obtained in advance, and the second DC voltage value is applied to one of the electrodes. The plasma etching method according to the first aspect of the invention, wherein the residual film amount of the patterned photoresist film is increased by applying the second DC voltage to the first electrode.